review.tizen.org Git - platform/upstream/mesa.git/log

nir/lower_returns: Append missing phis' sources after "break" insertion

After we lowered `return` into `break` - the control flow is changed and
the block with this change has a new successor, which means that in this
new successor phis should have additional source.

Since the instructions that use phis in the successor are predicated -
it's ok for a new phi source to be undef.

If `return` is lowered in a nested loop, `break` is inserted in the outer
loops, so all new blocks with break require the same changes to phis
described above.

Examples of NIR before lowering:

  block block_0:
  loop {
     block block_1:
     if ssa_2 {
       block block_2:
       return
       // succs: block_6
     } else {
       block block_2:
       break;
       // succs: block_5
     }
     block block_4:
  }
  block block_5:
  // preds: block_3
  vec1 32 ssa_4 = phi block_3: ssa_1
  // succs: block_6
  block block_6:

Here converting return to break should add block_2 to the phis
of block_5.

block block_0:
loop {
    block block_1:
    loop {
       block block_2:
       if ssa_2 {
         block block_3:
         return
         // succs: block_8
       } else {
         block block_4:
         break;
         // succs: block_6
       }
       block block_5:
    }
    block block_6:
    break;
    // succs: block_7
}
block block_7:
// preds: block_6
vec1 32 ssa_4 = phi block_6: ssa_1
// succs: block_8
block block_8:

Here converting return to break will insert conditional break in
the outer loop, changing block_6 predcessors.

Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3322
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3498
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6186>

zink: implement pipe_device_reset_callback

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6763>

v3dv: fix occlusion query inheritance in secondary command buffers

If a secondary command buffer has occlusion query inheritance then
draw calls recorded in it should update an active occlusion query
counter started in the primary command buffer.

If executing the secondary in a primary required to emit jobs and
not just a branch instruction, then we might need to create a new
job for the primary as well, and in that case we would lose the
occlusion query state, so we need to re-emit it at that point so
any additional draw calls recorded into the secondary that is being
executed continue to update the counter.

Fixes:
dEQP-VK.query_pool.concurrent_queries.secondary_command_buffer

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7373>

v3dv: add support for timestamp queries

V3D doesn't provide any means to acquire timestamps from the GPU
so we have to implement these in the CPU.

v2: enable timestampComputeAndGraphics and set timestampPeriod (Piñeiro)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7373>

radeonsi: fix RADEON_FLUSH flags conflicts

RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION and RADEON_FLUSH_NOOP used the same value.

Fixes: ed3c5fe4694 ("radeonsi: implement GL_INTEL_blackhole_render")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

driconf: add disable_protected_content_check option

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

egl/dri2: implement createImageFromDmaBufs3

And refuse to import image with protected_content enabled.

We don't want a compositor to import an encrypted buffer in a image
without the ProtectedContent attribute enabled, because that will
lead to incorrect display.

Similarly, if the compositor thinks the image is encrypted, we fail
the import if the buffer is not.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

dri: introduce createImageFromDmaBufs3

Extends createImageFromDmaBufs2 with a protected_content flag.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

egl: handle EGL_PROTECTED_CONTENT_EXT for eglImage

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

radeonsi: enable PIPE_CAP_DEVICE_PROTECTED_CONTENT

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

egl: implement EGL_EXT_protected_surface support

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

radeonsi: honor PIPE_BIND_PROTECTED

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

gallium: introduce PIPE_BIND_PROTECTED

Resources using this flag will be encrypted (eg using TMZ on radeonsi).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

gallium: add new cap PIPE_CAP_DEVICE_PROTECTED_CONTENT

Will be used to implement EGL_EXT_protected_surface.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5096>

v3dv: expose VK_KHR_maintenance1

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7364>

v3dv: implement vkTrimCommandPool

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7364>

v3dv: update assertion to match VK_KHR_maintenance1 semantics

Fixes crashes in:
dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.*

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7364>

v3dv: fix base slice selection for copies involving 3D images

For 3D images we should take the slice to copy from or to, from
the Z coordinate of the corresponding offset, not the base array
layer.

Fixes VK_KHR_maintenance1 tests:
dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.3d_to_2d_by_slices
dEQP-VK.api.copy_and_blit.core.image_to_image.3d_images.2d_to_3d_by_layers

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7364>

v3dv: add image view debug checks for VK_KHR_maintenance1

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7364>

radv,aco: optimize computing the sample mask for per-sample shading

I don't know why these values were introduced for but it seems like
we can optimize this by just doing:

gl_SampleMaskIn[0] = (SampleCoverage & (1 << gl_SampleID))

AMDGPU-PRO and AMDVLK apply the same formula to compute the
sample mask when per-sample shading is enabled.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7377>

radv,aco: adjust the sample mask only if per-sample shading is enabled

When per-sample shading isn't enabled, we can just load the
samplemask from the hardware which is always the coverage of
the entire pixel/fragment.

fossilds-db (VEGA10):
Totals from 131 (0.10% of 136546) affected shaders:
SGPRs: 5056 -> 5048 (-0.16%)
VGPRs: 2600 -> 2372 (-8.77%)
CodeSize: 115788 -> 112560 (-2.79%)
MaxWaves: 1266 -> 1274 (+0.63%)
Instrs: 20620 -> 20071 (-2.66%)
Cycles: 82416 -> 80220 (-2.66%)
VMEM: 51567 -> 35532 (-31.10%); split: +0.24%, -31.34%
SMEM: 8952 -> 8258 (-7.75%); split: +0.11%, -7.86%
SClause: 1223 -> 1199 (-1.96%); split: -2.62%, +0.65%
Copies: 1247 -> 1124 (-9.86%); split: -10.18%, +0.32%
PreVGPRs: 2112 -> 1981 (-6.20%)

Helps Britannia, Shadow of the Tomb Raider, Warhammer II and Control.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7377>

glsl: drop NMS OpenGL workarounds

No Mans Sky dropped its OpenGL backend on April 16, 2019 in favour
of its Vulkan backend. So here we drop the old OpenGL workarounds.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7362>

panfrost: Add missing alpha-first special formats

Not sure if these come up with OpenGL in practice.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Fix BGR233 component order

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Fix RGB5A1 formats

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@disroot.org>
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Use macro for panfrost_get_default_swizzle

Eventually this function should go away, but for now let's clean up a
bit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add missing 1/2/4/64-bit formats to XML

Less than 8-bit formats may pack multiple pixels in a byte along a row,
possibly padding along the edge. We already had one such format
(RGBA4_UNORM), here are the rest.

As far as I can tell, 64-bit formats are purely a theoretical
curiousity. I don't think any implementation actually supports them, do
not use. Might as well complete the list, though.

I'm not actually piping any new formats into Gallium with this commit,
that can come later if someone has a use case.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Icecream95 <ixn@disroot.org>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Rename VARYING_POS to SNAP4

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Rename VARYING_DISCARD to CONSTANT

Used for data that does not exist. If used for a load, it is a
zero-components read (so you can use a 0000 or 0001 swizzle) that does
not touch memory. If used as a store, writes are simply discarded.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Split out v6/v7 format tables

Midgard (v4, v5) and Bifrost v6 have swizzles on every pixel format
descriptor, allowing for arbitrary component reordering. With v7,
reordering is limited to a fixed set of common swizzles, which
simplifies the hardware but to some extent limits the formats available.

To handle, we split out the format tables, with the correct table for
the current hardware loaded as dev->formats.

v2: Switch sRGB flag from T/F to S/L per icecream's suggestion

v3: Add back Z16_UNORM formats to fix trace changes.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add v7-specific depth formats

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add miscellaneous missing Midgard formats

Just trying to flesh things out so we can see what's available in one
place.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add missing depth/stencil formats

Available even on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add v7 special colour formats

Required for some obscure lowerings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Remove panfrost_is_z24s8_variant

Z16 supports AFBC too nowadays, so this helper is misleading.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Remove duplicated format arg for ASTC

We don't want to hang onto the raw mali_format, but we already have the
pipe format right here, so just use that instead, avoiding a (false)
dependency.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Complete format_to_bifrost_blend

Instead of matching on the PIPE format directly, match on the internal
format of the tile buffer and pick the pixel format that corresponds to
the internal tile buffer format (which differs from the format written
back to memory in the general case).

We add a number of missing formats to accomodate this, including the
AU/PU variants of each tilebuffer pixel format, where the AU formats use
the extra bits to store extra precision for dithering but the PU formats
simply pad the extra bits with zeroes. For the moment we use AU
everywhere. I'm not sure if there's a cost associated.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Use panfrost_blendable_formats for blending

Finally the yak shaving pays off.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Use panfrost_blendable_formats for SFBD

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Use panfrost_blendable_formats for MFBD

v2: Fix tilebuffer size calculation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add a blendable format table

Map PIPE formats that are fixed-function blendable to their (internal,
writeback) tuple. Formats which are renderable but require a blend
shadeer will be handled elsewhere to keep this easy to verify.

Notice the subset of SFBD and MFBD color writeback formats used to
identify fixed-function blendable formats are bit compatible, so it
suffices to store only the MFBD variants.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Use consistent swizzle names in XML

These are not the canonical names but they are less ambiguous and will
integrate better with the format tables.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Add MALI_EXTRACT_INDEX helper

Extracts the 8-bit index from a 22-bit pixel format.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

panfrost: Don't double-compose swizzles

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: b9a136cdd1e ("panfrost: Implement BGRA textures")
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7352>

draw: Remove draw_install_aaline_stage dead code.

Remove dead code left over from commit dbb2cf388b79 ("draw: simplify
(and correct) aaline fallback (v2)").

Fix defect reported by Coverity Scan.

Logically dead code (DEADCODE)
dead_error_line: Execution cannot reach this statement:
(*aaline->stage.destroy)(&a....

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7265>

gallium/u_threaded: merge consecutive draw calls within batches

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

gallium/u_threaded: move a structure up to be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: implement multi_draw for compute-based primitive culling

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: set NOT_EOP for back-to-back draws on gfx10+

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: add support for multi draws

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: implement multi_draw but supporting only 1 draw

just adapting to the new interface

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: don't check info->count == 0

it won't work with multi draws

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi don't get count from pipe_draw_info in si_num_prims_for_vertices

This is needed for multi draws.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radeonsi: add num_draws parameter into si_need_gfx_cs_space

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

winsys/amdgpu: remove incorrect assertion check against max_check_space_size

Fixes: 114a899cc89fae "winsys/amdgpu: cs_check_space sets the minimum IB size for future IBs"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

gallium: add pipe_context::multi_draw

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

gallium: move pipe_draw_info::start/count to the beginning and pad empty space

for memcmp and merging draw calls

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7056>

radv: Fix variable name collision.

idx was aliased, and eb104e949ee4b7e0813d14f11a4a952bae48fe80 started
using the outer var in the inner scope ...

Fixes: eb104e949ee4b7e0813d14f11a4a952bae48fe80
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3701
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7388>

ci/x86: speed up piglit testing

Add python3 packages to speed up piglit run.

- lxml. An accelerated python xml library using libxml2 (http://lxml.de/)
- simplejson. A fast C based implementation of the python json library.
(https://simplejson.readthedocs.org/en/latest/)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7379>

android: aco: add aco_form_hard_clauses.cpp to Makefile.sources

Fixes the following building error:

external/mesa/src/amd/compiler/aco_interface.cpp:160:
error: undefined reference to 'aco::form_hard_clauses(aco::Program*)'

Fixes: 3dfbed2a8 ("aco: create s_clause on GFX10+")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7380>

etnaviv: don't import allocated scanout resources via from_handle

etna_resource_from_handle() recomputes (or second guesses) a lot of
properties we already have available in the allocation call. To make
things a bit more easier to follow, just import the BO without going
through the full handle import.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: pass correct layout to etna_resource_alloc for scanout resources

Since b96277653033 (etnaviv: rework compatible render base) the base resource
may be linear and a render compatible resource is allocated as needed. As
scanout surfaces without a modifier are always assumed to be linear, make
sure to pass the correct layout to etna_resource_alloc().

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: simplify etna_screen_bo_from_handle

There is no need to have a out_stride parameter, as the only callsite
already has the winsys handle, which includes the stride, so there is
no need to pass the stride back and forth.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: do proper cpu prep/fini when clearing allocated buffer

The debug memset 0 of all allocated buffers did not sync the buffer for CPU
access as required by the UAPI.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: cosmetic etna_resource_alloc fixes

Get rid if the local bo variable, we can just assign it to the pointer
in the etna_resource struct.
Get rid of superfluous clearing of the TS bo pointer, the struct is already
zero initialized.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: free tgsi tokens when shader state is deleted

The tokens are allocated using tgsi_dup_tokens when the shader state is
created, so we need to free them explicitly when deleting the shader state.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: tex_desc: fix TS compression enable

The TX_CTRL register has a bit to enable TS compression, the setting in
TS_SAMPLER_CONFIG is ignored for descriptor based textures. Apparently
256B tile mode already implies enabled compression to the HW, as with
the larger tile mode with compression was working fine, only the 128B
tile mode needs this change to work correctly.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: update headers from rnndb

Update to etna_viv commit c9a26f3b776a.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: blt: properly program surface TS offset for clears

We clear the wrong TS region for != level 0 surfaces or TS buffers
with a internal offset.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: drm: fix BO refcount race

There is a race where the BO refcount might drop to 0 before the
dmabuf/name import paths had a chance to grab a reference for a
BO found in the handle_table. The easiest solution is to keep the
refcount stable as long as the table_lock is held.

While a more involved scheme of rechecking the refcount before
actually destroying the BO might also work, the bo_del path isn't
called very often, so micro-optimizing a single mutex_lock seems
to be over-engineered, so go for the easy solution.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7367>

etnaviv: drop etna_pipe_wait(..)

It is unused -> drop it.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7371>

radeonsi: implement inlinable uniforms

This improves performance for uber shaders.

It must be enabled using the new driconf option.

The driver compiles the specialized shaders in another thread without stalls,
same as all other optimizations.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7057>

aco: Fix accidental copies, attempt two

Use auto to avoid mistyping the constness of the pair key, which
triggers implicit conversions rather than compilation errors.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7346>

intel/dev: Bump Max EU per subslice/dualsubslice

This isn't a problem right now because the previous max would give the
same result when aligned to a byte (8bits).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7288>

glthread: pin driver threads to the same L3 as the main thread regularly

This improves performance on my Ryzen 3900X, which has 4 L3 caches and
6 threads per L3.

The best improvement is 33% if the kernel CPU scheduler doesn't move
the main thread too often.

v2: pin only once in 128 batch flushes

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

util: completely rewrite and do AMD Zen L3 cache pinning correctly

This queries the CPU cache topology correctly.

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

util: add util_get_current_cpu using sched_getcpu and Windows equivalent

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

util: add util_set_thread_affinity helpers including Windows support

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

st/mesa: remove random L3 pinning heuristic for glthread

This is not very effective. A better solution will be added to glthread.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

util: consolidate thread_get_time functions

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

util: remove unused util_get_L3_for_pinned_thread

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7054>

android: fix libsync dependencies (v2)

(v2) Remove include from Android.common.mk
     Avoid adding libsync shared dependency in Android.common.mk
     Add libsync shared dependency where needed, for easier tracking

(v1) Fixes the following building errors:

In file included from external/mesa/src/gallium/drivers/freedreno/a3xx/fd3_query.c:27:
In file included from external/mesa/src/gallium/drivers/freedreno/freedreno_query_hw.h:33:
In file included from external/mesa/src/gallium/drivers/freedreno/freedreno_context.h:33:
external/mesa/src/util/libsync.h:48:10: fatal error: 'android/sync.h' file not found
         ^~~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/mesa/drivers/dri/i965/brw_sync.c:41:
external/mesa/src/util/libsync.h:48:10: fatal error: 'android/sync.h' file not found
         ^~~~~~~~~~~~~~~~
1 error generated.

In file included from external/mesa/src/gallium/auxiliary/util/u_tests.c:513:
external/mesa/src/util/libsync.h:48:10: fatal error: 'android/sync.h' file not found
         ^~~~~~~~~~~~~~~~
1 error generated.

FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/i965_dri_intermediates/LINKED/i965_dri.so
...
external/mesa/src/mesa/drivers/dri/i965/brw_sync.c:223: error: undefined reference to 'sync_wait'
external/mesa/src/mesa/drivers/dri/i965/brw_sync.c:287: error: undefined reference to 'sync_wait'

FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
external/mesa/src/util/libsync.h:142: error: undefined reference to 'sync_merge'
external/mesa/src/gallium/drivers/freedreno/freedreno_fence.c:94: error: undefined reference to 'sync_wait'
external/mesa/src/gallium/auxiliary/util/u_tests.c:575: error: undefined reference to 'sync_wait'

Fixes: 27b888794624 ("android: Add pre-4.7 Android kernel compatibility to our libsync header.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7306>

glsl: add extra pp tokens workaround and enable for CoR

The CTS now tests to make sure these are not allowed. However, previously
drivers (including Mesa) would allow them to exist and just issue a
warning. Some old applications such as Champions of Regnum seem to
depend on this.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/422

Fixes: 43047384c331 ("glsl/glcpp: Promote "extra token at end of directive" from warning to error")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7361>

intel/fs: Don't emit_uniformize when getting a constant SSBO index

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7340>

v3d/format: use XYZ1 swizzle for three-component formats

R11G11B10_FLOAT and R9G9B9E5_FLOAT are three-component formats, so we
shouldn't use 1 for the alpha component.

We don't know about any test/app getting fixed with this change, but
it is the equivalent to v3dv commit
e07c5467633431377ce4c9890f96d58cc7a77fdc. Vulkan CTS has some tests
that used that format and failed if not using XYZ1.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7365>

gallivm: zero init the temporary register storage.

Due to flow control we can end up with random values in here having
side effects.

This fixes a crash in gtk4-demo.

Fixes: 44a6b0107b37 ("gallivm: add nir->llvm translation (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7327>

aco: handle SDWA in the optimizer

Apply SGPRs/modifiers when possible and try not to break when SDWA
instructions are encountered.

No shader-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7349>

aco: don't allow destination opsel for v_cvt_pknorm

It doesn't make sense to do this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7349>

aco: fix combine_inverse_comparison()

fossil-db (Navi):
Totals from 16 (0.01% of 137413) affected shaders:
CodeSize: 6788 -> 6724 (-0.94%)
Instrs: 1250 -> 1234 (-1.28%)
Cycles: 4984 -> 4920 (-1.28%)

fossil-db (Polaris):
Totals from 16 (0.01% of 138881) affected shaders:
CodeSize: 7024 -> 6960 (-0.91%)
Instrs: 1337 -> 1321 (-1.20%)
Cycles: 5332 -> 5268 (-1.20%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7349>

aco: fix printing of some sdwa sels

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7349>

aco: assert a label only uses one of the members in ssa_info's union

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7349>

aco: create s_clause on GFX10+

This seems to give no measurable benefit to Strange Brigade or Shadow of
Mordor, but it's simple to do, helps in theory and all other compilers do
it.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5919>

aco: refactor split_store_data() to always split into evenly sized elements

This fixes a couple of issues on GFX67 and
has no negative impact on newer hardware

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7105>

intel/genxml: don't generate identical code for different branches

Quiets 16 Coverity warnings like:

CID 1403401: Identical code for different branches (IDENTICAL_BRANCHES)

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7351>

intel/tools: fix invalid type in argument to printf

$2 is exp2, exp2 is defined to be llint and llint is defined to be
unsigned long long int.

Fixes error reported by Coverity:
CID 1451141: Invalid type in argument to printf format specifier (PRINTF_ARGS)

Fixes: 70308a5a8a8 ("intel/tools: New i965 instruction assembler tool")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7351>

gallium/dri: fix dri2_from_planar for multiplanar images

Fix the gbm_dri_bo_get_handle_for_plane use case by allowing plane > 0
in dri2_from_planar for images with multiple planes in separate chained
texture resources.

Not all multiplanar resources are chained, though. The iris aux buffer
is a separate plane in the same resource.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7028>

gallium/dri: fix dri2_query_image for multiplanar images

Images with multiple planes in separate chained texture resources should
report the correct number of planes.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7028>

gallium/dri: allow create image for formats that only support SV or RT binding

Unconditionally requesting both bindings can lead to premature
failure to create a valid image.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7028>

nv50/ir/nir: don't use designated initializers

This is a C++20 feature...

Fixes: 8850a63161ab58d89c534a1069cda845bf69ecc8 ("radv/aco,nir/lower_subgroups: don't lower elect")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3693
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Tested-by: Andrew Randrianasulu <randrianasulu@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7338>