Nikita Popov [Tue, 27 Dec 2022 11:37:49 +0000 (12:37 +0100)]
Revert "[MergeLoadStoreMotion] Don't require GEP for sinking"
I missed a test failure in the DebugInfo directory.
This reverts commit
2c15b9d9e1a898cfd849db81b36d278eac3ef24e.
This reverts commit
fb435e1cb5842e1437436e9e7378dfc4106fdad8.
Nikita Popov [Tue, 27 Dec 2022 11:20:05 +0000 (12:20 +0100)]
[MergedLoadStoreMotion] Convert tests to opaque pointers (NFC)
Nikita Popov [Tue, 27 Dec 2022 11:17:58 +0000 (12:17 +0100)]
[MergeLoadStoreMotion] Don't require GEP for sinking
Allow sinking stores where both operands are the same, don't require
them to have an identical GEP in each block.
This came up when migrating tests to opaque pointers, where
zero-index GEPs are omitted.
Nikita Popov [Tue, 27 Dec 2022 11:03:59 +0000 (12:03 +0100)]
[MergedLoadStoreMotion] Add tests for store without GEPs (NFC)
MergedLoadStoreMotion currently only handles the case where each
store has it's own GEP. It fails to handle the case where the
store argument is exactly the same.
Nikita Popov [Tue, 27 Dec 2022 10:52:33 +0000 (11:52 +0100)]
[Tests] Rename InstMerge -> MergedLoadStoreMotion (NFC)
These are tests for the MergeLoadStoreMotion pass, so name them
accordingly.
Guillaume Chatelet [Tue, 27 Dec 2022 08:25:32 +0000 (08:25 +0000)]
[reland][libc][NFC] Add -fno-lax-vector-conversions compilation flag
Now that
a3d2c344773cc4fc95136fd67245880b34d8e335 has been submitted.
Guillaume Chatelet [Tue, 27 Dec 2022 10:16:23 +0000 (10:16 +0000)]
[libc][NFC] Fix lax vector conversion for aarch64
Nikita Popov [Tue, 27 Dec 2022 09:57:34 +0000 (10:57 +0100)]
[InterleavedAccess] Convert tests to opaque pointers (NFC)
Nikita Popov [Tue, 27 Dec 2022 09:56:49 +0000 (10:56 +0100)]
[LCSSA] Convert tests to opaque pointers (NFC)
Nikita Popov [Tue, 27 Dec 2022 09:54:35 +0000 (10:54 +0100)]
[Internalize] Convert tests to opaque pointers (NFC)
Nikita Popov [Tue, 27 Dec 2022 09:53:42 +0000 (10:53 +0100)]
[InferFunctionAttrs] Convert tests to opaque pointers (NFC)
serge-sans-paille [Mon, 26 Dec 2022 08:19:09 +0000 (09:19 +0100)]
[clang] Use a StringRef instead of a raw char pointer to store builtin and call information
This avoids recomputing string length that is already known at compile time.
It has a slight impact on preprocessing / compile time, see
https://llvm-compile-time-tracker.com/compare.php?from=
3f36d2d579d8b0e8824d9dd99bfa79f456858f88&to=
e49640c507ddc6615b5e503144301c8e41f8f434&stat=instructions:u
This a recommit of
e953ae5bbc313fd0cc980ce021d487e5b5199ea4 and the subsequent fixes
caa713559bd38f337d7d35de35686775e8fb5175 and
06b90e2e9c991e211fecc97948e533320a825470.
The above patchset caused some version of GCC to take eons to compile clang/lib/Basic/Targets/AArch64.cpp, as spotted in
aa171833ab0017d9732e82b8682c9848ab25ff9e.
The fix is to make BuiltinInfo tables a compilation unit static variable, instead of a private static variable.
Differential Revision: https://reviews.llvm.org/D139881
Guillaume Chatelet [Tue, 27 Dec 2022 08:30:19 +0000 (08:30 +0000)]
Revert "[libc][NFC] Add -fno-lax-vector-conversions compilation flag"
This breaks aarch64 build.
This reverts commit
32f4c3f1033e32b7d2b7ba310c46c8c0d4013eb0.
Guillaume Chatelet [Tue, 27 Dec 2022 08:25:32 +0000 (08:25 +0000)]
[libc][NFC] Add -fno-lax-vector-conversions compilation flag
eopXD [Thu, 22 Dec 2022 09:20:09 +0000 (01:20 -0800)]
[NFC][Clang][RISCV] Rename data member 'DefaultPolicy' to 'PolicyAttrs'
The naming here is strange since the value may still be updated.
Reviewed By: kito-cheng, khchen
Differential Revision: https://reviews.llvm.org/D140389
Shilei Tian [Tue, 27 Dec 2022 02:39:33 +0000 (21:39 -0500)]
[RFC][OpenMP] Update to Python3 for lit test
I think it's reasonable to upgrade to Python 3 for LIT test requirement because `lit` itself (`llvm/utils/lit/lit.py`) already switched to Python 3. In addition, LLVM already requires Python 3.6 to be the minimum version (https://llvm.org/docs/GettingStarted.html#software).
Reviewed By: jdoerfert, jhuber6
Differential Revision: https://reviews.llvm.org/D139855
Max Kazantsev [Tue, 27 Dec 2022 01:58:12 +0000 (08:58 +0700)]
[Test] Add tests with logical AND/OR
Fangrui Song [Tue, 27 Dec 2022 01:37:03 +0000 (17:37 -0800)]
[mlir] Include type_traits to support latest libc++
for std::make_unsigned_t
Nikolas Klauser [Tue, 20 Dec 2022 20:13:12 +0000 (21:13 +0100)]
[libc++] Granularize <type_traits> includes in <iterator>
Reviewed By: Mordante, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D140621
Kai Sasaki [Tue, 27 Dec 2022 00:30:00 +0000 (09:30 +0900)]
[mlir] Typos in affine dialect
Florian Hahn [Mon, 26 Dec 2022 22:46:24 +0000 (22:46 +0000)]
[VPlan] Remove redundant blocks by merging them into predecessors.
Add and run VPlan transform to fold blocks with a single predecessor
into the predecessor. This remove redundant blocks and addresses a TODO
to replace special handling for the vector latch VPBB.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D139927
Roman Lebedev [Mon, 26 Dec 2022 20:45:37 +0000 (23:45 +0300)]
[DAGCombine] `combineShuffleToZeroExtendVectorInReg()`: widen shuffle elements before trying to match
We might have sunk a bitcast into shuffle, and now it might be operating
on more fine-grained elements than what we'd match, so we must not be
dependent on whatever the granularity the shuffle happened to be in,
but transform it into the one canonical for us - with widest elements.
Roman Lebedev [Mon, 26 Dec 2022 21:41:59 +0000 (00:41 +0300)]
[NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG
Roman Lebedev [Mon, 26 Dec 2022 19:49:01 +0000 (22:49 +0300)]
[DAG] `combineShuffleToZeroExtendVectorInReg()`: try to match w/ commuted operands
We don't have any reason to expect that the operand we will match
is on any particular hand of the shuffle, so we should try both.
Roman Lebedev [Mon, 26 Dec 2022 18:46:20 +0000 (21:46 +0300)]
[AArch64] Custom lower `ISD::ZERO_EXTEND_VECTOR_INREG`
The baseline legalization for `ISD::ZERO_EXTEND_VECTOR_INREG`
(`VectorLegalizer::ExpandZERO_EXTEND_VECTOR_INREG`),
blends-in the zeros, but as mentioned e.g.
in
b4bd0a404fe26071dab0854dfd9767974909c7c4,
there is no such thing for AArch64.
So some of the shuffles that would be nicely lowered
by `LowerVECTOR_SHUFFLE()`, e.g. into `ZIP1`,
would now be unrecognizable after round-tripping
through `ISD::ZERO_EXTEND_VECTOR_INREG` recognition & legalization.
The most obvious solution is to just custom-lower
`ISD::ZERO_EXTEND_VECTOR_INREG` as the `ZIP1`-with-zeros,
like it would have been originally in that test case.
Roman Lebedev [Sun, 25 Dec 2022 19:16:30 +0000 (22:16 +0300)]
[DAGCombiner] Add a most basic `combineShuffleToZeroExtendVectorInReg()`
Sometimes we end up with a shuffles in DAG that would be
better represented as a `ISD::ZERO_EXTEND_VECTOR_INREG`,
and a failure to do so causes suboptimal codegen in a number of cases,
especially when we will then cast vector to scalar.
I acknowledge, the test changes here are rather underwhelming,
but as with all of codegen, it's always a yak shawing,
and this is the most stripped down version of the patch
that shows *some* effect without having insurmountable amount
of fallout to deal with. The next change resolves this regression.
The transformation will be extended in follow-ups.
Roman Lebedev [Mon, 26 Dec 2022 18:06:20 +0000 (21:06 +0300)]
[NFC][AArch64] Add a few vector shuffle tests that should be `zip1`
At least, they are equivalent to the `@vzipNoBlend`, which is lowered into zip1.
tlattner [Mon, 26 Dec 2022 19:29:44 +0000 (11:29 -0800)]
Commit changes to the Code of Conduct that make it more clear regarding behavior outside of LLVM spaces that impact the safety of our community members. Discussion may be found here: https://discourse.llvm.org/t/code-of-conduct-changes-related-to-llvm-project-policy-changes/64197
Sanjay Patel [Mon, 26 Dec 2022 18:12:44 +0000 (13:12 -0500)]
[InstCombine] do not add "nuw" to 1<<X if the "1" has undefined elements
This was noted as a potential miscompile in the post-commit feedback
for the patch that added this fold:
d4493dd1ed58ac3f1eab0
Sanjay Patel [Mon, 26 Dec 2022 17:34:47 +0000 (12:34 -0500)]
[InstCombine] replace undef in vector tests with poison; NFC
I left a few of the existing undef tests in place for extra
coverage and because one of those was noted as a miscompile in
the post-commit feedback for
d4493dd1ed58ac3f1eab0, but we are
transitioning to poison, so it is more valuable to test the
expected IR going forward.
Michał Górny [Mon, 26 Dec 2022 13:30:35 +0000 (14:30 +0100)]
[lldb] [utils] Fix linking lit-cpuid to LLVM dylib
Use `LINK_COMPONENTS` instead of manual `target_link_libraries` to link
lit-cpuid to LLVM components. This ensures that dylib is used along
with `LLVM_LINK_LLVM_DYLIB` rather than linking to component libraries
that may not be installed.
This fixes build failure on Gentoo after a dep on TargetParser component
was added in
f09cf34d00625e57dea5317a3ac0412c07292148.
Differential Revision: https://reviews.llvm.org/D140671
Florian Hahn [Mon, 26 Dec 2022 16:02:59 +0000 (16:02 +0000)]
Revert "[IPSCCP] Enable specialization of functions."
This reverts commit
2656572d485127cc30b8fe9752024d2a0f1c50db.
It looks like CINT2017rate/502.gcc_r gets mis-compiled with LTO + PGO on
AArch64 with function specialization.
Danila Malyutin [Fri, 23 Dec 2022 16:47:31 +0000 (19:47 +0300)]
[TwoAddressInstruction] Constrain RegClass when processing a statepoint
This transformation could've triggered a verifier assert if RegA and RegB
were of different reg classes. Fix this by constraining as the comment
for replaceRegWith suggests.
Differential Revision: https://reviews.llvm.org/D140672
Andrei Safronov [Mon, 26 Dec 2022 11:00:00 +0000 (12:00 +0100)]
[Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions
Add branch/jump/call/l32r instructions and fixups support. Add R_XTENSA_32/R_XTENSA_SLOT0_OP
relocations in object files generation. Modify tests to support new instructions.
Add tests for relocations and fixups.
Differential Revision: https://reviews.llvm.org/D64836
Andrei Safronov [Mon, 26 Dec 2022 10:58:36 +0000 (11:58 +0100)]
[Xtensa 9/10] Add basic support of Xtensa disassembler
Differential Revision: https://reviews.llvm.org/D64835
Andrei Safronov [Mon, 26 Dec 2022 10:56:06 +0000 (11:56 +0100)]
[Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions
Add new subset of Core Instructions (not full yet). Add appropriate operands description,
modify asm parser, printer and code emitter. Modify tests to support new instructions.
Differential Revision: https://reviews.llvm.org/D64834
Andrei Safronov [Mon, 26 Dec 2022 10:55:06 +0000 (11:55 +0100)]
[Xtensa 7/10] Add Xtensa instruction printer
Add printer for current instructions and operands subsets.
Also add basic tests of the Xtensa instructions.
Differential Revision: https://reviews.llvm.org/D64833
Andrei Safronov [Mon, 26 Dec 2022 10:53:44 +0000 (11:53 +0100)]
[Xtensa 6/10] Add Xtensa basic assembler parser
Currently parse just described in *.td files Xtensa instructions and operands subsets.
Differential Revision: https://reviews.llvm.org/D64832
Andrei Safronov [Mon, 26 Dec 2022 10:52:38 +0000 (11:52 +0100)]
[Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality
Differential Revision: https://reviews.llvm.org/D64831
Andrei Safronov [Mon, 26 Dec 2022 10:49:11 +0000 (11:49 +0100)]
[Xtensa 4/10] Add basic *td files with Xtensa architecture description
Add initial Xtensa.td file with target machine description. Add XtensaInstrInfo.td,
currently describe just susbet of Core Instructions like ALU, Processor control,
memory barrier and some move instructions. Add descriptions of the instructions
formats(XtensaInstrInfo.td) and some immediate instruction operands(XtensaOperands.td).
Add General Registers and Special Registers classes.
Differential Revision: https://reviews.llvm.org/D64830
Andrei Safronov [Mon, 26 Dec 2022 10:45:59 +0000 (11:45 +0100)]
[Xtensa 3/10] Add initial version of the Xtensa backend
Add Xtensa MCTargetDesc stub. Add XtensaTargetMachine and XtensaTargetInfo.
Modify llib/Target/LLVMBuild.txt. Now Xtensa target could be builded as EXPERIMENTAL.
Differential Revision: https://reviews.llvm.org/D64829
Andrei Safronov [Mon, 26 Dec 2022 10:39:46 +0000 (11:39 +0100)]
[Xtensa 2/10] Add Xtensa ELF definitions
Add file with Xtensa ELF relocations. Add Xtensa support to ELF.h,
ELFObject.h and ELFYAML.cpp. Add simple test of Xtensa ELF representation in YAML.
Differential Revision: https://reviews.llvm.org/D64827
Andrei Safronov [Mon, 26 Dec 2022 10:37:28 +0000 (11:37 +0100)]
[Xtensa 1/10] Recognize Xtensa in triple parsing code
I'm sharing initial set of patches that adds LLVM backend for Xtensa architecture.
It is based on this LLVM fork https://github.com/espressif/llvm-xtensa.
I prepared patches by similar way like it was already successfully done for RISCV, i.e. incrementally add an initial MC layer for Xtensa by small chunks which could be reviewable.
Differential Revision: https://reviews.llvm.org/D64826
WANG Xuerui [Mon, 26 Dec 2022 12:15:55 +0000 (20:15 +0800)]
[LoongArch][test] Regenerate checks for the ghc-cc.ll test case
Seems the codegen was stale (the extra `ret` after the tail call should
not be there, and indeed it is not emitted by the current code), plus
the whitespaces are different from the update_llc_test_checks.py style.
Simply regenerate it to fix the test failure.
Differential Revision: https://reviews.llvm.org/D140670
Lin Runze [Mon, 26 Dec 2022 10:37:09 +0000 (18:37 +0800)]
[LoongArch] Add GHC Calling Convention
This is modeled after [[ https://reviews.llvm.org/D89788 | the RISCV GHC calling convention]]
and matches [[ https://gitlab.haskell.org/ghc/ghc/-/merge_requests/9292 | the corresponding GHC change ]].
Reviewed By: xen0n, wangleiat
Differential Revision: https://reviews.llvm.org/D137495
Michał Górny [Mon, 26 Dec 2022 09:21:44 +0000 (10:21 +0100)]
[clang] [OpenMP] Test amdgcn_openmp_device_math_c.c test on 32-bit platforms
Explicitly pass triple to the test compiler to prevent failure when
the host triple is 32-bit. This is the same solution
as
f74e3d2f81d2aae47d6032fc1d23114460d48a37, thanks to Joseph Huber
for it.
Max Kazantsev [Mon, 26 Dec 2022 08:58:18 +0000 (15:58 +0700)]
[Test] Update inverse test for turn-to-invariant to what they meant to be
They were supposed to test inverted branches with OR condition, not AND.
Fixed this now.
Max Kazantsev [Mon, 26 Dec 2022 08:00:27 +0000 (15:00 +0700)]
[IndVars][NFC] Factor out condition creation in optimizeLoopExitWithUnknownExitCount
This is a preparation step to support optimization of conditions that are not immediately ICmp.
Max Kazantsev [Mon, 26 Dec 2022 07:37:49 +0000 (14:37 +0700)]
[Test] Add test showing potential conflict b/w AND elimination and IV widening
Vitaly Buka [Mon, 26 Dec 2022 06:54:27 +0000 (22:54 -0800)]
Revert "[clang] Use a StringRef instead of a raw char pointer to store builtin and call information"
Revert "Fix lldb option handling since
e953ae5bbc313fd0cc980ce021d487e5b5199ea4 (part 2)"
Revert "Fix lldb option handling since
e953ae5bbc313fd0cc980ce021d487e5b5199ea4"
GCC build hangs on this bot https://lab.llvm.org/buildbot/#/builders/37/builds/19104
compiling CMakeFiles/obj.clangBasic.dir/Targets/AArch64.cpp.d
The bot uses GNU 11.3.0, but I can reproduce locally with gcc (Debian 12.2.0-3) 12.2.0.
This reverts commit
caa713559bd38f337d7d35de35686775e8fb5175.
This reverts commit
06b90e2e9c991e211fecc97948e533320a825470.
This reverts commit
e953ae5bbc313fd0cc980ce021d487e5b5199ea4.
eopXD [Sun, 25 Dec 2022 15:38:01 +0000 (07:38 -0800)]
[NFC][Clang][RISCV] Reduce for-loop with SmallVector utility
As topic, this commit reduces the for-loops with utilities of SmallVector.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D140661
Joseph Huber [Tue, 20 Dec 2022 22:02:07 +0000 (16:02 -0600)]
[Clang] Add `nvptx-arch` tool to query installed NVIDIA GPUs
We already have a tool called `amdgpu-arch` which returns the GPUs on
the system. This is used to determine the default architecture when
doing offloading. This patch introduces a similar tool `nvptx-arch`.
Right now we use the detected GPU at compile time. This is unhelpful
when building on a login node and moving execution to a compute node for
example. This will allow us to better choose a default architecture when
targeting NVPTX. Also we can probably use this with CMake's `native`
setting for CUDA now.
CUDA since 11.6 provides `__nvcc_device_query` which has a similar
function but it is probably better to define this locally if we want to
depend on it in clang.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D140433
Jojo R [Wed, 9 Nov 2022 08:17:20 +0000 (16:17 +0800)]
[RISCV] Implement assembler support for XTHeadVdot
This patch implements the T-Head vendor extensions (XTHeadVdot),
which is documented here, it's based on standard vector extension v1.0:
https://github.com/T-head-Semi/thead-extension-spec
Owen Anderson [Sat, 24 Dec 2022 05:03:23 +0000 (22:03 -0700)]
[NFC] Elminate some needless nested-map complexity.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D140648
Owen Anderson [Sun, 25 Dec 2022 04:46:05 +0000 (21:46 -0700)]
Remove workaround for libstdc++ 4.8.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D140656
Chen Zheng [Thu, 22 Dec 2022 10:57:11 +0000 (05:57 -0500)]
[DebugInfo] make DW_LANG_C11 respect -gstrict-dwarf
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D140544
Youling Tang [Mon, 26 Dec 2022 01:33:54 +0000 (09:33 +0800)]
[compiler-rt] Fix build errors when using gcc on LoongArch
- GCC does not recognize $fcsr0, uses $r0 instead.
- GCC does not implement __builtin_thread_pointer, which can be
obtained directly through $tp.
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D140545
Roman Lebedev [Mon, 26 Dec 2022 00:56:58 +0000 (03:56 +0300)]
[NFC][DAGCombiner] `canCombineShuffleToAnyExtendVectorInreg()`: take matcher as callback
Roman Lebedev [Sun, 25 Dec 2022 22:43:49 +0000 (01:43 +0300)]
[NFC][DAG] `canCombineShuffleToAnyExtendVectorInreg()`: check for legal op before matching
Likewise as with legal types check, might as well not match if won't use.
Roman Lebedev [Sun, 25 Dec 2022 21:41:12 +0000 (00:41 +0300)]
[NFC][Analysis] Implement `getShuffleMaskWithWidestElts()` wrapper (+tests)
It will be needed in an upcoming patch to implement some shuffle combining.
Roman Lebedev [Sun, 25 Dec 2022 21:03:45 +0000 (00:03 +0300)]
[NFC][DAGCombiner] Extract `canCombineShuffleToAnyVectorExtendInReg()` helper
Adding zero-ext support isn't as straight-forward, and it's easier
to to so in a new function, but this helper is useful there.
This does not change any existing behaviour.
Roman Lebedev [Sun, 25 Dec 2022 18:20:43 +0000 (21:20 +0300)]
[NFC][DAG] `combineShuffleToVectorExtend()`: check that the type is legal first
There is no point in doing any of the potentially-costly matching
if we will inevitably give up anyway.
Ilia Diachkov [Sun, 25 Dec 2022 21:16:14 +0000 (00:16 +0300)]
[SPIRV] support __spirv_Load/Store builtin functions
The patch adds support for the builtin functions __spirv_Load and
__spirv_Store. One test is added to demonstrate the improvement.
Differential Revision: https://reviews.llvm.org/D140490
Florian Hahn [Sun, 25 Dec 2022 21:34:58 +0000 (21:34 +0000)]
[VPlan] Use VPBB in sinkScalarOperands directly. (NFC)
Suggested by @Ayal in D139790.
Stephen Tozer [Tue, 20 Dec 2022 10:01:56 +0000 (10:01 +0000)]
[DebugInfo] Fix: Variables that have no non-empty values being emitted when they have a DBG_VALUE_LIST
This patch fixes a simple bug where `DbgValueHistoryMap::hasNonEmptyLocation` was incorrectly handling DBG_VALUE_LIST instructions, treating empty values as non-empty, causing empty variables to be emitted into DWARF.
Reviewed By: Orlando
Differential Revision: https://reviews.llvm.org/D133925
LLVM GN Syncbot [Sun, 25 Dec 2022 21:05:12 +0000 (21:05 +0000)]
[gn build] Port
f0756e086010
Vitaly Buka [Sun, 25 Dec 2022 20:49:35 +0000 (12:49 -0800)]
Revert "[clang-format] Add an option to format integer literal separators"
Revert "[clang-format] Disable FixRanges in IntegerLiteralSeparatorTest"
Breaks buildbots, details in https://reviews.llvm.org/D140543
This reverts commit
879bd9146a2c9ea395abd7c1ebd0f76f414a4967.
This reverts commit
46c94e5067b5f396c24bb950505c79bc819bd4b8.
Craig Topper [Sun, 25 Dec 2022 20:40:53 +0000 (12:40 -0800)]
Revert "[RISCV] Enable the LocalStackSlotAllocation pass support."
This reverts commit
180397cdded67a8fdf56f92a0b70d32f0dac8af6.
This seems to cause llvm-testsuite failures.
Nikolas Klauser [Sun, 18 Dec 2022 23:02:44 +0000 (00:02 +0100)]
[libc++] Implement constexpr {isfinite, isinf, isnan, isnormal}
This starts implementing P0533
Reviewed By: Mordante, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D140277
Joseph Huber [Sun, 25 Dec 2022 15:47:04 +0000 (09:47 -0600)]
[OpenMP] Fix test on 32-bit platforms
Summary:
This test didn't specify the triple so it defaulted to the user's, if
this was 32-bit then it failed due to a diagnostic message.
Alexey Lapshin [Sun, 25 Dec 2022 14:25:18 +0000 (15:25 +0100)]
[NFC][ADT] Rename StringMapEntry *Create() into StringMapEntry *create.
Roman Lebedev [Sun, 25 Dec 2022 13:43:20 +0000 (16:43 +0300)]
[NFC][SupportTests] Adjust `UnsignedDivideUsingMagic()` for readability
Alexandros Lamprineas [Sun, 25 Dec 2022 08:05:21 +0000 (10:05 +0200)]
[IPSCCP] Enable specialization of functions.
This patch enables Function Specialization by default at all
optimization levels except Os, Oz.
Compilation Time Overhead:
--------------------------
Measured the Instruction Count increase (Geomean) for CTMark from
the llvm-testsuite as in https://llvm-compile-time-tracker.com.
* {-O3, Non-LTO}: +0.136% Instruction Count
* {-O3, LTO}: +0.346% Instruction Count
Performance Uplift:
-------------------
Measured +9.121% score increase for 505.mcf_r from SPEC Int 2017
(Tested on Neoverse N1 with -O3 + LTO)
Correctness Testing:
--------------------
* Passes bootstrap Clang with ASAN + LTO + FuncSpec aggressive options:
{ MaxClonesThreshold=10,
SmallFunctionThreshold=10,
AvgLoopIterationCount=30,
SpecializeOnAddresses=true,
EnableSpecializationForLiteralConstant=true,
FuncSpecializationMaxIters=10 }
* Builds Chromium and passes its unittests with the above options + ThinLTO.
For more info please refer to
https://discourse.llvm.org/t/rfc-should-we-enable-function-specialization/61518
Differential Revision: https://reviews.llvm.org/D140210
eopXD [Sat, 24 Dec 2022 13:12:35 +0000 (05:12 -0800)]
[Doc] Replace PYTHON_EXECUTABLE with Python3_EXECUTABLE
As topic, the variable to specify the python executable now should be this.
This is probably something that was left out in D78762.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D140652
LLVM GN Syncbot [Sun, 25 Dec 2022 02:55:37 +0000 (02:55 +0000)]
[gn build] Port
46c94e5067b5
LLVM GN Syncbot [Sun, 25 Dec 2022 02:55:36 +0000 (02:55 +0000)]
[gn build] Port
066b492b747a
Owen Pan [Sun, 25 Dec 2022 02:47:23 +0000 (18:47 -0800)]
[clang-format] Disable FixRanges in IntegerLiteralSeparatorTest
The FixRanges unit test from
46c94e5067b5 breaks the build bots.
Disable it for now.
Kshitij Jain [Mon, 19 Dec 2022 04:07:42 +0000 (04:07 +0000)]
Adds support for GOT relocations to i386/ELF backend
This CR adds support for GOT relocations to the JITLink i386/ELF backend.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D140279
Kshitij Jain [Sun, 20 Nov 2022 04:09:29 +0000 (04:09 +0000)]
Updates and adds tests for i386/ELF JITLink backend
This CR modifies the existing 32 bit pcrel relocation test to
include the case when the relocation target might be present at
a smaller address than the address of the location that needs to be
patched.
Additionally, it adds a test for 16 bit absolute relocation.
Reviewed By: sunho
Differential Revision: https://reviews.llvm.org/D138372
Roman Lebedev [Sat, 24 Dec 2022 21:48:05 +0000 (00:48 +0300)]
[NFC] Add exhaustive test coverage for `{Un}signedDivisionByConstantInfo`
Use this wrapper if you want to try brute-forcing wider bit widths:
https://godbolt.org/z/3xGzTM881
I've brute-forced i16 for both signed and unsigned, and we're all good.
As mentioned in https://reviews.llvm.org/D140636
Owen Pan [Thu, 22 Dec 2022 09:21:17 +0000 (01:21 -0800)]
[clang-format] Add an option to format integer literal separators
Closes #58949.
Differential Revision: https://reviews.llvm.org/D140543
Florian Hahn [Sat, 24 Dec 2022 21:52:28 +0000 (21:52 +0000)]
[ConstraintElim] Add missing CHECK lines.
Florian Hahn [Sat, 24 Dec 2022 21:51:26 +0000 (21:51 +0000)]
[ConstraintElim] Add extra test with chained GEPs without inbounds.
Florian Hahn [Sat, 24 Dec 2022 21:46:46 +0000 (21:46 +0000)]
[ConstraintElim] Convert tests to use opaque pointers (NFC).
Florian Hahn [Sat, 24 Dec 2022 18:33:36 +0000 (18:33 +0000)]
[LV] Use SCEV to check if the trip count <= VF * UF.
Just comparing constant trip counts causes LV to miss cases where the
vector loop body only executes once.
The motivation for this is to remove the need for unrolling to remove
vector loop back-edges, if the body only executes once in more cases.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D133017
Roman Lebedev [Sat, 24 Dec 2022 16:18:50 +0000 (19:18 +0300)]
[NFC][Codegen][X86] Autogenerate check lines in shift-i256.ll
Roman Lebedev [Sat, 24 Dec 2022 16:12:27 +0000 (19:12 +0300)]
[NFC][Codegen][AVR] Make shift.ll autogenerate-able
Roman Lebedev [Sat, 24 Dec 2022 15:39:57 +0000 (18:39 +0300)]
[NFC][Codegen] Add tests with oversized shifts by non-byte-multiple
Roman Lebedev [Sat, 24 Dec 2022 15:39:48 +0000 (18:39 +0300)]
[NFC][Codegen] Rename tests for oversized shifts by byte multiple
Mark de Wever [Sun, 20 Mar 2022 12:40:02 +0000 (13:40 +0100)]
[libc++][chrono] Add calendar type formatters.
Some of the calendar types have landed before, this adds the missing
set. Note this does not complete the implementation of the chrono
formatters.
This removes the `chrono` header for some transitive include in C++17
mode. This is needed to avoid inclusion cycles.
Partially implements:
- P1361 Integration of chrono with text formatting
- P2372 Fixing locale handling in chrono formatters
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D137022
serge-sans-paille [Sat, 24 Dec 2022 11:53:50 +0000 (12:53 +0100)]
Fix lldb option handling since
e953ae5bbc313fd0cc980ce021d487e5b5199ea4 (part 2)
Option tables are no longer null-terminated.
This is a follow-up to https://reviews.llvm.org/D139881
serge-sans-paille [Sat, 24 Dec 2022 10:56:21 +0000 (11:56 +0100)]
Fix lldb option handling since
e953ae5bbc313fd0cc980ce021d487e5b5199ea4
Option tables are no longer null-terminated.
This is a follow-up to https://reviews.llvm.org/D139881
serge-sans-paille [Mon, 12 Dec 2022 16:02:15 +0000 (17:02 +0100)]
[clang] Use a StringRef instead of a raw char pointer to store builtin and call information
This avoids recomputing string length that is already known at compile
time.
It has a slight impact on preprocessing / compile time, see
https://llvm-compile-time-tracker.com/compare.php?from=
3f36d2d579d8b0e8824d9dd99bfa79f456858f88&to=
e49640c507ddc6615b5e503144301c8e41f8f434&stat=instructions:u
This is a recommit of
719d98dfa841c522d8d452f0685e503538415a53 that into
account a GGC issue (probably
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92181) when dealing with
intiailizer_list and constant expressions.
Workaround this by avoiding initializer list, at the expense of a
temporary plain old array.
Differential Revision: https://reviews.llvm.org/D139881
Vitaly Buka [Sat, 24 Dec 2022 05:29:03 +0000 (21:29 -0800)]
Revert "[DebugInfo] Variables with only empty values emitting when one is variadic"
Breaks HWASAN somehow.
Fails at
def915c39cc4e18b304c7a8c4761cc4531c3bc4b
https://lab.llvm.org/buildbot/#/builders/236/builds/1547
Pass at
def915c39cc4e18b304c7a8c4761cc4531c3bc4b^
https://lab.llvm.org/buildbot/#/builders/236/builds/1529
This reverts commit
def915c39cc4e18b304c7a8c4761cc4531c3bc4b.
Craig Topper [Sat, 24 Dec 2022 04:54:54 +0000 (20:54 -0800)]
[RISCV] Support the short-forward-branch predicated ops in RISCVSExtWRemoval.
Lang Hames [Sat, 24 Dec 2022 05:01:09 +0000 (21:01 -0800)]
[examples] Fix leaks in OrcV2 c-bindings examples.
rdar://
103599609
Phoebe Wang [Sat, 24 Dec 2022 03:40:59 +0000 (11:40 +0800)]
[X86][Reduce] Preserve fast math flags when change it. NFCI
@arsenm raised a good question that we should use a flag guard.
But I found it is not a problem as long as user uses intrinsics only: https://godbolt.org/z/WoYsqqjh3
Anyway, it is still nice to have.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D140467
Stella Stamenova [Sat, 24 Dec 2022 01:31:08 +0000 (17:31 -0800)]
Revert "Apply shortened printing/parsing form to linalg.reduce."
This reverts commit
281c2d49c929c2130e5f1f0e02d6e96dbf14494a.
This broke the windows mlir buildbot:
https://lab.llvm.org/buildbot/#/builders/13/builds/30167
Stella Stamenova [Sat, 24 Dec 2022 01:29:42 +0000 (17:29 -0800)]
Revert "[mlir][GPU] Add known_block_size and known_grid_size to gpu.func"
This reverts commit
85e38d7cd670371206f6067772dc822049d2cbd8.
This broke the windows mlir buildbot:
https://lab.llvm.org/buildbot/#/builders/13/builds/30180/steps/6/logs/stdio
Jez Ng [Sat, 24 Dec 2022 00:44:56 +0000 (19:44 -0500)]
[lld-macho] Standardize error messages
Errors / warnings that originate from a particular file should be of the
form `$file: $message`.
Reviewed By: #lld-macho, keith
Differential Revision: https://reviews.llvm.org/D140634