Simon Glass [Thu, 14 Nov 2019 19:57:19 +0000 (12:57 -0700)]
common: Move sorting functions to their own header file
These don't need to be in common.h so move them out into a new header.
Also add some missing comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:18 +0000 (12:57 -0700)]
common: Move bootcount functions to their header file
These don't need to be in common.h so move them out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:17 +0000 (12:57 -0700)]
spl: bootcount: Move code out of header file
It is not good practice to write code in a header file. If it is included
multiple times then the code can cause duplicate functions.
Move the bootcount_store() and bootcount_load() functions into SPL.
Note: bootcount is a bit strange in that it uses driver model but does not
define proper drivers. This should be fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:16 +0000 (12:57 -0700)]
crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.
With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:15 +0000 (12:57 -0700)]
crc: Fix code style with crc functions
Some of these have a space before the bracket. Drop it to fix the style.
Add some missing function comments while here.
Note that u32 and u8 cannot be used here since crc.h is included on the
host side.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:14 +0000 (12:57 -0700)]
common: Drop linux/crc8.h
We have an existing U-Boot header for the one function that this defines.
Use that instead of the linux/ one. Move over the nice comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:13 +0000 (12:57 -0700)]
common: Move random-number functions into their own header
Create a new rand.h header file and move functions into it, to reduce
the size of common.h
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:12 +0000 (12:57 -0700)]
status_led: Tidy up the code style
There are a few whitespace problems with this code. Tidy them up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:11 +0000 (12:57 -0700)]
common: Drop global inclusion of status_led.h
This is only used by a few files so it should not be in the common header.
Move it out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 14 Nov 2019 19:57:10 +0000 (12:57 -0700)]
Drop CONFIG_SHOW_ACTIVITY
This feature is not enabled by any board. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 14 Nov 2019 19:57:09 +0000 (12:57 -0700)]
common: Move older CPU functions to their own header
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 28 Nov 2019 12:34:41 +0000 (07:34 -0500)]
Merge git://git.denx.de/u-boot-socfpga
- Assorted Gen5 fixes
Tom Rini [Thu, 28 Nov 2019 12:34:21 +0000 (07:34 -0500)]
Merge git://git.denx.de/u-boot-usb
- USB keyboard improvements
Tom Rini [Thu, 28 Nov 2019 12:33:45 +0000 (07:33 -0500)]
Merge tag 'mmc-11-27-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc update and some cleanup in ls1021a/mpc83xx code
- mmc tmio sdhi update for hs400
Tom Rini [Thu, 28 Nov 2019 12:33:16 +0000 (07:33 -0500)]
Merge tag 'u-boot-stm32-
20191126' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
Tom Rini [Thu, 28 Nov 2019 12:32:44 +0000 (07:32 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- powerpc: Fix DM_MMC related build warnings by adding eSDHC device
module support for T4240RDB, T2080RDB, T1042D4RDB, T1024RDB, P5040DS,
P4080DS, P3041DS, P2041RDB, P2020RDB, P1020RDB platforms
Marek Vasut [Sat, 23 Nov 2019 12:36:25 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Add calibration tables
Instead of using single fixed value for the calibration offset,
add tables which dynamically adjust this per calibration code
from the SCC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:24 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Skip bad taps
Some of the tuning taps produce suboptimal results. Add code
which skips those "bad" taps.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:23 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Add SCC error checking
Check SCC for errors after check command if applicable and
optionally adjust the bus skew settings accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:22 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Disable auto-retuning in HS400
Disable the auto-retuning in HS400 mode in favor of manual calibration.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:21 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Adjust HS400 calibration offsets
Adjust the TMPPORT3 offsets according to the latest information
from the chip vendor.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:20 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Adjust DT2FF settings for HS400 mode
Adjust the DT2FF offsets in HS400 according to latest information
from the chip vendor.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:19 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Use 4 tuning taps on M3W up to ES1.2
The M3W up to ES1.2 uses 4 tuning taps for HS400, make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:18 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Track SMPCMP valu in private data
Retain the SMPCMP value from last calibration in private data.
This will be later used for skipping bad taps.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Nov 2019 12:36:17 +0000 (13:36 +0100)]
mmc: tmio: sdhi: Track current tap number in private data
Retain the tap number from last calibration in private data. This
will be later used for SCC error checking after each command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Yangbo Lu [Tue, 12 Nov 2019 11:28:39 +0000 (19:28 +0800)]
mpc83xx: remove unused clock.h
The clock.h was to define mxc_get_clock() providing clock value
to fsl_esdhc driver. Since fsl_esdhc driver is using global data
gd->arch.sdhc_clk directly now, we can remove this file.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Tue, 12 Nov 2019 11:28:38 +0000 (19:28 +0800)]
arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Tue, 12 Nov 2019 11:28:37 +0000 (19:28 +0800)]
arm: ls1021a: drop redundant board_mmc_init()
The board_mmc_init() defined in board files is actually
doing same thing with the cpu_mmc_init() defined in
arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Tue, 12 Nov 2019 11:28:36 +0000 (19:28 +0800)]
mmc: fsl_esdhc: get clock directly from global data
This patch is to get clock directly from global data.
- Remove uclass clk api method. This was what i.MX platforms were
using, while QorIQ platforms weren't.
- Get clock only from global data, dropping mxc_get_clock().
QorIQ eSDHC controllers on one silicon use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Baruch Siach [Sun, 3 Nov 2019 10:00:27 +0000 (12:00 +0200)]
mmc: sdhci: make sdhci_get_cd static
sdhci_get_cd() is not referenced anywhere else. Limit its scope to
sdhci.c.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Patrick Delaunay [Mon, 14 Oct 2019 07:28:12 +0000 (09:28 +0200)]
stm32mp1: add support for virtual partition read
Add read for OTP and PMIC NVM with alternates
on virtual DFU device.
Serie-cc: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 14 Oct 2019 07:28:11 +0000 (09:28 +0200)]
stm32mp1: board: add spi nand support
This patch adds the support of the spi nand device in mtdparts command
and in dfu_alt_info.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Mon, 14 Oct 2019 07:28:10 +0000 (09:28 +0200)]
stm32mp1: configs: activate CONFIG_MTD_SPI_NAND
Activate the support of SPI NAND in stm32mp1 U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Mon, 14 Oct 2019 07:28:09 +0000 (09:28 +0200)]
stm32mp1: activate SET_DFU_ALT_INFO
Generate automatically dfu_alt_info for the supported device.
The simple command "dfu 0" allows to start the dfu stack on usb 0
for the supported devices:
- dfu mtd for nand0
- dfu mtd for nor0
- dfu mmc for SDCard
- dfu mmc for eMMC
- dfu ram for images in DDR
The DUF alternate use the "part", "partubi" and "mmcpart" options
to select the correct MTD or GPT partition or the eMMC hw boot partition.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Mon, 14 Oct 2019 07:28:08 +0000 (09:28 +0200)]
stm32mp1: activate DFU support and command MTD
Add support of DFU for MMC, MTD, RAM and MTD command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 6 Nov 2019 15:16:34 +0000 (16:16 +0100)]
ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"
This patch solve the eMMC detection issue for command "mmc dev 1".
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 6 Nov 2019 15:16:33 +0000 (16:16 +0100)]
ARM: dts: stm32: DT alignment with kernel v5.4-rc4
Device tree and binding alignment with kernel v5.4-rc4
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 6 Nov 2019 15:16:32 +0000 (16:16 +0100)]
ARM: dts: stm32: DT alignment with kernel v5.3
Device tree and binding alignment with kernel v5.3
and converted to SPDX.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 15 Nov 2019 10:57:03 +0000 (11:57 +0100)]
configs: stih410-b2260: Enable DM_ETH flag
This patch allows to fix the following compilation warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tom Rini [Mon, 25 Nov 2019 17:56:27 +0000 (12:56 -0500)]
Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-boot
- add RPi4 upstream compatible to pinctrl
- fix boot banner on RPi3/4
- add support for one binary on RPi3/4
Tom Rini [Mon, 25 Nov 2019 17:56:12 +0000 (12:56 -0500)]
Merge tag 'fixes-for-v2020.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- fix mxsfb regression on pico-imx7d and imx7d-sabre
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:24 +0000 (18:15 +0100)]
sandbox: enable USB_KEYBOARD_FN_KEYS
Enable the support of function keys on the USB keyboard. This is necessary
to test the USB keyboard driver.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:23 +0000 (18:15 +0100)]
dm: test: usb: rework keyboard test
Allow the unit test to pass full 8 byte scan code sequences to the USB
keyboard emulation driver and to parse multi-byte escape sequences.
The following features are not yet tested:
* LED status
* caps-lock
* num-lock
* numerical pad keys
The following features are not yet implemented by the USB keyboard
driver and therefore not tested:
* modifiers for non-alpha-numeric keys, e.g. <SHIFT><TAB> and <ALT><F4>
* some special keys, e.g. <PRINT>
* some modifiers, e.g. <ALT> and <META>
* alternative keyboard layouts
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:22 +0000 (18:15 +0100)]
usb: kbd: move USB_KBD_BOOT_REPORT_SIZE to usb.h
Move constant USB_KBD_BOOT_REPORT_SIZE. This allows us to reuse it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:21 +0000 (18:15 +0100)]
usb: kbd: implement special keys
Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
As this leads to a size increase provide a customizing setting
CONFIG_USB_KEYBOARD_FN_KEYS.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:20 +0000 (18:15 +0100)]
usb: kbd: simplify coding for arrow keys
Avoid duplicate translation of arrow key codes.
Reduce code size by avoiding strings and eliminating
usb_kbd_put_sequence().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:19 +0000 (18:15 +0100)]
usb: kbd: signature of usb_kbd_put_queue()
usb_kbd_buffer is defined as u8[]. So let usb_kbd_put_queue() use u8 as
type of the parameter for the new byte.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 23 Nov 2019 17:15:18 +0000 (18:15 +0100)]
usb: kbd: fix typo
%s/a interrupt/an interrupt/
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Wed, 20 Nov 2019 21:36:24 +0000 (22:36 +0100)]
ARM: socfpga: Unreset NAND in SPL on Gen5
In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP
explicitly in the platform code as the denali-spl driver is not aware
of DM at all.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Wed, 20 Nov 2019 21:36:45 +0000 (22:36 +0100)]
ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target
The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
between each SPL image. Generate U-Boot image with such a padding using
this new target.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Wed, 20 Nov 2019 21:40:19 +0000 (22:40 +0100)]
ARM: socfpga: Add ArriaV ST/SX ID
Add new FPGA ID for ArriaV ST/D3 or SX/B3 .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Wed, 20 Nov 2019 21:34:31 +0000 (22:34 +0100)]
ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5
On Gen5, when the FPGA is loaded and there was some prior interaction
between the HPS and the FPGA via bridges (e.g. Linux was running and
using some of the IPs in the FPGA) followed by warm reset, it has been
observed that there might be outstanding unfinished transactions. This
leads to an obscure misbehavior of the bridge.
When the bridge is enabled again in U-Boot and there are outstanding
transactions, a read from within the bridge address range would return
a result of the previous read instead. Example:
=> bridge enable ; md 0xff200000 1
ff200000:
1234abcd
=> bridge enable ; md 0xff200010 1
ff200010:
5678dcba <------- this is in fact a value which is stored in
a memory at 0xff200000
=> bridge enable ; md 0xff200000 1
ff200000:
90effe09 <------- this is in fact a value which is stored in
a memory at 0xff200010
and so it continues. Issuing a write does lock the system up completely.
This patch opens the FPGA bridges in 'bridge enable' command, the tears
them down again, and then opens them again. This allows these outstanding
transactions to complete and makes this misbehavior go away.
However, it is not entirely clear whether this is the correct solution.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut [Wed, 20 Nov 2019 21:34:30 +0000 (22:34 +0100)]
ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable
On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register,
which releases all bridges from reset, instead of putting all bridges
into reset. Fix this by inverting the mask and actually putting the
bridges into reset.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:59 +0000 (17:20 +0800)]
configs: enable eSDHC device module for T4240RDB board
Enable eSDHC device module for T4240RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:58 +0000 (17:20 +0800)]
configs: enable eSDHC device module for T2080RDB board
Enable eSDHC device module for T2080RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:57 +0000 (17:20 +0800)]
configs: enable eSDHC device module for T1042D4RDB board
Enable eSDHC device module for T1042D4RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:56 +0000 (17:20 +0800)]
configs: enable eSDHC device module for T1024RDB board
Enable eSDHC device module for T1024RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:55 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P5040DS board
Enable eSDHC device module for P5040DS board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:54 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P4080DS board
Enable eSDHC device module for P4080DS board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:53 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P3041DS board
Enable eSDHC device module for P3041DS board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:52 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P2041RDB board
Enable eSDHC device module for P2041RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:51 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P2020RDB board
Enable eSDHC device module for P2020RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:50 +0000 (17:20 +0800)]
configs: enable eSDHC device module for P1020RDB board
Enable eSDHC device module for P1020RDB board
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:49 +0000 (17:20 +0800)]
board: sdhc: Use block layer to read from mmc
Use block layer to read from mmc
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:48 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to t4240 dts
Add eSDHC node to t4240 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:47 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to t104x dts
Add eSDHC node to t104x dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:46 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to t102x dts
Add eSDHC node to t102x dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:45 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p5040 dts
Add eSDHC node to p5040 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:44 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p4080 dts
Add eSDHC node to p4080 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:43 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p3041 dts
Add eSDHC node to p3041 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:42 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p2041 dts
Add eSDHC node to p2041 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:41 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p2020 dts
Add eSDHC node to p2020 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yinbo Zhu [Tue, 15 Oct 2019 09:20:40 +0000 (17:20 +0800)]
arch: powerpc: add eSDHC node to p1020 dts
Add eSDHC node to p1020 dts
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Fabio Estevam [Sun, 24 Nov 2019 20:37:52 +0000 (17:37 -0300)]
Revert "video: mxsfb: Configure the clock after eLCDIF reset"
Commit
ec3dcea74470 ("video: mxsfb: Configure the clock after eLCDIF reset")
causes boot regression on imx7d-pico/imx7d-sdb boards, so revert it
until a better solution is prepared.
This reverts commit
ec3dcea7447031463643c33143b3a5f027f0b54d.
Reported-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Matthias Brugger [Wed, 6 Nov 2019 14:41:03 +0000 (15:41 +0100)]
ARM: defconfig: add unified config for RPi3 and RPi4
Provide a defconfig which allows us to boot Raspberrry Pi 4
and Raspberry Pi 3 Model B/B+
Instead of using the embedded DTB as done in RPi3 we use the
devicetree provided by the firmware.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Tue, 19 Nov 2019 15:01:05 +0000 (16:01 +0100)]
ARM: bcm283x: Set memory map at run-time
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Tue, 19 Nov 2019 15:01:04 +0000 (16:01 +0100)]
ARM: bcm283x: Set rpi_bcm283x_base at run-time
As part of the effort to create one binary for several bcm83x SoCs
we read the IO base address from device-tree.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Tue, 19 Nov 2019 15:01:03 +0000 (16:01 +0100)]
ARM: bcm283x: Move BCM283x_BASE to a global variable
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Tue, 19 Nov 2019 15:01:02 +0000 (16:01 +0100)]
rpi: push fw_dtb_pointer in the .data section
The fw_dtb_pointer was defined in the assembly code, which makes him
live in section .text_rest
Put that's not necessary, we can push the variable in the .data section.
This will prevent relocation errors like:
board/raspberrypi/rpi/rpi.c:317:(.text.board_get_usable_ram_top+0x8):
relocation truncated to fit: R_AARCH64_LDST64_ABS_LO12_NC against symbol
`fw_dtb_pointer' defined in .text section in board/raspberrypi/rpi/built-in.o
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Fri, 8 Nov 2019 13:49:48 +0000 (14:49 +0100)]
drivers: bcm283x: Set pre-location flag for OF_BOARD
U-Boot support on Raspberry Pi 4 relies on the device-tree
provided by the firmware. The blob does not contain the
U-Boot specific pre-loc-rel properties. The result is, that
the U-Boot banner is not printed.
We fix this by setting the DM_FLAG_PRE_RELOC flag in the driver,
if we rely on a device-tree provided by the firmware.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Fri, 8 Nov 2019 13:49:47 +0000 (14:49 +0100)]
arm: dts: bcm283x: Rename U-Boot file
Rename the file bcm283x-uboot.dtsi so that it get
automatically include through the scripts/Makefile.lib
using $(CONFIG_SYS_SOC))-u-boot.dtsi
Without this uarts and pincontroller miss the property dm-pre-reloc
and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails
as the pins are not set correctly.
As a result the U-Boot banner isn't shown on boot.
Before commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we included bcm283x-uboot.dtsi directly in the device-tree file.
Which got deleted by the metioned commit.
This is a much robuster solution.
Reported-by: Tom Rini <trini@konsulko.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Fri, 8 Nov 2019 13:49:46 +0000 (14:49 +0100)]
fdt: fix bcm283x dm-pre-reloc definitions
In commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we deleted the label for the node soc from bcm283x.dtsi
As we don't need to add the property dm-pre-reloc to the soc node,
we can delete it from bcm283x-uboot.dtsi
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Wed, 6 Nov 2019 14:28:25 +0000 (15:28 +0100)]
pinctrl: bcm283x: Add compatible for RPi4
The Raspberry Pi 4 upstream kernel device tree instroduces
a new compatible for the pinctroller. Add this to the driver
so that we can boot with the upstream kernel DT.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tom Rini [Sun, 24 Nov 2019 01:50:11 +0000 (20:50 -0500)]
Merge tag 'u-boot-rockchip-
20191124' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Clean vid/pid in Kconfig and add fastboot for rk3399
- add 'u-boot, spl-fifo-mode' for mmc
- Use FIT generator for rk3229 optee and rk3368 ATF
- fan53555: add support for Silergy SYR82X and SYR83X
Tom Rini [Sun, 24 Nov 2019 01:48:47 +0000 (20:48 -0500)]
Merge branch '2019-11-23-master-imports'
- More travis job splits
- Assorted build clean-ups
- Correct optimization flags for some ARMv6 platforms
Heinrich Schuchardt [Sat, 23 Nov 2019 08:14:54 +0000 (09:14 +0100)]
arm: fix -march for ARM11
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html
ARM11 is an armv6 implementation. So change the architecture flag for the
compiler to armv6 for ARM11.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Tue, 19 Nov 2019 20:14:33 +0000 (15:14 -0500)]
buildman: Fix problem with non-existent output directories
Now that we have buildman telling genboards.cfg to use an output
directory we need to ensure that it exists.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Fixes:
bc750bca1246 ("tools: buildman: Honor output directory when generating boards.cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bartosz Golaszewski [Wed, 13 Nov 2019 13:42:41 +0000 (14:42 +0100)]
scripts: dtc: ignore files generated generated by python
Add __pycache__ to ignored files and extend the rule for _libfdt to also
include generated shared objects (e.g. _libfdt.cpython-37m-x86_64-linux-gnu.so).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tom Rini [Mon, 11 Nov 2019 02:19:37 +0000 (21:19 -0500)]
moveconfig.py: Fix more Python3 UTF issues
With the move to using Python 3 for real, we encounter two different
issues. First, the file include/video_font_data.h includes at least one
UTF-16 character. Given that it does not include any CONFIG symbols it
is easiest to just ignore this file. Next, we encounter similar
problems with some dts/dtsi files that come from Linux. In this case
it's easiest to simply ignore all dts/dtsi files as there will not be
CONFIG symbols for us to migrate in them.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Heiko Stuebner [Tue, 19 Nov 2019 11:04:02 +0000 (12:04 +0100)]
rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.
The results of this are not directly visible in u-boot itself, but
manifest as security-relate cpu aborts during boot of for example Linux.
There were a number of attempts to solve this elegantly but so far
discussion is still ongoing, so to make the board at least boot correctly
put both mmc controllers into fifo-mode, which also circumvents the
issue for now.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heiko Stuebner [Tue, 19 Nov 2019 11:04:01 +0000 (12:04 +0100)]
rockchip: dwmmc: add handling for u-boot, spl-fifo-mode
Rockchips dwmmc controllers can't do dma to non-ddr addresses,
like for example the soc-internal sram but during boot parts of
TrustedFirmware need to be placed there from the read FIT image.
So add handling for a u-boot,spl-fifo-mode to not put the mmc
controllers into fifo mode for all time.
The regular fifo-mode property still takes precedent and only
if not set do we check for the spl-specific property.
Suggested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jagan Teki [Tue, 19 Nov 2019 08:26:23 +0000 (13:56 +0530)]
rock960: Enable USB Gadget
Enable DWC3 core, gadget for rock960 board.
This would help to use fastboot by default.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 19 Nov 2019 08:26:22 +0000 (13:56 +0530)]
rockchip: Setup dwc3_device (for non-dm gadgets)
Setup dwc3_device structure for non-dm gadgets, which is used
in rk3399 platforms.
dwc3_device would have basic regbase, dr_mode, high speed
and 16-bit UTMI+ etc.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
James Byrne [Thu, 21 Nov 2019 14:32:46 +0000 (14:32 +0000)]
tools: checkpatch: Restore 'debug' and 'printf' to logFunctions list
The 'debug' and 'printf' functions were previously added to the list of
logFunctions in commit
0cab42110dbf ("checkpatch.pl: Add 'debug' to
the list of logFunctions") and commit
397bfd4642c1 ("checkpatch.pl:
Add 'printf' to logFunctions") but these additions were lost when newer
versions of checkpatch were pulled in from the upstream Linux
kernel version.
This restores them so that you don't end up in a situation where
checkpatch will give a warning for "quoted string split across lines"
which you cannot fix without getting a warning for "line over 80
characters" instead.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Heiko Schocher [Fri, 22 Nov 2019 10:17:29 +0000 (11:17 +0100)]
travis: rework NXP layerscape jobs
remove from NXP arm32 all layerscape boards and
build them instead in already existing layerscape
jobs (which now not only build aarch64 boards)
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Thu, 21 Nov 2019 05:50:12 +0000 (06:50 +0100)]
travis: move orangepi to vendor job
move orangepi builds into a new job, and exclude
orangepi builds from sunxi and rockchip jobs.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 23 Nov 2019 15:20:18 +0000 (10:20 -0500)]
Merge tag 'efi-2020-01-rc4-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-01-rc4 (2)
Use CONFIG_EFI_LOADER=n for ARM11 except for the Raspberry Pi and the
Raspberry Pi Zero.
Jagan Teki [Tue, 19 Nov 2019 08:26:21 +0000 (13:56 +0530)]
gadget: rockchip: Add rk3399 USB_GADGET_PRODUCT_NUM
Add 0x330c for rk3399 gadget product number.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 19 Nov 2019 08:26:20 +0000 (13:56 +0530)]
usb: dwc3: Add phy interface for dwc3_uboot
U-Boot has two different variants of dwc3 initializations,
- with dm variant gadget, so the respective dm driver would
call the dwc3_init in core.
- with non-dm variant gadget, so the usage board file would
call dwc3_uboot_init in core.
The driver probe would handle all respective gadget properties
including phy interface via phy_type property and then trigger
dwc3_init for dm-variant gadgets.
So, to support the phy interface for non-dm variant gadgets,
the better option is dwc3_uboot_init since there is no
dedicated controller for non-dm variant gadgets.
This patch support for adding phy interface like 8/16-bit UTMI+
code for dwc3_uboot.
This change used Linux phy.h enum list, to make proper code
compatibility.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 19 Nov 2019 08:26:19 +0000 (13:56 +0530)]
fastboot: rockchip: Fix rk3328 default mmc device
Technically the default mmc device for fastboot would
use eMMC if the board support for it.
Rockchip platform access device 0 for eMMC so, use the
same device number for rk3328.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>