Simon Dardis [Mon, 6 Nov 2017 23:01:46 +0000 (23:01 +0000)]
[Support][Chrono] Use explicit cast of text output of time values.
rL316419 exposed a platform specific issue where the type of the values
passed to llvm::format could be different to the format string.
Debian unstable for mips uses long long int for std::chrono:duration,
while x86_64 uses long int.
For mips, this resulted in the value being corrupted when rendered to a
string. Address this by explicitly casting the result of the duration_cast
to the type specified in the format string.
Reviewers: sammccall
Differential Revision: https://reviews.llvm.org/D39597
llvm-svn: 317523
Adrian Prantl [Mon, 6 Nov 2017 22:49:39 +0000 (22:49 +0000)]
InstCombine: salvage the debug info of DCE'ed add instructions.
rdar://problem/
31209283
llvm-svn: 317522
Craig Topper [Mon, 6 Nov 2017 22:49:04 +0000 (22:49 +0000)]
[X86] Make FeatureAVX512 imply FeatureF16C.
The EVEX to VEX pass is already assuming this is true under AVX512VL. We had special patterns to use zmm instructions if VLX and F16C weren't available.
Instead just make AVX512 imply F16C to make the EVEX to VEX behavior explicitly legal and remove the extra patterns.
All known CPUs with AVX512 have F16C so this should safe for now.
llvm-svn: 317521
Craig Topper [Mon, 6 Nov 2017 22:49:01 +0000 (22:49 +0000)]
[X86] Make FeatureAVX512 imply FeatureFMA.
Previously our VEX patterns were checking Subtarget.hasFMA() which checked FMA || AVX512. So we were behaving as if AVX512 implied it anyway. Which means we'd allow VEX encoded 128/256 FMA when AVX512F was enabled but AVX512VL is off. Regardless of the FMA flag.
EVEX to VEX also transforms scalar EVEX FMA instructions to their VEX versions even without the FMA flag. Similarly for 128/256 under AVX512VL.
So this makes AVX512 imply FeatureFMA to make our current behavior explicit.
All known CPUs that support AVX512 have VEX FMA instructions.
llvm-svn: 317520
Sanjay Patel [Mon, 6 Nov 2017 22:40:09 +0000 (22:40 +0000)]
[ValueTracking] readonly (const) is a requirement for converting sqrt to llvm.sqrt; nnan is not
As discussed in D39204, this is effectively a revert of rL265521 which required nnan
to vectorize sqrt libcalls based on the old LangRef definition of llvm.sqrt. Now that
the definition has been updated so the libcall and intrinsic have the same semantics
apart from potentially setting errno, we can remove the nnan requirement.
We have the right check to know that errno is not set:
if (!ICS.onlyReadsMemory())
...ahead of the switch.
This will solve https://bugs.llvm.org/show_bug.cgi?id=27435 assuming that's being
built for a target with -fno-math-errno.
Differential Revision: https://reviews.llvm.org/D39642
llvm-svn: 317519
Hans Wennborg [Mon, 6 Nov 2017 22:28:02 +0000 (22:28 +0000)]
Revert r317510 "[InstCombine] Pull shifts through a select plus binop with constant"
This broke the CodeGen/Hexagon/loop-idiom/pmpy-mod.ll test on a bunch of buildbots.
> This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
>
> This can allow us to get the select closer to other selects to enable removing one.
>
> Differential Revision: https://reviews.llvm.org/D39222
>
> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317510
91177308-0d34-0410-b5e6-
96231b3b80d8
llvm-svn: 317518
Hans Wennborg [Mon, 6 Nov 2017 22:17:23 +0000 (22:17 +0000)]
Revert r316064 "Fix the incorrect detection of ICONV_LIBRARY_PATH"
This broke the use of libxml2 on machines where iconv() is provided by libc.
I'll follow up on the mailing list to discuss how to fix this properly.
> This is introduced in rL308711.
> Check for c library is incorrect here just because libc will be found always
> and it does not mean that iconv is presented.
>
> Thank to Andrew Krasny for narrowing down the root cause.
>
> Reviewers: ecbeckmann
> Reviewed By: ecbeckmann
> Subscribers: mgorny, llvm-commits
> Differential Revision: https://reviews.llvm.org/D38875
llvm-svn: 317517
Devin Coughlin [Mon, 6 Nov 2017 22:12:19 +0000 (22:12 +0000)]
[analyzer] Model correct dispatch_once() 'done' value in BodyFarm
The analyzer's BodyFarm models dispatch_once() by comparing the passed-in
predicate against a known 'done' value. If the predicate does not have that
value, the model updates the predicate to have that value and executes the
passed in block.
Unfortunately, the current model uses the wrong 'done' value: 1 instead of ~0.
This interferes with libdispatch's static inline function _dispatch_once(),
which enables a fast path if the block has already been executed. That function
uses __builtin_assume() to tell the compiler that the done flag is set to ~0 on
exit. When r302880 added modeling of __builtin_assume(), this caused the
analyzer to assume 1 == ~0. This in turn caused the analyzer to never explore any code after a call to dispatch_once().
This patch regains the missing coverage by updating BodyFarm to use the correct
'done' value.
rdar://problem/
34413048
Differential Revision: https://reviews.llvm.org/D39691
llvm-svn: 317516
Jonas Hahnfeld [Mon, 6 Nov 2017 22:06:14 +0000 (22:06 +0000)]
[OMPT] Fix null pointer in parallel/no_thread_num_clause.c
Looks like the implementation of printf on Darwin uses "0x0"
instead of "(nil)" like glibc does.
llvm-svn: 317515
Xinliang David Li [Mon, 6 Nov 2017 21:57:51 +0000 (21:57 +0000)]
Fix comment /NFC
llvm-svn: 317514
Bjorn Pettersson [Mon, 6 Nov 2017 21:46:06 +0000 (21:46 +0000)]
[MIRPrinter] Use %subreg.xxx syntax for subregister index operands
Summary:
Print %subreg.<subregidxname> instead of just the subregister
index when printing immediate operands corresponding to subreg
indices in INSERT_SUBREG, EXTRACT_SUBREG, SUBREG_TO_REG and
REG_SEQUENCE.
Reviewers: qcolombet, MatzeB
Reviewed By: MatzeB
Subscribers: nhaehnle, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D39696
llvm-svn: 317513
Alex Shlyapnikov [Mon, 6 Nov 2017 21:27:06 +0000 (21:27 +0000)]
[LSan] Detect dynamic loader by its base address.
Summary:
Relanding D38600, which was reverted due to various PPC bot failures.
If it breaks something again, please provide some pointers to broken
bots, not just revert it, otherwise it's very hard to reason what's
wrong with this commit.
Whenever possible (Linux + glibc 2.16+), detect dynamic loader module by
its base address, not by the module name matching. The current name
matching approach fails on some configurations.
Reviewers: eugenis
Subscribers: kubamracek, llvm-commits
Differential Revision: https://reviews.llvm.org/D39275
llvm-svn: 317512
Dave Lee [Mon, 6 Nov 2017 21:18:05 +0000 (21:18 +0000)]
Vary Windows toolchain selection by -fuse-ld
Summary:
This change allows binutils to be used for linking with MSVC. Currently, when
using an MSVC target and `-fuse-ld=bfd`, the driver produces an invalid linker
invocation.
Reviewers: rnk, compnerd
Reviewed By: compnerd
Subscribers: smeenai, cfe-commits
Differential Revision: https://reviews.llvm.org/D39509
llvm-svn: 317511
Craig Topper [Mon, 6 Nov 2017 21:07:22 +0000 (21:07 +0000)]
[InstCombine] Pull shifts through a select plus binop with constant
This pulls shifts through a select+binop with a constant where the select conditionally executes the binop. We already do this for just the binop, but not with the select.
This can allow us to get the select closer to other selects to enable removing one.
Differential Revision: https://reviews.llvm.org/D39222
llvm-svn: 317510
Justin Bogner [Mon, 6 Nov 2017 21:06:09 +0000 (21:06 +0000)]
update_mir_test_checks: Be careful about replacing entire vregs
Previously, this could end up replacing a vreg like %14 with
[[VREG1]]4, where VREG1 was the match for %1. That's obviously not
correct, though it hasn't actually come up in any tests I've converted
so far.
llvm-svn: 317509
Graham Yiu [Mon, 6 Nov 2017 21:04:19 +0000 (21:04 +0000)]
Fix buildbot breakages from r317503. Add parentheses to assignment when using result as a condition.
llvm-svn: 317508
Craig Topper [Mon, 6 Nov 2017 21:00:49 +0000 (21:00 +0000)]
[X86] Replace the mask cmpeq/cmple/cmplt/cmpgt/cmpge/cmpneq intrinsics with macros that just pass the right comparison predicate value to the regular cmp intrinsic. Remove mask cmpeq/cmpgt builtins that are now unused.
This shortens the intrinsic headers a little and allows us to get rid of the cmpeq and cmpgt handling from CGBuiltin.cpp.
llvm-svn: 317506
Martin Storsjo [Mon, 6 Nov 2017 20:33:13 +0000 (20:33 +0000)]
[MinGW] Don't autoexport anything from libmsvcrt or libucrtbase
These libraries contain a number of object files with compat wrappers,
in addition to the normal import library entries.
Differential Revision: https://reviews.llvm.org/D39684
llvm-svn: 317505
Martin Storsjo [Mon, 6 Nov 2017 20:33:13 +0000 (20:33 +0000)]
[X86] Add 3dnow and 3dnowa to the list of valid target features
These were missed in SVN r316783, which broke compiling mingw-w64 CRT.
Differential Revision: https://reviews.llvm.org/D39631
llvm-svn: 317504
Graham Yiu [Mon, 6 Nov 2017 20:18:30 +0000 (20:18 +0000)]
Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles, and use P9 shift and vector insert byte instructions instead of vperm. Extends tests from vector insert half-word.
Differential Revision: https://reviews.llvm.org/D34497
llvm-svn: 317503
Dehao Chen [Mon, 6 Nov 2017 19:52:49 +0000 (19:52 +0000)]
Include already promoted counts when computing SUM for VP.
Summary: When computing the SUM for indirect call promotion, if the callsite is already promoted in the profile, it will be promoted before ICP. In the current implementation, ICP only sees remaining counts in SUM. This may cause extra indirect call targets being promoted. This patch updates the SUM to include the counts already promoted earlier. This way we do not end up promoting too many indirect call targets.
Reviewers: tejohnson
Reviewed By: tejohnson
Subscribers: llvm-commits, sanjoy
Differential Revision: https://reviews.llvm.org/D38763
llvm-svn: 317502
Stephane Sezer [Mon, 6 Nov 2017 19:25:33 +0000 (19:25 +0000)]
Add a dependency from check-lldb on lld
Summary:
This is required when using the in-tree clang for building tests,
because -fuse-ld=lld is used by default.
Subscribers: mgorny
Differential Revision: https://reviews.llvm.org/D39689
llvm-svn: 317501
Mitch Phillips [Mon, 6 Nov 2017 19:14:09 +0000 (19:14 +0000)]
[cfi-verify] Added a simple check that stops division-by-zero error when no indirect CF instructions are found in the provided file.
llvm-svn: 317500
Guozhi Wei [Mon, 6 Nov 2017 19:09:38 +0000 (19:09 +0000)]
[PPC] Use xxbrd to speed up bswap64
Power doesn't have bswap instructions, so llvm generates following code sequence for bswap64.
rotldi 5, 3, 16
rotldi 4, 3, 8
rotldi 9, 3, 24
rotldi 10, 3, 32
rotldi 11, 3, 48
rotldi 12, 3, 56
rldimi 4, 5, 8, 48
rldimi 4, 9, 16, 40
rldimi 4, 10, 24, 32
rldimi 4, 11, 40, 16
rldimi 4, 12, 48, 8
rldimi 4, 3, 56, 0
But Power9 has vector bswap instructions, they can also be used to speed up scalar bswap intrinsic. With this patch, bswap64 can be translated to:
mtvsrdd 34, 3, 3
xxbrd 34, 34
mfvsrld 3, 34
Differential Revision: https://reviews.llvm.org/D39510
llvm-svn: 317499
Mitch Phillips [Mon, 6 Nov 2017 18:56:36 +0000 (18:56 +0000)]
Make MCAsmBackend and MCCodeEmiiter passed by unique_ptr rval
Summary: Fixes build breakage of llvm-mc-assemble-fuzzer introduced by rL315531.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39268
llvm-svn: 317498
Michael Kruse [Mon, 6 Nov 2017 17:48:14 +0000 (17:48 +0000)]
[ForwardOpTree] Limit isl operations of known content reload.
Put the analysis part of reloadKnownContent under an isl
max-operations quota scope, as has already been done for
forwardKnownLoad.
This should fix the aosp timeout of "GrTestUtils.cpp".
llvm-svn: 317495
Alex Shlyapnikov [Mon, 6 Nov 2017 17:43:28 +0000 (17:43 +0000)]
[Sanitizers] Check pthread_setcancel{state|type} interceptor arguments for != nullptr.
Summary:
According to man, pthread_setcancelstate's oldstate and
pthread_setcanceltype's oldtype parameters can be nullptr.
Check these parameters for != nullptr before attempting to
access their shadow memory.
Reviewers: dvyukov
Subscribers: kubamracek, llvm-commits
Differential Revision: https://reviews.llvm.org/D39626
llvm-svn: 317494
Jan Korous [Mon, 6 Nov 2017 17:42:17 +0000 (17:42 +0000)]
[Parser] Fix TryParseLambdaIntroducer() error handling
rdar://
35066196
Differential Revision: https://reviews.llvm.org/D39419
llvm-svn: 317493
Matt Arsenault [Mon, 6 Nov 2017 17:04:37 +0000 (17:04 +0000)]
AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32
llvm-svn: 317492
Sanjay Patel [Mon, 6 Nov 2017 16:52:31 +0000 (16:52 +0000)]
[Analysis] update to use new fast-math API - isFast()
llvm-svn: 317491
Adrian Prantl [Mon, 6 Nov 2017 16:52:05 +0000 (16:52 +0000)]
Canonicalize spelling of long-form-options in dsymutil.rst
llvm-svn: 317490
Sanjay Patel [Mon, 6 Nov 2017 16:27:36 +0000 (16:27 +0000)]
[CodeGen] match new fast-math-flag method: isFast()
This corresponds to LLVM commiti r317488:
If that commit is reverted, this commit will also need to be reverted.
llvm-svn: 317489
Sanjay Patel [Mon, 6 Nov 2017 16:27:15 +0000 (16:27 +0000)]
[IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag
As discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2016-November/107104.html
and again more recently:
http://lists.llvm.org/pipermail/llvm-dev/2017-October/118118.html
...this is a step in cleaning up our fast-math-flags implementation in IR to better match
the capabilities of both clang's user-visible flags and the backend's flags for SDNode.
As proposed in the above threads, we're replacing the 'UnsafeAlgebra' bit (which had the
'umbrella' meaning that all flags are set) with a new bit that only applies to algebraic
reassociation - 'AllowReassoc'.
We're also adding a bit to allow approximations for library functions called 'ApproxFunc'
(this was initially proposed as 'libm' or similar).
...and we're out of bits. 7 bits ought to be enough for anyone, right? :) FWIW, I did
look at getting this out of SubclassOptionalData via SubclassData (spacious 16-bits),
but that's apparently already used for other purposes. Also, I don't think we can just
add a field to FPMathOperator because Operator is not intended to be instantiated.
We'll defer movement of FMF to another day.
We keep the 'fast' keyword. I thought about removing that, but seeing IR like this:
%f.fast = fadd reassoc nnan ninf nsz arcp contract afn float %op1, %op2
...made me think we want to keep the shortcut synonym.
Finally, this change is binary incompatible with existing IR as seen in the
compatibility tests. This statement:
"Newer releases can ignore features from older releases, but they cannot miscompile
them. For example, if nsw is ever replaced with something else, dropping it would be
a valid way to upgrade the IR."
( http://llvm.org/docs/DeveloperPolicy.html#ir-backwards-compatibility )
...provides the flexibility we want to make this change without requiring a new IR
version. Ie, we're not loosening the FP strictness of existing IR. At worst, we will
fail to optimize some previously 'fast' code because it's no longer recognized as
'fast'. This should get fixed as we audit/squash all of the uses of 'isFast()'.
Note: an inter-dependent clang commit to use the new API name should closely follow
commit.
Differential Revision: https://reviews.llvm.org/D39304
llvm-svn: 317488
Sam McCall [Mon, 6 Nov 2017 15:50:35 +0000 (15:50 +0000)]
[clangd] Squash namespace warning
llvm-svn: 317487
Sam McCall [Mon, 6 Nov 2017 15:40:30 +0000 (15:40 +0000)]
Adds a json::Expr type to represent intermediate JSON expressions.
Summary:
This form can be created with a nice clang-format-friendly literal syntax,
and gets escaping right. It knows how to call unparse() on our Protocol types.
All the places where we pass around JSON internally now use this type.
Object properties are sorted (stored as std::map) and so serialization is
canonicalized, with optional prettyprinting (triggered by a -pretty flag).
This makes the lit tests much nicer to read and somewhat nicer to debug.
(Unfortunately the completion tests use CHECK-DAG, which only has
line-granularity, so pretty-printing is disabled there. In future we
could make completion ordering deterministic, or switch to unittests).
Compared to the current approach, it has some efficiencies like avoiding copies
of string literals used as object keys, but is probably slower overall.
I think the code/test quality benefits are worth it.
This patch doesn't attempt to do anything about JSON *parsing*.
It takes direction from the proposal in this doc[1], but is limited in scope
and visibility, for now.
I am of half a mind just to use Expr as the target of a parser, and maybe do a
little string deduplication, but not bother with clever memory allocation.
That would be simple, and fast enough for clangd...
[1] https://docs.google.com/document/d/1OEF9IauWwNuSigZzvvbjc1cVS1uGHRyGTXaoy3DjqM4/edit
+cc d0k so he can tell me not to use std::map.
Reviewers: ioeric, malaperle
Subscribers: bkramer, ilya-biryukov, mgorny, klimek
Differential Revision: https://reviews.llvm.org/D39435
llvm-svn: 317486
Simon Pilgrim [Mon, 6 Nov 2017 15:28:25 +0000 (15:28 +0000)]
[X86][SSE] Merge combineExtractVectorElt_SSE into combineExtractVectorElt. NFCI.
We still early-out for X86ISD::PEXTRW/X86ISD::PEXTRB so no actual change in behaviour, but it'll make it easier to add support in a future patch.
llvm-svn: 317485
Jonas Hahnfeld [Mon, 6 Nov 2017 15:13:06 +0000 (15:13 +0000)]
[OMPT] Fix callback.h for tests for changes in TR6
This was also lost in the last commit.
llvm-svn: 317484
Alexey Bataev [Mon, 6 Nov 2017 14:52:57 +0000 (14:52 +0000)]
[SLP] Test for PR35047, NFC.
llvm-svn: 317482
Simon Pilgrim [Mon, 6 Nov 2017 14:34:19 +0000 (14:34 +0000)]
[X86][SSE] Combine EXTRACT_VECTOR_ELT with combineExtractWithShuffle before XFormVExtractWithShuffleIntoLoad
combineExtractWithShuffle can handle more complex shuffles/bitcasts than we can with the equivalent code in XFormVExtractWithShuffleIntoLoad.
Mainly a compile time improvement now (combineExtractWithShuffle combines will have always failed late on inside XFormVExtractWithShuffleIntoLoad), and will let us merge combineExtractVectorElt_SSE in a future commit.
llvm-svn: 317481
Jonas Hahnfeld [Mon, 6 Nov 2017 14:33:09 +0000 (14:33 +0000)]
[OMPT] Improve cast that was lost on commit, NFC.
llvm-svn: 317480
Yaxun Liu [Mon, 6 Nov 2017 14:32:33 +0000 (14:32 +0000)]
[AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment
Differential Revision: https://reviews.llvm.org/D39657
llvm-svn: 317479
Florian Hahn [Mon, 6 Nov 2017 14:26:04 +0000 (14:26 +0000)]
[Polly] Fix using order, as this caused a test failure (NFC)
Summary:
Without this patch, clang-format in check-polly fails for me, with current master:
```
FAILED: cd build/tools/polly && build/bin/clang-format -sort-includes -style=llvm llvm/tools/polly/include/polly/ScopPass.h | diff -u llvm/tools/polly/include/polly/ScopPass.h -
--- llvm/tools/polly/include/polly/ScopPass.h 2017-11-06 14:05:49.
885345000 +0000
+++ - 2017-11-06 14:07:24.
956241758 +0000
@@ -40,12 +40,12 @@
} // namespace polly
namespace llvm {
+using polly::SPMUpdater;
using polly::Scop;
using polly::ScopAnalysisManager;
using polly::ScopAnalysisManagerFunctionProxy;
using polly::ScopInfo;
using polly::ScopStandardAnalysisResults;
-using polly::SPMUpdater;
template <>
class InnerAnalysisManagerProxy<ScopAnalysisManager, Function>::Result {
```
Reviewers: grosser, Meinersbur, bollu
Reviewed By: Meinersbur
Subscribers: llvm-commits, pollydev
Differential Revision: https://reviews.llvm.org/D39683
llvm-svn: 317478
Jonas Paulsson [Mon, 6 Nov 2017 13:10:31 +0000 (13:10 +0000)]
[SystemZ] implement hasDivRemOp()
SystemZ can do division and remainder in a single instruction for scalar
integer types, which are now reflected by returning true in this hook for
those cases.
Review: Ulrich Weigand
llvm-svn: 317477
Yaxun Liu [Mon, 6 Nov 2017 13:01:33 +0000 (13:01 +0000)]
[AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit
The backend assumes pointer in default addr space is 32 bit, which is not
true for the new addr space mapping and causes assertion for unresolved
functions.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39643
llvm-svn: 317476
Simon Dardis [Mon, 6 Nov 2017 12:59:53 +0000 (12:59 +0000)]
[mips] Add movep for microMIPS32R6 and fix microMIPS32r3 version
Previously, the 'movep' instruction was defined for microMIPS32r3 and
shared that definition with microMIPS32R6. 'movep' was re-encoded for
microMIPS32r6, so this patch provides the correct encoding.
Secondly, correct the encoding of the 'rs' and 'rt' operands which have
an instruction specific encoding for the registers those operands accept.
Finally, correct the decoding of the 'dst_regs' operand which was extracting
the relevant field from the instruction, but was actually extracting the
field from the alreadly extracted field.
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D39495
llvm-svn: 317475
Pavel Labath [Mon, 6 Nov 2017 12:34:27 +0000 (12:34 +0000)]
Extend android xfail in TestTopLevelExprs
The test fails on API level 19 as well. I'm going to assume that it
fails on every API level below 23.
llvm-svn: 317474
Daniel Jasper [Mon, 6 Nov 2017 12:11:51 +0000 (12:11 +0000)]
[clang-format] Handle unary operator overload with arguments and specifiers
Before:
int operator++(int)noexcept;
After:
int operator++(int) noexcept;
Patch by Igor Sugak. Thank you!
llvm-svn: 317473
Jonas Devlieghere [Mon, 6 Nov 2017 11:47:24 +0000 (11:47 +0000)]
[docs] Update code block for compatibility with Sphinx 1.5.1
It is currently not possible to build the documentation with cmake and
the same version of Sphinx (1.5.1) used to generate the public facing
documentation on llvm.org. When code blocks cannot be parsed by
Pygments, it generates a warning which is treated as an error.
In addition to being annoying and confusing for developers, this
needlessly increases the bar for newcomers that want to get involved.
This patch removes the language specifier from the affected block. The
result is the same as when parsing fails: the block are not highlighted.
llvm-svn: 317472
Mohammed Agabaria [Mon, 6 Nov 2017 10:56:20 +0000 (10:56 +0000)]
[LV][X86] update the cost of interleaving mem. access of floats
Recommit:
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
fixed the location of the lit test it works with make check-all.
Differential Revision: https://reviews.llvm.org/D39403
llvm-svn: 317471
Simon Dardis [Mon, 6 Nov 2017 10:50:04 +0000 (10:50 +0000)]
[mips] Fix PR35140
Mark all symbols involved with TLS relocations as being TLS symbols.
This resolves PR35140.
Thanks to Alex Crichton for reporting the issue!
Reviewers: atanasyan
Differential Revision: https://reviews.llvm.org/D39591
llvm-svn: 317470
Peter Smith [Mon, 6 Nov 2017 10:36:18 +0000 (10:36 +0000)]
[ELF] Fix typo in comment for getISDThunkSec [NFC]
The ISR in the comment should read ISD for InputSectionDescription. The use
of ISR (InputSectionRange) was from the original implementation that did not
use the sections from InputSectionDescription directly.
llvm-svn: 317469
Gabor Horvath [Mon, 6 Nov 2017 10:36:02 +0000 (10:36 +0000)]
[clang-tidy] Support relative paths in run-clang-tidy.py
Unfortunately, these python scripts are not tested currently. I did the testing
manually on LLVM by editing the CMake generated compilation database to
contain relative paths for some of the files.
Differential Revision: https://reviews.llvm.org/D39603
llvm-svn: 317468
Raphael Isemann [Mon, 6 Nov 2017 09:51:39 +0000 (09:51 +0000)]
Fixed dead links in WritingAnLLVMPass.rst
llvm-svn: 317467
Eric Liu [Mon, 6 Nov 2017 09:29:09 +0000 (09:29 +0000)]
[Tooling] Test internal::createExecutorFromCommandLineArgsImpl instead of the wrapper.
llvm-svn: 317466
Uriel Korach [Mon, 6 Nov 2017 09:22:38 +0000 (09:22 +0000)]
[X86][AVX512] Improve lowering of AVX512 test intrinsics
Added TESTM and TESTNM to the list of instructions that already zeroing unused upper bits
and does not need the redundant shift left and shift right instructions afterwards.
Added a pattern for TESTM and TESTNM in iselLowering, so now icmp(neq,and(X,Y), 0) goes folds into TESTM
and icmp(eq,and(X,Y), 0) goes folds into TESTNM
This commit is a preparation for lowering the test and testn X86 intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D38732
llvm-svn: 317465
Uriel Korach [Mon, 6 Nov 2017 08:32:45 +0000 (08:32 +0000)]
[X86] Replace duplicate function call with variable. NFC
Change from:
if (N->getOperand(0).getValueType() == MVT::v8i32 ||
N->getOperand(0).getValueType() == MVT::v8f32)
to:
EVT OpVT = N->getOperand(0).getValueType();
if (OpVT == MVT::v8i32 || OpVT == MVT::v8f32)
Change-Id: I5a105f8710b73a828e6cfcd55fac2eae6153ce25
llvm-svn: 317464
Zvi Rackover [Mon, 6 Nov 2017 08:25:46 +0000 (08:25 +0000)]
X86 ISel: Basic support for variable-index vector permutations
Summary:
Try to lower a BUILD_VECTOR composed of extract-extract chains that can be
reasoned to be a permutation of a vector by indices in a non-constant vector.
We saw this pattern created by ISPC, which resolts to creating it due to the
requirement that shufflevector's mask operand be a *constant* vector.
I didn't check this but we could possibly use this pattern for lowering the X86 permute
C-instrinsics instead of llvm.x86 instrinsics.
This change can be followed by more improvements:
1. Handle vectors with undef elements.
2. Utilize pshufb and zero-mask-blending to support more effiecient
construction of vectors with constant-0 elements.
3. Use smaller-element vectors of same width, and "interpolate" the indices,
when no native operation available.
Reviewers: RKSimon, craig.topper
Reviewed By: RKSimon
Subscribers: chandlerc, DavidKreitzer
Differential Revision: https://reviews.llvm.org/D39126
llvm-svn: 317463
Jina Nahias [Mon, 6 Nov 2017 07:48:58 +0000 (07:48 +0000)]
Revert "adding a pattern for broadcastm"
This reverts commit r317457.
Change-Id: If07f1fca1e3453d16c1dac906e87768661384e91
llvm-svn: 317462
Martin Storsjo [Mon, 6 Nov 2017 07:36:17 +0000 (07:36 +0000)]
[test] Add test files that were missed from SVN r317459
llvm-svn: 317461
Martin Storsjo [Mon, 6 Nov 2017 07:22:17 +0000 (07:22 +0000)]
Update tests for ARMNT/ARM64 reloc names
After ObjectYAML learnt the proper enum names for ARMNT/ARM64
relocations, it no longer accepts the numerical values.
This fixes LLD tests after SVN r317459 in LLVM.
llvm-svn: 317460
Martin Storsjo [Mon, 6 Nov 2017 07:20:58 +0000 (07:20 +0000)]
[ObjectYAML] Map relocation types for COFF ARMNT and ARM64
Differential Revision: https://reviews.llvm.org/D39668
llvm-svn: 317459
Jina Nahias [Mon, 6 Nov 2017 07:09:24 +0000 (07:09 +0000)]
[x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR
This patch, together with a matching clang patch (https://reviews.llvm.org/D38683), implements the lowering of X86 broadcastm intrinsics to IR.
Differential Revision: https://reviews.llvm.org/D38684
Change-Id: I709ac0b34641095397e994c8ff7e15d1315b3540
llvm-svn: 317458
Jina Nahias [Mon, 6 Nov 2017 07:09:09 +0000 (07:09 +0000)]
adding a pattern for broadcastm
Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
llvm-svn: 317457
Jina Nahias [Mon, 6 Nov 2017 07:04:12 +0000 (07:04 +0000)]
lowering broadcastm
Change-Id: I0661abea3e3742860e0a03ff9e4fcdc367eff7db
llvm-svn: 317456
Martin Storsjo [Mon, 6 Nov 2017 07:02:33 +0000 (07:02 +0000)]
[COFF] Handle ARM64 in getDefaultType
Differential Revision: https://reviews.llvm.org/D39634
llvm-svn: 317455
Craig Topper [Mon, 6 Nov 2017 05:48:26 +0000 (05:48 +0000)]
[X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible.
llvm-svn: 317454
Craig Topper [Mon, 6 Nov 2017 05:48:25 +0000 (05:48 +0000)]
[X86] Add scalar FMA ISD nodes without rounding mode. NFC
Next step is to use them for the legacy FMA scalar intrinsics as well. This will enable the legacy intrinsics to use EVEX encoded opcodes and the extended registers.
llvm-svn: 317453
Craig Topper [Mon, 6 Nov 2017 05:48:24 +0000 (05:48 +0000)]
[X86] Add avx512vl command line to fma-instrinsics-x86.ll
Some of these demonstrate a missed EVEX to VEX compression because we aren't prefering EVEX instructions during isel.
llvm-svn: 317452
Craig Topper [Mon, 6 Nov 2017 05:48:23 +0000 (05:48 +0000)]
[X86] Simplify command lines on the fma-instrinsics-x86.ll test and add -show-mc-encoding.
Use feature names instead of CPU names.
A future commit will add avx512vl command lines to demonstrate missed use of EVEX instructions.
llvm-svn: 317451
Peter Collingbourne [Mon, 6 Nov 2017 04:58:04 +0000 (04:58 +0000)]
ELF: Remove SymbolTable::SymIndex class.
The Traced flag is unnecessary because we only need to set the index
to -1 to mark a symbol for tracing.
Differential Revision: https://reviews.llvm.org/D39672
llvm-svn: 317450
Peter Collingbourne [Mon, 6 Nov 2017 04:39:07 +0000 (04:39 +0000)]
ELF: Remove function Symbol::isInCurrentOutput().
This function is now equivalent to isDefined().
llvm-svn: 317449
Peter Collingbourne [Mon, 6 Nov 2017 04:35:31 +0000 (04:35 +0000)]
ELF: Merge DefinedRegular and Defined.
Now that DefinedRegular is the only remaining derived class of
Defined, we can merge the two classes.
Differential Revision: https://reviews.llvm.org/D39667
llvm-svn: 317448
Peter Collingbourne [Mon, 6 Nov 2017 04:33:58 +0000 (04:33 +0000)]
ELF: Remove DefinedCommon.
Common symbols are now represented with a DefinedRegular that points
to a BssSection, even during symbol resolution.
Differential Revision: https://reviews.llvm.org/D39666
llvm-svn: 317447
Rui Ueyama [Mon, 6 Nov 2017 04:13:24 +0000 (04:13 +0000)]
Do not consider Shared symbols as defined symbols.
I don't remember why I made shared symbols one type of defined symbols.
Shared symbols aren't undefined, so it could be considered defined, but
categorizing three symbols as:
- defined
- really defined
- shared
- undefined
is not as intuitive as
- defined
- shared
- undefined
to me. So, in this patch, I made a change to stop handling shared
symbols as defined symbols.
Surprisingly, I didn't have to update any tests for this change.
Differential Revision: https://reviews.llvm.org/D39394
llvm-svn: 317446
Craig Topper [Mon, 6 Nov 2017 04:04:01 +0000 (04:04 +0000)]
[X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics.
Fixes PR35161.
llvm-svn: 317445
David L. Jones [Mon, 6 Nov 2017 00:32:01 +0000 (00:32 +0000)]
[PassManager, SimplifyCFG] Revert r316908 and r316869.
These cause Clang to crash with a segfault. See PR35210 for details.
llvm-svn: 317444
Adrian Prantl [Sun, 5 Nov 2017 21:52:36 +0000 (21:52 +0000)]
Remove \brief from doxygen comments in PrettyPrinter.h
Patch by @xsga!
Differential Revision: https://reviews.llvm.org/D39633
llvm-svn: 317443
Craig Topper [Sun, 5 Nov 2017 21:14:06 +0000 (21:14 +0000)]
[X86] Add missing predicate to a pattern. NFC
Other patterns had higher priority so this wasn't noticed. But we shouldn't be dependent on pattern order.
llvm-svn: 317442
Craig Topper [Sun, 5 Nov 2017 21:14:05 +0000 (21:14 +0000)]
[X86] Remove some more RCP and RSQRT patterns from InstrAVX512.td that I missed in r317413.
llvm-svn: 317441
Craig Topper [Sun, 5 Nov 2017 21:14:04 +0000 (21:14 +0000)]
[X86] Fix outdated comment. NFC
llvm-svn: 317440
Simon Pilgrim [Sun, 5 Nov 2017 19:48:24 +0000 (19:48 +0000)]
[X86][SSE] Tests for integer min/max horizontal reductions
Matching patterns that vectorizers should have created for us.
The experimental intrinsics should probably be added as well.
llvm-svn: 317439
Dorit Nuzman [Sun, 5 Nov 2017 16:53:15 +0000 (16:53 +0000)]
[LV/LAA] Avoid specializing a loop for stride=1 when this predicate implies a
single-iteration loop
This fixes PR34681. Avoid adding the "Stride == 1" predicate when we know that
Stride >= Trip-Count. Such a predicate will effectively optimize a single
or zero iteration loop, as Trip-Count <= Stride == 1.
Differential Revision: https://reviews.llvm.org/D38785
llvm-svn: 317438
Sanjay Patel [Sun, 5 Nov 2017 16:11:01 +0000 (16:11 +0000)]
[SLPVectorizer] minimize tests and auto-generate full checks; NFC
llvm-svn: 317437
Joachim Protze [Sun, 5 Nov 2017 14:11:19 +0000 (14:11 +0000)]
Updating implementation of OMPT as specified in OpenMP 5.0 Preview 2 (TR6)
The TR6 document is expected to be publically released around November 15.
This patch does not implement OMPT for libomptarget.
Patch by Simon Convent and Joachim Protze
Differential Revision: https://reviews.llvm.org/D39182
llvm-svn: 317436
Joachim Protze [Sun, 5 Nov 2017 14:11:10 +0000 (14:11 +0000)]
Rename fields of ompt_frame_t
This is part of the renaming of data types from OpenMP TR4 to TR6
Patch by Simon Convent
Differential Revision: https://reviews.llvm.org/D39326
llvm-svn: 317435
Johannes Altmanninger [Sun, 5 Nov 2017 11:53:18 +0000 (11:53 +0000)]
[clang-diff] NFC: format
llvm-svn: 317434
Mohammed Agabaria [Sun, 5 Nov 2017 09:36:54 +0000 (09:36 +0000)]
[REVERT][LV][X86] update the cost of interleaving mem. access of floats
reverted my changes will be committed later after fixing the failure
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
Differential Revision: https://reviews.llvm.org/D39403
llvm-svn: 317433
Mohammed Agabaria [Sun, 5 Nov 2017 09:06:23 +0000 (09:06 +0000)]
[LV][X86] update the cost of interleaving mem. access of floats
This patch contains update of the costs of interleaved loads of v8f32 of stride 3 and 8.
Differential Revision: https://reviews.llvm.org/D39403
llvm-svn: 317432
Serguei Katkov [Sun, 5 Nov 2017 07:59:02 +0000 (07:59 +0000)]
[CGP] Fix the bug found by asan.
Try to fix the asan failure introduced by r317429.
llvm-svn: 317431
Serguei Katkov [Sun, 5 Nov 2017 05:51:44 +0000 (05:51 +0000)]
[CGP] Extends the scope of optimizeMemoryInst optimization. NFC
Commit tests for previous commit.
Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073
llvm-svn: 317430
Serguei Katkov [Sun, 5 Nov 2017 05:50:33 +0000 (05:50 +0000)]
[CGP] Extends the scope of optimizeMemoryInst optimization
This is an implementation of PR26223.
Currently optimizeMemoryInst optimization tries to fold address computation
if all possible way to get compute the address are of the form
baseGV + base + scale * Index + offset
where scale and offset are constants and baseGV, base and Index are exactly
the same instructions if defined.
The patch extends this optimization to allow different bases. In this case
it tries to find/build a Phi node merging all possible bases and use this Phi node
as a base for sunk address computation. Also it supports Select instruction on
the way.
The main motivation for this scope extension is GCRelocateInst.
If there is a relocation of derived pointer it will be represented as relocation of base + offset.
Also there will be a Phi node merging address computation for relocated derived pointer
and derived pointer itself. If we have a Phi node merging original base and relocated base
and can fold the address computation of derived pointer then we can potentially reduce
the code size and Phi node for derived pointer. The later can have a positive impact to
register allocator.
Reviewers: efriedma, dberlin, mkazantsev, reames, john.brawn
Reviewed By: john.brawn
Subscribers: javed.absar, john.brawn, dneilson, llvm-commits
Differential Revision: https://reviews.llvm.org/D36073
llvm-svn: 317429
Rui Ueyama [Sat, 4 Nov 2017 23:57:51 +0000 (23:57 +0000)]
Inline a small function.
llvm-svn: 317428
Rui Ueyama [Sat, 4 Nov 2017 23:54:25 +0000 (23:54 +0000)]
Move OutputSectionFactory to LinkerScript.cpp. NFC.
That class is used only by LinkerScript.cpp, so we should move it to
that file. Also, it no longer has to be a "factory" class. It can just
be a non-member function.
llvm-svn: 317427
Rui Ueyama [Sat, 4 Nov 2017 23:09:43 +0000 (23:09 +0000)]
Rewrite addSymbolWrap and applySymbolWrap. NFCI.
r317396 changed the way how we handle the -defsym option. The option is
now handled using the infrastructure for the linker script.
We used to handle both -defsym and -wrap using the same set of functions
in the symbol table. Now, we don't need to do that.
This patch rewrites the functions so that they become more straightforward.
The new functions directly handle -wrap rather than abstract it.
llvm-svn: 317426
Rui Ueyama [Sat, 4 Nov 2017 22:32:56 +0000 (22:32 +0000)]
Remove dead code and update comment.
llvm-svn: 317425
Simon Pilgrim [Sat, 4 Nov 2017 21:18:06 +0000 (21:18 +0000)]
[X86][AVX] Regenerate test. NFCI.
llvm-svn: 317424
Martin Storsjo [Sat, 4 Nov 2017 21:01:31 +0000 (21:01 +0000)]
Add ifdefs around ELF specific parts of UnwindRegisters*.S for arm
This allows using dwarf exceptions on MinGW/ARM.
Differential Revision: https://reviews.llvm.org/D39534
llvm-svn: 317423
Harlan Haskins [Sat, 4 Nov 2017 20:31:20 +0000 (20:31 +0000)]
Use code voice for DIBuilder in LLVM C API
(This is a test commit)
llvm-svn: 317422
Roman Lebedev [Sat, 4 Nov 2017 20:27:47 +0000 (20:27 +0000)]
[Sema] Document+test the -Wsign-conversion change for enums in C code [NFC]
Basically a regression after r316268.
However the diagnostic is correct, but the test coverage is bad.
So just like rL316500, introduce yet more tests,
and adjust the release notes.
See https://bugs.llvm.org/show_bug.cgi?id=35200
llvm-svn: 317421
Aaron Ballman [Sat, 4 Nov 2017 20:07:16 +0000 (20:07 +0000)]
Move the llvm-tblgen project into the Tablegenning folder on IDEs like Visual Studio rather than leave it in the root directory. NFC.
llvm-svn: 317420