platform/kernel/u-boot.git
3 years agobinman: Allow setting the ROM offset
Simon Glass [Wed, 8 Jul 2020 03:32:02 +0000 (21:32 -0600)]
binman: Allow setting the ROM offset

On x86 the SPI ROM can be memory-mapped, at least most of it. Add a way
to tell binman the offset from a ROM address to a RAM address.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add an acpi command to list/dump generated ACPI items
Simon Glass [Tue, 7 Jul 2020 19:12:12 +0000 (13:12 -0600)]
acpi: Add an acpi command to list/dump generated ACPI items

Add a command that shows the individual blocks of data generated by each
device, effectively splitting the full table into its component parts.
This can be helpful for debugging.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agodm: acpi: Enhance acpi_get_name()
Simon Glass [Tue, 7 Jul 2020 19:12:11 +0000 (13:12 -0600)]
dm: acpi: Enhance acpi_get_name()

For many device types it is possible to figure out the name just by
looking at its uclass or parent. Add a function to handle this, since it
allows us to cover the vast majority of cases automatically.

However it is sometimes impossible to figure out an ACPI name for a device
just by looking at its uclass. For example a touch device may have a
vendor-specific name. Add a new "acpi,name" property to allow a custom
name to be created.

With this new feature we can drop the get_name() methods in the sandbox
I2C and SPI drivers. They were only added for testing purposes. Update the
tests to use the new values.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agopci: Avoid a crash in device_is_on_pci_bus()
Simon Glass [Tue, 7 Jul 2020 19:12:10 +0000 (13:12 -0600)]
pci: Avoid a crash in device_is_on_pci_bus()

This function cannot currently be called on the root node. Add a check
for this as well as a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: Allow devices to write to DSDT
Simon Glass [Tue, 7 Jul 2020 19:12:09 +0000 (13:12 -0600)]
x86: Allow devices to write to DSDT

Call the new core function to inject ASL programmatically into the DSDT.
This is made up of fragments generated by devices that have the
inject_dsdt() method. The normal, compiled ASL file is added after this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for DSDT generation
Simon Glass [Tue, 7 Jul 2020 19:12:08 +0000 (13:12 -0600)]
acpi: Add support for DSDT generation

Some devices need to inject extra code into the Differentiated System
Descriptor Table (DSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in inject_dsdt() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: Allow devices to write an SSDT
Simon Glass [Tue, 7 Jul 2020 19:12:07 +0000 (13:12 -0600)]
x86: Allow devices to write an SSDT

Call the new core function to write the SSDT. This is made up of fragments
generated by devices that have the fill_ssdt() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support ordering SSDT data by device
Simon Glass [Tue, 7 Jul 2020 19:12:06 +0000 (13:12 -0600)]
acpi: Support ordering SSDT data by device

Add a /chosen property to control the order in which the data appears
in the SSDT. This allows matching up U-Boot's output from a dump of the
known-good data obtained from within Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Record the items added to SSDT
Simon Glass [Tue, 7 Jul 2020 19:12:05 +0000 (13:12 -0600)]
acpi: Record the items added to SSDT

It is useful to be able to control the order of data written to the SSDT
so that we can compare the output against known-good kernel dumps.

Add code to record each item that is added along with the device that
added it. That allows us to reorder things later if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: acpi: Move MADT down a bit
Simon Glass [Tue, 7 Jul 2020 19:12:04 +0000 (13:12 -0600)]
x86: acpi: Move MADT down a bit

Put this table before MCFG so that it matches the order that coreboot uses
when passing tables to Linux. This is a cosmetic change since the order of
the tables does not otherwise matter.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for SSDT generation
Simon Glass [Tue, 7 Jul 2020 19:12:03 +0000 (13:12 -0600)]
acpi: Add support for SSDT generation

Some devices need to generate code for the Secondary System Descriptor
Table (SSDT). Add a method to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for a generic power sequence
Simon Glass [Tue, 7 Jul 2020 19:12:02 +0000 (13:12 -0600)]
acpi: Add support for a generic power sequence

Add a way for devices to enable and disable themselves using ACPI code
that updates GPIOs. This takes several timing parameters and supports
enable, reset and stop.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for writing a GPIO power sequence
Simon Glass [Tue, 7 Jul 2020 19:12:01 +0000 (13:12 -0600)]
acpi: Add support for writing a GPIO power sequence

Power to some devices is controlled by GPIOs. Add a way to generate ACPI
code to enable and disable a GPIO so that this can be handled within an
ACPI method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for writing a Power Resource
Simon Glass [Tue, 7 Jul 2020 19:12:00 +0000 (13:12 -0600)]
acpi: Add support for writing a Power Resource

These are used in ACPI to disable power to various pats of the system when
in sleep. Add a way to create a power resource, with the caller finishing
off the details.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add support for various misc ACPI opcodes
Simon Glass [Tue, 7 Jul 2020 19:11:59 +0000 (13:11 -0600)]
acpi: Add support for various misc ACPI opcodes

Add more functions to handle some miscellaneous ACPI opcodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support copying properties from device tree to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:58 +0000 (13:11 -0600)]
acpi: Support copying properties from device tree to ACPI

Some drivers in Linux support both device tree and ACPI. U-Boot itself
uses Linux device-tree bindings for its own configuration but does not use
ACPI.

It is convenient to copy these values over to the ACPI DP table for
passing to linux. Add some convenience functions to help with this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing a GPIO
Simon Glass [Tue, 7 Jul 2020 19:11:57 +0000 (13:11 -0600)]
acpi: Support writing a GPIO

Allowing writing out a reference to a GPIO within the ACPI output. This
can be used by ACPI code to access a GPIO at runtime.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing Device Properties objects via _DSD
Simon Glass [Tue, 7 Jul 2020 19:11:56 +0000 (13:11 -0600)]
acpi: Support writing Device Properties objects via _DSD

More complex device properties can be provided to drivers via a
device-specific data (_DSD) object.

To create this we need to build it up in a separate data structure and
then generate the ACPI code, due to its recursive nature.

Add an implementation of this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing a UUID
Simon Glass [Tue, 7 Jul 2020 19:11:55 +0000 (13:11 -0600)]
acpi: Support writing a UUID

ACPI supports writing a UUID in a special format. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing a name
Simon Glass [Tue, 7 Jul 2020 19:11:54 +0000 (13:11 -0600)]
acpi: Support writing a name

ACPI supports storing names which are made up of multiple path components.
Several special cases are supported. Add a function to emit a name.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing a string
Simon Glass [Tue, 7 Jul 2020 19:11:53 +0000 (13:11 -0600)]
acpi: Support writing a string

ACPI supports storing a simple null-terminated string. Add support for
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support writing an integer
Simon Glass [Tue, 7 Jul 2020 19:11:52 +0000 (13:11 -0600)]
acpi: Support writing an integer

ACPI supports storing integers in various ways. Add a function to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpigen: Support writing a package
Simon Glass [Tue, 7 Jul 2020 19:11:51 +0000 (13:11 -0600)]
acpigen: Support writing a package

A package collects together several elements. Add an easy way of writing
a package header and updating its length later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpigen: Support writing a length
Simon Glass [Tue, 7 Jul 2020 19:11:50 +0000 (13:11 -0600)]
acpigen: Support writing a length

It is convenient to write a length value for preceding a block of data.
Of course the length is not known or is hard to calculate a priori. So add
a way to mark the start on a stack, so the length can be updated when
known.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of SPI descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:49 +0000 (13:11 -0600)]
acpi: Support generation of SPI descriptor

Add a function to write a SPI descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of I2C descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:48 +0000 (13:11 -0600)]
acpi: Support generation of I2C descriptor

Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of a GPIO/irq for a device
Simon Glass [Tue, 7 Jul 2020 19:11:47 +0000 (13:11 -0600)]
acpi: Support generation of a GPIO/irq for a device

Some devices use interrupts but some use GPIOs. Since these are fully
specified in the device tree we can automatically produce the correct ACPI
descriptor for a device.

Add a function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of GPIO descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:46 +0000 (13:11 -0600)]
acpi: Support generation of GPIO descriptor

Add a function to write a GPIO descriptor to the generated ACPI code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: Drop comment about the type always being ACPI_GPIO_TYPE_IO]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support string output
Simon Glass [Tue, 7 Jul 2020 19:11:45 +0000 (13:11 -0600)]
acpi: Support string output

Add support for output of strings and streams of bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agogpio: Add a method to convert a GPIO to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:44 +0000 (13:11 -0600)]
gpio: Add a method to convert a GPIO to ACPI

When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new GPIO method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of interrupt descriptor
Simon Glass [Tue, 7 Jul 2020 19:11:43 +0000 (13:11 -0600)]
acpi: Support generation of interrupt descriptor

Add a function to write an interrupt descriptor to the generated ACPI
code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Support generation of ACPI code
Simon Glass [Tue, 7 Jul 2020 19:11:42 +0000 (13:11 -0600)]
acpi: Support generation of ACPI code

Add a new file to handle generating ACPI code programatically. This is
used when information must be dynamically added to the tables, e.g. the
SSDT.

Initial support is just for writing simple values. Also add a 'base' value
so that the table can be freed. This likely doesn't happen in normal code,
but is nice to do in tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoirq: Add a method to convert an interrupt to ACPI
Simon Glass [Tue, 7 Jul 2020 19:11:41 +0000 (13:11 -0600)]
irq: Add a method to convert an interrupt to ACPI

When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI
structures required by ACPI. This is a SoC-specific conversion and cannot
be handled by generic code, so add a new IRQ method to do the conversion.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add a way to check device status
Simon Glass [Tue, 7 Jul 2020 19:11:40 +0000 (13:11 -0600)]
acpi: Add a way to check device status

At present U-Boot does not support the different ACPI status values, but
it is best to put this logic in a central place. Add a function to get the
device status.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoacpi: Add a function to get a device path and scope
Simon Glass [Tue, 7 Jul 2020 19:11:39 +0000 (13:11 -0600)]
acpi: Add a function to get a device path and scope

Add a function to build up the ACPI path for a device and another for its
scope.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agodm: core: Add an ACPI name for the root node
Simon Glass [Tue, 7 Jul 2020 19:11:38 +0000 (13:11 -0600)]
dm: core: Add an ACPI name for the root node

This always has a fixed ACPI name so add it as a driver function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: fsp: Support a warning message when DRAM init is slow
Simon Glass [Fri, 10 Jul 2020 00:43:17 +0000 (18:43 -0600)]
x86: fsp: Support a warning message when DRAM init is slow

With DDR4, Intel SOCs take quite a long time to init their memory. During
this time, if the user is watching, it looks like SPL has hung. Add a
message in this case.

This works by adding a return code to fspm_update_config() that indicates
whether MRC data was found and a new property to the device tree.

Also add one more debug message while starting.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
3 years agox86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME
Simon Glass [Fri, 10 Jul 2020 00:43:16 +0000 (18:43 -0600)]
x86: Avoid #ifdef with CONFIG_HAVE_ACPI_RESUME

At present this enables a few arch-specific members of the global_data
struct which are otherwise not part of the struct. As a result we have to
use #ifdef in various places.

The cost of always having these in the struct is small. Adjust things so
that we can use compile-time code instead of #ifdefs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agocoral: Enable the copy framebuffer
Simon Glass [Fri, 10 Jul 2020 00:43:15 +0000 (18:43 -0600)]
coral: Enable the copy framebuffer

Enable this feature on chromebook_coral to speed up the display.

With this change, the time taken to print the environment to the display
without CONFIG_CONSOLE_SCROLL_LINES is reduced from 1830ms to 62ms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agotimer: Allow delays with a 32-bit microsecond timer
Simon Glass [Fri, 10 Jul 2020 00:43:14 +0000 (18:43 -0600)]
timer: Allow delays with a 32-bit microsecond timer

The current get_timer_us() uses 64-bit arithmetic on 32-bit machines.
When implementing microsecond-level timeouts, 32-bits is plenty. Add a
new function that uses an unsigned long. On 64-bit machines this is
still 64-bit, but this doesn't introduce a penalty. On 32-bit machines
it is more efficient.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: p2sb: make P2SB driver depend on P2SB uclass
Wolfgang Wallner [Wed, 1 Jul 2020 11:37:24 +0000 (13:37 +0200)]
x86: p2sb: make P2SB driver depend on P2SB uclass

Currently it is possible to select the P2SB driver without selecting the
P2SB uclass, which can't work. Fix this by adding a "depends on" in
Kconfig.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agodrivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge
Wolfgang Wallner [Wed, 1 Jul 2020 11:37:23 +0000 (13:37 +0200)]
drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband Bridge

In Intel's documentation the term P2SB stands for "Primary to Sideband
Bridge".

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMerge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 16 Jul 2020 20:35:15 +0000 (16:35 -0400)]
Merge tag 'efi-2020-10-rc1-4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-10-rc1 (4)

Improvements for the UEFI subsystem include:

* support for read-only TEE-backed variables
* allow to compile PK, KEK, db, dbx fixed values into U-Boot
* bug fixes

Python testing related changes comprise:

* enable 'bootefi hello' for better test coverage
* remove SKIP messages in UEFI Python tests

The fitupd command is dropped.
Build errors for the lsblk command are fixed.

3 years agomx6memcal: fix build
Stefano Babic [Thu, 16 Jul 2020 13:11:18 +0000 (15:11 +0200)]
mx6memcal: fix build

Commit 4503299 has a side effect on this board, and build is broken.
Adjust mx6memcal_defconfig to build it again.

Signed-off-by: Stefano Babic <sbabic@denx.de>
3 years agoefi_loader: simplify 'printenv -e'
Heinrich Schuchardt [Wed, 15 Jul 2020 16:00:56 +0000 (18:00 +0200)]
efi_loader: simplify 'printenv -e'

Currently default output of 'printenv -e' is restricted to variables with
GUID EFI_GLOBAL_VARIABLE. This excludes db and dbx. As the number of
variables is small there is no need for this restriction.

If no GUID is provided, print all matching variables irrespective of GUID.

Always show the numeric value of the GUID.

If the GUID provided to 'setenv -e' is invalid, return CMD_RET_USAGE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: describe EFI_VAR_FILE_MAGIC
Heinrich Schuchardt [Thu, 16 Jul 2020 05:18:40 +0000 (07:18 +0200)]
efi_loader: describe EFI_VAR_FILE_MAGIC

Add documentation for EFI_VAR_FILE_MAGIC used in the file format for UEFI
variables.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: pre-seed UEFI variables
Heinrich Schuchardt [Tue, 14 Jul 2020 19:25:28 +0000 (21:25 +0200)]
efi_loader: pre-seed UEFI variables

Include a file with the initial values for non-volatile UEFI variables
into the U-Boot binary. If this variable is set, changes to variable PK
will not be allowed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: identify PK, KEK, db, dbx correctly
Heinrich Schuchardt [Wed, 15 Jul 2020 10:40:35 +0000 (12:40 +0200)]
efi_loader: identify PK, KEK, db, dbx correctly

To determine if a varible is on the of the authentication variables
PK, KEK, db, dbx we have to check both the name and the GUID.

Provide a function converting the variable-name/guid pair to an enum and
use it consistently.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: configuration of variables store
Heinrich Schuchardt [Tue, 14 Jul 2020 17:18:33 +0000 (19:18 +0200)]
efi_loader: configuration of variables store

The file based and the OP-TEE based UEFI variable store are mutually
exclusive. Define them as choice options in Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: provide links to Microsoft UEFI certificates
Heinrich Schuchardt [Tue, 14 Jul 2020 10:52:51 +0000 (12:52 +0200)]
doc: provide links to Microsoft UEFI certificates

Some distributions provide UEFI binaries like Shim that have been signed
using a Microsoft certificate. Provide the download paths for the public
keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: update secure state
Heinrich Schuchardt [Tue, 14 Jul 2020 06:14:08 +0000 (08:14 +0200)]
efi_loader: update secure state

Update the UEFI secure state when variable 'PK' is updated in the TEE
variables implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
3 years agoefi_loader: restructure code for TEE variables
Heinrich Schuchardt [Tue, 14 Jul 2020 06:04:49 +0000 (08:04 +0200)]
efi_loader: restructure code for TEE variables

When using secure boot functions needed both for file and TEE based UEFI
variables have to be moved to the common code module efi_var_common.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: display RO attribute with TEE-backed variables
Ilias Apalodimas [Thu, 9 Jul 2020 20:00:40 +0000 (23:00 +0300)]
efi_loader: display RO attribute with TEE-backed variables

A previous commit adds support for displaying variables RO flag.
Let's add it on the TEE backed variable storage as well.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: skip warnings for network configuration
Heinrich Schuchardt [Mon, 13 Jul 2020 10:22:23 +0000 (12:22 +0200)]
efi_loader: skip warnings for network configuration

Skip messages should only be written if the setup is not suitable for
testing.

If DHCP is enabled, we should not write a skip message if no static network
configuration is supplied.

Likewise if a static network configuration is supplied, we should not write
a skip message if DHCP is not enabled.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_selftest: enable 'bootefi hello'
Heinrich Schuchardt [Mon, 13 Jul 2020 05:33:40 +0000 (07:33 +0200)]
efi_selftest: enable 'bootefi hello'

In our Python tests we want to run 'bootefi hello'. Enable it by default
when compiling with CMD_BOOTEFI_SELFTEST.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agocmd: fix lsblk command
Heinrich Schuchardt [Mon, 13 Jul 2020 20:22:31 +0000 (22:22 +0200)]
cmd: fix lsblk command

Add missing includes.
Add CMD_LSBLK to sandbox_defconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agocmd: drop fitupd command
Heinrich Schuchardt [Wed, 17 Jun 2020 08:53:29 +0000 (10:53 +0200)]
cmd: drop fitupd command

The `fitupd' command is not used by any board. The `dfu tftp' command
provides the same capabilities.

So let's drop the `fitupd' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoimx6: Remove unneeded CONFIG_DM_MDIO
Fabio Estevam [Mon, 13 Jul 2020 14:59:36 +0000 (11:59 -0300)]
imx6: Remove unneeded CONFIG_DM_MDIO

As explained in the CONFIG_DM_MDIO text inside drivers/net/Kconfig:

"Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces."

i.MX6 has a single FEC instance, so there is no need to select
CONFIG_DM_MDIO.

Remove it from the i.MX6 defconfig files.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
3 years agoarm: dts: imx7: Fix error in coresight TPIU graph connection
Ilko Iliev [Mon, 13 Jul 2020 13:25:10 +0000 (15:25 +0200)]
arm: dts: imx7: Fix error in coresight TPIU graph connection

OF graph endpoint connections must be bidirectional and dtc warn if they
are not. i.MX7 based DTs have an error and generate
warnings:

arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/replicator/ports/port@0/endpoint: graph connection to node
'/soc/tpiu@30087000/port/endpoint' is not bidirectional
arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint):
/soc/tpiu@30087000/port/endpoint: graph connection to node
'/replicator/ports/port@1/endpoint' is not bidirectional

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
3 years agoarm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)
Lukasz Majewski [Fri, 10 Jul 2020 07:49:32 +0000 (09:49 +0200)]
arm: Add extra boot device (UART) to run Ymodem u-boot.img boot on XEA (imx28)

This commit enables imx28 based XEA board's u-boot.sb (SPL) to download
u-boot proper (u-boot.img) via Ymodem protocol.

This is extremely useful in the recovery scenario where u-boot.sb is
downloaded via uuu utility to SDRAM [*], and then one can upload u-boot
proper via serial console to fully debrick the device.

Note - debricking procedure of imx28 devices:
- NXP's original USB based tools (like mxsldr or uuu) expect single
  u-boot.sb which is a relic of the old U-Boot (~2013) without SPL and
  U-Boot proper distinction.

[*] On Host:
------------
cat << EOF > imx28_xea.lst
uuu_version 1.3.0
SDPS: boot -f /srv/tftp/xea/u-boot.sb
SDPU: done
EOF

Please start picocom:
sudo picocom -b 115200 -s "sz -vv" /dev/ttyUSB1
sudo ./uuu/uuu -V imx28_xea.lst

On the U-boot console one shall see:
Trying to boot from UART
CCC

Then please press CTRL+A, S
and type u-boot.img

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
3 years agoimx6: aristainetos: sync defconfig with 2020.10
Heiko Schocher [Wed, 8 Jul 2020 05:39:59 +0000 (07:39 +0200)]
imx6: aristainetos: sync defconfig with 2020.10

as patch
gpio: search for gpio label if gpio is not found through bank name

is now in mainline, but functionality is disabled, we
need to enable

CONFIG_DM_GPIO_LOOKUP_LABEL

for the aristainetos boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
3 years agowatchdog: imx: Support set timeout by wdt command
Mo, Yuezhang [Wed, 1 Jul 2020 09:15:28 +0000 (09:15 +0000)]
watchdog: imx: Support set timeout by wdt command

After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog
can be started by wdt command. But the imx watchdog driver only
support start with the default timeout.

This commit adds the support for setting the timeout which pass from
the wdt command into the imx watchdog. If the timeout out of the
valid range(0.5~128s), start the watchdog with a timeout within the
valid range and the timeout is the one which closest to the passed
timeout.

Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com>
Reviewed-by: Andy.Wu <Andy.Wu@sony.com>
Reviewed-by: stefano Babic <sbabic@denx.de>
3 years agopower: pmic_pca9450: fix PCA9450A I2C address
Sébastien Szymanski [Tue, 30 Jun 2020 13:03:13 +0000 (15:03 +0200)]
power: pmic_pca9450: fix PCA9450A I2C address

Quoting Ye Li from NXP:

    "We have confirmed with PMIC team, 0x35 is used only on early chips
    and not used any more. 0x25 is the final address."

Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
3 years agoARM: mx6: make CAAM usable on the i.MX6 boards
Heinrich Schuchardt [Fri, 26 Jun 2020 17:57:55 +0000 (19:57 +0200)]
ARM: mx6: make CAAM usable on the i.MX6 boards

Even if the HAB fuse is not set we want to be able to use the Cryptographic
Accelerator and Assurance Module (CAAM) for generating random numbers. So
SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set.

arch_misc_init() has to be called to initialize the CAAM.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agopico-imx6ul: Fix Quick Start Guide URL
Fabio Estevam [Mon, 22 Jun 2020 00:32:26 +0000 (21:32 -0300)]
pico-imx6ul: Fix Quick Start Guide URL

The current URL for the pico imx6ul board is not valid anymore. Change
to a different URL that works.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
3 years agogpio: mxc_gpio: Improve to use ofdata_to_platdata
Ye Li [Wed, 10 Jun 2020 03:29:51 +0000 (20:29 -0700)]
gpio: mxc_gpio: Improve to use ofdata_to_platdata

Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.

Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 years agomisc: scu_api: Add SCFW API to get the index of boot container set
Ye Li [Tue, 9 Jun 2020 10:34:42 +0000 (03:34 -0700)]
misc: scu_api: Add SCFW API to get the index of boot container set

Add SCFW API sc_misc_get_boot_container to get current boot container
set index.
The index value returns 1 for primary container set, 2 for secondary
container set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
3 years agospi: fsl_qspi: Support to use full AHB space on i.MX
Ye Li [Tue, 9 Jun 2020 07:59:06 +0000 (00:59 -0700)]
spi: fsl_qspi: Support to use full AHB space on i.MX

i.MX platforms provide large AHB mapped space for QSPI, each
controller has 256MB. However, current driver only maps small
size (AHB buffer size) of AHB space, this implementation
causes i.MX failed to boot M4 with QSPI XIP image.

Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX)
to address above problem.

When the config is set:
1. Full AHB space is divided to each CS.
2. A dedicated LUT entry is used for AHB read only.
3. The MODE instruction in LUT is replaced to standard ADDR instruction
4. The address in spi_mem_op is used to SFAR and AHB read

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
3 years agospi: fsl_qspi: Add support for i.MX7ULP
Ye Li [Tue, 9 Jun 2020 07:59:05 +0000 (00:59 -0700)]
spi: fsl_qspi: Add support for i.MX7ULP

Add compatible string and driver data for i.MX7ULP.
Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should
align with 1KB, because the lowest 10 bits are reserved by the
registers definition.
For i.MX7ULP which has only 128Bytes AHB buffer, must align it
when setting the registers and selecting cs.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
3 years agoMerge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Thu, 16 Jul 2020 02:41:43 +0000 (22:41 -0400)]
Merge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

- Correct mmc_spi check condition
- Generate R1/R2/R1b response
- Read SSR for SD SPI

3 years agoMerge branch '2020-07-15-ci-updates'
Tom Rini [Wed, 15 Jul 2020 19:48:05 +0000 (15:48 -0400)]
Merge branch '2020-07-15-ci-updates'

- Make sure GRUB is copied to the right place for CI on GitLab/Azure
- Note in our GitHub PR template that you can use this to trigger Azure CI

3 years agoAzure: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:40:19 +0000 (00:40 +0200)]
Azure: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years ago.gitlab-ci.yml: copy GRUB to correct build path
Heinrich Schuchardt [Mon, 13 Jul 2020 22:23:58 +0000 (00:23 +0200)]
.gitlab-ci.yml: copy GRUB to correct build path

The GRUB binaries are expected in $UBOOT_TRAVIS_BUILD_DIR.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agogithub: azure: Update our GitHub template to note for CI
Tom Rini [Fri, 10 Jul 2020 20:00:08 +0000 (16:00 -0400)]
github: azure: Update our GitHub template to note for CI

While the general policy of not taking changes to the project via pull
requests directly on GitHub has not changed, it can be useful to submit
a PR there in order to trigger a CI run on Azure.  These are run
automatically and the results are populated back to GitHub.  Add a note
to the template to reflect this.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Tue, 14 Jul 2020 13:09:27 +0000 (09:09 -0400)]
Merge tag 'ti-v2020.10-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Sync DMA and CPSW DT bindings for K3 devices
- Other minor fixes for mmc and other TI devices

3 years agoarm: imx6q: pcm058: Convert pcm058 to use DM with DTs
Niel Fourie [Tue, 19 May 2020 12:01:43 +0000 (14:01 +0200)]
arm: imx6q: pcm058: Convert pcm058 to use DM with DTs

Convert pcm058 support to use device trees and the driver model.
Add rudimentary boot scripts to the environment, expand README.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
3 years agoarm: imx6q: pcm058: change MAINTAINER
Niel Fourie [Tue, 19 May 2020 12:01:42 +0000 (14:01 +0200)]
arm: imx6q: pcm058: change MAINTAINER

Change the MAINTAINER of pcm058.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
3 years agoarm: dts: imx6q: Add Linux dts files for Phytec Mira
Niel Fourie [Tue, 19 May 2020 12:01:41 +0000 (14:01 +0200)]
arm: dts: imx6q: Add Linux dts files for Phytec Mira

Add Phytec Mira device tree files, for use with pcm058.
>From Linux 5.6, commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
3 years agodts-bindings: regulator: Add dlg,da9063-regulator
Niel Fourie [Tue, 19 May 2020 12:01:40 +0000 (14:01 +0200)]
dts-bindings: regulator: Add dlg,da9063-regulator

Add da9063-regulator bindings from Linux 5.6:
commit 7111951b8d49 upstream

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
4 years agommc_spi: generate R1b response for erase and stop transmission command
Pragnesh Patel [Mon, 29 Jun 2020 09:47:29 +0000 (15:17 +0530)]
mmc_spi: generate R1b response for erase and stop transmission command

As per the SD physical layer specification version 7.10, erase
command (CMD38) and stop transmission command (CMD12) will generate
R1b response.

R1b = R1 + busy signal

A non-zero value after the R1 response indicates card is ready for
next command.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Generate R1 response for erase block start and end address
Pragnesh Patel [Mon, 29 Jun 2020 09:47:28 +0000 (15:17 +0530)]
mmc: mmc_spi: Generate R1 response for erase block start and end address

Erase block start address (CMD32) and erase block end address (CMD33)
command will generate R1 response for mmc SPI mode.

R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response
for this commands.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: Read R2 response for send status command - CMD13
Pragnesh Patel [Mon, 29 Jun 2020 09:47:27 +0000 (15:17 +0530)]
mmc: mmc_spi: Read R2 response for send status command - CMD13

Send status command (CMD13) will send R1 response under SD mode
but R2 response under SPI mode.

R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: read ssr for SD spi
Pragnesh Patel [Mon, 29 Jun 2020 09:47:26 +0000 (15:17 +0530)]
mmc: read ssr for SD spi

The content of ssr is useful only for erase operations.
This saves erase time.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: generate R1 response for different mmc SPI commands
Pragnesh Patel [Mon, 29 Jun 2020 09:47:25 +0000 (15:17 +0530)]
mmc: mmc_spi: generate R1 response for different mmc SPI commands

R1 response is 1 byte long for mmc SPI commands as per the updated
physical layer specification version 7.10.

So correct the resp and resp_size for existing commands

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agommc: mmc_spi: correct the while condition
Pragnesh Patel [Mon, 29 Jun 2020 09:47:24 +0000 (15:17 +0530)]
mmc: mmc_spi: correct the while condition

When variable i will become 0, while(i--) loop breaks but variable i will
again decrement to -1 because of i-- and that's why below condition
"if (!i && (r != resp_match_value)" will never execute, So doing "i--"
inside of while() loop solves this problem.

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
4 years agoimx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN
Peng Fan [Fri, 10 Jul 2020 03:24:42 +0000 (11:24 +0800)]
imx8mm_evk: enlarge CONFIG_SYS_BOOTM_LEN

Enlarge CONFIG_SYS_BOOTM_LEN when booting FIT image with kernel.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: implement armv8_el2_to_aarch32
Peng Fan [Fri, 10 Jul 2020 03:22:20 +0000 (11:22 +0800)]
imx8m: implement armv8_el2_to_aarch32

Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot
could boot aarch32 mode linux with FIT image as below:

/dts-v1/;

/ {
        description = "Configuration to load ARM32 Linux";

        images {
                kernel@1 {
                        description = "ARM32 Linux kernel";
                        data = /incbin/("./Image");
                        type = "kernel";
                        arch = "arm";
                        os = "linux";
                        compression = "none";
                        load = <0x40008000>;
                        entry = <0x40008000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
                fdt@1 {
                        description = "Flattened Device Tree blob";
                        data = /incbin/("./imx8mm-evk.dtb");
                        type = "flat_dt";
                        arch = "arm";
                        compression = "none";
                        load = <0x43000000>;
                        hash@1 {
                                algo = "md5";
                        };
                };
        };
        configurations {
                default = "config@1";

                config@1 {
                        description = "fsl-imx8mm-evk";
                        kernel = "kernel@1";
                        fdt = "fdt@1";
                };
        };
};

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: Refactor the OPTEE memory removal
Peng Fan [Thu, 9 Jul 2020 07:26:06 +0000 (15:26 +0800)]
imx8m: Refactor the OPTEE memory removal

Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, adjust the MMU table for the split case,
Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge
i.MX8MP evk to default to avoid issue.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8m: drop clk settings
Peng Fan [Thu, 9 Jul 2020 07:36:22 +0000 (15:36 +0800)]
clk: imx8m: drop clk settings

We use non-dm code to configure the clk settings in order to simplify
dm clk driver in future, so remove the duplicated code from clk driver

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: disable nodes before kernel/mfgtool boot for fused part
Peng Fan [Thu, 9 Jul 2020 06:06:49 +0000 (14:06 +0800)]
imx8m: disable nodes before kernel/mfgtool boot for fused part

To fused part, we need to disable nodes of dtb to let kernel boot.

To mfgtool, USB issue when using super-speed for mfgtool, temporally
work around the problem to use high-speed only.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mn/imx8mp: override env_get_offset and env_get_location
Ye Li [Mon, 15 Jul 2019 08:16:46 +0000 (01:16 -0700)]
imx8mn/imx8mp: override env_get_offset and env_get_location

To use one defconfig for all boot device, we have to runtime set
env offset and return env medium according to the boot device.
This patch overrides the env_get_offset and env_get_location to
implement the feature.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: power down fused cores
Peng Fan [Thu, 9 Jul 2020 05:52:41 +0000 (13:52 +0800)]
imx8m: power down fused cores

For non-Quad SoCs, the fused cpu cores could be powered down in SPL
to save power.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8mp: Add fused parts support
Ye Li [Tue, 21 Apr 2020 03:12:54 +0000 (20:12 -0700)]
imx8mp: Add fused parts support

iMX8MP has 6 fused parts in each qualification tier, with core, VPU,
ISP, NPU or DSP fused respectively.

The configuration tables for enabled modules:
MIMX8ML8DVNLZAA          Quad Core, VPU, NPU, ISP, DSP
MIMX8ML7DVNLZAA          Quad Core, NPU, ISP
MIMX8ML6DVNLZAA          Quad Core, VPU, ISP
MIMX8ML5DVNLZAA          Quad Core, VPU
MIMX8ML4DVNLZAA          Quad Lite
MIMX8ML3DVNLZAA          Dual Core, VPU, NPU, ISP, DSP

Add the support in U-Boot

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: workaround ROM serror
Peng Fan [Thu, 9 Jul 2020 05:39:26 +0000 (13:39 +0800)]
imx8m: workaround ROM serror

ROM SError happens on two cases:

1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but
when ROM patch lock is fused, this write will cause SError.

2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB
is field return mode, but the last 4K of ROM is still protected and cause
SError.

Since ROM mask SError until ATF unmask it, so then ATF always meets the
exception. This patch works around the issue in SPL by enabling SPL
Exception vectors table and the SError exception, take the exception
to eret immediately to clear the SError.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: add eqos clk
Peng Fan [Thu, 9 Jul 2020 05:14:20 +0000 (13:14 +0800)]
imx8m: add eqos clk

Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the
weak function in driver

Add set_clk_eqos to configure eQoS clk

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: add sdhc/nand/ecspi clk api
Peng Fan [Thu, 9 Jul 2020 03:35:15 +0000 (11:35 +0800)]
imx8m: add sdhc/nand/ecspi clk api

Current DM CLK is a bit complicated, for simplity, let DM clk only
support enable/disable/get_rate. For the expected rate settings,
we use non-DM clk to do that. Then we could have simple DM clk for
i.MX and could also share between SPL/U-Boot proper.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: configure NoC clk
Peng Fan [Thu, 9 Jul 2020 03:18:50 +0000 (11:18 +0800)]
imx8m: configure NoC clk

Configure NoC clk for better system performance

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoimx8m: configure arm clk sources from PLL
Peng Fan [Thu, 9 Jul 2020 03:06:24 +0000 (11:06 +0800)]
imx8m: configure arm clk sources from PLL

A53 CCM root max support 1GHz, to support high freq, we need
to switch ARM clk sources from ARM PLL directly.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mp: Update imx8mp ccf clock driver
Ye Li [Wed, 22 Apr 2020 03:19:24 +0000 (20:19 -0700)]
clk: imx8mp: Update imx8mp ccf clock driver

Add clocks for FEC and flexspi, and add set parent clock callback,
so DTS can assign clocks

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 years agoclk: imx8mm/8mn: Add USB clocks
Ye Li [Sun, 19 Apr 2020 09:22:09 +0000 (02:22 -0700)]
clk: imx8mm/8mn: Add USB clocks

Add USB relevant clocks to support usb clock settings for both
DM USB host and gadget drivers

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>