Simon Glass [Fri, 19 May 2017 02:08:55 +0000 (20:08 -0600)]
dm: Add a function to create a 'live' device tree
This function converts the flat device tree into a hierarchical one with
C structures and pointers. This is easier to access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 19 May 2017 02:08:54 +0000 (20:08 -0600)]
dm: core: Add livetree access functions
Add a basic assortment of functions to access the live device tree. These
come from Linux v4.9 and are modified for U-Boot to the minimum extent
possible. While these functions are now very stable in Linux, it will be
possible to merge in fixes if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 19 May 2017 02:08:53 +0000 (20:08 -0600)]
dm: core: Add livetree definitions
Add a Kconfig option to enable a live device tree, built at run time from
the flat tree. Also add structure definitions and a root node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 19 May 2017 02:08:52 +0000 (20:08 -0600)]
Update WARN_ON() to return a value
In linux v4.9 this returns a value. This saves checking the warning
condition twice in some code.
Update the U-Boot version to do this also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 19 May 2017 02:08:51 +0000 (20:08 -0600)]
dm: core: Set return value first in lists_bind_fdt()
Adjust the order to make it clear that *devp is set to NULL by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:11 +0000 (20:02 -0600)]
tegra: Convert MMC to use driver model for operations
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:10 +0000 (20:02 -0600)]
dm: mmc: Rewrite mmc_blk_probe()
This function is called when the MMC block device is being probed. There
is a recursive call in this function since find_mmc_device() itself can
cause the MMC device to be probed.
Admittedly the MMC device should already be probed, since we would not be
probing its child otherwise, but the current code is unnecessarily
convoluted.
Rewrite this to access the MMC structure directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:09 +0000 (20:02 -0600)]
dm: mmc: Check that drivers have operations
When binding a new MMC device, make sure that it has the required
operations. Since for now we still support *not* having the operations
(with CONFIG_DM_MMC_OPS not enabled) it makes sense to add this check.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:07 +0000 (20:02 -0600)]
dm: blk: Improve block device claiming
The intention with block devices is that the device number (devnum field
in its descriptor) matches the alias of its parent device. For example,
with:
aliases {
mmc0 = "/sdhci@
700b0600";
mmc1 = "/sdhci@
700b0400";
}
we expect that the block devices for mmc0 and mmc1 would have device
numbers of 0 and 1 respectively.
Unfortunately this does not currently always happen. If there is another
MMC device earlier in the driver model data structures its block device
will be created first. It will therefore get device number 0 and mmc0
will therefore miss out. In this case the MMC device will have sequence
number 0 but its block device will not.
To avoid this, allow a device to request a device number and bump any
existing device number that is using it. This all happens during the
binding phase so it is safe to change these numbers around. This allows
device numbers to match the aliases in all circumstances.
Add a test to verify the behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:06 +0000 (20:02 -0600)]
dm: blk: Add a function to find the next block device number
At present this code is inline. Move it into a function to allow it to
be used elsewhere.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:05 +0000 (20:02 -0600)]
dm: blk: Allow finding block devices without probing
Sometimes it is useful to be able to find a block device without also
probing it. Add a function for this as well as the associated test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 24 Apr 2017 02:02:04 +0000 (20:02 -0600)]
dm: mmc: Don't re-init when accessing environment
With driver model MMC is probed automatically when needed. We should not
re-init MMC each time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 23 Apr 2017 01:10:56 +0000 (19:10 -0600)]
dm: mmc: Don't call board_mmc_power_init() with driver model
We should not call out to board code from drivers. With driver model,
mmc_power_init() already has code to use a named regulator, but the
legacy code path remains. Update the code to make this clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:11 +0000 (17:18 -0600)]
dm: core: Adjust device_bind_common() to take an ofnode
This core function will need to work with a live tree also. Update it to
accept an ofnode instead of an offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:10 +0000 (17:18 -0600)]
dm: core: Add ofnode to represent device tree nodes
With live tree we need a struct device_node * to reference a node. With
the existing flat tree, we need an int offset. We need to unify these into
a single value which can represent both.
Add an ofnode union for this and adjust existing code to move to this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:09 +0000 (17:18 -0600)]
dm: core: Replace of_offset with accessor (part 2)
At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:08 +0000 (17:18 -0600)]
dm: core: Dont export dm_scan_fdt_node()
This function is only used in one place. It is better to just declare it
internally since there is a simpler replacement for use outside the
driver-model core code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:07 +0000 (17:18 -0600)]
dm: Fix up inclusion of common.h
It is good practice to include common.h as the first header. This ensures
that required features like the DECLARE_GLOBAL_DATA_PTR macro,
configuration options and common types are available.
Fix up some files which currently don't do this. This is necessary because
driver model will soon start using global data and configuration in the
dm/read.h header file, included via dm.h. The gd->fdt_blob value will be
used to access the device tree and CONFIG options will be used to
determine whether to support inline functions in the header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:06 +0000 (17:18 -0600)]
atmel: Fix up use of dm_scan_fdt_node()
This function should not be used outside the core driver-model code.
Update it to use dm_scan_fdt_dev() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:05 +0000 (17:18 -0600)]
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..()
prefix for functions that support both flat tree and live tree. So rename
the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree
2. devfdt_get_addr...() - current functions, flat tree only
3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call
either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:04 +0000 (17:18 -0600)]
dm: core: Move dev_get_addr() etc. into a separate file
Move this group of address-related functions into a new file. These use
the flat device tree. Future work will provide new versions of these which
can support the live tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 23:18:03 +0000 (17:18 -0600)]
dm: Use dm.h header when driver mode is used
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 1 Jun 2017 02:28:06 +0000 (22:28 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Please pull another update for Broadcom MIPS.
This contains new SoC's, new boards and new drivers and some bugfixes.
Tom Rini [Thu, 1 Jun 2017 02:27:54 +0000 (22:27 -0400)]
Merge git://www.denx.de/git/u-boot-marvell
Mostly including the Armada 37xx pinctrl / gpio driver.
Daniel Thompson [Fri, 19 May 2017 16:26:58 +0000 (17:26 +0100)]
Kconfig: Finish migration of hashing commands
Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>
Álvaro Fernández Rojas [Tue, 23 May 2017 19:24:49 +0000 (21:24 +0200)]
mips: bmips: fix BCM3380 periph clock frequency
Instead of having a peripheral clock of 50 MHz like the BCM63xx family, it
has a 48 MHz clock.
This fixes uart baud rate calculation for BCM3380.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Mon, 22 May 2017 18:02:06 +0000 (20:02 +0200)]
mips: bmips: extend baud rates support
Now that the uart driver has been fixed we support more baud rates.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Mon, 22 May 2017 18:01:46 +0000 (20:01 +0200)]
dm: serial: bcm6345: fix baud rate clock calculation
It's currently bugged and doesn't work for even cases.
Right shift bits instead of dividing and fix even cases.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Thu, 18 May 2017 21:09:45 +0000 (23:09 +0200)]
dm: serial: bcm6345: fix uart stop bits
I missed this when I added support for BMIPS UART driver and it's needed to
achieve a real 115200 8N1 setup.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:47:49 +0000 (18:47 +0200)]
mips: bmips: add board descriptions
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:46:59 +0000 (18:46 +0200)]
MIPS: add BMIPS Sagem F@ST1704 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:46:58 +0000 (18:46 +0200)]
MIPS: add support for Broadcom MIPS BCM6338 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:46:57 +0000 (18:46 +0200)]
dm: cpu: bmips: add BCM6338 support
BCM6338 has a fixed CPU frequency of 240 MHz.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:42:43 +0000 (18:42 +0200)]
MIPS: add BMIPS Netgear CG3100D board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:42:42 +0000 (18:42 +0200)]
MIPS: add support for Broadcom MIPS BCM3380 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:42:41 +0000 (18:42 +0200)]
dm: cpu: bmips: add BCM3380 support
As far as I know BCM3380 has a fixed CPU frequency since I couldn't find its
PLL registers in any documentation.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:39:04 +0000 (18:39 +0200)]
MIPS: add BMIPS Comtrend CT-5361 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:39:03 +0000 (18:39 +0200)]
MIPS: add support for Broadcom MIPS BCM6348 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:39:02 +0000 (18:39 +0200)]
dm: ram: bmips: add BCM6338/BCM6348 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:39:01 +0000 (18:39 +0200)]
dm: ram: bmips: split bcm6358_get_ram_size
This is done in order to reuse ram size calculation for BCM6338/BCM6348
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:39:00 +0000 (18:39 +0200)]
dm: cpu: bmips: add BCM6348 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:38:59 +0000 (18:38 +0200)]
dm: cpu: bmips: rename cpu_desc specific functions
Use a generic name for cpu_desc functions instead of using a specific SoC one.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:16 +0000 (18:29 +0200)]
mips: bmips: add wdt-reboot driver support for BCM63268
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:15 +0000 (18:29 +0200)]
mips: bmips: add wdt-reboot driver support for BCM6328
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:14 +0000 (18:29 +0200)]
mips: bmips: add wdt-reboot driver support for BCM6358
This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:13 +0000 (18:29 +0200)]
dm: sysreset: add watchdog-reboot driver
Add a new sysreset driver that uses the recently added watchdog support.
It performs a full SoC reset by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:12 +0000 (18:29 +0200)]
mips: bmips: add bcm6345-wdt driver support for BCM63268
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:11 +0000 (18:29 +0200)]
mips: bmips: add bcm6345-wdt driver support for BCM6328
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:10 +0000 (18:29 +0200)]
mips: bmips: add bcm6345-wdt driver support for BCM6358
This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Álvaro Fernández Rojas [Tue, 16 May 2017 16:29:09 +0000 (18:29 +0200)]
dm: watchdog: add BCM6345 watchdog driver
This driver is a simplified version of linux/drivers/watchdog/bcm63xx_wdt.c
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Wildt [Wed, 10 May 2017 20:18:54 +0000 (22:18 +0200)]
arm: mvebu: kwbimage: inline function to fix use-after-free
image_version_file()'s only use is to return the version number of the
specified image, and it's only called by kwbimage_generate(). This
version function mallocs "image_cfg" and reads the contents of the image
into that buffer. Before return to its caller it frees the buffer.
After extracting the version, kwb_image_generate() tries to calculate
the header size by calling image_headersz_v1(). This function now
accesses "image_cfg", which has already been freed.
Since image_version_file() is only used by a single function, inline it
into kwbimage_generate() and only free the buffer after it is no longer
needed. This also improves code readability since the code is mostly
equal to kwbimage_set_header().
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
Patrick Wildt [Wed, 10 May 2017 13:12:34 +0000 (15:12 +0200)]
arm: mvebu: clearfog: generic distro bootcmd
Switch Clearfog to the generic distro defaults. This has been taken
from a Debian mailing list thread:
https://lists.debian.org/debian-boot/2016/10/msg00026.html
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
Patrick Wildt [Tue, 9 May 2017 11:54:44 +0000 (13:54 +0200)]
arm: mvebu: clearfog: reset uSOM onboard 1512 phy
Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
the uSOM's 1512 Gigabit Ethernet phy.
This GPIO is valid on ClearFog rev 2.1 and newer.
Taken from SolidRun's specialised u-boot, see
https://github.com/SolidRun/u-boot-armada38x/commit/
f906e3df172e07ac82cdd87b278d7896949262ea
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 8 May 2017 06:31:30 +0000 (08:31 +0200)]
arm64: mvebu: Replace board specific with generic memory bank decoding
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 6 Apr 2017 13:39:07 +0000 (15:39 +0200)]
arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)
This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting
the correct PHY type (KR / SFI) for the COMPHY driver and enabling the
ethernet0 device node in the dts.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Chulski <stefanc@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Stefan Roese [Wed, 17 May 2017 15:05:38 +0000 (17:05 +0200)]
arm64: mvebu_db-88f3720_defconfig: Enable PINCTRL and GPIO support
This patch enable the PINCTRL and GPIO support, including the GPIO
command on the Armada 3720 DB.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Stefan Roese [Tue, 9 May 2017 11:35:44 +0000 (13:35 +0200)]
pinctrl: mvebu: Enable support for the Armada 37xx pinctrl driver
To enable support for the Armada 37xx pinctrl driver, we need to
change the Kconfig symbol for the Armada 7k/8k pinctrl driver and its
dependencies to distinguish between both platforms and drivers.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Gregory CLEMENT [Wed, 17 May 2017 15:05:25 +0000 (17:05 +0200)]
pinctrl: armada-37xx: Add gpio support
GPIO management is pretty simple and is part of the same IP than the pin
controller for the Armada 37xx SoCs. This patch adds the GPIO support to
the pinctrl-armada-37xx.c file, it also allows sharing common functions
between the gpio and the pinctrl drivers.
Ported to U-Boot based on the Linux version by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Gregory CLEMENT [Tue, 9 May 2017 11:36:21 +0000 (13:36 +0200)]
pinctrl: armada-37xx: Add pin controller support for Armada 37xx
The Armada 37xx SoC come with 2 pin controllers: one on the south
bridge (managing 28 pins) and one on the north bridge (managing 36 pins).
At the hardware level the controller configure the pins by group and not
pin by pin. This constraint is reflected in the design of the driver:
only the group related functions are implemented.
Ported to U-Boot based on the Linux version by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Gregory CLEMENT [Tue, 9 May 2017 11:35:22 +0000 (13:35 +0200)]
arm64: mvebu: armada37xx: add pinctrl definition
Start to populate the device tree of the Armada 37xx with the pincontrol
configuration used on the board providing a dts.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Gregory CLEMENT [Tue, 9 May 2017 11:35:32 +0000 (13:35 +0200)]
arm64: mvebu: Add pinctrl nodes for Armada 3700
Add the nodes for the two pin controller present in the Armada 37xx SoCs.
Initially the node was named gpio1 using the same name that for the
register range in the datasheet. However renaming it pinctr_nb (nb for
North Bridge) makes more sens.
Minor changes for U-Boot because of the slightly different dts version
done by Stefan Roese.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Tom Rini [Tue, 30 May 2017 18:07:23 +0000 (14:07 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Philipp Tomsich [Mon, 15 May 2017 22:16:32 +0000 (00:16 +0200)]
doc: document u-boot, mmc-env-offset and u-boot, mmc-env-offset-redund
Adding documentation on the new config properties:
'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET
'u-boot,mmc-env-offset-redundant'
- overrides CONFIG_ENV_OFFSET_REDUND
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Philipp Tomsich [Mon, 15 May 2017 22:16:31 +0000 (00:16 +0200)]
env_mmc: configure environment offsets via device tree
This introduces the ability to override the environment offets from the
device tree by setting the following nodes in '/config':
'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET
'u-boot,mmc-env-offset-redundant'
- overrides CONFIG_ENV_OFFSET_REDUND
To keep with the previous logic, the CONFIG_* defines still need to
be available and the statically defined values become the defaults,
when the corresponding properties are not set in the device-tree.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Keerthy [Wed, 24 May 2017 04:49:27 +0000 (10:19 +0530)]
power: pmic: tps65218: Fix tps65218_voltage_update function
Currently while setting the vsel value for dcdc1 and dcdc2
the driver is wrongly masking the entire 8 bits in the process
clearing PFM (bit7) field as well. Hence describe an appropriate
mask for vsel field and modify only those bits in the vsel
mask.
Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf
Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixes:
86db550b38 ("power: Add support for the TPS65218 PMIC")
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Heiner Kallweit [Fri, 14 Apr 2017 08:10:19 +0000 (10:10 +0200)]
mmc: meson: increase max block number per request
Number of blocks is a 9 bit field where 0 stands for a unlimited
number of blocks. Therefore the max number of blocks which can
be set is 511.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tom Rini [Wed, 10 May 2017 19:20:17 +0000 (15:20 -0400)]
drivers/power/regulator/max77686.c: Fix comparisons of unsigned expressions
Inside of
max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we
check that the value we calculate is >= 0 however we declare 'hex' as
unsigned int making these always true. Mark these as 'int' instead. We
also move hex_max to int as they are constants that are 0x3f/0xff.
Given that the above functions are marked as returning an int, make the
variables we assign their return value to also be int to be able to
catch the error condition now. Reported by clang-3.8.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 10 May 2017 19:20:16 +0000 (15:20 -0400)]
mmc: Change 'part_config' to be a u8 not char.
In some places we check if part_config is set to MMCPART_NOAVAILABLE
(0xff). With part_config being a char this is always false. We should
be using a u8 to store this value instead, after a quick consultation
with the Linux Kernel. Reported by clang-3.8.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 26 May 2017 15:19:27 +0000 (11:19 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 26 May 2017 15:18:53 +0000 (11:18 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nds32
Move FTMAC100 to where it should be, alphabetically in
drivers/net/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
drivers/net/Kconfig
Tom Rini [Tue, 23 May 2017 20:22:03 +0000 (16:22 -0400)]
Merge branch 'rmobile' of git://git.denx.de/u-boot-sh
Udit Agarwal [Tue, 2 May 2017 12:13:57 +0000 (17:43 +0530)]
armv8: LS2080A: Adjust memory map for secure boot headers for NOR-boot
This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Santan Kumar [Fri, 28 Apr 2017 07:17:24 +0000 (12:47 +0530)]
armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-boot
This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below
Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 16 May 2017 02:45:59 +0000 (10:45 +0800)]
armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046A
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 16 May 2017 02:45:58 +0000 (10:45 +0800)]
armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043A
This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Alison Wang [Tue, 16 May 2017 02:45:57 +0000 (10:45 +0800)]
arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWR
This patch is to adjust the memory mapping for FLash/SD card on
LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial
Flash, QE firmware load address and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 27 Apr 2017 09:38:07 +0000 (15:08 +0530)]
armv8: ls2080ardb: Add LS2081ARDB board support
LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Thu, 27 Apr 2017 09:38:06 +0000 (15:08 +0530)]
armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC support
The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Fri, 28 Apr 2017 05:11:35 +0000 (10:41 +0530)]
armv8: ls2080ardb: Add QSPI-boot support
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Fri, 28 Apr 2017 05:11:34 +0000 (10:41 +0530)]
board: freescale: ls2080ardb: Update QIXIS code
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Yogesh Gaur [Thu, 27 Apr 2017 04:44:16 +0000 (10:14 +0530)]
driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() path
Earlier when MC is loaded but DPL is not deployed results in FDT
fix-up code execution hangs. For this case now print message on
console and return success instead of return -ENODEV. This update
allows fdt fixup to continue execution.
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Tue, 25 Apr 2017 15:39:52 +0000 (08:39 -0700)]
armv8: ls1043ardb: Make NET independent of FMan
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
York Sun [Tue, 25 Apr 2017 15:39:51 +0000 (08:39 -0700)]
armv8: ls1046ardb: Make NET independent of FMan
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
Suresh Gupta [Tue, 25 Apr 2017 09:21:38 +0000 (14:51 +0530)]
armv8: ls1012a: fix the size of flash for multiple boards
LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash
of 64MB size.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Suresh Gupta [Tue, 25 Apr 2017 09:21:37 +0000 (14:51 +0530)]
armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platforms
ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does
not support Bank Address Register commands.
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Priyanka Jain [Tue, 25 Apr 2017 04:42:31 +0000 (10:12 +0530)]
board: freescale: ls2080ardb: Enable SD interface for RevF board
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Hou Zhiqiang [Fri, 14 Apr 2017 08:49:01 +0000 (16:49 +0800)]
armv8: ls1046a: enable PCI command tool
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
rick [Tue, 23 May 2017 05:48:27 +0000 (13:48 +0800)]
nds32: eth: Support ftmac100 DM.
Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform.
Verification:
Boot linux kernel via dhcp and bootm ok.
NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000;
NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4899 ms)
Using mac@
e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'boomimage-310y-ae300-spi.bin'.
Load address: 0x600000
Loading: #################################################################
#################################################################
#################################################################
...
...
###################################
233.4 KiB/s
done
Bytes transferred =
13872076 (d3abcc hex)
NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4592 ms)
Using mac@
e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'ae300.dtb'.
Load address: 0x2000000
Loading: #
82 KiB/s
done
Bytes transferred = 2378 (94a hex)
NDS32 # bootm 0x600000 - 0x2000000
Image Name:
Created: 2017-03-22 6:52:03 UTC
Image Type: NDS32 Linux Kernel Image (uncompressed)
Data Size:
13872012 Bytes = 13.2 MiB
Load Address:
0000c000
Entry Point:
0000c000
Verifying Checksum ... OK
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Device Tree to
01efc000, end
01eff949 ... OK
Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09)
(gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) )
#293 PREEMPT Wed Mar 22 14:49:28 CST 2017
CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159)
...
...
Signed-off-by: rick <rick@andestech.com>
Tom Rini [Mon, 22 May 2017 19:40:11 +0000 (15:40 -0400)]
mksunxi_fit_atf.sh: Allow for this to complete when bl31.bin is missing
In situations like an autobuilder we are likely to not have bl31.bin
present and thus would fail to build and propagate the error upwards.
Instead, print a big warning to stderr so that human will see that
something is wrong but complete the build.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 22 May 2017 18:15:16 +0000 (14:15 -0400)]
Merge git://git.denx.de/u-boot-sunxi
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 22 May 2017 18:14:57 +0000 (14:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Mon, 22 May 2017 18:14:44 +0000 (14:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-nds32
Lothar Waßmann [Thu, 18 May 2017 15:26:58 +0000 (17:26 +0200)]
ColdFire: Remove rogue 'CONFIG_SYS_NO_FLASH' embedded within another CONFIG_ name
The original commit for the MCF54418TWR ColdFire development board
support defined a 'CONFIG_SYS_FAULT_ECCONFIG_SYS_NO_FLASHHO_LINK_DOWN'
which obviously has a rogue 'CONFIG_SYS_NO_FLASH' embedded in the
intended 'CONFIG_SYS_FAULT_ECHO_LINK_DOWN' define.
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Simon Glass [Wed, 17 May 2017 09:25:44 +0000 (03:25 -0600)]
sandbox: Enable CMD_GETTIME
Enable this option by default on sandbox to increase build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 09:25:43 +0000 (03:25 -0600)]
Convert CONFIG_CMD_LZMADEC to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_LZMADEC
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 09:25:42 +0000 (03:25 -0600)]
Convert CONFIG_LZMA to Kconfig
This converts the following to Kconfig:
CONFIG_LZMA
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 09:25:41 +0000 (03:25 -0600)]
Kconfig: Drop CONFIG_CMD_LOADY
This is not used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 09:25:40 +0000 (03:25 -0600)]
Convert CONFIG_CMD_KGDB to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_KGDB
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 09:25:39 +0000 (03:25 -0600)]
Convert CONFIG_CMD_IRQ to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_IRQ
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 09:25:38 +0000 (03:25 -0600)]
fs: Kconfig: Add a separate option for FS_JFFS2
Rather than using CMD_JFFS2 for both the filesystem and its command, we
should have a separate option for each. This allows us to enable JFFS2
support without the command, if desired, which reduces U-Boot's size
slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>