Roland Scheidegger [Tue, 6 Dec 2016 18:59:51 +0000 (19:59 +0100)]
gallivm: optimize 16bit->32bit gather path a bit
LLVM can't really optimize anything which crosses scalar/vector boundaries,
so help a bit with some particular gather operations when the width is
expanded (only do it for 16->32bit expansion for now), by doing expansion
after fetch. That is probably a better solution anyway even if llvm would
recognize it, makes for cleaner IR...
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Sat, 3 Dec 2016 16:10:46 +0000 (17:10 +0100)]
gallivm: handle 16bit float fetches in lp_build_fetch_rgba_soa
Note that we really want to _never_ reach the bottom of the function, which
resorts to AoS fetch.
Half floats can be handled just like other formats which fit into 32bit
vectors (so, only 1x16 and 2x16 formats, albeit with more channels things
are not THAT bad), with minimal plumbing. I've seen code size go down nearly
by a factor of 3 for a complete texture sampling function (including bilinear
filtering) using R16F.
(What we should do for everything not special cased is to do AoS gather,
shuffle/shift things into SoA vectors, and then do the conversion there.
Otherwise it's particularly bad with 1 or 2 channel formats - that r16f
format with either 4 or 8-wide vectors was still doing one element at a
time, essentially doing exactly the same work as for rgba16f. Also replacing
the channels with SWIZZLE0/1 (particularly the latter) adds even more
work, as it has to be done per aos vector, and not just straightforward
at the end with the SoA vector.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Sat, 3 Dec 2016 16:10:09 +0000 (17:10 +0100)]
util: (trivial) ETC1 meets the criteria for fitting into unorm8
Just like other similar compressed formats.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Matt Turner [Sun, 4 Dec 2016 04:14:55 +0000 (20:14 -0800)]
i965: Emit proper NOPs.
The PRMs for HSW and newer say that other than the opcode and DebugCtrl
bits of the instruction word, the rest must be zero.
By zeroing the instruction word manually, we avoid using any of the
state inherited through brw_codegen.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96959
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Roland Scheidegger [Tue, 6 Dec 2016 16:44:21 +0000 (17:44 +0100)]
glsl: (trivial) fix type typo
Accidentally changed the type of a constant in
df33f11b39abf313a0db7b9fefaf739b88133161 causing assertion failures.
Kenneth Graunke [Sat, 15 Oct 2016 00:59:36 +0000 (17:59 -0700)]
i965: Allocate at least some URB space even when max_vertices = 0.
Allocating zero URB space is a really bad idea. The hardware has to
give threads a handle to their URB space, and threads have to use that
to terminate the thread. Having it be an empty region just breaks a
lot of assumptions. Hence, why we asserted that it isn't possible.
Unfortunately, it /is/ possible prior to Gen8, if max_vertices = 0.
In theory a geometry shader could do SSBO/image access and maybe
still accomplish something. In reality, this is tripped up by
conformance tests.
Gen8+ already avoids this problem by placing the vertex count DWord
in the URB entry header. This fixes things on earlier generations.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Roland Scheidegger [Mon, 5 Dec 2016 12:39:16 +0000 (13:39 +0100)]
main: allow NEAREST_MIPMAP_NEAREST for stencil texturing
As per GL 4.5 rules, which fixed a spec mistake in GL_ARB_stencil_texturing.
The extension spec wasn't updated, but just allow it with older GL versions
as well, hoping there aren't any crazy tests which want to see an error
there... (Compile tested only.)
Reported by Józef Kucia <joseph.kucia@gmail.com>
Acked-by: Józef Kucia <joseph.kucia@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Roland Scheidegger [Sat, 3 Dec 2016 16:08:05 +0000 (17:08 +0100)]
glsl: fix ldexp lowering if bitfield insert lowering is also requested
Trivial, this just resurrects the code which was there once upon a time
(the code can't lower instructions generated in the lowering pass there,
and even if it could it would probably be suboptimal).
This fixes piglit mesa_shader_integer_functions fs-ldexp.shader_test and
vs-ldexp.shader_test with llvmpipe.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Nayan Deshmukh [Sun, 4 Dec 2016 17:45:38 +0000 (23:15 +0530)]
radv: fix resource leak in radv_amdgpu_ctx_create
CovID: 1396387
V2. Fixup bad whitespace.
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folkore1984.net>
Andy Furniss [Mon, 5 Dec 2016 23:53:40 +0000 (23:53 +0000)]
st/omx/enc Raise default encode level
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91281
Signed-off-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Andy Furniss [Tue, 6 Dec 2016 00:02:21 +0000 (00:02 +0000)]
radeon/vce Handle H.264 level 5.2
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=91281
v2: explicitly add case 52
Signed-off-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Jason Ekstrand [Sat, 16 Jul 2016 15:21:50 +0000 (08:21 -0700)]
nir: Remove some unused fields from nir_variable
All of these are happily set from glsl_to_nir or spirv_to_nir but their
values are never used for anything.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Sat, 16 Jul 2016 00:17:40 +0000 (17:17 -0700)]
nir: Delete most of the constant_initializer support
Constant initializers have been a constant (ha!) pain for quite some time.
While they're useful from a language perspective, people writing passes or
backends really don't want deal with them most of the time. This commit
removes most of the constant initializer support from NIR. It is expected
that you call nir_lower_constant_initializers VERY EARLY to ensure that
they're gone before you do anything interesting.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Sat, 16 Jul 2016 00:15:21 +0000 (17:15 -0700)]
nir: Simplify nir_lower_gs_intrinsics
It's only ever called on single-function shaders. At this point, there are
a lot of helpers that can make it all much simpler.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Wed, 20 Jul 2016 17:37:43 +0000 (10:37 -0700)]
nir/lower_returns: Stop using constant initializers
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Fri, 15 Jul 2016 23:57:06 +0000 (16:57 -0700)]
glsl/nir: Call nir_lower_constant_initializers
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Fri, 15 Jul 2016 23:55:14 +0000 (16:55 -0700)]
anv/pipeline: Call nir_lower_constant_initializers
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Fri, 15 Jul 2016 23:44:53 +0000 (16:44 -0700)]
nir: Add a pass for lowering away constant initializers
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jason Ekstrand [Mon, 5 Dec 2016 23:20:52 +0000 (15:20 -0800)]
Revert "i965: use nir_lower_indirect_derefs() for GLSL"
This reverts commit
9404439a754e5640ccd98df40fa694835c0d8759. I didn't
intend to push it and it breaks clip and cull distance.
Jason Ekstrand [Tue, 29 Nov 2016 20:36:14 +0000 (12:36 -0800)]
i965: Delete the meta-base CopyImageSubData implementation
When I originally implemented the ARB_copy_image extension, the fast-path
was written in meta using texture views. This path only worked if both
images were uncompressed color images. All of the other cases fell back to
the blitter or, in the worst case, mapping and memcpy on the CPU. Now that
we have the blorp path, it handles all copies ever and the old meta,
blitter, and CPU paths are only used on gen5 and below. The primary reason
why we needed the meta path (apart from having a slow blitter on later
hardware) was to handle multisampling which gen5 and earlier don't support
anyway. Since the blitter is reasonably fast on gen5, we can just delete
the meta path and get rid of all that terrible code.
If we decide that we're ok with just disabling ARB_copy_image on gen5 and
earlier (I personally am), then we could get rid of another 300 lines or so
of semi-hairy code.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jason Ekstrand [Thu, 1 Dec 2016 03:08:51 +0000 (19:08 -0800)]
i965/copy_image: Re-implement the blitter path with emit_miptree_blit
By using emit_miptree_blit which does chunking, this fixes the blitter path
for the case where the image is too tall to blit normally. We also pull it
into intel_blit as intel_miptree_copy. This matches the naming of the
blorp blit and copy functions brw_blorp_blit and brw_blorp_copy.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: "13.0" <mesa-dev@lists.freedesktop.org>
Jason Ekstrand [Thu, 1 Dec 2016 02:14:27 +0000 (18:14 -0800)]
i965/blit: Break the guts of intel_miptree_blit into a helper
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: "13.0" <mesa-dev@lists.freedesktop.org>
Timothy Arceri [Mon, 15 Aug 2016 00:09:25 +0000 (10:09 +1000)]
i965: use nir_lower_indirect_derefs() for GLSL
This moves the nir_lower_indirect_derefs() call into
brw_preprocess_nir() so thats is called by both OpenGL and Vulkan
and removes that call to the old GLSL IR pass
lower_variable_index_to_cond_assign()
We want to do this pass in nir to be able to move loop unrolling
to nir.
There is a increase of 1-3 instructions in a small number of shaders,
and 2 Kerbal Space program shaders that increase by 32 instructions.
Shader-db results BDW:
total instructions in shared programs: 8705873 -> 8706194 (0.00%)
instructions in affected programs: 32515 -> 32836 (0.99%)
helped: 3
HURT: 79
total cycles in shared programs:
74618120 ->
74583476 (-0.05%)
cycles in affected programs: 528104 -> 493460 (-6.56%)
helped: 47
HURT: 37
LOST: 2
GAINED: 0
Tim Rowley [Mon, 5 Dec 2016 17:35:57 +0000 (11:35 -0600)]
swr: mark PIPE_CAP_NATIVE_FENCE_FD unsupported
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Mon, 5 Dec 2016 17:32:19 +0000 (11:32 -0600)]
swr: include llvm version and vector width in renderer string
Uses llvmpipe's string formating.
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Tim Rowley [Mon, 31 Oct 2016 15:29:07 +0000 (10:29 -0500)]
gallivm: use getHostCPUFeatures on x86/llvm-4.0+.
Use llvm provided API based on cpuid rather than our own
manually mantained list of mattr enabling/disabling.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Juan A. Suarez Romero [Fri, 2 Dec 2016 16:26:51 +0000 (16:26 +0000)]
st/va: declare vlVaBuffer before vlVaContext
And declare coded_buf in vlVaContext as "vlVaBuffer *" instead of
"struct vlVaBuffer *".
This fixes several warnings later about assignment from incompatible
pointer type.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Juan A. Suarez Romero [Fri, 2 Dec 2016 16:26:50 +0000 (16:26 +0000)]
st/va: remove unused variable pbuff
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Emil Velikov [Fri, 2 Dec 2016 16:26:49 +0000 (16:26 +0000)]
st/va: automake: cleanup C{PP,}FLAGS
Remove some transitional left overs from the gallium pipe-loader rework
and kill off unneeded AM_CPPFLAGS.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Rob Clark [Thu, 16 Aug 2012 22:28:19 +0000 (17:28 -0500)]
add EGL_TEXTURE_EXTERNAL_WL to WL_bind_wayland_display spec
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 15:42:58 +0000 (15:42 +0000)]
docs: add news item and link release notes for 12.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 5 Dec 2016 15:38:13 +0000 (15:38 +0000)]
docs: add sha256 checksums for 12.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
6b1c3c3aa0a2b643dbb9964b7001097eed3c4888)
Emil Velikov [Mon, 5 Dec 2016 15:31:47 +0000 (15:31 +0000)]
docs: add release notes for 12.0.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
01579a9d007830f2f905646c9d1f9bd0a03caa89)
Tobias Droste [Sat, 19 Nov 2016 01:39:12 +0000 (02:39 +0100)]
configure.ac: Create correct LLVM_VERSION_INT with minor >= 10
This makes sure that we handle LLVM minor version >= 10 correctly.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:11 +0000 (02:39 +0100)]
configure.ac: Get complete LLVM version from header
Major and minor version are included in the header file since LLVM
version 3.1.0. Since the minimal required version is 3.3.0 we can
remove the workaround if no values for major/minor were found in the
header.
Since LLVM 3.6.0 the patch version is inside the header file of LLVM.
Only radeon drivers need the patch version and they depend on
LLVM >= 3.6.0, so this is safe too.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:10 +0000 (02:39 +0100)]
configure.ac: Add required LLVM versions to the top
Consolidate the required LLVM versions at the top where the other
versions for dependencies are listed.
v5:
Splitted out separate changes (see patch 19 and 20)
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:09 +0000 (02:39 +0100)]
configure.ac: Only add default LLVM components if needed
LLVM components are only added when LLVM is needed.
This means gallium adds this as soon as "--enable-gallium-llvm"
is "yes" and radv + opencl add it explicitly.
v5:
Removed hunk that disabled LLVM for gallium if it was not found.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:08 +0000 (02:39 +0100)]
configure.ac: Reorder arguments in radeon_llvm_check
Use the same order as llvm_check_version_for.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:07 +0000 (02:39 +0100)]
configure.ac: Move radv check to the Vulkan section
This moves the LLVM check for radv to the corresponding driver section.
No functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:06 +0000 (02:39 +0100)]
configure.ac: Move LLVM ac_subst closer to usage
This moves llvm_set_environment_variables to its final destination
and moves all the LLVM AC_SUBST() below the function call.
No functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:05 +0000 (02:39 +0100)]
configure.ac: Move oCL LLVM checks to the oCL section
The LLVM checks can be anywhere below line 1161 now.
Move the openCL LLVM checks to the section with the other openCL checks.
No functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: s/ipos/ipo/, drop "yes" argument from llvm_add_component]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:04 +0000 (02:39 +0100)]
configure.ac: Move llvm_set_environment_variables higher.
This moves the function to get the LLVM environment variables higher
in the file. It still needs to be below the "--enable-opencl" because
it uses $enable_opencl.
It can be called without condition now as it only throws errors if
openCL is enabled.
v5:
HAVE_MESA_LLVM is only used for gallium. Rename it to HAVE_GALLIUM_LLVM.
In order to only link LLVM when it is needed, HAVE_GALLIUM_LLVM is only
set if "$enable-gallium-llvm" is yes.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:03 +0000 (02:39 +0100)]
configure.ac: Remove swr_llvm_check()
No need for an additional function here.
Use the same style for LLVM checks as the other drivers
(e.g. r300, llvmpipe) that don't need a load of other checks.
Instead of open conding the LLVM version check, use the
function used by other drivers.
"enable_gallium_llvm" is checked by gallium_require_llvm().
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:02 +0000 (02:39 +0100)]
configure.ac: Check gallium LLVM version in gallium_require_llvm
This moves the LLVM version check to the helper function
gallium_require_llvm() and uses the llvm_check_version_for() helper
instead of open conding the LLVM version check.
gallium_require_llvm is functionally the same as before, because
"enable_gallium_llvm" is only set to "yes" if the host cpu is x86:
if test "x$enable_gallium_llvm" = xauto; then
case "$host_cpu" in
i*86|x86_64|amd64) enable_gallium_llvm=yes;;
esac
fi
This function is also only called now when needed.
Before this patch llvmpipe would call this as soon as LLVM is
installed. Now it only gets called by llvmpipe if gallium
LLVM is actually enabled (i.e. only on x86).
Both reasons mentioned above remove the need to check host cpu
in the gallium_require_llvm function.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:01 +0000 (02:39 +0100)]
configure.ac: Use short names for r600 und r300
There are no non gallium r300 and r600 drivers anymore.
No need to explicilty mention gallium here.
Just cosmetics, no functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:39:00 +0000 (02:39 +0100)]
configure.ac: Remove useless oCL LLVM check
This is handled by "llvm_check_version_for" for openCL.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:59 +0000 (02:38 +0100)]
configure.ac: Move llvm-config searching outside the function
There's no harm in always searching llvm-config.
This way it's available as soon as possible for all functions.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:58 +0000 (02:38 +0100)]
configure.ac: Move LLVM functions to the top
This just moves code around so that all LLVM related stuff is at the
top of the file in the correct order.
No functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:57 +0000 (02:38 +0100)]
configure.ac: Move LLVM version check to the top
A function with the LLVM version checked is moved to the top.
The function is called where the old code was.
No functional change.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: s/ipos/ipo/, drop "yes" argument from llvm_add_component]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:56 +0000 (02:38 +0100)]
configure.ac: Use new helper function for LLVM
Use the new helper function to add LLVM targets and components.
The components are added one by one to later find out which component
is missing in case there is one.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: s/ipos/ipo/, drop "yes" argument from llvm_add_component]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:55 +0000 (02:38 +0100)]
configure.ac: Use new llvm_add_default_components
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:54 +0000 (02:38 +0100)]
configure.ac: Add helper function for targets/components
Add functions to add and check targets/components.
Not used in this patch.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tobias Droste [Sat, 19 Nov 2016 01:38:53 +0000 (02:38 +0100)]
configure.ac: Don't search llvm-config if it's known
This way LLVM_CONFIG can bet set from an env variable if it's outside
the $llvm_prefix.
This is not a must, but it helps testing.
Signed-off-by: Tobias Droste <tdroste@gmx.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Boyuan Zhang [Fri, 18 Nov 2016 20:29:56 +0000 (15:29 -0500)]
st/va: fix gop size for rate control
The gop_size in rate control is the budget window for internal rate
control calculation, and shouldn't always equal to idr period. Define
a coefficient to let budget window contains a number of idr period for
proper rate control calculation. Adjust the number of i/p frame remaining
accordingly.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=98005
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Boyuan Zhang [Tue, 29 Nov 2016 18:27:10 +0000 (13:27 -0500)]
st/va: force to submit two consecutive single jobs
The gop_size in rate control is the budget window for internal rate
control calculation, and shouldn't always equal to idr period. Define
a coefficient to let budget window contains a number of idr period for
proper rate control calculation. Adjust the number of i/p frame remaining
accordingly.
v2: fixed regression issues introduced by previous version
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=98005
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Nayan Deshmukh [Mon, 5 Dec 2016 05:25:17 +0000 (10:55 +0530)]
st/vdpau: fix compiler warning in vlVdpVideoMixerRender
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Topi Pohjolainen [Sun, 4 Dec 2016 12:17:05 +0000 (14:17 +0200)]
i965: Release aux buffer when disabling ccs
Otherwise subsequent render cycles keep on using compression
and/or fast clear.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bas Nieuwenhuizen [Wed, 30 Nov 2016 23:32:41 +0000 (00:32 +0100)]
ac/nir: Only use the first component for SSBO atomics.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 5 Dec 2016 00:13:49 +0000 (10:13 +1000)]
radv: fix another regression since shadow fixes.
This fixes:
dEQP-VK.glsl.texture_gather.basic.2d.depth32f.*
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Iago Toral Quiroga [Fri, 2 Dec 2016 13:16:07 +0000 (14:16 +0100)]
spirv: Builtin Layer is an input for fragment shaders
This change makes it so we emit a load_input intrinsic when Layer
is read in a fragment shader.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bruce Cherniak [Fri, 2 Dec 2016 01:08:12 +0000 (19:08 -0600)]
swr: Fix active_queries count
The active_query count was incorrect for query types that don't require
a begin_query. Removed the unnecessary assert.
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
George Kyriazis [Tue, 29 Nov 2016 19:38:28 +0000 (13:38 -0600)]
swr: Fix type to match parameters of std::max()
Include propagation of comparisons further down.
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Fri, 2 Dec 2016 16:36:38 +0000 (10:36 -0600)]
swr: [rasterizer jitter] include cstdarg in builder_misc.cpp
Fixes build problem with llvm-svn.
v2: use cstdarg instead of stdarg.h
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Jason Ekstrand [Wed, 30 Nov 2016 06:19:28 +0000 (22:19 -0800)]
nir: Get rid of nir_constant_data
This has bothered me for about as long as NIR has been around. Why do we
have two different unions for constants? No good reason other than one of
them is a direct port from GLSL IR.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Fri, 2 Dec 2016 05:44:44 +0000 (16:44 +1100)]
Revert "st/mesa: get Version from gl_program rather than gl_shader_program"
This reverts commit
6bf63b011992dbbc899a28bde5692070dbcf965a.
A patch that adds a reference to gl_shader_program_data to gl_program
needs to land befor this one.
Timothy Arceri [Wed, 9 Nov 2016 04:01:29 +0000 (15:01 +1100)]
st/mesa: get Version from gl_program rather than gl_shader_program
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 9 Nov 2016 03:56:08 +0000 (14:56 +1100)]
st/mesa/glsl: move Version to gl_shader_program_data
This is mostly just used during linking however the st uses it
when updating textures.
In order to store gl_program in the CurrentProgram array
rather than gl_shader_program we need to move this field to
the shared gl_shader_program_data struct.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Wed, 12 Oct 2016 14:42:57 +0000 (10:42 -0400)]
freedreno: no-op render when we need a fence
If app tries to create a fence but there is no rendering to submit, we
need a dummy/no-op submit. Use a string-marker for the purpose.. mostly
since it avoids needing to realize that the packet format changes in
later gen's (so one less place to fixup for a5xx).
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 15 Aug 2016 18:27:10 +0000 (14:27 -0400)]
freedreno: native fence fd support
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 15 Aug 2016 17:41:04 +0000 (13:41 -0400)]
freedreno: some fence cleanup
Prep-work for next patch, mostly move to tracking last_fence as a
pipe_fence_handle (created now only in fd_gmem_render_tiles()), and a
bit of superficial renaming.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 1 Apr 2016 20:10:42 +0000 (16:10 -0400)]
gallium: support for native fence fd's
This enables gallium support for EGL_ANDROID_native_fence_sync, for
drivers which support PIPE_CAP_NATIVE_FENCE_FD.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Fri, 1 Apr 2016 19:47:44 +0000 (15:47 -0400)]
gallium: wire up server_wait_sync
This will be needed for explicit synchronization with devices outside
the gpu, ie. EGL_ANDROID_native_fence_sync.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rob Clark [Fri, 18 Nov 2016 13:39:33 +0000 (08:39 -0500)]
egl: add EGL_ANDROID_native_fence_sync
With fixes from Chad squashed in, plus fixes for issues that Rafael
found while writing piglit tests.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Chad Versace <chadversary@chromium.org>
Rob Clark [Fri, 18 Nov 2016 13:39:32 +0000 (08:39 -0500)]
dri: extend fence extension to support native fd fences
Required to implement EGL_ANDROID_native_fence_sync.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Chad Versace <chadversary@chromium.org>
Rob Clark [Thu, 1 Dec 2016 18:57:24 +0000 (10:57 -0800)]
egl: un-fallthrough sync attr parsing
Doesn't work so well when you start having more than one possible
attrib. Prep-work for next patch.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Chad Versace <chadversary@chromium.org>
Rob Clark [Fri, 18 Nov 2016 13:39:30 +0000 (08:39 -0500)]
egl: initialize SyncCondition after attr parsing
Reduce the noise in the next patch. For EGL_SYNC_NATIVE_FENCE_ANDROID
the sync condition is conditional on EGL_SYNC_NATIVE_FENCE_FD_ANDROID
attribute.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Chad Versace <chadversary@chromium.org>
Tim Rowley [Thu, 1 Dec 2016 17:06:28 +0000 (11:06 -0600)]
tgsi: store writes_primid when scanning tgsi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Wed, 30 Nov 2016 22:04:06 +0000 (17:04 -0500)]
mesa: only verify that enabled arrays have backing buffers
We were previously also verifying that no backing buffers were available
when an array wasn't enabled. This is has no basis in the spec, and it
causes GLupeN64 to fail as a result.
Fixes:
c2e146f487 ("mesa: error out in indirect draw when vertex bindings mismatch")
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Wed, 30 Nov 2016 22:00:28 +0000 (14:00 -0800)]
vc4: Avoid false scheduling dependencies for LOAD_IMMs.
Noticed in shaders with branching, where we ended up scheduling delay
slots near the start of a block for the uniforms reset setup.
total instructions in shared programs: 93970 -> 93951 (-0.02%)
instructions in affected programs: 3117 -> 3098 (-0.61%)
3DMMES performance +0.423087% +/- 0.133521% (n=9,10)
Eric Anholt [Wed, 30 Nov 2016 20:19:38 +0000 (12:19 -0800)]
vc4: Try to schedule QIR instructions between writing to and reading math.
This helps us get the delay slots between SFU writes and reads filled.
total instructions in shared programs: 94494 -> 93970 (-0.55%)
instructions in affected programs: 59206 -> 58682 (-0.89%)
3DMMES performance +1.89967% +/- 0.157611% (n=10,9)
Eric Anholt [Wed, 30 Nov 2016 19:52:06 +0000 (11:52 -0800)]
vc4: Improve interleaving of texture coordinates vs results.
The latency_between was trying to handle the delay between the coordinate
write ("before") and the corresponding sample read ("after"), but we were
handing in the two instructions swapped.
This meant that we tried to fit things between a tex_s and its *preceding*
tex_result. This made us only interleave normal texture coordinates by
accident, and pessimized UBO reads by pushing the tex_result collection
earlier until there was nothing but it (and then its preceding coordinate
setup) left.
In addition to latency reduction, things end up packing better (probably
due to reduced live ranges of the texture results):
total instructions in shared programs: 98121 -> 94775 (-3.41%)
instructions in affected programs: 91196 -> 87850 (-3.67%)
3DMMES performance +1.15569% +/- 0.124714% (n=8,10)
Eric Anholt [Wed, 30 Nov 2016 19:30:06 +0000 (11:30 -0800)]
vc4: Fix stray "." on no-op MUL packs.
This happened when the PM bit was set for R4 unpacks, where the MUL pack
was NOP.
Eric Anholt [Wed, 30 Nov 2016 19:25:09 +0000 (11:25 -0800)]
vc4: Allow merging instructions with SF set where the other writes NOP.
I'm not sure how I managed to write the SF merge code
(
7d8b79f398f18ed7bb48a74b1b82950e2f08abad) without allowing merges with
NOPs. *Everything* we try to merge with will have a NOP on one or the
other side of the instruction, and that's why that commit showed no
benefit.
total instructions in shared programs: 99347 -> 95128 (-4.25%)
instructions in affected programs: 91906 -> 87687 (-4.59%)
3DMMES performance +2.57105% +/- 0.135276% (n=6,8)
Eric Anholt [Thu, 1 Dec 2016 01:27:37 +0000 (17:27 -0800)]
vc4: In a loop break/continue, jump if everyone has taken the path.
This should be a win for most loops, which tend to have uniform control
flow.
More importantly, it exposes important information to live variables: that
the break/continue here means that our jump target may have access to
values that were live on our input. Previously, we were just setting the
exec mask and letting control flow fall through, so an intervening def
between the break and the end of the loop would appear to live variables
as if it screened off the variable, when it didn't actually.
Fixes a regression in glsl-vs-loop-redundant-condition.shader_test when a
perturbing of register allocation caused a live variable to get stomped.
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Wed, 30 Nov 2016 05:56:48 +0000 (00:56 -0500)]
anv: expose support for VK_KHR_sampler_mirror_clamp_to_edge
This is already supported in genX_state.c, expose the extension string.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Jason Ekstrand [Tue, 29 Nov 2016 22:00:39 +0000 (14:00 -0800)]
anv/cmd_buffer: Actually use the stencil dimension
In an attempt to fix 3DSTATE_DEPTH_BUFFER for stencil-only cases, I
accidentally kept setting the SurfaceType to 2D in the stencil-only case
thanks to a copy+paste error.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Ilia Mirkin [Sun, 27 Nov 2016 06:15:03 +0000 (01:15 -0500)]
swr: add streamout buffer offset into pBuffer pointer
The buffer_size does not take the offset into account. Just add the
offset into the pointer which lines up the structures much better.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sun, 27 Nov 2016 05:46:33 +0000 (00:46 -0500)]
swr: fix assertion for max number of so targets
The number has to be less than or equal to the max, not just less than.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sun, 27 Nov 2016 05:45:17 +0000 (00:45 -0500)]
swr: properly report max number of SO components
The components count the number of individual values, not the number of
slots.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sat, 26 Nov 2016 22:56:24 +0000 (17:56 -0500)]
swr: turn off queries around blits
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sat, 26 Nov 2016 22:35:31 +0000 (17:35 -0500)]
swr: don't advertise stream pause/resume
There is no support for resuming streamout. Furthermore, this also
controls glDrawTransformFeedback functionality which requires the same
ability to query how many primitives were sent out of TF.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sat, 26 Nov 2016 22:11:50 +0000 (17:11 -0500)]
swr: fix range computation for instanced client-side arrays
We need to take the instance divisor and number of instances into
account for instanced client-side arrays, rather than the vertex
parameters.
Loosely based on the comparable nvc0 logic.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Ilia Mirkin [Sun, 20 Nov 2016 00:01:06 +0000 (19:01 -0500)]
swr: [rasterizer memory] assert when trying to convert an unknown format
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Sun, 20 Nov 2016 19:07:00 +0000 (14:07 -0500)]
swr: remove warning about multi-layer surfaces
We now support clearing these, and actually rendering to multiple layers
would require GS support, which will fail in much more spectacular ways
for now. Once that is hooked up, there won't be anything else to do
here.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Ilia Mirkin [Thu, 17 Nov 2016 02:33:29 +0000 (21:33 -0500)]
swr: [rasterizer core] don't attempt to load another RTAI when storing
Since we don't pass a renderTargetArrayIndex in, and the current hot
tile may be for a different index, we may end up loading the RTAI=0 into
the hot tile for no reason.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Marek Olšák [Wed, 30 Nov 2016 00:38:23 +0000 (01:38 +0100)]
radeonsi: document a CP DMA bug that doesn't need a workaround yet
This one is easy to miss, because it's not documented in any internal doc.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 29 Nov 2016 22:35:09 +0000 (23:35 +0100)]
radeonsi: apply the double EVENT_WRITE_EOP workaround to VI as well
Internal docs don't mention it, but they also don't mention that the bug
has been fixed (like other CI bugs fixed in VI).
Vulkan does this too.
v2: also update r600_gfx_write_fence_dwords
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Tue, 29 Nov 2016 20:19:52 +0000 (21:19 +0100)]
radeonsi: add a tess+GS hang workaround for VI dGPUs
ported from Vulkan
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 29 Nov 2016 19:49:24 +0000 (20:49 +0100)]
radeonsi: don't apply the Z export bug workaround to Hainan
not needed
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 29 Nov 2016 19:41:23 +0000 (20:41 +0100)]
radeonsi: apply a tessellation bug workaround for SI
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>