John Brawn [Mon, 10 Sep 2018 12:23:05 +0000 (12:23 +0000)]
[GVN] Invalidate cached info for values replaced by equality propagation
When GVN propagates an equality by replacing one value with another it also
needs to invalidate the cached information for the value being replaced.
Differential Revision: https://reviews.llvm.org/D51218
llvm-svn: 341820
Matt Arsenault [Mon, 10 Sep 2018 12:16:11 +0000 (12:16 +0000)]
AMDGPU: Remove function pointer type hack
Now the pointer size should always be correct and
we don't need to improperly inspect the pointee type.
llvm-svn: 341806
Matt Arsenault [Mon, 10 Sep 2018 11:59:27 +0000 (11:59 +0000)]
AMDGPU: Stop reporting is-noop addrspacecast for constant 32-bit
This will require something to cast. Before this would eliminate
the cast, which would result in copies of $noreg.
llvm-svn: 341803
Kirill Bobyrev [Mon, 10 Sep 2018 11:51:05 +0000 (11:51 +0000)]
[clangd] Implement FuzzyFindRequest JSON (de)serialization
JSON (de)serialization of `FuzzyFindRequest` might be useful for both
D51090 and D51628. Also, this allows precise logging of the fuzzy find
requests.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D51852
llvm-svn: 341802
Matt Arsenault [Mon, 10 Sep 2018 11:49:23 +0000 (11:49 +0000)]
DAG: Handle odd vector sizes in calling conv splitting
This already worked if only one register piece was used,
but didn't if a type was split into multiple, unequal
sized pieces.
Fixes not splitting 3i16/v3f16 into two registers for
AMDGPU.
This will also allow fixing the ABI for 16-bit vectors
in a future commit so that it's the same for all subtargets.
llvm-svn: 341801
Kirill Bobyrev [Mon, 10 Sep 2018 11:46:07 +0000 (11:46 +0000)]
[clangd] Add symbol slab size to index memory consumption estimates
Currently, `SymbolIndex::estimateMemoryUsage()` returns the "overhead"
estimate, i.e. the estimate of the Index data structure excluding
backing data (such as Symbol Slab and Reference Slab). This patch
propagates information about paired data size where necessary.
Reviewed By: ioeric, sammccall
Differential Revision: https://reviews.llvm.org/D51539
llvm-svn: 341800
Simon Pilgrim [Mon, 10 Sep 2018 10:45:04 +0000 (10:45 +0000)]
[llvm-exegesis] Ignore double spaced separators in asm strings
Some asm has double spaces between operands, the deserializer was keeping these empty split pieces, causing assertions later on:
'ADC16mi RDI i_0x1x i_0x0x i_0x1x'
llvm-svn: 341799
Carl Ritson [Mon, 10 Sep 2018 10:14:48 +0000 (10:14 +0000)]
[AMDGPU] Prevent sequences of non-instructions disrupting GCNHazardRecognizer wait state counting
Summary:
This fixes a bug where a large number of implicit def instructions can fill the GCNHazardRecognizer lookahead buffer causing required NOPs to not be inserted.
Reviewers: nhaehnle, arsenm
Reviewed By: arsenm
Subscribers: sheredom, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D51726
Change-Id: Ie75338f94de704ee5816b05afd0c922c6748a95b
llvm-svn: 341798
Sam McCall [Mon, 10 Sep 2018 10:00:47 +0000 (10:00 +0000)]
[clangd] Fix async index loading (from r341376).
Summary:
This wasn't actually async (due to std::future destructor blocking).
If it were, we would have clean shutdown issues if main returned
and destroyed Placeholder before the thread is done with it.
We could attempt to avoid any blocking by using shared_ptr or weak_ptr tricks so
the thread can detect Placeholder's destruction, but there are other potential
issues (e.g. loadIndex does tracing, and we'll destroy the tracer...)
Instead, once LSPServer::run returns, we wait for the index to finish loading
before exiting. Performance is not critical in this situation.
Reviewers: ilya-biryukov
Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D51674
llvm-svn: 341797
Adam Balogh [Mon, 10 Sep 2018 09:19:54 +0000 (09:19 +0000)]
[Analyzer] Commit fix for rL341790/rC341790
Test file was accidentally not added for rL341790/rC341790 and subsequant patches.
llvm-svn: 341795
Adam Balogh [Mon, 10 Sep 2018 09:07:47 +0000 (09:07 +0000)]
[Analyzer] Iterator Checker - Part 8: Support for assign, clear, insert, emplace and erase operations
This patch adds support for the following operations in the iterator checkers: assign, clear, insert, insert_after, emplace, emplace_after, erase and erase_after. This affects mismatched iterator checks ("this" and parameter must match) and invalidation checks (according to the standard).
Differential Revision: https://reviews.llvm.org/D32904
llvm-svn: 341794
Adam Balogh [Mon, 10 Sep 2018 09:06:31 +0000 (09:06 +0000)]
[Analyzer] Iterator Checker - Part 7: Support for push and pop operations
This patch adds support for the following operations in the iterator checkers: push_back, push_front, emplace_back, emplace_front, pop_back and pop_front. This affects iterator range checks (range is extended after push and emplace and reduced after pop operations) and invalidation checks (according to the standard).
Differential Revision: https://reviews.llvm.org/D32902
llvm-svn: 341793
Adam Balogh [Mon, 10 Sep 2018 09:05:31 +0000 (09:05 +0000)]
[Analyzer] Iterator Checker - Part 6: Mismatched iterator checker for constructors and comparisons
Extension of the mismatched iterator checker for constructors taking range of first..last (first and last must be iterators of the same container) and also for comparisons of iterators of different containers (one does not compare iterators of different containers, since the set of iterators is partially ordered, there are no relations between iterators of different containers, except that they are always non-equal).
Differential Revision: https://reviews.llvm.org/D32860
llvm-svn: 341792
Adam Balogh [Mon, 10 Sep 2018 09:04:27 +0000 (09:04 +0000)]
[Analyzer] Iterator Checker - Part 5: Move Assignment of Containers
If a container is moved by its move assignment operator, according to the standard all their iterators except the past-end iterators remain valid but refer to the new container. This patch introduces support for this case in the iterator checkers.
Differential Revision: https://reviews.llvm.org/D32859
llvm-svn: 341791
Adam Balogh [Mon, 10 Sep 2018 09:03:22 +0000 (09:03 +0000)]
[Analyzer] Iterator Checker - Part 4: Mismatched iterator checker for function parameters
New check added to the checker which checks whether iterator parameters of template functions typed by the same template parameter refer to the same container.
Differential Revision: https://reviews.llvm.org/D32845
llvm-svn: 341790
Hans Wennborg [Mon, 10 Sep 2018 08:57:12 +0000 (08:57 +0000)]
ReleaseNotes: update links to use https
llvm-svn: 341789
Hans Wennborg [Mon, 10 Sep 2018 08:52:31 +0000 (08:52 +0000)]
ReleaseNotes: update links to use https
llvm-svn: 341788
Hans Wennborg [Mon, 10 Sep 2018 08:52:04 +0000 (08:52 +0000)]
ReleaseNotes: update links to use https
llvm-svn: 341787
Hans Wennborg [Mon, 10 Sep 2018 08:51:25 +0000 (08:51 +0000)]
ReleaseNotes: update links to use https
llvm-svn: 341786
Hans Wennborg [Mon, 10 Sep 2018 08:50:31 +0000 (08:50 +0000)]
ReleaseNotes: update links to use https
llvm-svn: 341785
Kirill Bobyrev [Mon, 10 Sep 2018 08:23:53 +0000 (08:23 +0000)]
[clangd] NFC: Rename DexIndex to Dex
Also, cleanup some redundant includes.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D51774
llvm-svn: 341784
Aleksandr Urakov [Mon, 10 Sep 2018 08:08:43 +0000 (08:08 +0000)]
[PDB] Restore AST from PDB symbols
Summary:
This patch adds an implementation of retrieving of declarations and declaration
contexts based on PDB symbols.
PDB has different type symbols for const-qualified types, and this
implementation ensures that only one declaration was created for both const
and non-const types, but creates different compiler types for them.
The implementation also processes the case when there are two symbols
corresponding to a variable. It's possible e.g. for class static variables,
they has one global symbol and one symbol belonging to a class.
PDB has no info about namespaces, so this implementation parses the full symbol
name and tries to figure out if the symbol belongs to namespace or not,
and then creates nested namespaces if necessary.
Reviewers: asmith, zturner, labath
Reviewed By: asmith
Subscribers: aleksandr.urakov, teemperor, lldb-commits, stella.stamenova
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D51162
llvm-svn: 341782
Kirill Bobyrev [Mon, 10 Sep 2018 07:57:28 +0000 (07:57 +0000)]
[clangd] Make advanceTo() faster on Posting Lists
If the current element is already beyond advanceTo()'s DocID, just
return instead of doing binary search. This simple optimization saves up
to 6-7% performance,
Reviewed By: ilya-biryukov
Differential Revision: https://reviews.llvm.org/D51802
llvm-svn: 341781
Max Kazantsev [Mon, 10 Sep 2018 06:50:16 +0000 (06:50 +0000)]
[IndVars] Set Changed if rewriteFirstIterationLoopExitValues changes IR. PR38863
Currently, `rewriteFirstIterationLoopExitValues` does not set Changed flag even if it makes
changes in the IR. There is no clear evidence that it can cause a crash, but it
looks highly suspicious and likely invalid.
Differential Revision: https://reviews.llvm.org/D51779
Reviewed By: skatkov
llvm-svn: 341779
Richard Smith [Mon, 10 Sep 2018 06:35:32 +0000 (06:35 +0000)]
PR33222: Require the declared return type not the actual return type to
match when checking for redeclaration of a function template.
This properly handles differences in deduced return types, particularly
when performing redeclaration checks for a friend function template.
llvm-svn: 341778
Max Kazantsev [Mon, 10 Sep 2018 06:32:00 +0000 (06:32 +0000)]
[IndVars] Set Changed if sinkUnusedInvariants changes IR. PR38863
Currently, `sinkUnusedInvariants` does not set Changed flag even if it makes
changes in the IR. There is no clear evidence that it can cause a crash, but it
looks highly suspicious and likely invalid.
Differential Revision: https://reviews.llvm.org/D51777
Reviewed By: skatkov
llvm-svn: 341777
Vikram TV [Mon, 10 Sep 2018 06:16:44 +0000 (06:16 +0000)]
Move a transformation routine from LoopUtils to LoopVectorize.
Summary:
Move InductionDescriptor::transform() routine from LoopUtils to its only uses in LoopVectorize.cpp.
Specifically, the function is renamed as InnerLoopVectorizer::emitTransformedIndex().
This is a child to D51153.
Reviewers: dmgreen, llvm-commits
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D51837
llvm-svn: 341776
Richard Smith [Mon, 10 Sep 2018 05:32:13 +0000 (05:32 +0000)]
Part of PR33222: defer enforcing return type mismatch for dependent
friend function declarations of class templates.
llvm-svn: 341775
David Carlier [Mon, 10 Sep 2018 05:29:49 +0000 (05:29 +0000)]
[XRay] Fix buildbot failure
llvm-svn: 341774
Vikram TV [Mon, 10 Sep 2018 05:05:08 +0000 (05:05 +0000)]
Move createMinMaxOp() out of RecurrenceDescriptor.
Reviewers: dmgreen, llvm-commits
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D51838
llvm-svn: 341773
David Carlier [Mon, 10 Sep 2018 05:00:43 +0000 (05:00 +0000)]
[Xray] tooling allow MachO format support
Getting writable xray __DATA sections from MachO as well.
Reviewers: dberris
Reviewed By: dberris
Differential Revision: https://reviews.llvm.org/D51758
llvm-svn: 341772
Dean Michael Berris [Mon, 10 Sep 2018 02:57:05 +0000 (02:57 +0000)]
[XRay] Remove unused reference
The reference was only used in the assertion.
Follow-up on D51723.
llvm-svn: 341771
Matt Arsenault [Mon, 10 Sep 2018 02:54:25 +0000 (02:54 +0000)]
AMDGPU: Fix tests using old number for constant address space
llvm-svn: 341770
Dean Michael Berris [Mon, 10 Sep 2018 02:35:25 +0000 (02:35 +0000)]
[XRay] Add a BlockVerifier visitor for FDR Records
Summary:
This patch implements a `BlockVerifier` type which enforces the
invariants of the log structure of FDR mode logs on a per-block basis.
This ensures that the data we encounter from an FDR mode log
semantically correct (i.e. that records follow the documented "grammar"
for FDR mode log records).
This is another part of the refactoring of D50441.
This is a slightly modified version of rL341628, avoiding the
`std::tuple<...>` constructor that is not constexpr in C++11.
Reviewers: mboerger, eizan
Subscribers: mgorny, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51723
llvm-svn: 341769
Matt Arsenault [Mon, 10 Sep 2018 02:23:39 +0000 (02:23 +0000)]
AMDGPU: Use GOT PSV since it has an address space now
llvm-svn: 341768
Matt Arsenault [Mon, 10 Sep 2018 02:23:30 +0000 (02:23 +0000)]
AMDGPU: Don't abort on unknown addrspace argument
llvm-svn: 341767
Kelvin Li [Mon, 10 Sep 2018 02:07:09 +0000 (02:07 +0000)]
[OpenMP] Add support for nested 'declare target' directives
Add the capability to nest multiple declare target directives
- including header files within a declare target region.
Differential Revision: https://reviews.llvm.org/D51378
Patch by Patrick Lyster
llvm-svn: 341766
Craig Topper [Sun, 9 Sep 2018 20:36:36 +0000 (20:36 +0000)]
[X86] Custom type legalize (v2i32 (fp_to_uint v2f64))) without avx512vl by widening to v4i32 and v4f64 instead of v8i32 and v8f64. Make it aware of x86-experimental-vector-widening-legalization
We have isel patterns for v4i32/v4f64 that artificially widen to v8i32/v8f64 so just use that.
If x86-experimental-vector-widening-legalization is enabled, we don't need any custom legalization and can just return. I've modified the test RUN lines to cover this case.
llvm-svn: 341765
Fangrui Song [Sun, 9 Sep 2018 17:20:03 +0000 (17:20 +0000)]
[Sema] Make typo correction slightly more efficient
edit_distance returns UpperBound+1 if the distance will exceed UpperBound. We can subtract 1 from UpperBound and change >= to > in the if condition. The threshold does not change but edit_distance will have more opportunity to bail out earlier.
llvm-svn: 341763
Sanjay Patel [Sun, 9 Sep 2018 14:13:22 +0000 (14:13 +0000)]
[SelectionDAG] enhance vector demanded elements to look at a vector select condition operand
This is the DAG equivalent of D51433.
If we know we're not using all vector lanes, use that knowledge to potentially simplify a vselect condition.
The reduction/horizontal tests show that we are eliminating AVX1 operations on the upper half of 256-bit
vectors because we don't need those anyway.
I'm not sure what the pr34592 test is showing. That's run with -O0; is SimplifyDemandedVectorElts supposed
to be running there?
Differential Revision: https://reviews.llvm.org/D51696
llvm-svn: 341762
Hamza Sood [Sun, 9 Sep 2018 13:12:53 +0000 (13:12 +0000)]
Fix build bots after a mistake in r341760
llvm-svn: 341761
Hamza Sood [Sun, 9 Sep 2018 12:06:35 +0000 (12:06 +0000)]
[Tooling] Improve handling of CL-style options
This patch fixes the handling of clang-cl options in InterpolatingCompilationDatabase.
They were previously ignored completely, which led to a lot of bugs:
Additional options were being added with the wrong syntax. E.g. a file was
specified as C++ by adding -x c++, which causes an error in CL mode.
The args were parsed and then rendered, which means that the aliasing information
was lost. E.g. /W4 was rendered to -Wall, which in CL mode means -Weverything.
CL options were ignored when checking things like -std=, so a lot of logic was
being bypassed.
Differential Revision: https://reviews.llvm.org/D51321
llvm-svn: 341760
Pavel Labath [Sun, 9 Sep 2018 08:42:00 +0000 (08:42 +0000)]
Speculative fix for NetBSD bot for r341758
llvm-svn: 341759
Pavel Labath [Sun, 9 Sep 2018 06:01:12 +0000 (06:01 +0000)]
Re-commit "Modernize NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode"
This recommits r341487, which was reverted due to failing tests with
clang. It turned out I had incorrectly expected that the literal arrays
passed to ArrayRef constructor will have static (permanent) storage.
This was only the case with gcc, while clang was constructing them on
stack, leading to dangling pointers when the function returns.
The fix is to explicitly assign static storage duration to the opcode
arrays.
llvm-svn: 341758
Akira Hatanaka [Sun, 9 Sep 2018 05:22:49 +0000 (05:22 +0000)]
Revert r341754.
The commit broke a couple of bots:
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/12347
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/7310
llvm-svn: 341757
Fangrui Song [Sun, 9 Sep 2018 01:54:18 +0000 (01:54 +0000)]
[Parser] Remove an unnecessary `mutable`
llvm-svn: 341756
Nico Weber [Sat, 8 Sep 2018 20:58:39 +0000 (20:58 +0000)]
ms: Insert $$Z in mangling between directly consecutive parameter packs.
Fixes PR38783.
Differential Revision: https://reviews.llvm.org/D51784
llvm-svn: 341755
Akira Hatanaka [Sat, 8 Sep 2018 20:03:00 +0000 (20:03 +0000)]
Distinguish `__block` variables that are captured by escaping blocks
from those that aren't.
This patch changes the way __block variables that aren't captured by
escaping blocks are handled:
- Since non-escaping blocks on the stack never get copied to the heap
(see https://reviews.llvm.org/D49303), Sema shouldn't error out when
the type of a non-escaping __block variable doesn't have an accessible
copy constructor.
- IRGen doesn't have to use the specialized byref structure (see
https://clang.llvm.org/docs/Block-ABI-Apple.html#id8) for a
non-escaping __block variable anymore. Instead IRGen can emit the
variable as a normal variable and copy the reference to the block
literal. Byref copy/dispose helpers aren't needed either.
rdar://problem/
39352313
Differential Revision: https://reviews.llvm.org/D51564
llvm-svn: 341754
Craig Topper [Sat, 8 Sep 2018 19:32:58 +0000 (19:32 +0000)]
[X86] Create paddus/psubus from narrower vectors with i8/i16 element types.
Summary:
This patch allows vectors with a power of 2 number of elements and i8/i16 element type to select paddus/psubus instructions. ReplaceNodeResults has been updated to custom widen these operations up to 128 bits like we already do for PAVG.
Another step towards fixing PR38691
Reviewers: RKSimon, spatel
Reviewed By: RKSimon, spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51818
llvm-svn: 341753
Craig Topper [Sat, 8 Sep 2018 18:47:56 +0000 (18:47 +0000)]
[X86] Mark the ADCX and ADOX instruction as commutable.
llvm-svn: 341752
Craig Topper [Sat, 8 Sep 2018 18:47:54 +0000 (18:47 +0000)]
[X86] Add test cases for commuting ADCX/ADOX instruction to avoid copies.
This is a MIR test so we can test ADOX which we have no isel patterns for. I also plan to remove ADCX isel patterns in the near future so this will help maintain coverage.
llvm-svn: 341751
JF Bastien [Sat, 8 Sep 2018 16:50:56 +0000 (16:50 +0000)]
Revert "NFC: use bit_cast more in AArch64AddressingModes"
It seems some bots think std::array is either not trivially-copyable, or isn't
the right size.
llvm-svn: 341750
JF Bastien [Sat, 8 Sep 2018 16:43:49 +0000 (16:43 +0000)]
NFC: use bit_cast more in AArch64AddressingModes
llvm-svn: 341749
Jonas Hahnfeld [Sat, 8 Sep 2018 12:10:19 +0000 (12:10 +0000)]
[libomptarget-nvptx] Remove last mentions of __kmpc_print_*
Their implementation was removed during review, delete their
prototype declarations.
llvm-svn: 341748
Pavel Labath [Sat, 8 Sep 2018 10:33:14 +0000 (10:33 +0000)]
Revert "Modernize NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode"
This reverts commit r341487. Jan Kratochvil reports it breaks LLDB when
compiling with clang.
llvm-svn: 341747
David Bolvansky [Sat, 8 Sep 2018 07:15:56 +0000 (07:15 +0000)]
Check if a terminal supports colors on Windows properly
Summary:
Previously we SetUseColor(true) wrongly when output was not a terminal so it broken some (not public) bots.
Thanks for issue report, @stella.stamenova
Reviewers: stella.stamenova, zturner
Reviewed By: stella.stamenova
Subscribers: abidh, lldb-commits, stella.stamenova
Differential Revision: https://reviews.llvm.org/D51772
llvm-svn: 341746
Craig Topper [Sat, 8 Sep 2018 06:31:43 +0000 (06:31 +0000)]
[X86] Add commuted isel pattern for the load form of ADCX instructions.
This prevents the legacy ADC instruction from being favored over ADCX when the load is in the operand 0.
llvm-svn: 341745
Craig Topper [Sat, 8 Sep 2018 06:31:41 +0000 (06:31 +0000)]
[X86] Add load folding test cases for the addcarryx intrinsic.
We are currently only able to fold a load in operand 1 to ADCX. A load in operand 0 will use the legacy ADC instruction.
Ultimately I want to remove isel support for ADCX, but first I'm going to fix the shortcomings I know of so I can write proper MIR tests to maintain coverage later.
llvm-svn: 341744
Craig Topper [Sat, 8 Sep 2018 05:08:18 +0000 (05:08 +0000)]
[X86] Add stack folding MIR test for ADCX/ADOX.
We currently have no way to isel ADOX and I plan to remove isel patterns for ADCX. This test will ensure we still have stack folding support for these instructions if we need them in the future.
llvm-svn: 341743
JF Bastien [Sat, 8 Sep 2018 04:07:41 +0000 (04:07 +0000)]
Fix typo in previous commit
llvm-svn: 341742
JF Bastien [Sat, 8 Sep 2018 03:55:25 +0000 (03:55 +0000)]
ADT: add <bit> header, implement C++20 bit_cast, use
Summary: I saw a few places that were punning through a union of FP and integer, and that made me sad. Luckily, C++20 adds bit_cast for exactly that purpose. Implement our own version in ADT (without constexpr, leaving us a bit sad), and use it in the few places my grep-fu found silly union punning.
This was originally committed as r341728 and reverted in r341730.
Reviewers: javed.absar, steven_wu, srhines
Subscribers: dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51693
llvm-svn: 341741
Fangrui Song [Sat, 8 Sep 2018 02:04:20 +0000 (02:04 +0000)]
Fix typos. NFC
llvm-svn: 341740
Kostya Serebryany [Sat, 8 Sep 2018 01:27:10 +0000 (01:27 +0000)]
[hwasan] rename two .cc tests into .c
llvm-svn: 341739
Evgeniy Stepanov [Sat, 8 Sep 2018 01:16:47 +0000 (01:16 +0000)]
[hwasan] Disable print-memory-usage-android test.
Requires a rooted device => fails on sanitizer-x86_64-linux-android bot.
llvm-svn: 341738
Adrian Prantl [Sat, 8 Sep 2018 00:21:55 +0000 (00:21 +0000)]
Remove addBlockByrefAddress(), it is dead code as far as clang is concerned.
This patch removes addBlockByrefAddress(), it is dead code as far as
clang is concerned: Every byref block capture is emitted with a
complex expression that is equivalent to what this function does.
rdar://problem/
31629055
Differential Revision: https://reviews.llvm.org/D51763
llvm-svn: 341737
Richard Smith [Sat, 8 Sep 2018 00:17:37 +0000 (00:17 +0000)]
Switch to using a reserved identifier for this internal compiler-rt function.
llvm-svn: 341736
Evgeniy Stepanov [Sat, 8 Sep 2018 00:11:12 +0000 (00:11 +0000)]
[hwasan] Export memory stats through /proc/$PID/maps.
Adds a line to /proc/$PID/maps with more or less up-to-date memory
stats of the process.
llvm-svn: 341735
Richard Smith [Fri, 7 Sep 2018 23:57:54 +0000 (23:57 +0000)]
Do not use optimized atomic libcalls for misaligned atomics.
Summary:
The optimized (__atomic_foo_<n>) libcalls assume that the atomic object
is properly aligned, so should never be called on an underaligned
object.
This addresses one of several problems identified in PR38846.
Reviewers: jyknight, t.p.northover
Subscribers: jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D51817
llvm-svn: 341734
Alina Sbirlea [Fri, 7 Sep 2018 23:51:41 +0000 (23:51 +0000)]
[MemorySSA] Relax verification of clobbering accesses.
llvm-svn: 341733
Davide Italiano [Fri, 7 Sep 2018 23:49:05 +0000 (23:49 +0000)]
[XCodeproj] Remove extra whitespace in SBAPI path.
llvm-svn: 341732
Zachary Turner [Fri, 7 Sep 2018 23:36:08 +0000 (23:36 +0000)]
Fix some of the PDB tests.
They were unintentionally calling DIA directly, which requires
Windows. We need to pass the -native flag, and this then required
fixing up one or two tests.
llvm-svn: 341731
JF Bastien [Fri, 7 Sep 2018 23:23:47 +0000 (23:23 +0000)]
Revert "ADT: add <bit> header, implement C++20 bit_cast, use"
Bots sad. Looks like missing std::is_trivially_copyable.
llvm-svn: 341730
Zachary Turner [Fri, 7 Sep 2018 23:21:33 +0000 (23:21 +0000)]
[PDB] Support pointer types in the native reader.
In order to start testing this, I've added a new mode to
llvm-pdbutil which is only really useful for writing tests.
It just dumps the value of raw fields in record format.
This isn't really ideal and it won't allow us to test some
important cases, but it's better than nothing for now.
llvm-svn: 341729
JF Bastien [Fri, 7 Sep 2018 23:08:26 +0000 (23:08 +0000)]
ADT: add <bit> header, implement C++20 bit_cast, use
Summary: I saw a few places that were punning through a union of FP and integer, and that made me sad. Luckily, C++20 adds bit_cast for exactly that purpose. Implement our own version in ADT (without constexpr, leaving us a bit sad), and use it in the few places my grep-fu found silly union punning.
Reviewers: javed.absar
Subscribers: dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51693
llvm-svn: 341728
Reid Kleckner [Fri, 7 Sep 2018 23:07:55 +0000 (23:07 +0000)]
[COFF] Implement llvm.global_ctors priorities for MSVC COFF targets
Summary:
MSVC and LLD sort sections ASCII-betically, so we need to use section
names that sort between .CRT$XCA (the start) and .CRT$XCU (the default
priority).
In the general case, use .CRT$XCT12345 as the section name, and let the
linker sort the zero-padded digits.
Users with low priorities typically want to initialize as early as
possible, so use .CRT$XCA00199 for prioties less than 200. This number
is arbitrary.
Implements PR38552.
Reviewers: majnemer, mstorsjo
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51820
llvm-svn: 341727
Abderrazek Zaafrani [Fri, 7 Sep 2018 22:41:57 +0000 (22:41 +0000)]
[SimplifyIndVar] Avoid generating truncate instructions with non-hoisted Laod operand.
Differential Revision: https://reviews.llvm.org/D49151
llvm-svn: 341726
Piotr Padlewski [Fri, 7 Sep 2018 22:29:48 +0000 (22:29 +0000)]
Set cost of invariant group intrinsics to 0
Summary:
Like with other similar intrinsics, presense of strip or
launder.invariant.group should not change the result of inlining cost.
This is because they are just markers and do not perform any computation.
Reviewers: amharc, rsmith, reames, kuhar
Subscribers: eraman, llvm-commits
Differential Revision: https://reviews.llvm.org/D51814
llvm-svn: 341725
George Karpenkov [Fri, 7 Sep 2018 22:13:35 +0000 (22:13 +0000)]
[analyzer] [NFC] Move methods for dumping the coverage in HTMLDiagnostics into the class
Differential Revision: https://reviews.llvm.org/D51513
llvm-svn: 341724
George Karpenkov [Fri, 7 Sep 2018 22:13:15 +0000 (22:13 +0000)]
[analyzer] [NFC] Use StringRef when returning a large string literal in HTMLDiagnostics
(NB: could be a clang-tidy / analyzer check)
Differential Revision: https://reviews.llvm.org/D51512
llvm-svn: 341723
George Karpenkov [Fri, 7 Sep 2018 22:07:57 +0000 (22:07 +0000)]
[analyzer] Remove the "postponed" hack, deal with derived symbols using an extra map
The "derived" symbols indicate children fields of a larger symbol.
As parents do not have pointers to their children, the garbage
collection algorithm the analyzer currently uses adds such symbols into
a "postponed" category, and then keeps running through the worklist
until the fixed point is reached.
The current patch rectifies that by instead using a helper map which
stores pointers from parents to children, so that no fixed point
calculation is necessary.
The current patch yields ~5% improvement in running time on sqlite.
Differential Revision: https://reviews.llvm.org/D51397
llvm-svn: 341722
Ben Hamilton [Fri, 7 Sep 2018 22:03:48 +0000 (22:03 +0000)]
[clang-tidy/ObjC] Update list of acronyms in PropertyDeclarationCheck
Summary: This adds a few common acronyms we found were missing from PropertyDeclarationCheck.
Reviewers: Wizard, hokein
Reviewed By: hokein
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51819
llvm-svn: 341721
Ben Hamilton [Fri, 7 Sep 2018 22:02:38 +0000 (22:02 +0000)]
[clang-tidy/ObjC] Update list of acronyms in PropertyDeclarationCheck
Summary: This adds a few common acronyms we found were missing from PropertyDeclarationCheck.
Reviewers: Wizard, hokein
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51819
llvm-svn: 341720
George Karpenkov [Fri, 7 Sep 2018 21:58:24 +0000 (21:58 +0000)]
Revert "Revert "Revert "Revert "[analyzer] Add coverage information to plist output, update tests""""
This reverts commit
2f5d71d9fa135be86bb299e7d773036e50bf1df6.
Hopefully fixing tests on Windows.
llvm-svn: 341719
Thomas Lively [Fri, 7 Sep 2018 21:54:46 +0000 (21:54 +0000)]
[WebAssembly] v8x16.shuffle
Summary:
Since the shuffle mask is not exposed as an operand in the native ISel
DAG, create a new WebAssembly ISD node exposing the mask. The mask is
lowered as sixteen immediate byte indices no matter what type the
original vector shuffle was operating on.
This CL depends on D51656
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51659
llvm-svn: 341718
Reid Kleckner [Fri, 7 Sep 2018 21:47:25 +0000 (21:47 +0000)]
[benchmark] Fix flags used to compile benchmark library with clang-cl
`MSVC` is true for clang-cl, but `"${CMAKE_CXX_COMPILER_ID}" STREQUAL
"MSVC"` is false, so we would enable -Wall, which means -Weverything
with clang-cl, and we get tons of undesired warnings.
Use the simpler condition to fix things.
llvm-svn: 341717
Reid Kleckner [Fri, 7 Sep 2018 21:47:00 +0000 (21:47 +0000)]
[benchmark] Re-enable benchmarks on all platforms including Windows
The assertion in MCCodeView.cpp was resolved in r340878.
This reverts both r340905 and r340836, making benchmarks build by
default everywhere.
llvm-svn: 341716
Sanjay Patel [Fri, 7 Sep 2018 21:40:41 +0000 (21:40 +0000)]
[InstCombine][x86] add tests for possible blendv transform (PR38814); NFC
llvm-svn: 341715
Davide Italiano [Fri, 7 Sep 2018 21:36:21 +0000 (21:36 +0000)]
[Disassembler] Run ARM-specific tests only if the ARM backend is built.
<rdar://problem/
44239070>
llvm-svn: 341714
Philip Reames [Fri, 7 Sep 2018 21:36:11 +0000 (21:36 +0000)]
[AST] Generalize argument specific aliasing
AliasSetTracker has special case handling for memset, memcpy and memmove which pre-existed argmemonly on functions and readonly and writeonly on arguments. This patch generalizes it using the AA infrastructure to any call correctly annotated.
The motivation here is to cut down on confusion, not performance per se. For most instructions, there is a direct mapping to alias set. However, this is not guaranteed by the interface and was not in fact true for these three intrinsics *and only these three intrinsics*. I kept getting myself confused about this invariant, so I figured it would be good to clearly distinguish between a instructions and alias sets. Calls happened to be an easy target.
The nice side effect is that custom implementations of memset/memcpy/memmove - including wrappers discovered by IPO - can now be optimized the same as builts by LICM.
Note: The actual removal of the memset/memtransfer specific handling will happen in a follow on NFC patch. It was originally part of this one, but separate for ease of review and rebase.
Differential Revision: https://reviews.llvm.org/D50730
llvm-svn: 341713
Reid Kleckner [Fri, 7 Sep 2018 21:30:52 +0000 (21:30 +0000)]
[codeview] Add .cv_string directive for testing purposes
The main use case for this directive is to allow assembly writers to
write their own FPO data strings without going through the .cv_fpo*
directive family.
I'm experimenting with different RPN programs to fix PR38857, and I
figured I should go ahead and make this directive permanent.
llvm-svn: 341712
Craig Topper [Fri, 7 Sep 2018 21:28:46 +0000 (21:28 +0000)]
[X86] Add codegen tests for narrow PADDUS/PSUBUS patterns for PR38691.
llvm-svn: 341711
Richard Smith [Fri, 7 Sep 2018 21:24:27 +0000 (21:24 +0000)]
Make -Watomic-alignment say whether the atomic operation was oversized
or misaligned.
llvm-svn: 341710
Alina Sbirlea [Fri, 7 Sep 2018 21:14:48 +0000 (21:14 +0000)]
[MemorySSA] Update MemoryPhi wiring for block splitting to consider if identical edges were merged.
Summary:
Block splitting is done with either identical edges being merged, or not.
Only critical edges can be split without merging identical edges based on an option.
Teach the memoryssa updater to take this into account: for the same edge between two blocks only move one entry from the Phi in Old to the new Phi in New.
Reviewers: george.burgess.iv
Subscribers: sanjoy, jlebar, Prazek, llvm-commits
Differential Revision: https://reviews.llvm.org/D51563
llvm-svn: 341709
Sanjay Patel [Fri, 7 Sep 2018 21:03:34 +0000 (21:03 +0000)]
[InstCombine] narrow vector select with padded condition and extracted result (PR38691)
shuf (sel (shuf NarrowCond, undef, WideMask), X, Y), undef, NarrowMask) -->
sel NarrowCond, (shuf X, undef, NarrowMask), (shuf Y, undef, NarrowMask)
The motivating case from:
https://bugs.llvm.org/show_bug.cgi?id=38691
...is the last regression test. In that case, we're just left with the narrow select.
Note that if we do create new shuffles, they use the existing extraction identity mask,
so there's no danger that this transform creates arbitrary shuffles.
Differential Revision: https://reviews.llvm.org/D51496
llvm-svn: 341708
Thomas Lively [Fri, 7 Sep 2018 20:59:50 +0000 (20:59 +0000)]
[WebAssembly] Change SIMD lane indices to vec_i8imm_op
Summary: To explicitly opt out of LEB encoding for these immediates.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D51766
llvm-svn: 341707
Nick Desaulniers [Fri, 7 Sep 2018 20:58:57 +0000 (20:58 +0000)]
[AArch64] Support reserving x1-7 registers.
Summary:
Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7.
Reviewers: javed.absar, phosek, srhines, nickdesaulniers, efriedma
Reviewed By: nickdesaulniers, efriedma
Subscribers: niravd, jfb, manojgupta, nickdesaulniers, jyknight, efriedma, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D48580
llvm-svn: 341706
Craig Topper [Fri, 7 Sep 2018 20:56:03 +0000 (20:56 +0000)]
[X86] Don't create ZERO_EXTEND_INREG/SIGN_EXTEND_INREG for v1iX vectors.
The generic type legalizer will scalarize vXi1 instructions getting rid of the vector entirely. Creating wider vector instructions is just going to prevent that.
llvm-svn: 341705
Craig Topper [Fri, 7 Sep 2018 20:56:01 +0000 (20:56 +0000)]
[X86] Don't create X86ISD::AVG nodes from v1iX vectors.
The type legalizer will try to scalarize this and fail.
It looks like there's some other v1iX oddities out there too since we still generated some vector instructions.
llvm-svn: 341704
Jonathan Peyton [Fri, 7 Sep 2018 20:33:35 +0000 (20:33 +0000)]
[OpenMP] Update copyright to 2018
Better late than never
llvm-svn: 341703
Fangrui Song [Fri, 7 Sep 2018 20:23:15 +0000 (20:23 +0000)]
[PGO] Fix some style issue of ControlHeightReduction
Reviewers: yamauchi
Reviewed By: yamauchi
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51811
llvm-svn: 341702