Simplify some force_fit_type calls in tree-vrp.c.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204361 138bc75d-0d04-0410-961f-82ee72b054a4

Fix UNSIGNED_FIX simplify-rtx.c handling.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204346 138bc75d-0d04-0410-961f-82ee72b054a4

Restore VAX build.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204333 138bc75d-0d04-0410-961f-82ee72b054a4

Restore SPARC build.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204332 138bc75d-0d04-0410-961f-82ee72b054a4

Restore msp430 build.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204331 138bc75d-0d04-0410-961f-82ee72b054a4

Restore build on doloop_end targets.  Revert to using GEN_INT for the
iterations_max.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204330 138bc75d-0d04-0410-961f-82ee72b054a4

Fix off-by-one error in VEC_PERM_EXPR folder.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204329 138bc75d-0d04-0410-961f-82ee72b054a4

Simplify convert_modes, ignoring invalid old modes for CONST_INTs.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204328 138bc75d-0d04-0410-961f-82ee72b054a4

Don't treat rtx constants as sign-extended.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204326 138bc75d-0d04-0410-961f-82ee72b054a4

Revert r201806.  Allow out-of-range start bits in shifted_mask.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204325 138bc75d-0d04-0410-961f-82ee72b054a4

Fix mask inversions in expand_copysign_bit.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204316 138bc75d-0d04-0410-961f-82ee72b054a4

Fix exact_log2 zext test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204315 138bc75d-0d04-0410-961f-82ee72b054a4

Fix bfin local alignment check.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204314 138bc75d-0d04-0410-961f-82ee72b054a4

Fix arm and aarch64 builds.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204313 138bc75d-0d04-0410-961f-82ee72b054a4

Fix two force_fit_type in which the new type could be wider and in which
the source wasn't being extended according to the source's sign.  Fix handling
of SHIFT_COUNT_TRUNCATED in a couple of places.  Fix mask check used in
COND_EXPR folding.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204311 138bc75d-0d04-0410-961f-82ee72b054a4

Documentation tweaks.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204288 138bc75d-0d04-0410-961f-82ee72b054a4

Various division fixes.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204287 138bc75d-0d04-0410-961f-82ee72b054a4

Restore ada build.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204248 138bc75d-0d04-0410-961f-82ee72b054a4

- Fix comment typos that I'd introducted.
- Fix spurious whitespace differences.
- Use const X & instead of X for *wide_int parameters.
- Fuse declarations and initialisers.
- Avoid unnecessary *wide_int temporaries (e.g. wide_int (x) == 0
  -> wi::eq_p (x, 0)).
- Fix some long lines.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204183 138bc75d-0d04-0410-961f-82ee72b054a4

Add more optimisations.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204176 138bc75d-0d04-0410-961f-82ee72b054a4

Make ordered comparisons enforce the same type rules as equality comparisons.
Get rid of INT_CST_LT_UNSIGNED.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204175 138bc75d-0d04-0410-961f-82ee72b054a4

Make TREE_INT_CST_NUNITS have its original meaning and add
TREE_INT_CST_EXT_NUNITS for the extended length.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204037 138bc75d-0d04-0410-961f-82ee72b054a4

Rename max_wide_int to widest_int, addr_wide_int to offset_int,
wi::address to wi::to_offset and wi::extend to wi::to_widest.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@204036 138bc75d-0d04-0410-961f-82ee72b054a4

Add ::is_sign_extended.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203966 138bc75d-0d04-0410-961f-82ee72b054a4

Add wi::copy.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203965 138bc75d-0d04-0410-961f-82ee72b054a4

Shrink the size of the scratch array.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203964 138bc75d-0d04-0410-961f-82ee72b054a4

Backport:

2013-10-21  Richard Sandiford  <rdsandiford@googlemail.com>

* system.h: Move hwint.h include further down.
* hwint.h (sext_hwi, zext_hwi): Define unconditionally.  Add
gcc_checking_asserts.
* hwint.c (sext_hwi, zext_hwi): Delete ENABLE_CHECKING versions.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203963 138bc75d-0d04-0410-961f-82ee72b054a4

Turn lts_p & co. back into templates.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203962 138bc75d-0d04-0410-961f-82ee72b054a4

Always treat trees as having their native precision by default.
Add wi::extend() and wi::address() to convert them to max_wide_int
and addr_wide_int.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203961 138bc75d-0d04-0410-961f-82ee72b054a4

Make excess bits undefined on read again.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203960 138bc75d-0d04-0410-961f-82ee72b054a4

Fix soft merge-o.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203903 138bc75d-0d04-0410-961f-82ee72b054a4

Fix merge-o.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203885 138bc75d-0d04-0410-961f-82ee72b054a4

Merge in trunk.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203881 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-20  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/altivec.md (vec_unpacku_hi_v16qi): Adjust for
little endian.
(vec_unpacku_hi_v8hi): Likewise.
(vec_unpacku_lo_v16qi): Likewise.
(vec_unpacku_lo_v8hi): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203877 138bc75d-0d04-0410-961f-82ee72b054a4

* config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM,
X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10.
(X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203876 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-20  Tim Shen  <timshen91@gmail.com>

* include/bits/regex.h: Remove virtual class _Automaton.
* include/bits/regex_automaton.h: Likewise.
* include/bits/regex.tcc: Adjust comment for policy changing.
* include/bits/regex_executor.h: Update comments of complexity.
* include/bits/regex_executor.tcc: Adjust executor choosing
policy. Now DFS executor is the default one.
* testsuite/util/testsuite_regex.h (regex_match_debug,
regex_search_debug): Adjust for policy changing.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203875 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-20  Chris Jefferson  <chris@bubblescope.net>
    Paolo Carlini  <paolo.carlini@oracle.com>

PR libstdc++/58800
* include/bits/stl_algo.h (__unguarded_partition_pivot): Change
__last - 2 to __last - 1.
* testsuite/25_algorithms/nth_element/58800.cc: New

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203872 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
* gcc.target/mips/mips-ps-5.c: Add alignment attributes.
* gcc.target/mips/mips-ps-7.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203871 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
* config/mips/mips.h (ISA_HAS_WSBH): Define.
* config/mips/mips.md (UNSPEC_WSBH, UNSPEC_DSBH, UNSPEC_DSHD): New
constants.
(bswaphi2, bswapsi2, bswapdi2, wsbh, dsbh, dshd): New patterns.

gcc/testsuite/
* gcc.target/mips/bswap-1.c, gcc.target/mips/bswap-2.c,
gcc.target/mips/bswap-3.c, gcc.target/mips/bswap-4.c,
gcc.target/mips/bswap-5.c, gcc.target/mips/bswap-6.c: New tests.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203870 138bc75d-0d04-0410-961f-82ee72b054a4

Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203869 138bc75d-0d04-0410-961f-82ee72b054a4

* c-c++-common/opaque-vector.c: Skip long double test on hppa.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203866 138bc75d-0d04-0410-961f-82ee72b054a4

PR testsuite/58645
* gnat.dg/specs/linker_alias.ads: Skip on hppa*-*-hpux*.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203865 138bc75d-0d04-0410-961f-82ee72b054a4

PR target/58603
* system.h: Undef m_slot.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203864 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-19  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (vspltis_constant): Make sure we check
all elements for both endian flavors.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203863 138bc75d-0d04-0410-961f-82ee72b054a4

* g++.dg/lto/lto.exp: Add support for C/C++ mix language testing.

* gcc.dg/lto/pr54625-1_0.c: Move from here...
* g++.dg/lto/pr54625-1_0.c: ... to here.
* gcc.dg/lto/pr54625-1_1.C: Likewise.
* g++.dg/lto/pr54625-1_1.C: Likewise.
* gcc.dg/lto/pr54625-2_0.c: Likewise.
* g++.dg/lto/pr54625-2_0.c: Likewise.
* gcc.dg/lto/pr54625-2_1.C: Likewise.
* g++.dg/lto/pr54625-2_1.C: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203862 138bc75d-0d04-0410-961f-82ee72b054a4

Remove redundant code.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203861 138bc75d-0d04-0410-961f-82ee72b054a4

Fix spelling.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203860 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc.target/sh/pr54089-3.c: Fix test for load of constant 31.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203859 138bc75d-0d04-0410-961f-82ee72b054a4

PR target/58792
* config/i386/i386.c (ix86_function_value_regno): Add DX_REG,
ST1_REG and XMM1_REG for 32bit and 64bit targets.  Also add DI_REG
and SI_REG for 64bit SYSV ABI targets.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203857 138bc75d-0d04-0410-961f-82ee72b054a4

* mode-switching.c (create_pre_exit): Rename maybe_builtin_apply
to multi_reg_return.  Clarify that we are skipping USEs of multiple
return registers.  Use bool type where appropriate.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203856 138bc75d-0d04-0410-961f-82ee72b054a4

* config/i386/i386.h (ACCUMULATE_OUTGOING_ARGS): Disable accumulation
for cold functions.
* x86-tune.def (X86_TUNE_USE_LEAVE): Update comment.
(X86_TUNE_PUSH_MEMORY): Likewise.
(X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL,
X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): New.
(X86_TUNE_ACCUMULATE_OUTGOING_ARGS, X86_TUNE_ALWAYS_FANCY_MATH_387): New.
* i386.c (x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387,
x86_avx256_split_unaligned_load, x86_avx256_split_unaligned_store):
Remove.
(ix86_option_override_internal): Update to use tune features instead
of variables.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203855 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc-interface/Makefile.in: Use canonical absolute path to refer to
the top source directory and to the libgcc subidrectories.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203854 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc-interface/utils.c (scale_by_factor_of): New function.
(rest_of_record_type_compilation): Use scale_by_factor_of in order to
scale the original offset for both rounding cases; in the second case,
take into accout the addend to compute the alignment.  Tidy up.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203852 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc-interface/cuintp.c: Remove useless include directives.
(build_cst_from_int): Use standard predicate.
(UI_To_gnu): Simplify.
(UI_From_gnu): Fix formatting.
* gcc-interface/trans.c (post_error): Likewise.
(post_error_ne): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203851 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc-interface/utils.c (gnat_set_type_context): New function.
(gnat_pushdecl): Use it to set the context of the type.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203848 138bc75d-0d04-0410-961f-82ee72b054a4

PR tree-optimization/58508
* tree-vect-loop-manip.c (vect_loop_versioning): Hoist loop invariant
statement that contains data refs with zero-step.

* gcc.dg/vect/pr58508.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203842 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Edward Smith-Rowland  <3dw4rd@verizon.net>

PR libstdc++/58729
* include/tr2/dynamic_bitset (_M_resize, resize): Use input value
to set bits; (_M_do_left_shift, _M_do_right_shift, _M_do_to_ulong,
_M_do_to_ullong, _M_do_find_first, _M_do_find_next, _M_copy_from_ptr,
operator>>): Move long methods outline to...
* include/tr2/dynamic_bitset.tcc: New.
* include/Makefile.am: Add dynamic_bitset.tcc.
* include/Makefile.in: Add dynamic_bitset.tcc.
* testsuite/tr2/dynamic_bitset/pr58729.cc: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203841 138bc75d-0d04-0410-961f-82ee72b054a4

Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203839 138bc75d-0d04-0410-961f-82ee72b054a4

/cp
2013-10-18  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/58466
* pt.c (most_specialized_class): Bump processing_template_decl for
get_class_bindings.

/testsuite
2013-10-18  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/58466
* g++.dg/cpp0x/variadic145.C: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203836 138bc75d-0d04-0410-961f-82ee72b054a4

Optimize lts_p a bit more.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203835 138bc75d-0d04-0410-961f-82ee72b054a4

Update doc to say which bits past the precision are defined.
Whitespace fix.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/wide-int@203834 138bc75d-0d04-0410-961f-82ee72b054a4

* tree-ssa.h: Don't include gimple-low.h, tree-ssa-address.h, sbitmap.h,
tree-ssa-threadedge.h, tree-ssa-dom.h, and tree-cfgcleanup.h.
* gimple-low.c (gimple_check_call_arg,
gimple_check_call_matching_types): Move to cgraph.c.
* gimple-low.h: Remove prototype.
* cgraph.c: (gimple_check_call_arg, gimple_check_call_matching_types):
Relocate from gimple-low.c.
* cgraph.h: Add prototype.  Don't include basic-block.h.
* gimplify.c: Add gimple-low to include list.
* omp-low.c: Add gimple-low and tree-cfgcleanup.h to include list.
* tree-eh.c: Add gimple-low to include list.
* tree-nested.c: Likewise.
* cfgexpand.c: Add tree-ssa-address.h to include list.
* expr.c: Likewise.
* gimple-fold.c: Likewise.
* gimple-ssa-strength-reduction.c: Likewise.
* trans-mem.c: Likewise.
* tree-mudflap.c: Likewise.
* tree-ssa-loop-ivopts.c: Likewise.
* tree-ssa-dom.c: Include tree-ssa-threadedge.h and tree-ssa-dom.h.
(degenerate_phi_result): Move to tree-phinodes.c.
* tree-ssa-loop-ch.c: Include tree-ssa-threadedge.h.
* tree-ssa-threadedge.c: Likewise.
* tree-vrp.c: Likewise.
* tree-phinodes.c (degenerate_phi_result): Relocate here.
* tree-ssa-dom.h (degenerate_phi_result): Remove Prototype.
* tree-phinodes.h (degenerate_phi_result): Add prototype.
* tree-ssa-copy.c: Include tree-ssa-dom.h.
* tree-ssa-forwprop.c: Likewise.
* tree-cfgcleanup.c (execute_cleanup_cfg_post_optimizing,
pass_data_cleanup_cfg_post_optimizing,
make_pass_cleanup_cfg_post_optimizing): Relocate from tree-optimize.c.
* tree-optimize.c: Delete File.
* graphite.c: Include tree-cfgcleanup.h.
* passes.c: Likewise.
* tree-cfg.c: Likewise.
* tree-profile.c: Likewise.
* tree-ssa-dse.c: Likewise.
* tree-ssa-loop-ivcanon.c: Likewise.
* tree-switch-conversion.c: Don't include tree-ssa-operands.h.
* tree-outof-ssa.c: Include sbitmap.h.
* tree-ssa-live.c: Likewise.
* tree-ssa-propagate.c: Likewise.
* tree-ssa-structalias.c: Likewise.
* tree-stdarg.c: Likewise.
* Makefile.in (OBJS): Delete tree-optimize.o.
* basic-block.h (gcov_type, gcov_type_unsigned): Move to coretypes.h.
* coretypes.h (gcov_type, gcov_type_unsigned): Relocate here.
* varasm.c: Include basic-block.h.
* cfgloop.h: Include function.h instead of basic-block.h
(bb_loop_depth): Move to cfgloop.c.
* cfgloop.c (bb_loop_depth): Relocate from cfgloop.h.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203833 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Teresa Johnson  <tejohnson@google.com>

* predict.c (probably_never_executed): Compare frequency-based
count to number of training runs.
* params.def (UNLIKELY_BB_COUNT_FRACTION): New parameter.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203830 138bc75d-0d04-0410-961f-82ee72b054a4

[gcc/]
2013-10-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (cortexa9_extra_costs): New table.
(arm_cortex_a9_tune): Use cortexa9_extra_costs.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203828 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Tim Shen  <timshen91@gmail.com>

* include/bits/regex_scanner.tcc: (_Scanner<>::_M_scan_normal,
_Scanner<>::_M_eat_escape_ecma, _Scanner<>::_M_eat_escape_posix,
_Scanner<>::_M_eat_escape_awk): Narrow character before finding in maps.
* testsuite/28_regex/algorithms/regex_match/ecma/wchar_t/cjk_match.cc:
New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203827 138bc75d-0d04-0410-961f-82ee72b054a4

   * tree-ssa-threadupdate.c: Do not include "tm.h" or "tm_p.h".

        * tree-ssa-threadupdate.c: Include "dbgcnt.h".
        (register_jump_thread): Add "registered_jump_thread" debug counter support.
        * dbgcnt.def (registered_jump_thread): New debug counter.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203825 138bc75d-0d04-0410-961f-82ee72b054a4

* config/rs6000/rs6000.c: Include cgraph.h.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203824 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Teresa Johnson  <tejohnson@google.com>

* tree-ssa-tail-merge.c (replace_block_by): Update edge
weights during merging.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203823 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Paolo Carlini  <paolo.carlini@oracle.com>

* parser.c (cp_parser_lookup_name): Tidy.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203822 138bc75d-0d04-0410-961f-82ee72b054a4

runtime: Fix typo in dup3 fallback implementation.

From Uros Bizjak.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203820 138bc75d-0d04-0410-961f-82ee72b054a4

* tree-cfg.h: Rename from tree-flow.h.  Remove #includes.
* tree-ssa.h: Relocate required #includes from tree-cfg.h.
* tree-ssa-operands.h: Remove prototype.
* tree-ssa-operands.c (virtual_operand_p): Move to gimple.c.
* gimple.c (virtual_operand_p): Relocate from gimple.c.
* gimple.h: Add prototype.
* gimple-ssa.h: Include tree-ssa-operands.h.
* tree-dump.c: Add tree-cfg.h to include list.
* tree-ssa-alias.c: Add ipa-reference.h to include list.
* config/alpha/alpha.c: Include gimple-ssa.h instead of tree-flow.h.
* config/i386/i386.c: Don't include tree-flow.h.
* config/rs6000/rs6000.c: Likewise.

* lto/lto.c: Remove tree-flow.h from include list.

* testsuite/g++.dg/plugin/header_plugin.c: Don't include tree-flow.h.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203817 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>

* config/frv/frv.c (frv_init_cumulative_args): Fix wrong cast.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203814 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-18  Richard Biener  <rguenther@suse.de>

* stor-layout.c (layout_type): Do not change TYPE_PRECISION
or TYPE_UNSIGNED of integral types.
(set_min_and_max_values_for_integral_type): Leave TYPE_MIN/MAX_VALUE
NULL_TREE for zero-precision integral types.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203813 138bc75d-0d04-0410-961f-82ee72b054a4

[AArch64] Fix types for vcvt<sd>_n intrinsics.

gcc/
* config/aarch64/arm_neon.h
(vcvt<ds>_n_<fsu><32,64>_<fsu><32,64>): Correct argument types.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203812 138bc75d-0d04-0410-961f-82ee72b054a4

* ChangeLog: Remove duplicate entry.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203811 138bc75d-0d04-0410-961f-82ee72b054a4

* elf.c (elf_add): Don't get the wrong offsets if a debug section
is missing.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203810 138bc75d-0d04-0410-961f-82ee72b054a4

* gcc.dg/tree-ssa/gen-vect-11.c: Use dynamic vector cost model.
        gcc.dg/tree-ssa/gen-vect-11a.c: Likewise.
        gcc.dg/tree-ssa/gen-vect-2.c: Likewise.
        gcc.dg/tree-ssa/gen-vect-25.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203809 138bc75d-0d04-0410-961f-82ee72b054a4

* opth-gen.awk: Define target_flags_explicit.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203808 138bc75d-0d04-0410-961f-82ee72b054a4

Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203807 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-03  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/p8vector-fp.c: New test for floating point
scalar operations when using -mupper-regs-sf and -mupper-regs-df.
* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
VSX scalar operations or the traditional floating point form of
the instruction.
* gcc.target/powerpc/ppc-target-2.c: Likewise.
* gcc.target/powerpc/recip-3.c: Likewise.
* gcc.target/powerpc/recip-5.c: Likewise.
* gcc.target/powerpc/pr72747.c: Likewise.
* gcc.target/powerpc/vsx-builtin-3.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203800 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-17  Charles Bayis  <charles.baylis@linaro.org>

* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
* gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
* gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
effective target arm_thumb1_ok.
* lib/target-supports.exp
(check_effective_target_arm_fp16_ok_nocache): Don't force
-mfloat-abi=soft when building for hardfloat target.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203799 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-17  Tim Shen  <timshen91@gmail.com>

* include/bits/regex.h (regex_token_iterator<>::regex_token_iterator):
Fix initialization orders in initialization list and add explicit braces
for potentially ambiguous(actually not) `else` branch to eliminate
warnings.
* include/bits/regex_automaton.h (_NFA<>::_NFA): Likewise.
* include/bits/regex_compiler.h (_CharMatcher<>::_CharMatcher,
_BracketMatcher<>::_BracketMatcher): Likewise.
* include/bits/regex_compiler.tcc (_Compiler<>::_Compiler,
_Compiler<>::_M_atom): Likewise.
* include/bits/regex_executor.h (_Executor<>::_Executor): Likewise.
* include/bits/regex_executor.tcc (_DFSExecutor<>::_M_dfs,
_Executor<>::_M_word_boundry): Likewise.
* include/bits/regex_scanner.tcc (_Scanner<>::_Scanner,
_Scanner<>::_M_eat_class): Likewise.
* include/bits/regex.tcc (__regex_algo_impl<>,
regex_iterator<>::operator++): Likewise, and remove unused typedef.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203798 138bc75d-0d04-0410-961f-82ee72b054a4

Fix typo in ChangeLog

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203797 138bc75d-0d04-0410-961f-82ee72b054a4

compiler: Rework handling of imported anonymous builtin types again.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203795 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
registers, instead of {src,dest}_av_p.
(rs6000_print_options_internal): Tweak the debug output slightly.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203791 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
fields to the reg_addr array that describes the valid addressing
mode for any register, general purpose registers, floating point
registers, and Altivec registers.
(FIRST_RELOAD_REG_CLASS): Likewise.
(LAST_RELOAD_REG_CLASS): Likewise.
(struct reload_reg_map_type): Likewise.
(reload_reg_map_type): Likewise.
(RELOAD_REG_VALID): Likewise.
(RELOAD_REG_MULTIPLE): Likewise.
(RELOAD_REG_INDEXED): Likewise.
(RELOAD_REG_OFFSET): Likewise.
(RELOAD_REG_PRE_INCDEC): Likewise.
(RELOAD_REG_PRE_MODIFY): Likewise.
(reg_addr): Likewise.
(mode_supports_pre_incdec_p): New helper functions to say whether
a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
(mode_supports_pre_modify_p): Likewise.
(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
print the valid address mode bits for each mode.
(rs6000_debug_print_mode): Likewise.
(rs6000_debug_reg_global): Likewise.
(rs6000_setup_reg_addr_masks): New function to set up the address
mask bits for each type.
(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
Call rs6000_setup_reg_addr_masks to set up the address mask bits.
(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
PRE_MODIFY are supported.
(rs6000_print_options_internal): Tweak the debug output slightly.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203790 138bc75d-0d04-0410-961f-82ee72b054a4

syscall: Add Dup3, {Get,List,Remove,Set}xattr, {Get,Set}priority.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203788 138bc75d-0d04-0410-961f-82ee72b054a4

* config/i386/sse.md (*vec_widen_smult_even_v8si): Remove
isa attribute.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203787 138bc75d-0d04-0410-961f-82ee72b054a4

* tree-flow.h (struct omp_region): Move to omp-low.c.
Remove omp_ prototypes and variables.
* gimple.h (omp_reduction_init): Move prototype to omp-low.h.
(copy_var_decl): Relocate prototype from tree-flow.h.
* gimple.c (copy_var_decl): Relocate from omp-low.c.
* tree.h: Move prototype to omp-low.h.
* omp-low.h: New File.  Relocate prototypes here.
* omp-low.c (struct omp_region): Make local here.
(root_omp_region): Make static.
(copy_var_decl) Move to gimple.c.
(new_omp_region): Make static.
(make_gimple_omp_edges): New.  Refactored from tree-cfg.c make_edges.
* tree-cfg.c: Include omp-low.h.
(make_edges): Factor out OMP specific bits to make_gimple_omp_edges.
* gimplify.c: Include omp-low.h.
* tree-parloops.c: Likewise.

c
* c-parser.c: Include omp-low.h.
* c-typeck.c: Likewise.

cp
* parser.c: Include omp-low.h.
* semantics.c: Likewise.

fortran
* trans-openmp.c: Include omp-low.h.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203786 138bc75d-0d04-0410-961f-82ee72b054a4

* config/i386/i386.c (ix86_fixup_binary_operands): When both source
operands are in memory, prefer to force non-matched operand 1 to
the register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203785 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR libmudflap/58230
        * testsuite/lib/mfdg.exp: Use C locale.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203783 138bc75d-0d04-0410-961f-82ee72b054a4

[gcc]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/58673
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
restrict TImode addresses to single indirect registers if both
-mquad-memory and -mvsx-timode are used.
(rs6000_output_move_128bit): Use quad_load_store_p to determine if
we should emit load/store quad.  Remove using %y for quad memory
addresses.

* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
constraints to allow load/store quad on machines where TImode is
not allowed in VSX registers.  Use 'n' instead of 'F' constraint
for TImode to load integer constants.

[gcc/testsuite]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/58673
* gcc.target/powerpc/pr58673-1.c: New file to test whether
-mquad-word + -mno-vsx-timode causes errors.
* gcc.target/powerpc/pr58673-2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203782 138bc75d-0d04-0410-961f-82ee72b054a4

[gcc]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/58673
* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
restrict TImode addresses to single indirect registers if both
-mquad-memory and -mvsx-timode are used.
(rs6000_output_move_128bit): Use quad_load_store_p to determine if
we should emit load/store quad.  Remove using %y for quad memory
addresses.

* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
constraints to allow load/store quad on machines where TImode is
not allowed in VSX registers.  Use 'n' instead of 'F' constraint
for TImode to load integer constants.

[gcc/testsuite]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

PR target/58673
* gcc.target/powerpc/pr58673-1.c: New file to test whether
-mquad-word + -mno-vsx-timode causes errors.
* gcc.target/powerpc/pr58673-2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203781 138bc75d-0d04-0410-961f-82ee72b054a4

/cp
2013-10-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/58596
* lambda.c (lambda_expr_this_capture): Handle NSDMIs in the
cp_unevaluated_operand case.

/testsuite
2013-10-17  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/58596
* g++.dg/cpp0x/lambda/lambda-nsdmi5.C: New

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203780 138bc75d-0d04-0410-961f-82ee72b054a4

[gcc/]
2013-10-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_print_operand): Handle 'c'.

[gcc/testsuite/]
2013-10-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/aarch64/c-output-template.c: New testcase.
* gcc.target/aarch64/c-output-template-2.c: Likewise.
* gcc.target/aarch64/c-output-template-3.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203779 138bc75d-0d04-0410-961f-82ee72b054a4

[AArch64] Fix preferred_reload_class for regclass STACK_REG.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203778 138bc75d-0d04-0410-961f-82ee72b054a4

[AArch64] Enable building libatomic on AArch64.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203774 138bc75d-0d04-0410-961f-82ee72b054a4

[AArch64] Enable effective_target_sync_long_long*

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203773 138bc75d-0d04-0410-961f-82ee72b054a4

compiler: Don't warn for unknown type when importing anonymous field.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203772 138bc75d-0d04-0410-961f-82ee72b054a4

2013-10-17  Hristian Kirtchev  <kirtchev@adacore.com>

* sem_prag.adb (Check_Dependency_Clause):
Recognize the scenario where successful clause matching has
depleted the available refinement items and the clause to match
technically refines to null => null.

2013-10-17  Tristan Gingold  <gingold@adacore.com>

* exp_prag.adb (Expand_Pragma_Import_Or_Interface): Specify
External_Name instead of Link_Name for the RTTI declaration.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203769 138bc75d-0d04-0410-961f-82ee72b054a4