platform/upstream/llvm.git
6 years agoFix few g++ 8 warning with non obvious copy object operations
David Carlier [Thu, 9 Aug 2018 18:29:07 +0000 (18:29 +0000)]
Fix few g++ 8 warning with non obvious copy object operations

Reviewers: dblaikie, dexonsmith

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D50296

llvm-svn: 339367

6 years ago[NFC] Remove magic bool param in RAUW
JF Bastien [Thu, 9 Aug 2018 18:28:54 +0000 (18:28 +0000)]
[NFC] Remove magic bool param in RAUW

Use an enum class instead.

llvm-svn: 339366

6 years ago[Hexagon] Map ISD::TRAP to J2_trap0(#0)
Krzysztof Parzyszek [Thu, 9 Aug 2018 18:03:45 +0000 (18:03 +0000)]
[Hexagon] Map ISD::TRAP to J2_trap0(#0)

llvm-svn: 339365

6 years agoSupport RISC-V
Rui Ueyama [Thu, 9 Aug 2018 17:59:56 +0000 (17:59 +0000)]
Support RISC-V

Patch by PkmX.

This patch makes lld recognize RISC-V target and implements basic
relocation for RV32/RV64 (and RVC). This should be necessary for static
linking ELF applications.

The ABI documentation for RISC-V can be found at:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md.
Note that the documentation is far from complete so we had to figure out
some details from bfd.

The patch should be pretty straightforward. Some highlights:

 - A new relocation Expr R_RISCV_PC_INDIRECT is added. This is needed as
   the low part of a PC-relative relocation is linked to the corresponding
   high part (auipc), see:
   https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses

 - LLVM's MC support for RISC-V is very incomplete (we are working on
   this), so tests are given in objectyaml format with the original
   assembly included in the comments. Once we have complete support for
   RISC-V in MC, we can switch to llvm-as/llvm-objdump.

 - We don't support linker relaxation for now as it requires greater
   changes to lld that is beyond the scope of this patch. Once this is
   accepted we can start to work on adding relaxation to lld.

Differential Revision: https://reviews.llvm.org/D39322

llvm-svn: 339364

6 years agoSCEV should forget all loops containing a deleted block.
Alina Sbirlea [Thu, 9 Aug 2018 17:53:26 +0000 (17:53 +0000)]
SCEV should forget all loops containing a deleted block.

Summary:
LoopSimplifyCFG should update ScEv for all loops after a block is deleted.
If the deleted block "Succ" is part of L, then it is part of all parent loops, so forget topmost loop.

Reviewers: greened, mkazantsev, sanjoy

Subscribers: jlebar, javed.absar, uabelho, llvm-commits

Differential Revision: https://reviews.llvm.org/D50422

llvm-svn: 339363

6 years ago[llvm-objcopy] Add --prefix-symbols option
Paul Semel [Thu, 9 Aug 2018 17:49:04 +0000 (17:49 +0000)]
[llvm-objcopy] Add --prefix-symbols option

Differential Revision: https://reviews.llvm.org/D50381

llvm-svn: 339362

6 years ago[InstCombine] add vector tests for fsub+fmul; NFC
Sanjay Patel [Thu, 9 Aug 2018 17:40:27 +0000 (17:40 +0000)]
[InstCombine] add vector tests for fsub+fmul; NFC

llvm-svn: 339361

6 years ago[GlobalOpt] Don't apply fastcc if it would break inalloca invariants
Reid Kleckner [Thu, 9 Aug 2018 17:29:26 +0000 (17:29 +0000)]
[GlobalOpt] Don't apply fastcc if it would break inalloca invariants

The inalloca parameter has to be the only parameter passed in memory.
Changing the convention to fastcc can break that.

At some point we should teach global opt how to optimize ABI attributes
like inalloca and maybe byval. These attributes are mainly used to match
C ABIs. They are harder for LLVM to optimize and they don't always
generate the best code.

Fixes PR38487

llvm-svn: 339360

6 years ago[SelectionDAG] try harder to convert funnel shift to rotate
Sanjay Patel [Thu, 9 Aug 2018 17:26:22 +0000 (17:26 +0000)]
[SelectionDAG] try harder to convert funnel shift to rotate

Similar to rL337966 - if the DAGCombiner's rotate matching was
working as expected, I don't think we'd see any test diffs here.

AArch only goes right, and PPC only goes left.
x86 has both, so no diffs there.

Differential Revision: https://reviews.llvm.org/D50091

llvm-svn: 339359

6 years ago[llvm-objcopy] Add --dump-section
Paul Semel [Thu, 9 Aug 2018 17:05:21 +0000 (17:05 +0000)]
[llvm-objcopy] Add --dump-section

Differential Revision: https://reviews.llvm.org/D49979

llvm-svn: 339358

6 years agoextend folding fsub/fadd to fneg for FMF
Michael Berg [Thu, 9 Aug 2018 17:00:03 +0000 (17:00 +0000)]
extend folding fsub/fadd to fneg for FMF

Summary: This change provides a common optimization path for both Unsafe and FMF driven optimization for this fsub fold adding reassociation, as it the flag that most closely represents the translation

Reviewers: spatel, wristow, arsenm

Reviewed By: spatel

Subscribers: wdng

Differential Revision: https://reviews.llvm.org/D50195

llvm-svn: 339357

6 years ago[ARM] Adjust the feature set for Exynos
Evandro Menezes [Thu, 9 Aug 2018 16:34:38 +0000 (16:34 +0000)]
[ARM] Adjust the feature set for Exynos

Enable `FeatureZCZeroing`, `FeatureHasSlowFPVMLx`, `FeatureExpandMLx`,
`FeatureProfUnpredicate`, `FeatureSlowVDUP32`, `FeatureSlowVGETLNi32`,
`FeatureSplatVFPToNeon`, `FeatureHasRetAddrStack`, `FeatureSlowFPBrcc` for
all Exynos processors.

llvm-svn: 339356

6 years ago[ARM] Replace processor check with feature
Evandro Menezes [Thu, 9 Aug 2018 16:13:24 +0000 (16:13 +0000)]
[ARM] Replace processor check with feature

Add new feature, `FeatureUseWideStrideVFP`, that replaces the need for a
processor check.  Otherwise, NFC.

llvm-svn: 339354

6 years agoAdded missing null checks to fix r339351
Raphael Isemann [Thu, 9 Aug 2018 15:57:43 +0000 (15:57 +0000)]
Added missing null checks to fix r339351

llvm-svn: 339353

6 years ago[MC][PredicateExpander] Extend the grammar to support simple switch and return statem...
Andrea Di Biagio [Thu, 9 Aug 2018 15:32:48 +0000 (15:32 +0000)]
[MC][PredicateExpander] Extend the grammar to support simple switch and return statements.

This patch introduces tablegen class MCStatement.

Currently, an MCStatement can be either a return statement, or a switch
statement.

```
MCStatement:
   MCReturnStatement
   MCOpcodeSwitchStatement
```

A MCReturnStatement expands to a return statement, and the boolean expression
associated with the return statement is described by a MCInstPredicate.

An MCOpcodeSwitchStatement is a switch statement where the condition is a check
on the machine opcode. It allows the definition of multiple checks, as well as a
default case. More details on the grammar implemented by these two new
constructs can be found in the diff for TargetInstrPredicates.td.

This patch makes it easier to read the body of auto-generated TargetInstrInfo
predicates.

In future, I plan to reuse/extend the MCStatement grammar to describe more
complex target hooks. For now, this is just a first step (mostly a minor
cosmetic change to polish the new predicates framework).

Differential Revision: https://reviews.llvm.org/D50457

llvm-svn: 339352

6 years agoAlso display the output and error output of a failed command
Raphael Isemann [Thu, 9 Aug 2018 15:29:32 +0000 (15:29 +0000)]
Also display the output and error output of a failed command

Summary:
Instead of just printing the current "False is not True, ..." message when we
fail to run a certain command, this patch also adds the actual command output or
error output that we received to the assertion message.

Reviewers: davide

Reviewed By: davide

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D50492

llvm-svn: 339351

6 years ago[MC] Remove PhysRegSize from MCRegisterClass
Bjorn Pettersson [Thu, 9 Aug 2018 15:19:07 +0000 (15:19 +0000)]
[MC] Remove PhysRegSize from MCRegisterClass

Summary:
The interface to get size and spill size of a register
was moved from MCRegisterInfo to TargetRegisterInfo over
a year ago. Afaik the old interface has bee around
to give out-of-tree targets a chance to adapt to the
new interface.

One problem with the old MCRegisterClass::PhysRegSize was that
it represented the size of a register as "size in bits" / 8.
So a register had to be a multiple of eight bits wide for the
size to be correct (and the byte size for the target needed to
be eight bits).

Reviewers: kparzysz, qcolombet

Reviewed By: kparzysz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47199

llvm-svn: 339350

6 years ago[InstCombine] reduce code duplication; NFC
Sanjay Patel [Thu, 9 Aug 2018 15:07:13 +0000 (15:07 +0000)]
[InstCombine] reduce code duplication; NFC

llvm-svn: 339349

6 years ago[LLD][ELF] - Add a test for elf::getPriority(StringRef S)
George Rimar [Thu, 9 Aug 2018 15:05:25 +0000 (15:05 +0000)]
[LLD][ELF] - Add a test for elf::getPriority(StringRef S)

It covers the following line with a test:
https://github.com/llvm-mirror/lld/blob/master/ELF/OutputSections.cpp#L383

llvm-svn: 339348

6 years ago[AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests
Sjoerd Meijer [Thu, 9 Aug 2018 14:07:27 +0000 (14:07 +0000)]
[AArch64][NFC] better matching of AArch64 target in aarch64-cpus.c tests

Differential Revision: https://reviews.llvm.org/D50175

llvm-svn: 339347

6 years ago[TargetLowering] Add BuildSDIVPattern helper to BuildExactSDIV (NFCI).
Simon Pilgrim [Thu, 9 Aug 2018 13:56:04 +0000 (13:56 +0000)]
[TargetLowering] Add BuildSDIVPattern helper to BuildExactSDIV (NFCI).

As requested in D50392, pull the magic constant calculations out into a helper function.

llvm-svn: 339346

6 years ago[COFF] Make the relocation scanning for CFG more discriminating
Hans Wennborg [Thu, 9 Aug 2018 13:43:22 +0000 (13:43 +0000)]
[COFF] Make the relocation scanning for CFG more discriminating

link.exe ignores REL32 relocations on 32-bit x86, as well as relocations
against non-function symbols such as labels. This makes lld do the same.

Differential Revision: https://reviews.llvm.org/D50430

llvm-svn: 339345

6 years agoImplement diagnostic stream operator for ParsedAttr.
Erich Keane [Thu, 9 Aug 2018 13:21:32 +0000 (13:21 +0000)]
Implement diagnostic stream operator for ParsedAttr.

As a part of attempting to clean up the way attributes are
printed, this patch adds an operator << to the diagnostics/
partialdiagnostics so that ParsedAttr can be sent directly.

This patch also rewrites a large amount* of the times when
ParsedAttr was printed using its IdentifierInfo object instead
of being printed itself.
*"a large amount" == "All I could find".

llvm-svn: 339344

6 years agoDarwin: mark test unsupported while we sort out how to make it generic.
Tim Northover [Thu, 9 Aug 2018 13:21:05 +0000 (13:21 +0000)]
Darwin: mark test unsupported while we sort out how to make it generic.

This test relies on communicating with debugserver via an unnamed (pre-opened)
pipe, but macOS's version of debugserver doesn't seem to support that mode of
operation. So disable the test for now.

llvm-svn: 339343

6 years ago[LLD][ELF] - Add a test for ScriptParser::readPhdrType().
George Rimar [Thu, 9 Aug 2018 13:19:10 +0000 (13:19 +0000)]
[LLD][ELF] - Add a test for ScriptParser::readPhdrType().

This adds a test for https://github.com/llvm-mirror/lld/blob/master/ELF/ScriptParser.cpp#L1289.

llvm-svn: 339342

6 years ago[ARM] FP16: codegen support for VTRN
Sjoerd Meijer [Thu, 9 Aug 2018 12:45:09 +0000 (12:45 +0000)]
[ARM] FP16: codegen support for VTRN

Differential Revision: https://reviews.llvm.org/D50454

llvm-svn: 339340

6 years ago[X86][SSE] Remove PMULDQ/PMULUDQ by zero
Simon Pilgrim [Thu, 9 Aug 2018 12:37:36 +0000 (12:37 +0000)]
[X86][SSE] Remove PMULDQ/PMULUDQ by zero

Exposed by D50328

Differential Revision: https://reviews.llvm.org/D50328

llvm-svn: 339337

6 years agoFix structural inequivalency of forward EnumDecl
Gabor Marton [Thu, 9 Aug 2018 12:36:25 +0000 (12:36 +0000)]
Fix structural inequivalency of forward EnumDecl

Summary:
Currently we consider one forward declared RecordDecl and another with a
definition equal. We have to do the same in case of enums.

Reviewers: a_sidorin, r.stahl, xazax.hun

Subscribers: rnkovacs, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D50444

llvm-svn: 339336

6 years ago[X86][SSE] Combine (some) target shuffles with multiple uses
Simon Pilgrim [Thu, 9 Aug 2018 12:30:02 +0000 (12:30 +0000)]
[X86][SSE] Combine (some) target shuffles with multiple uses

As discussed on D41794, we have many cases where we fail to combine shuffles as the input operands have other uses.

This patch permits these shuffles to be combined as long as they don't introduce additional variable shuffle masks, which should reduce instruction dependencies and allow the total number of shuffles to still drop without increasing the constant pool.

However, this may mean that some memory folds may no longer occur, and on pre-AVX require the occasional extra register move.

This also exposes some poor PMULDQ/PMULUDQ codegen which was doing unnecessary upper/lower calculations which will in fact fold to zero/undef - the fix will be added in a followup commit.

Differential Revision: https://reviews.llvm.org/D50328

llvm-svn: 339335

6 years agoAdd support for importing imaginary literals
Gabor Marton [Thu, 9 Aug 2018 12:18:07 +0000 (12:18 +0000)]
Add support for importing imaginary literals

Reviewers: a_sidorin, r.stahl, xazax.hun

Subscribers: rnkovacs, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D50428

llvm-svn: 339334

6 years ago[LLD][ELF] - Add a test for ScriptParser::readOutputSectionDescription.
George Rimar [Thu, 9 Aug 2018 12:14:00 +0000 (12:14 +0000)]
[LLD][ELF] - Add a test for ScriptParser::readOutputSectionDescription.

This covers the following line:
https://github.com/llvm-mirror/lld/blob/master/ELF/ScriptParser.cpp#L415

llvm-svn: 339333

6 years agoAdd R_HEX_6_X relocation support
Sid Manning [Thu, 9 Aug 2018 12:00:10 +0000 (12:00 +0000)]
Add R_HEX_6_X relocation support

This is a larger patch.  This relocation has irregular immediate
masks that require a lookup to find the correct mask.

Differential Revision: https://reviews.llvm.org/D50450

llvm-svn: 339332

6 years agovs integration: bump version number
Hans Wennborg [Thu, 9 Aug 2018 11:57:36 +0000 (11:57 +0000)]
vs integration: bump version number

llvm-svn: 339330

6 years agovs integration: update the manifest to require VS 2017
Hans Wennborg [Thu, 9 Aug 2018 11:52:48 +0000 (11:52 +0000)]
vs integration: update the manifest to require VS 2017

It previously erroneously said only VS2015 was required.

llvm-svn: 339329

6 years agoRemove unused type Either from Utility library.
Tatyana Krasnukha [Thu, 9 Aug 2018 11:42:28 +0000 (11:42 +0000)]
Remove unused type Either from Utility library.

llvm-svn: 339328

6 years ago[LLD][ELF] - Add a test for ScriptParser::readPhdrs(). NFCI.
George Rimar [Thu, 9 Aug 2018 11:13:30 +0000 (11:13 +0000)]
[LLD][ELF] - Add a test for ScriptParser::readPhdrs(). NFCI.

This covers the following line with a test:
https://github.com/llvm-mirror/lld/blob/master/ELF/ScriptParser.cpp#L415

llvm-svn: 339327

6 years ago[LLD][ELF] - Add a test case for parsing -defsym.
George Rimar [Thu, 9 Aug 2018 10:40:11 +0000 (10:40 +0000)]
[LLD][ELF] - Add a test case for parsing -defsym.

This adds a coverage for the following line of the code:
https://github.com/llvm-mirror/lld/blob/master/ELF/ScriptParser.cpp#L274

llvm-svn: 339326

6 years ago[clangd] Try to fix buildbot after r339320.
Eric Liu [Thu, 9 Aug 2018 09:25:26 +0000 (09:25 +0000)]
[clangd] Try to fix buildbot after r339320.

http://lab.llvm.org:8011/builders/clang-cmake-armv8-quick/builds/5487

llvm-svn: 339322

6 years ago[X86] Improved sched models for X86 XCHG*rr and XADD*rr instructions.
Andrew V. Tischenko [Thu, 9 Aug 2018 09:23:26 +0000 (09:23 +0000)]
[X86] Improved sched models for X86 XCHG*rr and XADD*rr instructions.
Differential Revision: https://reviews.llvm.org/D49861

llvm-svn: 339321

6 years ago[clangd] Record the file being processed in a TUScheduler thread in context.
Eric Liu [Thu, 9 Aug 2018 09:05:45 +0000 (09:05 +0000)]
[clangd] Record the file being processed in a TUScheduler thread in context.

Summary:
This allows implementations like different symbol indexes to know what
the current active file is. For example, some customized index implementation
might decide to only return results for some files.

Reviewers: ilya-biryukov

Reviewed By: ilya-biryukov

Subscribers: javed.absar, MaskRay, jkorous, arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D50446

llvm-svn: 339320

6 years agocmake: don't pack system libs unless CMAKE_INSTALL_UCRT_LIBRARIES is set (PR38476)
Hans Wennborg [Thu, 9 Aug 2018 08:41:03 +0000 (08:41 +0000)]
cmake: don't pack system libs unless CMAKE_INSTALL_UCRT_LIBRARIES is set (PR38476)

llvm-svn: 339319

6 years agoEnable getentropy for FreeBSD 12
David Carlier [Thu, 9 Aug 2018 08:11:48 +0000 (08:11 +0000)]
Enable getentropy for FreeBSD 12

As for Linux with its getrandom's syscall, giving the possibility to fill buffer with native call for good quality but falling back to /dev/urandom in worst case similarly.

Reviewers: vitalybuka, krytarowski

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D48804

llvm-svn: 339318

6 years agoCorrectly initialise global blocks on Windows.
David Chisnall [Thu, 9 Aug 2018 08:02:42 +0000 (08:02 +0000)]
Correctly initialise global blocks on Windows.

Summary:
Windows does not allow globals to be initialised to point to globals in
another DLL.  Exported globals may be referenced only from code.  Work
around this by creating an initialiser that runs in early library
initialisation and sets the isa pointer.

Reviewers: rjmccall

Reviewed By: rjmccall

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D50436

llvm-svn: 339317

6 years ago[NVPTX] Select atomic loads and stores
Jonas Hahnfeld [Thu, 9 Aug 2018 07:45:49 +0000 (07:45 +0000)]
[NVPTX] Select atomic loads and stores

According to PTX ISA .volatile has the same memory synchronization
semantics as .relaxed.sys, so it can be used to implement monotonic
atomic loads and stores. This is important for OpenMP's atomic
construct where
 - 'read's and 'write's are lowered to atomic loads and stores, and
 - an update of float or double types are lowered into a cmpxchg loop.
(Note that PTX could do better because it has atom.add.f{32,64} but
LLVM's atomicrmw instruction only allows integer types.)

Higher levels of atomicity (like acquire and release) need additional
synchronization properties which were added with PTX ISA 6.0 / sm_70.
So using these instructions still results in an error.

Differential Revision: https://reviews.llvm.org/D50391

llvm-svn: 339316

6 years ago[RISCV] Add "lla" pseudo-instruction to assembler
Roger Ferrer Ibanez [Thu, 9 Aug 2018 07:08:20 +0000 (07:08 +0000)]
[RISCV] Add "lla" pseudo-instruction to assembler

This pseudo-instruction is similar to la but uses PC-relative addressing
unconditionally. This is, la is only different to lla when using -fPIC. This
pseudo-instruction seems often forgotten in several specs but it is definitely
mentioned in binutils opcodes/riscv-opc.c. The semantics are defined both in
page 37 of the "RISC-V Reader" book but also in function macro found in
gas/config/tc-riscv.c.

This is a very first step towards adding PIC support for Linux in the RISC-V
backend.

The lla pseudo-instruction expands to a sequence of auipc + addi with a couple
of pc-rel relocations where the second points to the first one. This is
described in
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses

For now, this patch only introduces support of that pseudo instruction at the
assembler parser.

Differential Revision: https://reviews.llvm.org/D49661

llvm-svn: 339314

6 years agoUpdate isl-cpp bindings
Tobias Grosser [Thu, 9 Aug 2018 05:07:14 +0000 (05:07 +0000)]
Update isl-cpp bindings

We upstreamed the export of isl_val_2exp, to the official cpp bindings.
In this process, we concluded that pow2 is a better and more widely used
name for this functionality. Hence, both the official isl-cpp bindings
and our derived variant use now the term pow2.

llvm-svn: 339312

6 years agoUpdate to isl-0.20-65-gb822a210
Tobias Grosser [Thu, 9 Aug 2018 05:07:05 +0000 (05:07 +0000)]
Update to isl-0.20-65-gb822a210

This update fixes https://https:/llvm.org/PR38348. Thanks Michael for
reporting the issue to isl and Sven for fixing the issue.

llvm-svn: 339311

6 years ago[LICM] Add tests for future hoisting of fence instructions [NFC]
Philip Reames [Thu, 9 Aug 2018 04:21:02 +0000 (04:21 +0000)]
[LICM] Add tests for future hoisting of fence instructions [NFC]

The main interesting case is a fence in an otherwise dead loop or one containing only arithmetic.  This can happen as a result of DSE or other transforms from seemingly reasonable initial IR.

llvm-svn: 339310

6 years ago[NFC] ConstantMerge: don't insert when find should be used
JF Bastien [Thu, 9 Aug 2018 04:17:48 +0000 (04:17 +0000)]
[NFC] ConstantMerge: don't insert when find should be used

Summary: DenseMap's operator[] performs an insertion if the entry isn't found. The second phase of ConstantMerge isn't trying to insert anything: it's just looking to see if the first phased performed an insertion. Use find instead, avoiding insertion of every single global initializer in the map of constants. This has the side-effect of making all entries in CMap non-null (because only global declarations would have null initializers, and that would be a bug).

Subscribers: dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D50476

llvm-svn: 339309

6 years ago[LICM] Add an assert to ensure all instruction types needing aliasing are handled...
Philip Reames [Thu, 9 Aug 2018 03:44:28 +0000 (03:44 +0000)]
[LICM] Add an assert to ensure all instruction types needing aliasing are handled [NFC]

llvm-svn: 339308

6 years ago[CMake] Use normalized Windows target triples
Petr Hosek [Thu, 9 Aug 2018 02:16:18 +0000 (02:16 +0000)]
[CMake] Use normalized Windows target triples

Changes the default Windows target triple returned by
GetHostTriple.cmake from the old environment names (which we wanted to
move away from) to newer, normalized ones. This also requires updating
all tests to use the new systems names in constraints.

Differential Revision: https://reviews.llvm.org/D47381

llvm-svn: 339307

6 years agoRefactor attribute printing to be a bit more obviously-correct.
Richard Smith [Thu, 9 Aug 2018 01:21:06 +0000 (01:21 +0000)]
Refactor attribute printing to be a bit more obviously-correct.

No functionality change intended.

llvm-svn: 339306

6 years agoAdded another optimization pass to make vectorizing possible
Emmett Neyman [Thu, 9 Aug 2018 00:58:23 +0000 (00:58 +0000)]
Added another optimization pass to make vectorizing possible

Summary: I noticed that my code wasn't going deep into the loop vectorizer code so added another pass that makes it go further.

Reviewers: morehouse, kcc

Reviewed By: morehouse

Subscribers: cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D50482

llvm-svn: 339305

6 years agoDelete some unreachable AST printing code.
Richard Smith [Thu, 9 Aug 2018 00:44:49 +0000 (00:44 +0000)]
Delete some unreachable AST printing code.

llvm-svn: 339304

6 years ago[libFuzzer] Increase the iteration limit in shrink.test
George Karpenkov [Thu, 9 Aug 2018 00:41:22 +0000 (00:41 +0000)]
[libFuzzer] Increase the iteration limit in shrink.test

After https://reviews.llvm.org/D48800, shrink.test started failing on
x86_64h architecture.
Looking into this, the optimization pass is too eager to unroll the loop
on x86_64h, possibly leading to worse coverage data.

Alternative solutions include not unrolling the loop when fuzzing, or
disabling this test on that architecture.

Differential Revision: https://reviews.llvm.org/D50484

llvm-svn: 339303

6 years ago[DWARF] Verifier now handles .debug_types sections.
Paul Robinson [Wed, 8 Aug 2018 23:50:22 +0000 (23:50 +0000)]
[DWARF] Verifier now handles .debug_types sections.

Differential Revision: https://reviews.llvm.org/D50466

llvm-svn: 339302

6 years agoELF: Only add libcall symbols to the link if defined in bitcode.
Peter Collingbourne [Wed, 8 Aug 2018 23:48:12 +0000 (23:48 +0000)]
ELF: Only add libcall symbols to the link if defined in bitcode.

Adding all libcall symbols to the link can have undesired consequences.
For example, the libgcc implementation of __sync_val_compare_and_swap_8
on 32-bit ARM pulls in an .init_array entry that aborts the program if
the Linux kernel does not support 64-bit atomics, which would prevent
the program from running even if it does not use 64-bit atomics.

This change makes it so that we only add libcall symbols to the
link before LTO if we have to, i.e. if the symbol's definition is in
bitcode. Any other required libcall symbols will be added to the link
after LTO when we add the LTO object file to the link.

Differential Revision: https://reviews.llvm.org/D50475

llvm-svn: 339301

6 years ago[x86] add test for commuted variant for fsub fold; NFC
Sanjay Patel [Wed, 8 Aug 2018 23:06:59 +0000 (23:06 +0000)]
[x86] add test for commuted variant for fsub fold; NFC

llvm-svn: 339300

6 years ago[DAGCombiner] loosen constraints for fsub+fadd fold
Sanjay Patel [Wed, 8 Aug 2018 23:04:43 +0000 (23:04 +0000)]
[DAGCombiner] loosen constraints for fsub+fadd fold

isNegatibleForFree() should not matter here (as the test diffs show)
because it's always a win to replace an fsub+fadd with fneg. The
problem in D50195 persists because either (1) we are doing these
folds in the wrong order or (2) we're missing another fold for fadd.

llvm-svn: 339299

6 years ago[DAGCombiner] move fadd simplification ahead of other folds
Sanjay Patel [Wed, 8 Aug 2018 22:46:30 +0000 (22:46 +0000)]
[DAGCombiner] move fadd simplification ahead of other folds

I don't know if it's possible to expose this diff in a test,
but we should always try simplifications (no new nodes created)
before more complicated transforms for efficiency (similar to
what we do in IR).

llvm-svn: 339298

6 years ago[Demangle] Add another test for ItaniumPartialDemangler
Stefan Granitz [Wed, 8 Aug 2018 22:38:23 +0000 (22:38 +0000)]
[Demangle] Add another test for ItaniumPartialDemangler

Summary: Show the behavior of print operations in the ItaniumPartialDemangler. It's a summary of what the current integration in LLDB assumes. For new users this may be a useful example.

Reviewers: erik.pilkington

Subscribers: llvm-commits, lldb-commits

Differential Revision: https://reviews.llvm.org/D50473

llvm-svn: 339297

6 years ago[VFS] Remove superfluous semicolon from unittest.
Craig Topper [Wed, 8 Aug 2018 22:31:14 +0000 (22:31 +0000)]
[VFS] Remove superfluous semicolon from unittest.

llvm-svn: 339296

6 years ago[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuiltinCallExpr
Craig Topper [Wed, 8 Aug 2018 22:31:12 +0000 (22:31 +0000)]
[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuiltinCallExpr

This addresses a FIXME that has existed since before clang supported the builtin.

This time with only reviewed changes.

Differential Revision: https://reviews.llvm.org/D50471

llvm-svn: 339295

6 years ago[ADT] Normalize empty triple components
Petr Hosek [Wed, 8 Aug 2018 22:23:57 +0000 (22:23 +0000)]
[ADT] Normalize empty triple components

LLVM triple normalization is handling "unknown" and empty components
differently; for example given "x86_64-unknown-linux-gnu" and
"x86_64-linux-gnu" which should be equivalent, triple normalization
returns "x86_64-unknown-linux-gnu" and "x86_64--linux-gnu". autoconf's
config.sub returns "x86_64-unknown-linux-gnu" for both
"x86_64-linux-gnu" and "x86_64-unknown-linux-gnu". This changes the
triple normalization to behave the same way, replacing empty triple
components with "unknown".

This addresses PR37129.

Differential Revision: https://reviews.llvm.org/D50219

llvm-svn: 339294

6 years ago[x86] add tests for fsub+fadd with FMF; NFC
Sanjay Patel [Wed, 8 Aug 2018 22:18:16 +0000 (22:18 +0000)]
[x86] add tests for fsub+fadd with FMF; NFC

These are related to the block of code under review in D50195.

llvm-svn: 339293

6 years agoAdd ConstString test FromMidOfBufferStringRef
Stefan Granitz [Wed, 8 Aug 2018 21:57:42 +0000 (21:57 +0000)]
Add ConstString test FromMidOfBufferStringRef

Summary: It was not immediately clear to me whether or not non-null-terminated StringRef's are supported in ConstString and/or the counterpart mechanism. From this test it seems to be fine. Maybe useful to keep?

Reviewers: labath

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D50334

llvm-svn: 339292

6 years agoUse rich mangling information in Symtab::InitNameIndexes()
Stefan Granitz [Wed, 8 Aug 2018 21:57:37 +0000 (21:57 +0000)]
Use rich mangling information in Symtab::InitNameIndexes()

Summary:
I set up a new review, because not all the code I touched was marked as a change in old one anymore.

In preparation for this review, there were two earlier ones:
* https://reviews.llvm.org/D49612 introduced the ItaniumPartialDemangler to LLDB demangling without conceptual changes
* https://reviews.llvm.org/D49909 added a unit test that covers all relevant code paths in the InitNameIndexes() function

Primary goals for this patch are:
(1) Use ItaniumPartialDemangler's rich mangling info for building LLDB's name index.
(2) Provide a uniform interface.
(3) Improve indexing performance.

The central implementation in this patch is our new function for explicit demangling:
```
const RichManglingInfo *
Mangled::DemangleWithRichManglingInfo(RichManglingContext &, SkipMangledNameFn *)
```

It takes a context object and a filter function and provides read-only access to the rich mangling info on success, or otherwise returns null. The two new classes are:
* `RichManglingInfo` offers a uniform interface to query symbol properties like `getFunctionDeclContextName()` or `isCtorOrDtor()` that are forwarded to the respective provider internally (`llvm::ItaniumPartialDemangler` or `lldb_private::CPlusPlusLanguage::MethodName`).
* `RichManglingContext` works a bit like `LLVMContext`, it the actual `RichManglingInfo` returned from `DemangleWithRichManglingInfo()` and handles lifetime and configuration. It is likely stack-allocated and can be reused for multiple queries during batch processing.

The idea here is that `DemangleWithRichManglingInfo()` acts like a gate keeper. It only provides access to `RichManglingInfo` on success, which in turn avoids the need to handle a `NoInfo` state in every single one of its getters. Having it stored within the context, avoids extra heap allocations and aids (3). As instantiations of the IPD the are considered expensive, the context is the ideal place to store it too. An efficient filtering function `SkipMangledNameFn` is another piece in the performance puzzle and it helps to mimic the original behavior of `InitNameIndexes`.

Future potential:
* `DemangleWithRichManglingInfo()` is thread-safe, IFF using different contexts in different threads. This may be exploited in the future. (It's another thing that it has in common with `LLVMContext`.)
* The old implementation only parsed and indexed Itanium mangled names. The new `RichManglingInfo` can be extended for various mangling schemes and languages.

One problem with the implementation of RichManglingInfo is the inaccessibility of class `CPlusPlusLanguage::MethodName` (defined in source/Plugins/Language/..), from within any header in the Core components of LLDB. The rather hacky solution is to store a type erased reference and cast it to the correct type on access in the cpp - see `RichManglingInfo::get<ParserT>()`. At the moment there seems to be no better way to do it. IMHO `CPlusPlusLanguage::MethodName` should be a top-level class in order to enable forward delcarations (but that is a rather big change I guess).

First simple profiling shows a good speedup. `target create clang` now takes 0.64s on average. Before the change I observed runtimes between 0.76s an 1.01s. This is still no bulletproof data (I only ran it on one machine!), but it's a promising indicator I think.

Reviewers: labath, jingham, JDevlieghere, erik.pilkington

Subscribers: zturner, clayborg, mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D50071

llvm-svn: 339291

6 years ago[IRMemoryMap] Shrink Allocation and make it move-only (NFC)
Vedant Kumar [Wed, 8 Aug 2018 21:26:49 +0000 (21:26 +0000)]
[IRMemoryMap] Shrink Allocation and make it move-only (NFC)

Profiling data show that Allocation::operator= is hot (see the data
attached to the Phab review).

Reorder a few fields within Allocation to avoid implicit structure
padding and shrink the structure. This should make copies a bit cheaper.

Also, given that an Allocation contains a std::vector (by way of
DataBufferHeap), it's preferable to make it move-only instead of
permitting expensive copies. As an added benefit this allows us to have
a single Allocation constructor instead of two.

Differential Revision: https://reviews.llvm.org/D50271

llvm-svn: 339290

6 years agoRevert r339287 "[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuil...
Craig Topper [Wed, 8 Aug 2018 21:21:21 +0000 (21:21 +0000)]
Revert r339287 "[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuiltinCallExpr"

This add an additional unintended change in it.

llvm-svn: 339289

6 years ago[DWARF] Unclamp line table version on Darwin for v5 and later.
Jonas Devlieghere [Wed, 8 Aug 2018 21:16:50 +0000 (21:16 +0000)]
[DWARF] Unclamp line table version on Darwin for v5 and later.

On Darwin we pin the DWARF line tables to version 2. Stop doing so for
DWARF v5 and later.

Differential revision: https://reviews.llvm.org/D49381

llvm-svn: 339288

6 years ago[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuiltinCallExpr
Craig Topper [Wed, 8 Aug 2018 20:59:40 +0000 (20:59 +0000)]
[Builtins] Add __builtin_clrsb support to IntExprEvaluator::VisitBuiltinCallExpr

This addresses a FIXME that has existed since before clang supported the builtin.

Differential Revision: https://reviews.llvm.org/D50471

llvm-svn: 339287

6 years ago[cmake] Append LLVM_VERSION_SUFFIX to SOVERSION
Michal Gorny [Wed, 8 Aug 2018 20:45:03 +0000 (20:45 +0000)]
[cmake] Append LLVM_VERSION_SUFFIX to SOVERSION

Append LLVM_VERSION_SUFFIX to SOVERSION. This makes it possible
to use the suffix to differentiate binary-incompatible versions
of LLVM built via BUILD_SHARED_LIBS.

We are planning to use this to temporarily preserve ABI-incompatible
variants of LLVM while switching the system between them, e.g. when
rebuilding the system to use libc++. Normally this would mean that once
LLVM is rebuilt using libc++ all the reverse dependencies become
immediately broken. Using a distinct SOVERSION allows us to preserve
the ABI compatibility before all the packages are rebuilt.

Differential Revision: https://reviews.llvm.org/D39939

llvm-svn: 339286

6 years agocmake: Store LLVM_VERSION_SUFFIX in LLVMConfig.cmake
Michal Gorny [Wed, 8 Aug 2018 20:44:58 +0000 (20:44 +0000)]
cmake: Store LLVM_VERSION_SUFFIX in LLVMConfig.cmake

Store LLVM_VERSION_SUFFIX along with other version components
in LLVMConfig.cmake. This fixes preserving the suffix set while building
LLVM to stand-alone builds of other components, e.g. clang,
and therefore improves uniformity between the two build models.

Given that there is no apparent reason to omit this part of version,
that it is distributed to subprojects when building as part of LLVM
and that it is included in LLVM_PACKAGE_VERSION, I think it was omitted
accidentally rather than done on purpose.

Differential Revision: https://reviews.llvm.org/D43701

llvm-svn: 339285

6 years ago[Headers] Define *_HAS_SUBNORM for FLT, DBL, LDBL
Pirama Arumuga Nainar [Wed, 8 Aug 2018 20:38:38 +0000 (20:38 +0000)]
[Headers] Define *_HAS_SUBNORM for FLT, DBL, LDBL

Summary:
These macros are defined in the C11 standard and can be defined based on
the __*_HAS_DENORM__ default macros.

Reviewers: bruno, rsmith, doug.gregor

Subscribers: llvm-commits, enh, srhines

Differential Revision: https://reviews.llvm.org/D37302

llvm-svn: 339284

6 years ago[ARM] Avoid spilling lr with Thumb1 tail calls.
Eli Friedman [Wed, 8 Aug 2018 20:03:10 +0000 (20:03 +0000)]
[ARM] Avoid spilling lr with Thumb1 tail calls.

Normally, if any registers are spilled, we prefer to spill lr on Thumb1
so we can fold the "bx lr" into the "pop".  However, if there are tail
calls involved, restoring lr is expensive, so skip the optimization in
that case.

The spill of r7 in the new test also isn't necessary, but that's
mostly orthogonal to this patch. (It's the same code in
ARMFrameLowering, but it's not related to tail calls.)

Differential Revision: https://reviews.llvm.org/D49459

llvm-svn: 339283

6 years ago[Builtins] Implement __builtin_clrsb to be compatible with gcc
Craig Topper [Wed, 8 Aug 2018 19:55:52 +0000 (19:55 +0000)]
[Builtins] Implement __builtin_clrsb to be compatible with gcc

gcc defines an intrinsic called __builtin_clrsb which counts the number of extra sign bits on a number. This is equivalent to counting the number of leading zeros on a positive number or the number of leading ones on a negative number and subtracting one from the result. Since we can't count leading ones we need to invert negative numbers to count zeros.

This patch will cause the builtin to be expanded inline while gcc uses a call to a function like clrsbdi2 that is implemented in libgcc. But this is similar to what we already do for popcnt. And I don't think compiler-rt supports clrsbdi2.

Differential Revision: https://reviews.llvm.org/D50168

llvm-svn: 339282

6 years ago[CodeGen][Timers] Enable llvm::TimePassesIsEnabled when -ftime-report is specified
Craig Topper [Wed, 8 Aug 2018 19:14:23 +0000 (19:14 +0000)]
[CodeGen][Timers] Enable llvm::TimePassesIsEnabled when -ftime-report is specified

r330571 added a new FrontendTimesIsEnabled variable and replaced many usages of llvm::TimePassesIsEnabled. Including the place that set llvm::TimePassesIsEnabled for -ftime-report. The effect of this is that -ftime-report now only contains the timers specifically referenced in CodeGenAction.cpp and none of the timers in the backend.

This commit adds back the assignment, but otherwise leaves everything else unchanged.

llvm-svn: 339281

6 years agoFix missing C++ mode comment in header
Matt Arsenault [Wed, 8 Aug 2018 18:40:43 +0000 (18:40 +0000)]
Fix missing C++ mode comment in header

llvm-svn: 339280

6 years ago[WebAssembly] Group rodata into a single output segment
Sam Clegg [Wed, 8 Aug 2018 18:02:55 +0000 (18:02 +0000)]
[WebAssembly] Group rodata into a single output segment

Differential Revision: https://reviews.llvm.org/D50424

llvm-svn: 339279

6 years agoAMDGPU: Fix enabling denormals by default on pre-VI targets
Matt Arsenault [Wed, 8 Aug 2018 17:48:37 +0000 (17:48 +0000)]
AMDGPU: Fix enabling denormals by default on pre-VI targets

Fast FMAF is not a sufficient condition to enable denormals.
Before VI, enabling denormals caused F32 instructions to
run at F64 speeds.

llvm-svn: 339278

6 years ago[macOS] stop generating the libclang_rt.10.4.a library for macOS 10.4
Alex Lorenz [Wed, 8 Aug 2018 17:29:55 +0000 (17:29 +0000)]
[macOS] stop generating the libclang_rt.10.4.a library for macOS 10.4

The support for macOS 10.4 has been dropped by Xcode 10.

rdar://42876880

llvm-svn: 339277

6 years agorevert tests of '[CodeGen] emit inline asm clobber list warnings for reserved'
Ties Stuij [Wed, 8 Aug 2018 17:19:32 +0000 (17:19 +0000)]
revert tests of '[CodeGen] emit inline asm clobber list warnings for reserved'

llvm-svn: 339276

6 years ago[MS Demangler] Create a new backref context for template instantiations.
Zachary Turner [Wed, 8 Aug 2018 17:17:04 +0000 (17:17 +0000)]
[MS Demangler] Create a new backref context for template instantiations.

Template manglings use a fresh back-referencing context, so we
need to do the same.  This fixes several existing tests which are
marked as FIXME, so those are now actually run.

llvm-svn: 339275

6 years agorevert '[CodeGen] emit inline asm clobber list warnings for reserved'
Ties Stuij [Wed, 8 Aug 2018 17:11:54 +0000 (17:11 +0000)]
revert '[CodeGen] emit inline asm clobber list warnings for reserved'

llvm-svn: 339274

6 years agoCDDecl More automatic variable tail padding test
JF Bastien [Wed, 8 Aug 2018 17:05:17 +0000 (17:05 +0000)]
CDDecl More automatic variable tail padding test

Test tail padded automatic variable at different width, because they encounter different codegen.

llvm-svn: 339273

6 years ago[Hexagon] Diagnose misaligned absolute loads and stores
Krzysztof Parzyszek [Wed, 8 Aug 2018 17:00:09 +0000 (17:00 +0000)]
[Hexagon] Diagnose misaligned absolute loads and stores

Differential Revision: https://reviews.llvm.org/D50405

llvm-svn: 339272

6 years agoAMDGPU: Error more gracefully on libcalls
Matt Arsenault [Wed, 8 Aug 2018 16:58:39 +0000 (16:58 +0000)]
AMDGPU: Error more gracefully on libcalls

I think this is the only situation where the callsite
will have a null instruction.

llvm-svn: 339271

6 years agoAMDGPU: Fix shifts for i128
Matt Arsenault [Wed, 8 Aug 2018 16:58:33 +0000 (16:58 +0000)]
AMDGPU: Fix shifts for i128

llvm-svn: 339270

6 years ago[WASM] Fix overflow when reading custom section
Jonas Devlieghere [Wed, 8 Aug 2018 16:34:03 +0000 (16:34 +0000)]
[WASM] Fix overflow when reading custom section

When reading a custom WASM section, it was possible that its name
extended beyond the size of the section. This resulted in a bogus value
for the section size due to the size overflowing.

Fixes heap buffer overflow detected by OSS-fuzz:
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=8190

Differential revision: https://reviews.llvm.org/D50387

llvm-svn: 339269

6 years ago[DebugInfo] Fine tune emitting flags as part of the producer
Jonas Devlieghere [Wed, 8 Aug 2018 16:33:22 +0000 (16:33 +0000)]
[DebugInfo] Fine tune emitting flags as part of the producer

When using APPLE extensions, don't duplicate the compiler invocation's
flags both in AT_producer and AT_APPLE_flags.

Differential revision: https://reviews.llvm.org/D50453

llvm-svn: 339268

6 years ago[InstCombine] fold fadd+fsub with common operand
Sanjay Patel [Wed, 8 Aug 2018 16:19:22 +0000 (16:19 +0000)]
[InstCombine] fold fadd+fsub with common operand

This is a sibling to the simplify from:
https://reviews.llvm.org/rL339174

llvm-svn: 339267

6 years ago[InstCombine] fold fsub+fsub with common operand
Sanjay Patel [Wed, 8 Aug 2018 16:04:48 +0000 (16:04 +0000)]
[InstCombine] fold fsub+fsub with common operand

This is a sibling to the simplify from:
rL339171

llvm-svn: 339266

6 years ago[DebugInfo][OpenCL] Address post-commit review for r338299
Scott Linder [Wed, 8 Aug 2018 15:56:12 +0000 (15:56 +0000)]
[DebugInfo][OpenCL] Address post-commit review for r338299

NFC refactor of code to generate debug info for OpenCL 2.X blocks.

Differential Revision: https://reviews.llvm.org/D50099

llvm-svn: 339265

6 years ago[CGObjCGNU] Rename GetSelector helper method to fix -Woverloaded-virtual warning...
Simon Pilgrim [Wed, 8 Aug 2018 15:53:14 +0000 (15:53 +0000)]
[CGObjCGNU] Rename GetSelector helper method to fix -Woverloaded-virtual warning (PR38210)

As suggested by @theraven on PR38210, this patch fixes the gcc -Woverloaded-virtual warnings by renaming the extra CGObjCGNU::GetSelector method to CGObjCGNU::GetTypedSelector

Differential Revision: https://reviews.llvm.org/D50448

llvm-svn: 339264

6 years ago[InstCombine] add tests for fsub folds; NFC
Sanjay Patel [Wed, 8 Aug 2018 15:44:56 +0000 (15:44 +0000)]
[InstCombine] add tests for fsub folds; NFC

The scalar cases are handled in instcombine's internal
reassociation pass for FP ops, but it misses the vector types.

These patterns are similar to what was handled in InstSimplify in:
https://reviews.llvm.org/rL339171
https://reviews.llvm.org/rL339174
https://reviews.llvm.org/rL339176
...but we can't use instsimplify on these because we require negation
of the original operand.

llvm-svn: 339263

6 years ago[DAG] DAGCombiner::visitSDIVLike - remove unnecessary isConstOrConstSplat call. NFCI.
Simon Pilgrim [Wed, 8 Aug 2018 15:37:52 +0000 (15:37 +0000)]
[DAG] DAGCombiner::visitSDIVLike - remove unnecessary isConstOrConstSplat call. NFCI.

The isConstOrConstSplat result is only used in a ISD::matchUnaryPredicate call which can perform the equivalent iteration just as quickly.

llvm-svn: 339262

6 years agoFix -Wdocumentation warnings. NFCI.
Simon Pilgrim [Wed, 8 Aug 2018 15:34:00 +0000 (15:34 +0000)]
Fix -Wdocumentation warnings. NFCI.

llvm-svn: 339261

6 years ago[PowerPC] Improve codegen for vector loads using scalar_to_vector
Zaara Syeda [Wed, 8 Aug 2018 15:20:43 +0000 (15:20 +0000)]
[PowerPC] Improve codegen for vector loads using scalar_to_vector

This patch aims to improve the codegen for vector loads involving the
scalar_to_vector (load X) sequence. Initially, ld->mv instructions were used
for scalar_to_vector (load X), so this patch allows scalar_to_vector (load X)
to utilize:

LXSD and LXSDX for i64 and f64
LXSIWAX for i32 (sign extension to i64)
LXSIWZX for i32 and f64

Committing on behalf of Amy Kwan.
Differential Revision: https://reviews.llvm.org/D48950

llvm-svn: 339260

6 years agoRemove unneeded preprocessor condition.
Charles Davis [Wed, 8 Aug 2018 15:18:22 +0000 (15:18 +0000)]
Remove unneeded preprocessor condition.

llvm-svn: 339259

6 years ago[libunwind][include] Add SEH declarations to <unwind.h>.
Charles Davis [Wed, 8 Aug 2018 15:18:20 +0000 (15:18 +0000)]
[libunwind][include] Add SEH declarations to <unwind.h>.

Summary:
Make the `_Unwind_Exception` struct correct under SEH. Add a
declaration of `_GCC_specific_handler()`, which is used by SEH versions
of Itanium personality handlers to do common setup. Roughly corresponds
to Clang's D50380.

Reviewers: mstorsjo, rnk, compnerd, smeenai

Subscribers: christof, chrib, cfe-commits, llvm-commits

Differential Revision: https://reviews.llvm.org/D50414

llvm-svn: 339258