Daniil Dudkin [Wed, 4 May 2022 09:29:46 +0000 (12:29 +0300)]
[flang] Fix ICE for passing a label for non alternate return arguments
When we pass an alternate return specifier to a regular (not an asterisk)
dummy argument, flang would throw an internal compiler error of
derefencing a null pointer.
To avoid the ICE, a check was added.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D123947
Tobias Hieta [Mon, 25 Apr 2022 08:28:59 +0000 (10:28 +0200)]
[docs] Improve documentation around CMAKE_BUILD_TYPE
See discussion in: https://reviews.llvm.org/D124153
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D124367
Ulrich Weigand [Wed, 4 May 2022 08:43:11 +0000 (10:43 +0200)]
[libunwind][SystemZ] Unwind out of signal handlers
Unwinding out of signal handlers currently does not work since
the sigreturn trampoline is not annotated with CFI data.
Fix this by detecting the sigreturn trampoline during unwinding
and providing appropriate unwind data manually. This follows
closely the approach used by existing code for the AArch64 target.
Reviewed by: MaskRay
Differential Revision: https://reviews.llvm.org/D124765
Martin Liska [Tue, 3 May 2022 08:09:07 +0000 (10:09 +0200)]
tsan: fix GCC warnings
Fixes:
tsan/tsan_shadow.h:93:32: warning: enumerated and non-enumerated type in conditional expression [-Wextra]
tsan/tsan_shadow.h:94:44: warning: enumerated and non-enumerated type in conditional expression [-Wextra]
Differential Revision: https://reviews.llvm.org/D124828
Matthias Springer [Tue, 3 May 2022 14:40:13 +0000 (23:40 +0900)]
[mlir][linalg][bufferize][NFC] Remove remaining Comprehensive Bufferize code
This commit removes the Linalg Comprehensive Bufferize pass.
Differential Revision: https://reviews.llvm.org/D124854
Matthias Springer [Tue, 3 May 2022 14:39:31 +0000 (23:39 +0900)]
[mlir][linalg][bufferize][NFC] Make init_tensor elimination a separate pre-processing pass
This commit decouples init_tensor elimination from the rest of the bufferization.
Differential Revision: https://reviews.llvm.org/D124853
Fangrui Song [Wed, 4 May 2022 08:10:45 +0000 (01:10 -0700)]
[ELF] Support custom sections between DATA_SEGMENT_ALIGN and DATA_SEGMENT_RELRO_END
We currently hard code RELRO sections. When a custom section is between
DATA_SEGMENT_ALIGN and DATA_SEGMENT_RELRO_END, we may report a spurious
`error: section: ... is not contiguous with other relro sections`. GNU ld
makes such sections RELRO.
glibc recently switched to default --with-default-link=no. This configuration
places `__libc_atexit` and others between DATA_SEGMENT_ALIGN and
DATA_SEGMENT_RELRO_END. This patch allows such a ld.bfd --verbose
linker script to be fed into lld.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D124656
Matthias Springer [Tue, 3 May 2022 14:39:07 +0000 (23:39 +0900)]
[mlir][bufferize] Allow in-place bufferization for writes to init_tensors in loops
This commit relaxes the rules around ops that define a value but do not specify the tensor's contents. (The only such op at the moment is init_tensor.)
When such a tensor is written in a loop, it should not cause out-of-place bufferization.
Differential Revision: https://reviews.llvm.org/D124849
serge-sans-paille [Tue, 3 May 2022 12:15:24 +0000 (14:15 +0200)]
[iwyu] Handle regressions in libLLVM header include
Running iwyu-diff on LLVM codebase since
fa5a4e1b95c8f37796 detected a few
regressions, fixing them.
Differential Revision: https://reviews.llvm.org/D124847
Marius Brehler [Tue, 3 May 2022 12:56:51 +0000 (12:56 +0000)]
[mlir] Add missing CMake deps to mlir-pdll
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D124851
Luboš Luňák [Wed, 4 May 2022 06:11:49 +0000 (08:11 +0200)]
[ThreadPool] delete debug global variable if not needed
https://lab.llvm.org/buildbot/#/builders/5/builds/23099
Douglas Yung [Wed, 4 May 2022 05:45:43 +0000 (22:45 -0700)]
Mark test icf-safe.s as requiring aarch64 to fix buildbots which don't build that target.
Luboš Luňák [Wed, 6 Apr 2022 13:48:22 +0000 (15:48 +0200)]
[lldb] use one shared ThreadPool and task groups
As a preparation for parallelizing loading of symbols (D122975),
it is necessary to use just one thread pool to avoid using
a thread pool from inside a task of another thread pool.
Differential Revision: https://reviews.llvm.org/D123226
Luboš Luňák [Tue, 5 Apr 2022 19:27:14 +0000 (21:27 +0200)]
[ThreadPool] add ability to group tasks into separate groups
This is needed for parallelizing of loading modules symbols in LLDB
(D122975). Currently LLDB can parallelize indexing symbols
when loading a module, but modules are loaded sequentially. If LLDB
index cache is enabled, this means that the cache loading is not
parallelized, even though it could. However doing that creates
a threadpool-within-threadpool situation, so the number of threads
would not be properly limited.
This change adds ThreadPoolTaskGroup as a simple type that can be
used with ThreadPool calls to put tasks into groups that can be
independently waited for (even recursively from within a task)
but still run in the same thread pool.
Differential Revision: https://reviews.llvm.org/D123225
Luo, Yuanke [Wed, 4 May 2022 03:24:48 +0000 (11:24 +0800)]
[fastregalloc] Fix bug when undef value is tied to def.
If the tied use is undef value, fastregalloc should free the def
register. There is no reload needed for the undef value.
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D124834
Craig Topper [Wed, 4 May 2022 02:42:42 +0000 (19:42 -0700)]
[RISCV] Update isLegalAddressingMode for RVV.
RVV instructions only support base register addressing.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D124820
Craig Topper [Wed, 4 May 2022 02:29:33 +0000 (19:29 -0700)]
[RISCV] Make use of SHXADD instructions in RVV spill/reload code.
We can use SH1ADD, SH2ADD, SH3ADD to multipy by 3, 5, and 9 respectively.
We could extend this to 3, 5, or 9 multiplied by a power 2 by also
emitting a SLLI.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D124824
Craig Topper [Wed, 4 May 2022 02:28:26 +0000 (19:28 -0700)]
[RISCV] Don't lookup TII in RISCVInstrInfo::getVLENFactoredAmount. NFCI
We're already inside of our implementation of TII.
Amir Ayupov [Wed, 4 May 2022 02:33:43 +0000 (19:33 -0700)]
[BOLT] Fix ICPJumpTablesTopN option use
Fix non-sensical `opts::ICPJumpTablesTopN != 0 ? opts::ICPTopN : opts::ICPTopN`.
Refactor/simplify another similar assignment.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124880
Amir Ayupov [Wed, 4 May 2022 02:32:19 +0000 (19:32 -0700)]
[BOLT][NFC] Make ICP options naming uniform
Rename `opts::IndirectCallPromotion*` to `opts::ICP*`, making option naming
uniform and easier to follow.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124879
Amir Ayupov [Wed, 4 May 2022 02:30:41 +0000 (19:30 -0700)]
[BOLT][NFC] ICP: simplify findTargetsIndex
Unnest lambda and use `llvm::is_contained`.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124877
Amir Ayupov [Wed, 4 May 2022 02:28:24 +0000 (19:28 -0700)]
[BOLT][NFC] Refactor ICP::findCallTargetSymbols
Reduce nesting making it easier to read.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124876
Amir Ayupov [Tue, 3 May 2022 22:35:45 +0000 (15:35 -0700)]
[BOLT][CMAKE] Fix llvm-bolt-fuzzer build
Add X86/AArch64 targets to resolve missing dependencies, e.g.:
`undefined reference to `LLVMInitializeX86AsmParser'`
Follow-up to D124206
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124886
Weverything [Wed, 4 May 2022 01:10:50 +0000 (18:10 -0700)]
[riscv] Mark function as used to avoid unused warning.
Hongtao Yu [Mon, 2 May 2022 18:59:55 +0000 (11:59 -0700)]
[CSSPGO] Relax size limitation for priority inlining with preinlined profile
As a follow-up to D124632, I'm turning on unlimited size caps for inlining with preinlined profile. It should be safe as a preinlined profile has "bounded" inline contexts.
No noticeable size or perf delta was seen with two of our internal large services, but I think this is still a good change to be consistent with the other case.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D124793
Hongtao Yu [Mon, 2 May 2022 17:57:22 +0000 (10:57 -0700)]
[CSSPGO][NFC] Replace SampleProfileLoader::ProfileIsCS with FunctionSamples::ProfileIsCS.
The two fields have the same meaning. Their values come from the reader. Therefore I'm removing one.
Reviewed By: wenlei
Differential Revision: https://reviews.llvm.org/D124788
Alex Borcan [Wed, 4 May 2022 01:00:41 +0000 (21:00 -0400)]
[lld] Implement safe icf for MachO
This change implements --icf=safe for MachO based on addrsig section that is implemented in D123751.
Reviewed By: int3, #lld-macho
Differential Revision: https://reviews.llvm.org/D123752
Joseph Huber [Wed, 4 May 2022 00:50:26 +0000 (20:50 -0400)]
[OpenMP] Fix save-temps name in linker wrapper
Summary:
The wrapped registration code had a typo in the save-temps version of
the name.
Philip Reames [Wed, 4 May 2022 00:25:35 +0000 (17:25 -0700)]
[riscv] Add vsetvli tests involving moves to/from scalar regs
Philip Reames [Tue, 3 May 2022 23:49:47 +0000 (16:49 -0700)]
[riscv] Add a couple more vsetvli tests
Weverything [Tue, 3 May 2022 22:13:17 +0000 (15:13 -0700)]
[psuedo] Fix for unused warning by moving code into debug macro.
Weverything [Tue, 3 May 2022 21:55:34 +0000 (14:55 -0700)]
[trace][intelpt] Fix out-of-bounds access.
The StringRef single argument constructor expects a null-terminated
string. Explicitly pass the size to prevent reading pass the end
of the array.
Matt Arsenault [Mon, 2 May 2022 15:46:57 +0000 (11:46 -0400)]
ARM: Fix using undefined virtual registers in test
The verifier apparently doesn't work correctly and should have
caught this.
Matt Arsenault [Mon, 2 May 2022 15:22:51 +0000 (11:22 -0400)]
ARM: Cleanup MIR test
Drop IR section, renumber registers, regenerate to use -NEXT
Matt Arsenault [Mon, 2 May 2022 13:41:28 +0000 (09:41 -0400)]
AMDGPU: Remove some invalid kill flags in tests
These killed registers need to be live out of the block but the
verifier wasn't catching it.
Matt Arsenault [Mon, 2 May 2022 14:01:05 +0000 (10:01 -0400)]
AMDGPU: Regenerate test checks
Matt Arsenault [Tue, 19 Apr 2022 20:00:57 +0000 (16:00 -0400)]
llvm-reduce: Reduce includes
Amir Ayupov [Tue, 3 May 2022 21:47:03 +0000 (14:47 -0700)]
[BOLT][TEST] Fix test failures on AArch64 builder
Address X86 tests failures on AArch64 builder:
https://lab.llvm.org/staging/#/builders/211/builds/82
Inputs fail to cross-compile due to a missing header:
```
/usr/include/stdio.h:27:10: fatal error: 'bits/libc-header-start.h' file not found
#include <bits/libc-header-start.h>
```
As inputs are linked with `-nostdlib` anyway, don't include stdio.h.
Reviewed By: yota9
Differential Revision: https://reviews.llvm.org/D124863
Alex Borcan [Tue, 3 May 2022 22:19:18 +0000 (18:19 -0400)]
Implement support for __llvm_addrsig for MachO in llvm-mc
The __llvm_addrsig section is a section that the linker needs for safe icf.
This was not yet implemented for MachO - this is the implementation.
It has been tested with a safe deduplication implementation inside lld.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D123751
Jonas Devlieghere [Tue, 3 May 2022 22:04:45 +0000 (15:04 -0700)]
[lldb] Add a function to check if lldb is running in an interactive session
This patch adds a function to check if lldb is running in an interactive
debug session. Currently this API only works on macOS. It's expected to
be used in combination with Host::OpenFileInExternalEditor.
Differential revision: https://reviews.llvm.org/D124872
Jonas Devlieghere [Tue, 3 May 2022 20:39:23 +0000 (13:39 -0700)]
[lldb] Session transcript should use the async debugger streams
When writing out the session transcript, print output to the
asynchronous debugger stream to prevent it from potentially interleaving
with other output.
Differential revision: https://reviews.llvm.org/D124873
Aart Bik [Tue, 3 May 2022 21:49:08 +0000 (14:49 -0700)]
[mlir][sparse] fix build issue with unused local under opt builds
Reviewed By: rdzhabarov
Differential Revision: https://reviews.llvm.org/D124883
Jon Roelofs [Tue, 3 May 2022 21:31:50 +0000 (14:31 -0700)]
Fix zero-width bitfield extracts to emit 0
Fixes #55129
Chris Bieneman [Tue, 3 May 2022 17:00:02 +0000 (12:00 -0500)]
Fix DXBC magic parsing
This gets identify_magic working correctly for DXContainer files
Philip Reames [Tue, 3 May 2022 21:40:20 +0000 (14:40 -0700)]
Fix a buildbot warning [nfc]
Aart Bik [Tue, 3 May 2022 21:01:47 +0000 (14:01 -0700)]
[mlir][sparse] add missing types to from/to-MLIR conversion routines
This will enable our usual set of element types in external
environments, such as PyTACO support.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D124875
Yangguang Li [Tue, 3 May 2022 21:19:28 +0000 (17:19 -0400)]
[SCEV] Removed an unnecessary assertion
The assertion is to check we always get backedge taken count
(`BECount`) of zero when the exit condition is in select form
(`isa<BinaryOperation>(ExitCond)`) and the exit limit for the
first operand is zero `EL0.ExactNotTaken->isZero()`). However
the assertion is checking that the exit condition is NOT in
select form. Removing the the whole assertion since we now handle
select form in ScalarEvolution::getSequentialMinMaxExpr.
Reviewed By: reames, nikic
Differential Revision: https://reviews.llvm.org/D122835
Stella Stamenova [Tue, 3 May 2022 19:45:30 +0000 (12:45 -0700)]
[mlir] Fix Visual Studio warnings
There are only a couple of warnings when compiling with VS on Windows. This fixes the last remaining warnings so that we can enable LLVM_ENABLE_WERROR on the mlir windows bot.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D124862
Benjamin Kramer [Tue, 3 May 2022 21:03:51 +0000 (23:03 +0200)]
[bazel] Fix the build after
2c3326608460
Philip Reames [Tue, 3 May 2022 20:47:06 +0000 (13:47 -0700)]
[riscv] Add debug printing support for VSETVLIInfo class [nfc]
Jim Kitchen [Tue, 3 May 2022 20:50:26 +0000 (15:50 -0500)]
[mlir][sparse] Add lowering for unary and binary ops
Adding lowering for Unary and Binary required several changes due to
their unique nature of containing custom code for different "regions"
of the sparse structure being operated on. Along with a Kind, a pointer
to the Operation is passed along to be merged once the lattice
structure is figured out.
The original operation is maintained, as it is required for subsequent
lattice decisions. However, sparse_tensor.binary has some branches
are considered as fully handled and therefore are marked with as
kBinaryBranch to distinguish them.
A unique aspect of the custom code is that sometimes the desired result
is no result at all -- i.e. a user wants overlapping sparse entries to
become empty in the output. The solution to this is to return an
uninitialized Value(), which is checked and handled elsewhere in the
code and results in nothing being written to the output tensor for that
case.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D123057
Haojian Wu [Tue, 3 May 2022 08:31:14 +0000 (10:31 +0200)]
[pseudo] Use a real language option in the parser.
Differential Revision: https://reviews.llvm.org/D124831
Sanjay Patel [Tue, 3 May 2022 20:04:44 +0000 (16:04 -0400)]
[InstCombine] move shuffle after min/max with same-shuffled operands
This is an intrinsic version of the existing fold for binops.
As a first step, I only allowed min/max, but the code is set
up to make adding more intrinsics easy (with more or less than
2 arguments).
This (and possible follow-ups) are discussed in issue #46238.
Sanjay Patel [Tue, 3 May 2022 18:42:25 +0000 (14:42 -0400)]
[InstCombine] add tests for min/max with shuffled operands; NFC
Issue #46238
David Pagan [Tue, 3 May 2022 16:44:03 +0000 (09:44 -0700)]
[clang][OpenMP] Local variable alignment incorrect with align clause
If alignment specified with align clause is less than natural alignment for
list item type, the alignment should be set to the natural alignment.
See OMP5.1 specification, page 185, lines 7-10
Differential Revision: https://reviews.llvm.org/D124676
Haojian Wu [Tue, 3 May 2022 19:25:50 +0000 (21:25 +0200)]
[pseudo] Print the GSS::Node details when the unittest fails, NFC.
Hansang Bae [Mon, 2 May 2022 18:42:26 +0000 (13:42 -0500)]
[OpenMP] Possible fix for sporadic test failure from loop_dispatch.c
This patch tries to fix sporadic test failure after the change
https://reviews.llvm.org/D122107.
Made the test wait until every thread has at least one loop iteration.
Differential Revision: https://reviews.llvm.org/D124812
Amir Ayupov [Tue, 3 May 2022 19:45:15 +0000 (12:45 -0700)]
Revert "[BOLT][TEST] Fix test failures on AArch64 builder"
This reverts commit
88b6d3211c836021a9b570ac6090dd1bf42da449.
Amir Ayupov [Tue, 3 May 2022 17:18:17 +0000 (10:18 -0700)]
[BOLT][TEST] Fix test failures on AArch64 builder
Address X86 tests failures on AArch64 builder:
https://lab.llvm.org/staging/#/builders/211/builds/82
Inputs fail to cross-compile due to a missing header:
```
/usr/include/stdio.h:27:10: fatal error: 'bits/libc-header-start.h' file not found
#include <bits/libc-header-start.h>
```
As inputs are linked with `-nostdlib` anyway, don't include stdio.h.
Reviewed By: yota9
Differential Revision: https://reviews.llvm.org/D124863
Duncan P. N. Exon Smith [Thu, 28 Apr 2022 19:44:32 +0000 (12:44 -0700)]
ExtractAPI: Use %clang_cc1 and -verify in enum.c
Fix one test (enum.c) in ExtractAPI to use %clang_cc1 and -verify
instead of calling the full driver and FileCheck. This is an example for
my comment from https://reviews.llvm.org/D121873.
Differential Revision: https://reviews.llvm.org/D124634
Richard Smith [Mon, 2 May 2022 21:47:52 +0000 (14:47 -0700)]
Fix some places where PseudoObjectExpr handling assumed that a
PseudoObjectExpr is only used for ObjC properties and subscripts.
For now, these assumptions are generally correct, but that's not part of
the design of PseudoObjectExpr. No functionality change intended.
David Kreitzer [Tue, 3 May 2022 14:57:57 +0000 (07:57 -0700)]
Minor correction in bitreverse intrinsic semantics
Differential Revision: https://reviews.llvm.org/D124861
owenca [Tue, 3 May 2022 03:02:57 +0000 (20:02 -0700)]
[clang-format][NFC] Clean up tryToParseLambdaIntroducer()
Differential Revision: https://reviews.llvm.org/D124818
LLVM GN Syncbot [Tue, 3 May 2022 18:28:46 +0000 (18:28 +0000)]
[gn build] Port
9f38da258ea7
Haojian Wu [Tue, 3 May 2022 13:58:26 +0000 (15:58 +0200)]
[pseudo] Implement the GLR parsing algorithm.
This patch implements a standard GLR parsing algorithm, the
core piece of the pseudoparser.
- it parses preprocessed C++ code, currently it supports correct code
only and parse them as a translation-unit;
- it produces a forest which stores all possible trees in an efficient
manner (only a single node being build for per (SymbolID, Token Range));
no disambiguation yet;
Reland with a fix for g++'s -fpermissive error on previous declaration `GSS& GSS;`.
Differential Revision: https://reviews.llvm.org/D121150
Bill Wendling [Tue, 3 May 2022 18:19:52 +0000 (11:19 -0700)]
[randstruct] Move initializer check to be more effective
If a randomized structure has an initializer with a dedicated
initializer in it, the field initialzed by that dedicated initializer
may end up at the end of the RecordDecl. This however may skip the
random layout initization check.
struct t {
int a, b, c, d, e;
} x = { .a = 2, 4, 5, 6 };
Let's say that "a" is lands as the last field after randomization. The
call to CheckDesignatedInitializer sets the iterator to the end of the
initializer list. During the next iteration of the initializer list
check, it detects that and fails to issue the error about initializing
a randomized struct with non-designated initializer. Instead, it issues
an error about "excess elements in struct initializer", which is
confusing under these circumstances.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D124694
Dave Lee [Tue, 26 Apr 2022 23:34:10 +0000 (16:34 -0700)]
[lldb] Add setting for max depth of value object printing (NFC)
This adds a setting (`target.max-children-depth`) that will provide a default value for the `--depth` flag used by `expression` and `frame variable`.
The new setting uses the same default that's currently fixed in source: `UINT32_MAX`.
This provides two purposes:
1. Allowing downstream forks to provide a customized default.
2. Allowing users to set their own default.
Following `target.max-children-count`, a warning is emitted when the max depth is reached. The warning lets users know which flags or settings they can customize. This warning is shown only when the limit is the default value.
rdar://
87466495
Differential Revision: https://reviews.llvm.org/D123954
Goran Flegar [Tue, 3 May 2022 17:27:22 +0000 (19:27 +0200)]
[mlir] Add sin & cos ops to complex dialect
Also adds conversions for those ops to math + arith.
Differential Revision: https://reviews.llvm.org/D124773
Yuanfang Chen [Tue, 3 May 2022 17:13:15 +0000 (10:13 -0700)]
tsan: for unittests, change to use test fixtures to clear racy stacks
After
cd0a5889d71, unittest would run in shard mode where many tests
share a single process. Need to clear some global state to make the test
results stable.
Reviewed By: thetruestblue, rsundahl
Differential Revision: https://reviews.llvm.org/D124591
Augie Fackler [Tue, 3 May 2022 16:11:34 +0000 (12:11 -0400)]
BuildLibCalls: simplify switch statement slightly
Per feedback on D123086 after submit.
Also added a test for vec_malloc et al attribute inference to show it's
doing the right thing.
The new tests exposed a defect, corrected by adding vec_free to the list of
free functions in MemoryBuiltins.cpp, which had been overlooked all the
way back in D94710, over a year ago.
Differential Revision: https://reviews.llvm.org/D124859
Michael Jones [Mon, 25 Apr 2022 22:46:03 +0000 (15:46 -0700)]
[libc] add printf writer
The printf implmentation is made up of three main pieces, the parser,
the converter, and the writer. This patch adds the implementation for
the writer, as well as the function for writing to a string, along with
tests.
Reviewed By: sivachandra, lntue
Differential Revision: https://reviews.llvm.org/D124421
Michael Jones [Mon, 2 May 2022 20:30:20 +0000 (13:30 -0700)]
[libc] fix strtold tests on 32 bit systems
This patch fixes the string to long double tests for systems that use
long double is double, and don't support uint128.
Reviewed By: sivachandra, lntue
Differential Revision: https://reviews.llvm.org/D124803
Chris Jackson [Tue, 3 May 2022 15:17:05 +0000 (16:17 +0100)]
[llvm-ar] Modify usage printouts to use the correct toolname
Modify llvm-ar and llvm-ranlib to use the actual name of the executable
when printing the usage text via the '--help' flag.
Reviewers: Maskray, jhenderson, gbreynoo
Differential Revision: https://reviews.llvm.org/D124445
Min-Yih Hsu [Wed, 20 Apr 2022 21:56:40 +0000 (14:56 -0700)]
[mlir][LLVMIR] Add support for translating Switch instruction
Add support for translating llvm::SwitchInst.
Differential Revision: https://reviews.llvm.org/D124628
Simon Pilgrim [Tue, 3 May 2022 16:16:17 +0000 (17:16 +0100)]
[DAG] Fix issue with rot(rot(x,c1),c2) -> rot(x,c1+c2) fold with unnormalized rotation amounts
Don't assume the rotation amounts have been correctly normalized - do it as part of the constant folding.
Also, the normalization should be performed with UREM not SREM.
Kugan Vivekanandarajah [Tue, 3 May 2022 16:04:46 +0000 (17:04 +0100)]
[RFC] Add and sort decl to maintain order instead of inserting in order
ASTWriter::associateDeclWithFile shows a lot in clangd perf profile due to O(n^2) behaviour in insertion of DeclIDs in SortedFileDeclIDs. Instead of doing that, this patch just appends it to the DeclIDs vector and sorts them at the end.
Reviewed By: akyrtzi
Differential Revision: https://reviews.llvm.org/D124840
Simon Pilgrim [Tue, 3 May 2022 15:37:53 +0000 (16:37 +0100)]
[X86] Add test showing failure to modulo the rotation amounts before merging an inner rotation
Thanks to @spatel for the test case
Fangrui Song [Tue, 3 May 2022 15:46:15 +0000 (08:46 -0700)]
[ELF] Fix branch range computation when picking ThunkSection
Similar to D117734. Take AArch64 as an example when the branch range is +-0x8000000.
getISDThunkSec returns `ts` when `src-0x8000000-r_addend <= tsBase < src-0x8000000`
and the new thunk will be placed in `ts` (`ts->addThunk(t)`). However, the new
thunk (at the end of ts) may be unreachable from src. In the next pass,
`normalizeExistingThunk` reverts the relocation back to the original target.
Then a new thunk is created and the same `ts` is picked as before. The `ts` is
still unreachable.
I have observed it in one test with a sufficiently large r_addend (47664): there
are initially 245 Thunk's, then in each pass 14 new Thunk's are created and get
appended to the unreachable ThunkSection. After 15 passes lld fails with
`thunk creation not converged`.
The new test aarch64-thunk-reuse2.s checks the case.
Without `- pcBias`, arm-thumb-thunk-empty-pass.s and arm-thunk-multipass-plt.s
will fail.
Reviewed By: peter.smith
Differential Revision: https://reviews.llvm.org/D124653
Nikita Popov [Tue, 3 May 2022 15:42:46 +0000 (17:42 +0200)]
[SCEV] Regenerate test checks (NFC)
Shilei Tian [Tue, 3 May 2022 15:30:46 +0000 (11:30 -0400)]
[Clang][OpenMP] Add the support for floating-point variables for specific atomic clauses
Currently when using `atomic update` with floating-point variables, if
the operation is add or sub, `cmpxchg`, instead of `atomicrmw` is emitted, as
shown in [1]. In fact, about three years ago, llvm-svn: 351850 added the
support for FP operations. This patch adds the support in OpenMP as well.
[1] https://godbolt.org/z/M7b4ba9na
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D124724
Philip Reames [Tue, 3 May 2022 15:28:36 +0000 (08:28 -0700)]
[X86] Autogen a few tests for ease of update [nfc]
Dawid Jurczak [Tue, 3 May 2022 15:15:56 +0000 (17:15 +0200)]
[NFC][GVNSink] Don't pretend that iteration is over instructions when it's actually over blocks
Differential Revision: https://reviews.llvm.org/D124764
David Spickett [Mon, 11 Apr 2022 12:55:55 +0000 (12:55 +0000)]
[lldb][NFC] Refactor printing of short options in help
Instead of building a set twice for optional and required,
build a set for each while walking the options once.
Then take advantage of set being sorted meaning we don't
have to enforce the upper/lower order ourselves.
Just cleaned up the formatting on the later loops.
Combined the if conditions and used a single line if.
Depends on D123501
Reviewed By: jingham
Differential Revision: https://reviews.llvm.org/D123502
Paul Kirth [Tue, 3 May 2022 00:28:00 +0000 (00:28 +0000)]
[BOLT] [NFC] Remove unused variable
This patch fixes a warning from -Wunused-but-set-variable
MismatchedBranches are counted, but are never reported.
Since evaluateProfileData() should already identify and report
these cases, we can safely remove the unused variable.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D124588
Philipp Tomsich [Tue, 3 May 2022 15:10:02 +0000 (16:10 +0100)]
[AArch64] Add native CPU detection for Ampere1
Map the IMPLEMENTOR ID 0xc0 (Ampere Computing) and CPU ID 0xac3
(Ampere1) to ampere1.
Differential Revision: https://reviews.llvm.org/D117111
Nikita Popov [Tue, 3 May 2022 15:08:05 +0000 (17:08 +0200)]
[X86] Add additional add of and not tests (NFC)
Add tests for cases involving a truncated not.
Simon Pilgrim [Tue, 3 May 2022 14:54:59 +0000 (15:54 +0100)]
[PowerPC] Regenerate urem-seteq-illegal-types.ll
Remove superfluous whitespace
Philipp Tomsich [Tue, 3 May 2022 14:54:02 +0000 (15:54 +0100)]
[AArch64] Support for Ampere1 core
Add support for the Ampere Computing Ampere1 core.
Ampere1 implements the AArch64 state and is compatible with ARMv8.6-A.
Differential Revision: https://reviews.llvm.org/D117112
David Spickett [Fri, 8 Apr 2022 15:43:16 +0000 (15:43 +0000)]
[lldb][NFC] Simplify part of Options::GenerateOptionUsage
Use llvm::enumerate, remove an unused arg name stream and
replace repeated uses of indexing to get the option def.
We could use map instead of multimap but I'm not 100% that
would be NFC. All short options should be unique in theory.
Depends on D123500
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D123501
Simon Pilgrim [Tue, 3 May 2022 14:28:38 +0000 (15:28 +0100)]
[X86] load-local-v3i129.ll - add checks for targets with fast/slow shld funnel shift ops
Simon Pilgrim [Tue, 3 May 2022 14:27:15 +0000 (15:27 +0100)]
[X86] const-shift-of-constmasked.ll - replace X32 check prefix with X86
We try to only use X32 for gnux32 triple tests
Eric Li [Tue, 3 May 2022 03:28:52 +0000 (03:28 +0000)]
[bazel] Add test targets for dataflow framework
Differential Revision: https://reviews.llvm.org/D124819
Aaron Ballman [Tue, 3 May 2022 13:58:20 +0000 (09:58 -0400)]
Add explicit OpenMP 5.0 case for version macros; NFC
This adds an explicit case for OpenMP 5.0 as a reminder to still define
the correct macro value when the default OpenMP version changes in the
future.
Aaron Ballman [Tue, 3 May 2022 13:53:53 +0000 (09:53 -0400)]
Fix a typo in an OpenMP test
This fixes the typo and corrects the default OpenMP version being
tested.
LLVM GN Syncbot [Tue, 3 May 2022 13:55:41 +0000 (13:55 +0000)]
[gn build] Port
860eabb3953a
Haojian Wu [Tue, 3 May 2022 13:54:10 +0000 (15:54 +0200)]
Revert "[pseudo] Implement the GLR parsing algorithm."
This breaks some buildbots (on the declaration GSS& GSS), will fix it
later.
This reverts commit
eac22d0754f70df10ea0eb6f59cbd1ef012ab5a4.
LLVM GN Syncbot [Tue, 3 May 2022 13:47:14 +0000 (13:47 +0000)]
[gn build] Port
eac22d0754f7
Nikita Popov [Tue, 3 May 2022 10:16:29 +0000 (12:16 +0200)]
[SDAG] Handle A and B&~A in haveNoCommonBitsSet()
This is the DAG variant of D124763. The code already handles the
general pattern, but not this degenerate case.
This allows folding A + (B&~A) to A | (B&~A) which further holds
to A | B.
Handling on the SDAG level is needed because in the motivating
case the add is actually a getelementptr, which only gets converted
into an add on the SDAG level. However, this patch is not quite
sufficient to handle the getelementptr case yet, because of an
interfering demanded bits simplification.
Differential Revision: https://reviews.llvm.org/D124772
Nathan Sidwell [Fri, 18 Feb 2022 19:06:58 +0000 (11:06 -0800)]
[demangler] Fold expressions of .* and ->*
(Exitingly) a fold expression's operators include .* and ->*, but we
failed to demangle them as we categorize those as MemberExprs, not
BinaryExprs.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D123305
Sam McCall [Thu, 28 Apr 2022 08:21:51 +0000 (10:21 +0200)]
[pseudo] Implement the GLR parsing algorithm.
This patch implements a standard GLR parsing algorithm, the
core piece of the pseudoparser.
- it parses preprocessed C++ code, currently it supports correct code
only and parse them as a translation-unit;
- it produces a forest which stores all possible trees in an efficient
manner (only a single node being build for per (SymbolID, Token Range));
no disambiguation yet;
Differential Revision: https://reviews.llvm.org/D121150