Sander de Smalen [Fri, 29 Jan 2021 17:31:42 +0000 (17:31 +0000)]
[SimplifyCFG] NFC: Rename static methods to clang-tidy standards.
This patch is a precursor to D95351, which changes the signature
of these methods.
David Green [Mon, 1 Feb 2021 16:09:25 +0000 (16:09 +0000)]
[ARM] Simplify VMOVRRD from extracts of buildvectors
Under the softfp calling convention, we are often left with
VMOVRRD(extract(bitcast(build_vector(a, b, c, d)))) for the return value
of the function. These can be simplified to a,b or c,d directly,
depending on the value of the extract.
Big endian is a little different because the bitcast switches the lanes
around, meaning we end up with b,a or d,c.
Differential Revision: https://reviews.llvm.org/D94989
Sam McCall [Tue, 26 Jan 2021 16:16:57 +0000 (17:16 +0100)]
[clangd] Respect ReferencesParams.context.includeDeclarations
Unfortunately this treats overrides declarations as declarations, not as
references. I don't plan to land this until I have a fix for that issue.
Differential Revision: https://reviews.llvm.org/D95450
J-Y You [Mon, 1 Feb 2021 15:59:07 +0000 (10:59 -0500)]
[TableGen] Fix anonymous record self-reference in foreach and multiclass
If we instantiate self-referenced anonymous records in foreach and
multiclass, the NAME value will point to incorrect record. It's because
anonymous name is resolved too early.
This patch adds AnonymousNameInit to represent an anonymous record name.
When instantiating an anonymous record, it will update the referred name.
Differential Revision: https://reviews.llvm.org/D95309
Simon Pilgrim [Mon, 1 Feb 2021 15:41:03 +0000 (15:41 +0000)]
[APFloat] multiplySignificand - pass IEEEFloat as const reference. NFCI.
Avoids unnecessary IEEEFloat copies.
Ruslan Arutyunyan [Mon, 1 Feb 2021 15:12:09 +0000 (10:12 -0500)]
[libc++] Fix for the Bug 41784
Add deleted volatile copy-assignment operator in the most derived atomic
to fix the Bug 41784. The root cause: there is an `operator=(T) volatile`
that has better match than the deleted copy-assignment operator of the base
class when `this` is `volatile`. The compiler sees that right operand of
the assignment operator can be converted to `T` and chooses that path
without taking into account the deleted copy-assignment operator of the
base class.
The current behavior on libstdc++ is different from what we have in libc++.
On the same test compilation fails with libstdc++. Proof: https://godbolt.org/z/nebPYd
(everything is the same except the -stdlib option).
I choose the way with explicit definition of copy-assignment for atomic
in the most derived class. But probably we can fix that by moving
`operator=(T)` overloads to the base class from both specializations.
At first glance, it shouldn't break anything.
Differential Revision: https://reviews.llvm.org/D90968
Haojian Wu [Mon, 1 Feb 2021 14:35:19 +0000 (15:35 +0100)]
[clangd] Don't rely on builtin headers for document-link.test.
This test seems to be failing at HEAD.
Reviewed By: kadircet, sammccall
Differential Revision: https://reviews.llvm.org/D95670
LLVM GN Syncbot [Mon, 1 Feb 2021 14:24:45 +0000 (14:24 +0000)]
[gn build] Port
b63cd4db915c
Sam McCall [Sun, 31 Jan 2021 12:53:22 +0000 (13:53 +0100)]
[clangd] Rename: merge index/AST refs path-insensitively where needed
If you have c:\foo open, and C:\foo indexed (case difference) then these
need to be considered the same file. Otherwise we emit edits to both,
and editors do... something that isn't pretty.
Maybe more centralized normalization is called for, but it's not trivial
to do this while also being case-preserving. see
https://github.com/clangd/clangd/issues/108
Fixes https://github.com/clangd/clangd/issues/665
Differential Revision: https://reviews.llvm.org/D95759
Kerry McLaughlin [Mon, 1 Feb 2021 11:04:36 +0000 (11:04 +0000)]
[SVE][CodeGen] Remove performMaskedGatherScatterCombine
The AArch64 DAG combine added by D90945 & D91433 extends the index
of a scalable masked gather or scatter to i32 if necessary.
This patch removes the combine and instead adds shouldExtendGSIndex, which
is used by visitMaskedGather/Scatter in SelectionDAGBuilder to query whether
the index should be extended before calling getMaskedGather/Scatter.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D94525
Florian Hahn [Mon, 1 Feb 2021 13:08:25 +0000 (13:08 +0000)]
[SCEV] Bail out if URem operand cannot be zero-extended.
In some cases, LHS is larger than the target expression type. Bail out
in that case for now, to avoid crashing
Jeroen Dobbelaere [Mon, 1 Feb 2021 13:38:33 +0000 (14:38 +0100)]
Revert "[Verifier] enable llvm.experimental.noalias.scope.decl dominance check."
the 'clang-with-lto-ubuntu' buildbot triggers the assertion.
This reverts commit
b43c395e60d2636ab5afc9b60a2046978c71e366.
Florian Hahn [Fri, 29 Jan 2021 11:24:10 +0000 (11:24 +0000)]
[ConstraintElimination] Add tests for signed predicates.
Add test coverage for conditions with signed predicates.
Med Ismail Bennani [Mon, 1 Feb 2021 13:04:10 +0000 (14:04 +0100)]
[lldb/test] Skip `SBTarget::IsLoaded` test on windows (NFC)
This patch skips the test for the SBTarget::IsLoaded method on windows
since the logic is different.
Differential Revision: https://reviews.llvm.org/D95686
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
Tim Northover [Mon, 1 Feb 2021 12:43:33 +0000 (12:43 +0000)]
GlobalISel: check type size before getZExtValue()ing it.
Otherwise getZExtValue() asserts.
Cullen Rhodes [Sat, 16 Jan 2021 16:08:40 +0000 (16:08 +0000)]
[LV] Fix crash when computing max VF too early
D90687 introduced a crash:
llvm::LoopVectorizationCostModel::computeMaxVF(llvm::ElementCount, unsigned int):
Assertion `WideningDecisions.empty() && Uniforms.empty() && Scalars.empty() &&
"No decisions should have been taken at this point"' failed.
when compiling the following C code:
typedef struct {
char a;
} b;
b *c;
int d, e;
int f() {
int g = 0;
for (; d; d++) {
e = 0;
for (; e < c[d].a; e++)
g++;
}
return g;
}
with:
clang -Os -target hexagon -mhvx -fvectorize -mv67 testcase.c -S -o -
This occurred since prior to D90687 computeFeasibleMaxVF would only be
called in computeMaxVF when a scalar epilogue was allowed, but now it's
always called. This causes the assert above since computeFeasibleMaxVF
collects all viable VFs larger than the default MaxVF, and for each VF
calculates the register usage which results in analysis being done the
assert above guards against. This can occur in computeFeasibleMaxVF if
TTI.shouldMaximizeVectorBandwidth and this target hook is implemented in
the hexagon backend to always return true.
Reported by @iajbar.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D94869
Sander de Smalen [Tue, 26 Jan 2021 14:39:01 +0000 (14:39 +0000)]
NFC: Migrate SpeculativeExecution to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D95356
Andy Yankovsky [Mon, 1 Feb 2021 11:25:53 +0000 (12:25 +0100)]
[lldb] Use current execution context in SBDebugger
Use `GetSelectedExecutionContext()` instead of
`GetCommandInterpreter().GetExecutionContext()` in
`SBDebugger::GetInternalVariableValue/SBDebugger::SetInternalVariable`. The
execution context in the command interpreter might be empty, if no commands has
been executed yet (it is updated only when handling commands or completions --
e.g.
https://github.com/llvm/llvm-project/blob/main/lldb/source/Interpreter/CommandInterpreter.cpp#L1855).
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D95761
Jan Svoboda [Mon, 1 Feb 2021 11:36:43 +0000 (12:36 +0100)]
Revert "[clang][cli] Port OpenMP-related LangOpts to marshalling system"
This reverts commit
9ad94c12
It turns out that to correctly generate command line flags for LangOptions::OpenMP and LangOptions::OpenMPSimd, we need the flexibility of C++.
Martin Storsjö [Mon, 1 Feb 2021 11:45:07 +0000 (13:45 +0200)]
[lldb] Remove a stray semicolon, fixing GCC warnings. NFC.
Dmitry Preobrazhensky [Mon, 1 Feb 2021 11:22:44 +0000 (14:22 +0300)]
[AMDGPU][MC] Corrected error position for invalid operands
Generic parser may report an incorrect error position when an offending operand is followed by a comma.
See bug 48884 for details: https://bugs.llvm.org/show_bug.cgi?id=48884.
Differential Revision: https://reviews.llvm.org/D95674
Med Ismail Bennani [Mon, 1 Feb 2021 11:14:10 +0000 (11:14 +0000)]
[lldb/API] Expose Module::IsLoadedInTarget() to SB API (NFC)
This patch adds an `SBTarget::IsLoaded(const SBModule&) const` endpoint
to lldb's Scripting Bridge API. As the name suggests, it will allow the
user to know if the module is loaded in a specific target.
rdar://
37957625
Differential Review: https://reviews.llvm.org/D95686
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
xgupta [Mon, 1 Feb 2021 07:24:21 +0000 (12:54 +0530)]
[Branch-Rename] Fix some links
According to the [[ https://foundation.llvm.org/docs/branch-rename/ | status of branch rename ]], the master branch of the LLVM repository is removed on 28 Jan 2021.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D95766
David Green [Mon, 1 Feb 2021 11:10:35 +0000 (11:10 +0000)]
[ARM] Turn sext_inreg(VGetLaneu) into VGetLaneu
This adds a DAG combine for converting sext_inreg of VGetLaneu into
VGetLanes, providing the types match correctly.
Differential Revision: https://reviews.llvm.org/D95073
Jeroen Dobbelaere [Mon, 1 Feb 2021 10:13:14 +0000 (11:13 +0100)]
[Verifier] enable llvm.experimental.noalias.scope.decl dominance check.
Now that Loop Peeling has been fixed (
80cdd30eb90c3509bf315f1fa1369483e2448bbd),
enable the dominance check by default.
This reverts commit
3b5d36ece21f9baf96d82944b0165cb352443bee.
Simon Pilgrim [Mon, 1 Feb 2021 10:31:28 +0000 (10:31 +0000)]
[X86][AVX] combineExtractWithShuffle - combine extracts from 256/512-bit vector shuffles.
We can only legally extract from the lowest 128-bit subvector, so extract the correct subvector to allow us to handle 256/512-bit vector element extracts.
David Green [Mon, 1 Feb 2021 10:24:57 +0000 (10:24 +0000)]
[ARM] Simplify extract of VMOVDRR
Under SoftFP calling conventions, we can be left with
extract(bitcast(BUILD_VECTOR(VMOVDRR(a, b), ..))) patterns that can
simplify to a or b, depending on the extract lane.
Differential Revision: https://reviews.llvm.org/D94990
Kazushi (Jam) Marukawa [Sat, 30 Jan 2021 03:34:06 +0000 (12:34 +0900)]
[VE] Change inetger constants 32-bit friendly
Correct integer constants like `1UL << 63` to `UINT64_C(1) << 63` in
order to make them work on 32-bit machines. Tested on both an i386
and x86_64 machines.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D95724
Florian Hahn [Mon, 1 Feb 2021 09:12:19 +0000 (09:12 +0000)]
[LoopUnswitch] Pacify compiler warnings.
Attempt to fix some compiler warnings on some bots after
b8c81fa5c7f77a7a1267e42ddbbc9bffb10b0817.
Florian Hahn [Mon, 1 Feb 2021 08:51:22 +0000 (08:51 +0000)]
[LoopUnswitch] Add shortcut if unswitched path is a no-op.
If we determine that the invariant path through the loop has no effects,
we can directly branch to the exit block, instead to unswitching first.
Besides avoiding some extra work (unswitching first, then deleting the
loop again) this allows to be more aggressive than regular unswitching
with respect to cost-modeling. This approach should always be be
desirable.
This is similar in spirit to D93734, just that it uses the previously
added checks for loop-unswitching.
I tried to add the required no-op checks from scratch, as we only check
a subset of the loop. There is potential to unify the checks with
LoopDeletion, at the cost of adding a predicate whether a block should
be considered.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95468
Jeroen Dobbelaere [Mon, 1 Feb 2021 08:23:33 +0000 (09:23 +0100)]
[LoopPeel] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed.
The reduction of a sanitizer build failure when enabling the dominance check (D95335) showed that loop peeling also needs to take care of scope duplication, just like loop unrolling (D92887).
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D95544
Raphael Isemann [Mon, 1 Feb 2021 08:42:14 +0000 (09:42 +0100)]
[lldb][docs] Attempt to disable the generated GitHub button on the LLDB website
For unknown reasons the alabaster theme on the docs server is always generating
a GitHub link in the side bar. Beside the privacy problems of having an iframe
to some third-party service, we never configured any GitHub integration so
this button just links to the GitHub main site.
The button generation should be disabled by default, but as that's apparently
not true in the alabaster theme on the server, this patch tries working around
the issue by just explicitly turning off the GitHub integration.
Tres Popp [Mon, 1 Feb 2021 08:43:03 +0000 (09:43 +0100)]
Revert "[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding"
This reverts commit
d9b953d84b332a8c4751fcbf8178e32818dc718b.
This commit resulted in build bot failures and the author is away from a
computer, so I am reverting on their behalf until they have a chance to
look into this.
Christian Sigg [Fri, 29 Jan 2021 13:55:34 +0000 (14:55 +0100)]
[mlir] Fix missing null termination in cuLinkAddData argument.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D95679
Hanhan Wang [Mon, 1 Feb 2021 08:02:26 +0000 (00:02 -0800)]
[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding
This is the last revision to migrate using SimplePadOp to PadTensorOp, and the
SimplePadOp is removed in the patch. Update a bit in SliceAnalysis because the
PadTensorOp takes a region different from SimplePadOp. This is not covered by
LinalgOp because it is not a structured op.
Also, remove a duplicated comment from cpp file, which is already described in a
header file. And update the pseudo-mlir in the comment.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D95671
Tobias Hieta [Fri, 29 Jan 2021 07:44:56 +0000 (08:44 +0100)]
[OpenMP] Fix python3 compatibility in openmp's lit.cfg
Differential Revision: https://reviews.llvm.org/D95669
Craig Topper [Mon, 1 Feb 2021 04:31:24 +0000 (20:31 -0800)]
[TableGen] Don't commute isel patterns if it would put an immAllOnesV or immAllZerosV on the left hand side.
This primarily occurs with isel patterns using vnot. This reduces
the number of variants in the isel tables.
We generally canonicalize build_vectors of constants to the RHS. I think
we might fail if there is a bitcast on the build_vector, but that
should be easy to fix if we can find a case. Usually the
bitcast is introduced by type legalization or lowering. It's
likely canonicalization would have already occured.
Serge Pavlov [Mon, 3 Feb 2020 10:44:42 +0000 (17:44 +0700)]
[FPEnv] Intrinsic for setting rounding mode
To set non-default rounding mode user usually calls function 'fesetround'
from standard C library. This way has some disadvantages.
* It creates unnecessary dependency on libc. On the other hand, setting
rounding mode requires few instructions and could be made by compiler.
Sometimes standard C library even is not available, like in the case of
GPU or AI cores that execute small kernels.
* Compiler could generate more effective code if it knows that a particular
call just sets rounding mode.
This change introduces new IR intrinsic, namely 'llvm.set.rounding', which
sets current rounding mode, similar to 'fesetround'. It however differs
from the latter, because it is a lower level facility:
* 'llvm.set.rounding' does not return any value, whereas 'fesetround'
returns non-zero value in the case of failure. In glibc 'fesetround'
reports failure if its argument is invalid or unsupported or if floating
point operations are unavailable on the hardware. Compiler usually knows
what core it generates code for and it can validate arguments in many
cases.
* Rounding mode is specified in 'fesetround' using constants like
'FE_TONEAREST', which are target dependent. It is inconvenient to work
with such constants at IR level.
C standard provides a target-independent way to specify rounding mode, it
is used in FLT_ROUNDS, however it does not define standard way to set
rounding mode using this encoding.
This change implements only IR intrinsic. Lowering it to machine code is
target-specific and will be implemented latter. Mapping of 'fesetround'
to 'llvm.set.rounding' is also not implemented here.
Differential Revision: https://reviews.llvm.org/D74729
Craig Topper [Mon, 1 Feb 2021 03:54:48 +0000 (19:54 -0800)]
[Mips] Cleanup isel patterns to use 'vnot' instead of (xor X, immAllOnesV). NFCI
A couple patterns used bitconvert on the immAllOnesV, but
the isel matching uses ISD::isBuildVectorAllOnes which
is able to look through bitcasts. So isel patterns don't need
to do it explicitly.
Craig Topper [Mon, 1 Feb 2021 03:41:31 +0000 (19:41 -0800)]
[PowerPC] Remove vnot_ppc and replace with the standard vnot.
immAllOnesV has special support for looking through bitcasts
automatically so isel patterns don't need to explicitly look
for the bitconvert.
Craig Topper [Mon, 1 Feb 2021 02:46:55 +0000 (18:46 -0800)]
[X86] Cleanup isel patterns to use 'vnot' instead of (xor X, immAllOnesV) to improve readability. NFC
Lang Hames [Mon, 1 Feb 2021 02:32:11 +0000 (13:32 +1100)]
Revert "[JITLink] Add missing symbols for ELF ehframe testcase, re-enable ...."
This reverts commit
6e58539659aea0ee621c7e267d825aa82d4e7e96.
This failed in http://lab.llvm.org:8011/#/builders/123/builds/2676. I guess
were're still missing some symbols, but unfortunately the specific error is
masked by a bug in python/lit that hides stderr. This test will have to remain
disabled on Windows until I can get help to debug it further.
Craig Topper [Mon, 1 Feb 2021 01:37:44 +0000 (17:37 -0800)]
[RISCV] Custom lower fshl/fshr with Zbt extension.
We need to add a mask to the shift amount for these operations
to use the FSR/FSL instructions. We were previously doing this
in isel patterns, but custom lowering will make the mask
visible to optimizations earlier.
Lang Hames [Mon, 1 Feb 2021 01:21:18 +0000 (12:21 +1100)]
[JITLink] Add missing symbols for ELF ehframe testcase, re-enable on Windows.
This testcase was failing on windows due to missing definitions. This commit
adds definitions of the missing symbols (as absolute symbols) to eliminate the
errors.
Mike Rice [Mon, 1 Feb 2021 01:14:16 +0000 (17:14 -0800)]
[OpenMP] Fix comment and assertion strings (NFC).
James Y Knight [Mon, 1 Feb 2021 00:47:37 +0000 (19:47 -0500)]
Fix test in "CFG: Create scope for non-compound range-for body."
The constant 4 is sometimes printed as "4L", or "4LL", in CFG dump
output, depending on platform; accept all variants.
Ammends commit
8f670d5b6d8f39bf9bf1d142dacef3afaed6d70b.
Jun Ma [Tue, 26 Jan 2021 06:57:46 +0000 (14:57 +0800)]
[CodeGenPrepare] Also skip lifetime.end intrinsic when check return block in dupRetToEnableTailCallOpts.
Differential Revision: https://reviews.llvm.org/D95424
Luís Marques [Sun, 31 Jan 2021 23:56:01 +0000 (23:56 +0000)]
[Sanitizer][RISCV] Fix FastUnwindTest
Fixes the `FastUnwindTest` unit test for RISC-V.
These changes reflect the different stack organization commonly used for
that architecture.
Differential Revision: https://reviews.llvm.org/D90574
Luís Marques [Sun, 31 Jan 2021 23:51:38 +0000 (23:51 +0000)]
[CMake][compiler-rt][RISCV] Support RISC-V cross-compilation
This seems to be a safe way to ensure that the Compiler-RT test compiler
flags are properly set in all cross-compilation scenarios. Without this
when `BUILTINS_TEST_TARGET_CFLAGS` is set in
`compiler-rt/test/builtins/CMakeLists.txt` the other flags are cleared.
Differential Revision: https://reviews.llvm.org/D92124
James Y Knight [Sun, 31 Jan 2021 23:42:39 +0000 (18:42 -0500)]
CFG: Create scope for non-compound range-for body.
Previously, it was omitting the destructor call from the CFG, which
could result in incorrect diagnostics.
Craig Topper [Sun, 31 Jan 2021 06:38:06 +0000 (22:38 -0800)]
[RISCV][LegalizeTypes] Try to expand BSWAP before promoting if the promoted BSWAP would expand anyway.
If we're going to end up expanding anyway, we should do it early
so we don't create extra operations to handle the bytes added by
promotion.
This is helfpul on RISCV where we might have to promote i16 all
the way to i64.
Differential Revision: https://reviews.llvm.org/D95756
Jacques Pienaar [Sun, 31 Jan 2021 22:06:58 +0000 (14:06 -0800)]
Fix omitted kw in type alias printer
* Fixing missing `type` keyword in alias print
* Add test for large tuple type alias & rerun output to verify printed
form can be parsed (which caught the above).
Luís Marques [Sun, 31 Jan 2021 21:52:32 +0000 (21:52 +0000)]
[LSan][RISCV] Enable LSan for RISCV64
Fixes the broken RISCV64 implementation of `internal_clone` and
adds RISCV64 support for LSan.
Differential Revision: https://reviews.llvm.org/D92403
Florian Hahn [Sun, 31 Jan 2021 19:08:07 +0000 (19:08 +0000)]
[LTOCodeGenerator] Use lto::Config for options (NFC).
This patch removes some options that have been duplicated in
LTOCodeGenerator and instead use lto::Config directly to manage the
options.
This is a cleanup after
6a59f0560648.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D95738
Florian Hahn [Thu, 28 Jan 2021 10:35:30 +0000 (10:35 +0000)]
[ConstraintElimination] Add tests for ICMP_EQ predicates.
Pre-commit test coverage for conditions with EQ predicates.
Michał Górny [Wed, 27 Jan 2021 14:34:15 +0000 (15:34 +0100)]
[lldb] [Process/FreeBSDRemote] Introduce arm (32-bit) support
Introduce a NativeRegisterContextFreeBSD for 32-bit ARM platform.
This includes support for GPR + VFP registers as exposed by FreeBSD's
ptrace(2) API. Hardware breakpoints or watchpoints are not supported
due to missing kernel support. The code is roughly based on the arm64
context.
It also includes an override for GetSoftwareBreakpointTrapOpcode() based
on the matching code in the PlatformFreeBSD plugin.
Differential Revision: https://reviews.llvm.org/D95696
Michał Górny [Thu, 21 Jan 2021 18:30:56 +0000 (19:30 +0100)]
[lldb] [Process/FreeBSDRemote] Introduce arm64 support
Introduce arm64 support in the FreeBSDRemote plugin. The code
is roughly based on Linux and reuses the same POSIX RegisterInfos
(but the buffers need to be a few bytes larger due to stricter struct
member alignment in FreeBSD structures -- luckily, they do not affect
the actual member offsets). It supports reading and writing
general-purpose and FPU registers. SVE and hardware watchpoint support
is missing due to the limitations of FreeBSD ptrace(2) API.
Differential Revision: https://reviews.llvm.org/D95297
Kazu Hirata [Sun, 31 Jan 2021 18:23:43 +0000 (10:23 -0800)]
[llvm] Drop unnecessary const from return types (NFC)
Identified with const-return-type.
Kazu Hirata [Sun, 31 Jan 2021 18:23:41 +0000 (10:23 -0800)]
[TableGen] Use ListSeparator (NFC)
Kazu Hirata [Sun, 31 Jan 2021 18:23:39 +0000 (10:23 -0800)]
[VE] Fix compiler warnings (NFC)
Matt Arsenault [Mon, 18 Jan 2021 14:53:55 +0000 (09:53 -0500)]
RegAlloc: Fix assert if all registers in class reserved
With a context instruction, this would produce a context
error. However, it would continue on and do an out of bounds access of
the empty allocation order array.
Matt Arsenault [Thu, 28 Jan 2021 20:40:38 +0000 (15:40 -0500)]
AMDGPU: Add missing consts
Sam McCall [Sun, 31 Jan 2021 15:37:42 +0000 (16:37 +0100)]
Reland [clangd] Quote/escape argv included in log messages.
... but don't apply it where we're using hasSubstr
This reverts commit
7a8008d0e8885d22ff9a1fa7f9965c7b2ad2569a.
Sam McCall [Sun, 31 Jan 2021 15:21:44 +0000 (16:21 +0100)]
Revert "[clangd] Quote/escape argv included in log messages."
This reverts commit
0962f1d72b1606f3224a14434c7b4500a23f8728.
http://45.33.8.238/win/32346/step_9.txt
Alexey Lapshin [Tue, 1 Dec 2020 20:15:34 +0000 (23:15 +0300)]
[dsymutil][DWARFLinker][NFC] make AddressManager not depending on the order of checks for relocations.
Current dsymutil implementation of hasLiveMemoryLocation()/hasLiveAddressRange()
and applyValidRelocs() assume that calls should be done in certain order
(from first Dies to last). Multi-thread implementation might call these methods
in other order(it might process compilation units in order other than they are physically
located), so we remove restriction that searching for relocations should be done
in ascending order. This change does not introduce noticable performance degradation.
The testing results for clang binary:
golden-dsymutil/dsymutil
23787992
clang MD5:
5efa8fd9355ebf81b65f24db5375caa2
elapsed time=91sec
build-Release/bin/dsymutil
23855616
clang MD5:
5efa8fd9355ebf81b65f24db5375caa2
elapsed time=91sec
Differential Revision: https://reviews.llvm.org/D93106
Mark de Wever [Sun, 31 Jan 2021 13:25:01 +0000 (14:25 +0100)]
[libc++] Allow building with C++17.
After committing D92214 it was noticed libc++ no longer builds with
C++17. For now reenable building with C++17. This is intended to be a
temporary measure in the future a C++20 capable compiler will be
required.
Sam McCall [Sun, 31 Jan 2021 11:13:20 +0000 (12:13 +0100)]
[clangd] Remove references to old future-based API. NFC
Sam McCall [Sun, 31 Jan 2021 11:00:08 +0000 (12:00 +0100)]
[clangd] Quote/escape argv included in log messages.
https://github.com/clangd/clangd/issues/637
Sam McCall [Sun, 31 Jan 2021 10:16:52 +0000 (11:16 +0100)]
[docs] Clarify compile_flags.txt subtleties
See confusion e.g. in https://github.com/clangd/clangd/issues/637
Craig Topper [Sun, 31 Jan 2021 05:30:14 +0000 (21:30 -0800)]
[RISCV] Add rv64 command line to bswap-ctlz-cttz-ctpop.ll.
Matthias Springer [Sun, 31 Jan 2021 02:57:50 +0000 (11:57 +0900)]
[mlir][AVX512] Fix result type of vp2intersect
The result values of vp2intersect are vectors of bits, i.e.,
vector<8xi1> or vector<16xi8> (instead of i8 or i16).
Differential Revision: https://reviews.llvm.org/D95678
peter klausler [Sat, 30 Jan 2021 18:14:07 +0000 (10:14 -0800)]
[flang] Improve shape & length characterization
Analyze the shape of the result of TRANSFER(ptr,array) correctly
when "ptr" is an array of deferred shape. Fixing this bug led to
some refactoring and concentration of common code in TypeAndShape
member functions with code in general shape and character length
analysis, and this led to some regression test failures that have
all been cleaned up.
Differential Revision: https://reviews.llvm.org/D95744
Craig Topper [Sat, 30 Jan 2021 23:57:12 +0000 (15:57 -0800)]
[RISCV] Use MVT instead of EVT in RISCVISelDAGToDAG.cpp
All this code runs post type legalization so we should have
exclusively legal types. The methods on MVT should be more
efficient than EVT.
Craig Topper [Sat, 30 Jan 2021 21:14:46 +0000 (13:14 -0800)]
[TableGen] Use emplace_back to add to PatternsToMatch in GenerateVariants. Use std::move when adding to PatternsToMatch in AddPatternToMatch.
We already used emplace_back in at least one other place so be
consistent.
AddPatternToMatch already took PTM as an rvalue reference, but
we need to use std::move again to move it into the PatternToMatch
vector.
Craig Topper [Sat, 30 Jan 2021 20:19:14 +0000 (12:19 -0800)]
[TableGen] Avoid a couple vector copies in ExpandHwModeBasedTypes.
Use vector::swap instead of copying to a local vector and clearing
the original. We can just swap into the just created local vector
instead which will move the pointers and not the data.
Use std::move in another place to avoid a copy.
Shilei Tian [Sat, 30 Jan 2021 20:14:41 +0000 (15:14 -0500)]
[OpenMP][NVPTX] Refined CMake logic to choose compute capabilites
This patch refines the logic to choose compute capabilites via the
environment variable `LIBOMPTARGET_NVPTX_COMPUTE_CAPABILITIES`. It supports the
following values (all case insensitive):
- "all": Build `deviceRTLs` for all supported compute capabilites;
- "auto": Only build for the compute capability auto detected. Note that this
requires CUDA. If CUDA is not found, a CMake fatal error will be raised.
- "xx,yy" or "xx;yy": Build for compute capabilities `xx` and `yy`.
If `LIBOMPTARGET_NVPTX_COMPUTE_CAPABILITIES` is not set, it is equivalent to set
it to `all`.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95687
Florian Hahn [Sat, 30 Jan 2021 17:56:51 +0000 (17:56 +0000)]
[ConstraintElimination] Verify CS and DFSInStack are in sync.(NFC)
After the main loop is done, we should have one constraint per item in
DFSInStack. Otherwise we added a constraint without a proper DFSInStack
item.
Kazu Hirata [Sat, 30 Jan 2021 17:53:42 +0000 (09:53 -0800)]
[llvm] Add missing header guards (NFC)
Identified with llvm-header-guard.
Kazu Hirata [Sat, 30 Jan 2021 17:53:40 +0000 (09:53 -0800)]
[AMDGPU] Forward-declare AMDGPUTargetMachine (NFC)
AMDGPUTargetTransformInfo.h needs AMDGPUTargetMachine but relies on a
forward declaration of AMDGPUTargetMachine in AMDGPU.h. This patch
adds a forward declaration right in AMDGPUTargetTransformInfo.h.
While we are at it, this patch removes the one in
AMDGPU.h, where it is unnecessary.
Kazu Hirata [Sat, 30 Jan 2021 17:53:38 +0000 (09:53 -0800)]
[TableGen] Use ListSeparator (NFC)
Stephen Kelly [Sat, 30 Jan 2021 15:46:08 +0000 (15:46 +0000)]
[ASTMatchers] Fix definition of decompositionDecl
Fraser Cormack [Sat, 30 Jan 2021 15:47:16 +0000 (15:47 +0000)]
[RISCV] Update extractelt tests to sign-extend results (NFC)
This demonstrates a missed optimization: the `vmv.x.s` instruction is
used to extract the element from the vector, and this instruction
already sign-extends the value to XLEN.
Georgii Rymar [Thu, 28 Jan 2021 13:35:18 +0000 (16:35 +0300)]
[llvm-symbolizer] - Fix the crash in GNU output style with --no-inlines and missing input file.
Fixes https://bugs.llvm.org/show_bug.cgi?id=48882.
If the input file does not exist (or has a reading error), the
following code will crash if there are two or more input addresses.
```
auto ResOrErr = Symbolizer.symbolizeInlinedCode(
ModuleName, {Offset, object::SectionedAddress::UndefSection});
Printer << (error(ResOrErr) ? DILineInfo() : ResOrErr.get().getFrame(0));
```
For the first address, `symbolizeInlinedCode` returns an error.
For the second address, `symbolizeInlinedCode` returns an empty result
(not an error) and `.getFrame(0)` will crash.
Differential revision: https://reviews.llvm.org/D95609
Stephen Kelly [Thu, 28 Jan 2021 13:12:43 +0000 (13:12 +0000)]
Fix traversal with hasDescendant into lambdas
Differential Revision: https://reviews.llvm.org/D95607
Florian Hahn [Sat, 30 Jan 2021 13:30:48 +0000 (13:30 +0000)]
[LoopUnswitch] Properly update MSSA if header has non-clobbering stores.
This patch fixes updating MemorySSA if the header contains memory
defs that do not clobber a duplicated instruction. We need to find the
first defining access outside the loop body and use that as defining
access of the duplicated instruction.
This fixes a crash caused by
bee486851c1a.
Stephen Kelly [Wed, 27 Jan 2021 22:03:23 +0000 (22:03 +0000)]
[ASTMatchers] Fix traversal below range-for elements
Differential Revision: https://reviews.llvm.org/D95562
Harald van Dijk [Sat, 30 Jan 2021 13:06:08 +0000 (13:06 +0000)]
[compiler-rt][tests] Define TARGET_FLAGS
D36116 refactored the logic of tests and removed the definition of TARGET_FLAGS, but left one use of it. Restore its definition for that one use, so that an x86_64 test is compiled with -m64.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D93634
Florian Hahn [Sat, 30 Jan 2021 11:50:37 +0000 (11:50 +0000)]
[LTO] Add option enable NewPM with LTOCodeGenerator.
This patch adds an option to enable the new pass manager in
LTOCodeGenerator. It also updates a few tests with legacy PM specific
tests, which started failing after
6a59f0560648 when
LLVM_ENABLE_NEW_PASS_MANAGER=true.
Florian Hahn [Sat, 30 Jan 2021 10:09:55 +0000 (10:09 +0000)]
[LTO] Use lto::backend for code generation.
This patch updates LTOCodeGenerator to use the utilities provided by
LTOBackend to run middle-end optimizations and backend code generation.
This is a first step towards unifying the code used by libLTO's C API
and the newer, C++ interface (see PR41541).
The immediate motivation is to allow using the new pass manager when
doing LTO using libLTO's C API, which is used on Darwin, among others.
With the changes, there are no codegen/stats differences when building
MultiSource/SPEC2000/SPEC2006 on Darwin X86 with LTO, compared
to without the patch.
Reviewed By: steven_wu
Differential Revision: https://reviews.llvm.org/D94487
Fangrui Song [Sat, 30 Jan 2021 08:51:36 +0000 (00:51 -0800)]
[ELF][test] Add --emit-relocs --gc-sections test for relocation section for a non-SHF_ALLOC section
This has been fixed by D89841.
Kazu Hirata [Sat, 30 Jan 2021 07:23:37 +0000 (23:23 -0800)]
[llvm] Use isa instead of dyn_cast (NFC)
Kazu Hirata [Sat, 30 Jan 2021 07:23:35 +0000 (23:23 -0800)]
[llvm] Use llvm::lower_bound and llvm::upper_bound (NFC)
Kazu Hirata [Sat, 30 Jan 2021 07:23:34 +0000 (23:23 -0800)]
[llvm] Use append_range (NFC)
Yang Fan [Sat, 30 Jan 2021 06:52:43 +0000 (14:52 +0800)]
[NFC][VFS] Fix a build warning due to an extra semicolon
Greg McGary [Fri, 11 Dec 2020 05:36:42 +0000 (21:36 -0800)]
[lld-macho][NFC] Add new option group for versions
Coalesce all version control options into a group
Differential Revision: https://reviews.llvm.org/D94938
Greg McGary [Fri, 11 Dec 2020 04:54:45 +0000 (20:54 -0800)]
[llvm-objdump-macho] print per-second-level-page encodings for option --unwind-info
Compact unwind entries have 8 bits for the encoding-table offset:
* offsets 0..126 reference the global commmon-encodings table, while
* offsets 127..255 reference a per-second-level-page table.
This diff teaches `llvm-objdump` to print this per-page encodings table.
Differential Revision: https://reviews.llvm.org/D93265
Wang, Pengfei [Sat, 30 Jan 2021 04:00:55 +0000 (12:00 +0800)]
[X86] Fix tile config register spill issue.
This is an optimized approach for D94155.
Previous code build the model that tile config register is the user of
each AMX instruction. There is a problem for the tile config register
spill. When across function, the ldtilecfg instruction may be inserted
on each AMX instruction which use tile config register. This cause all
tile data register clobber.
To fix this issue, we remove the model of tile config register. Instead,
we analyze the AMX instructions between one call to another. We will
insert ldtilecfg after the first call if we find any AMX instructions.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D95136
Sriraman Tallam [Sat, 30 Jan 2021 02:47:26 +0000 (18:47 -0800)]
Detect Source Drift with Propeller.
Source Drift happens when the sources are updated after profiling the binary
but before building the final optimized binary. If the source has changed since
the profiles were obtained, optimizing basic blocks might be sub-optimal. This
only applies to BasicBlockSection::List as it creates clusters of basic blocks
using basic block ids. Source drift can invalidate these groupings leading to
sub-optimal code generation with regards to performance.
PGO source drift for a particular function can be detected using function
metadata added in D95495.
When source drift is deected, disable basic block clusters by default
which can be re-enabled with -mllvm option
bbsections-detect-source-drift=false.
Differential Revision: https://reviews.llvm.org/D95593
Jacques Pienaar [Sat, 30 Jan 2021 01:42:23 +0000 (17:42 -0800)]
Use type alias for large tuples
Tuples can occupy quite a lot of space, instead of printing out tuple type
everywhere, just use the type alias if larger (arbitrarily chose a bound for
now).
Differential Revision: https://reviews.llvm.org/D95707
Craig Topper [Sat, 30 Jan 2021 01:32:01 +0000 (17:32 -0800)]
[RISCV] Merge rv32 and rv64 vector fadd/fsub/fmul/fdiv sdnode tests into single tests files with 2 run lines.
The IR and CHECK lines are identical so just keep one copy.