Tom Stellard [Tue, 17 Jun 2014 16:53:14 +0000 (16:53 +0000)]
R600: Use LDS and vectors for private memory
llvm-svn: 211110
Tom Stellard [Tue, 17 Jun 2014 16:53:09 +0000 (16:53 +0000)]
R600/SI: Add a pattern for llvm.AMDGPU.barrier.global
llvm-svn: 211109
Tom Stellard [Tue, 17 Jun 2014 16:53:07 +0000 (16:53 +0000)]
SelectionDAG: Expand i64 = FP_TO_SINT i32
llvm-svn: 211108
Tom Stellard [Tue, 17 Jun 2014 16:53:04 +0000 (16:53 +0000)]
R600/SI: Re-initialize the m0 register after using it for indirect addressing
We need to store a value greater than or equal to the number of LDS
bytes allocated by the shader in the m0 register in order for LDS
instructions to work correctly.
We always initialize m0 at the beginning of a shader, but this register
is also used for indirect addressing offsets, so we need to
re-initialize it any time we use indirect addressing.
llvm-svn: 211107
Rui Ueyama [Tue, 17 Jun 2014 16:19:33 +0000 (16:19 +0000)]
[PECOFF] Support COMDAT associative sections.
COFF supports a feature similar to ELF's section groups. This
patch implements it.
In ELF, section groups are identified by their names, and they are
treated somewhat differently from regular symbols. In COFF, the
feature is realized in a more straightforward way. A section can
have an annotation saying "if Nth section is linked, link this
section too."
I added a new reference type, kindAssociate. If a target atom is
coalesced away, the referring atom is removed by Resolver, so that
they are treated as a group.
Differential Revision: http://reviews.llvm.org/D4028
llvm-svn: 211106
Todd Fiala [Tue, 17 Jun 2014 16:04:45 +0000 (16:04 +0000)]
Added gdb-remote auxv tests.
First batch of auxv-related tests from llgs branch.
Includes helpers for unescaping gdb-remote binary-escaped
data, converting binary data from inferior endian-ness to
integral values, etc.
Tests on debugserver are expected to be skipped since it
doesn't support auxv and the tests are geared to be skipped
on platforms that don't broadcast support for the feature
in qSupported. (llgs is listed as XFAIL since qSupported
support in llgs upstream is not there, so the support check
cannot work in upstream llgs.)
llvm-svn: 211105
Juergen Ributzka [Tue, 17 Jun 2014 14:47:45 +0000 (14:47 +0000)]
[FastISel][X86] Fix previous refactoring commit (r211077)
Overlooked that fcmp_une uses an "or" instead of an "and" for combining the
flags.
llvm-svn: 211104
Dinesh Dwivedi [Tue, 17 Jun 2014 14:34:19 +0000 (14:34 +0000)]
Fixed jump threading going to infinite loop.
This patch add code to remove unreachable blocks from function
as they may cause jump threading to stuck in infinite loop.
Differential Revision: http://reviews.llvm.org/D3991
llvm-svn: 211103
Ed Maste [Tue, 17 Jun 2014 14:14:33 +0000 (14:14 +0000)]
Avoid crashing on invalid or unreadable ELF core
Issue discovered during the GSoC 2014 project implementing FreeBSD
kernel support. The existing elf-core Process plugin crashed trying
to read from /dev/mem (the kernel memory device).
Patch by Mike Ma.
llvm-svn: 211102
James Molloy [Tue, 17 Jun 2014 13:11:27 +0000 (13:11 +0000)]
Rewrite ARM NEON intrinsic emission completely.
There comes a time in the life of any amateur code generator when dumb string
concatenation just won't cut it any more. For NeonEmitter.cpp, that time has
come.
There were a bunch of magic type codes which meant different things depending on
the context. There were a bunch of special cases that really had no reason to be
there but the whole thing was so creaky that removing them would cause something
weird to fall over. There was a 1000 line switch statement for code generation
involving string concatenation, which actually did lexical scoping to an extent
(!!) with a bunch of semi-repeated cases.
I tried to refactor this three times in three different ways without
success. The only way forward was to rewrite the entire thing. Luckily the
testing coverage on this stuff is absolutely massive, both with regression tests
and the "emperor" random test case generator.
The main change is that previously, in arm_neon.td a bunch of "Operation"s were
defined with special names. NeonEmitter.cpp knew about these Operations and
would emit code based on a huge switch. Actually this doesn't make much sense -
the type information was held as strings, so type checking was impossible. Also
TableGen's DAG type actually suits this sort of code generation very well
(surprising that...)
So now every operation is defined in terms of TableGen DAGs. There are a bunch
of operators to use, including "op" (a generic unary or binary operator), "call"
(to call other intrinsics) and "shuffle" (take a guess...). One of the main
advantages of this apart from making it more obvious what is going on, is that
we have proper type inference. This has two obvious advantages:
1) TableGen can error on bad intrinsic definitions easier, instead of just
generating wrong code.
2) Calls to other intrinsics are typechecked too. So
we no longer need to work out whether the thing we call needs to be the Q-lane
version or the D-lane version - TableGen knows that itself!
Here's an example: before:
case OpAbdl: {
std::string abd = MangleName("vabd", typestr, ClassS) + "(__a, __b)";
if (typestr[0] != 'U') {
// vabd results are always unsigned and must be zero-extended.
std::string utype = "U" + typestr.str();
s += "(" + TypeString(proto[0], typestr) + ")";
abd = "(" + TypeString('d', utype) + ")" + abd;
s += Extend(utype, abd) + ";";
} else {
s += Extend(typestr, abd) + ";";
}
break;
}
after:
def OP_ABDL : Op<(cast "R", (call "vmovl", (cast $p0, "U",
(call "vabd", $p0, $p1))))>;
As an example of what happens if you do something wrong now, here's what happens
if you make $p0 unsigned before the call to "vabd" - that is, $p0 -> (cast "U",
$p0):
arm_neon.td:574:1: error: No compatible intrinsic found - looking up intrinsic 'vabd(uint8x8_t, int8x8_t)'
Available overloads:
- float64x2_t vabdq_v(float64x2_t, float64x2_t)
- float64x1_t vabd_v(float64x1_t, float64x1_t)
- float64_t vabdd_f64(float64_t, float64_t)
- float32_t vabds_f32(float32_t, float32_t)
... snip ...
This makes it seriously easy to work out what you've done wrong in fairly nasty
intrinsics.
As part of this I've massively beefed up the documentation in arm_neon.td too.
Things still to do / on the radar:
- Testcase generation. This was implemented in the previous version and not in
the new one, because
- Autogenerated tests are not being run. The testcase in test/ differs from
the autogenerated version.
- There were a whole slew of special cases in the testcase generation that just
felt (and looked) like hacks.
If someone really feels strongly about this, I can try and reimplement it too.
- Big endian. That's coming soon and should be a very small diff on top of this one.
llvm-svn: 211101
James Molloy [Tue, 17 Jun 2014 13:10:38 +0000 (13:10 +0000)]
Move SetTheory from utils/TableGen into lib/TableGen so Clang can use it.
llvm-svn: 211100
Simon Atanasyan [Tue, 17 Jun 2014 13:08:11 +0000 (13:08 +0000)]
[Mips] Make plt-header.test test case independent from external input files.
llvm-svn: 211099
Daniel Jasper [Tue, 17 Jun 2014 12:40:34 +0000 (12:40 +0000)]
clang-format: Introduce style with spaces on both sides of */&.
Patch by Janusz Sobczak (slightly extended).
This fixes llvm.org/19929.
llvm-svn: 211098
James Molloy [Tue, 17 Jun 2014 12:31:41 +0000 (12:31 +0000)]
Fix memory leak of RegScavenger accidentally added in r211037.
llvm-svn: 211097
Alexey Bataev [Tue, 17 Jun 2014 11:49:22 +0000 (11:49 +0000)]
[OPENMP] Initial support for '#pragma omp for'.
llvm-svn: 211096
Tim Northover [Tue, 17 Jun 2014 11:31:42 +0000 (11:31 +0000)]
AArch64: estimate inline asm length during branch relaxation
To make sure branches are in range, we need to do a better job of estimating
the length of an inline assembly block than "it's probably 1 instruction, who'd
write asm with more than that?".
Fortunately there's already a (highly suspect, see how many ways you can think
of to break it!) callback for this purpose, which is used by the other targets.
rdar://problem/
17277590
llvm-svn: 211095
Evgeniy Stepanov [Tue, 17 Jun 2014 11:26:00 +0000 (11:26 +0000)]
[msan] Fix a comment.
llvm-svn: 211094
Dmitri Gribenko [Tue, 17 Jun 2014 09:33:24 +0000 (09:33 +0000)]
ConvertUTF tests: remove uses of initializer lists to restore compatibility
with MSVC
llvm-svn: 211093
Evgeniy Stepanov [Tue, 17 Jun 2014 09:23:12 +0000 (09:23 +0000)]
[msan] Fix handling of multiplication by a constant with a number of trailing zeroes.
Multiplication by an integer with a number of trailing zero bits leaves
the same number of lower bits of the result initialized to zero.
This change makes MSan take this into account in the case of multiplication by
a compile-time constant.
We don't handle the general, non-constant, case because
(a) it's not going to be cheap (computation-wise);
(b) multiplication by a partially uninitialized value in user code is
a bad idea anyway.
Constant case must be handled because it appears from LLVM optimization of a
completely valid user code, as the test case in compiler-rt demonstrates.
llvm-svn: 211092
Justin Bogner [Tue, 17 Jun 2014 06:52:47 +0000 (06:52 +0000)]
Support: Inject LLVM_VERSION_INFO into the Support library
Mimic r116632 in passing LLVM_VERSION_INFO from the Makefile build
system to the build. This improves the -version output of tools that
use llvm::cl under the configure+make system.
llvm-svn: 211091
Justin Bogner [Tue, 17 Jun 2014 06:52:41 +0000 (06:52 +0000)]
tools: Add a space between package version and LLVM_VERSION_INFO
This reads a little strangely. Add a space to clean it up.
llvm-svn: 211090
Rafael Espindola [Tue, 17 Jun 2014 03:00:40 +0000 (03:00 +0000)]
Convert a few loops to use ranges.
llvm-svn: 211089
Alexey Bataev [Tue, 17 Jun 2014 02:32:07 +0000 (02:32 +0000)]
[OPENMP] Renamed 'DataRecursiveASTVisitor' to just 'RecursiveASTVisitor' for 'reduction' clause and small reformatting after Alp Toker's review.
llvm-svn: 211088
Jordan Rose [Tue, 17 Jun 2014 02:15:40 +0000 (02:15 +0000)]
Add an overload for SourceMgr::PrintMessage that takes an existing diagnostic.
llvm-svn: 211087
Jordan Rose [Tue, 17 Jun 2014 02:15:36 +0000 (02:15 +0000)]
Modernize doc comments for SourceMgr.
No functionality change.
llvm-svn: 211086
Bob Wilson [Tue, 17 Jun 2014 00:45:30 +0000 (00:45 +0000)]
Add documentation for PGO with instrumentation to clang's User's Manual.
<rdar://problem/
16771671>
llvm-svn: 211085
Jingyue Wu [Tue, 17 Jun 2014 00:42:07 +0000 (00:42 +0000)]
[InstCombine] mark ADD with nuw if no unsigned overflow
Summary:
As a starting step, we only use one simple heuristic: if the sign bits
of both a and b are zero, we can prove "add a, b" do not unsigned
overflow, and thus convert it to "add nuw a, b".
Updated all affected tests and added two new tests (@zero_sign_bit and
@zero_sign_bit2) in AddOverflow.ll
Test Plan: make check-all
Reviewers: eliben, rafael, meheff, chandlerc
Reviewed By: chandlerc
Subscribers: chandlerc, llvm-commits
Differential Revision: http://reviews.llvm.org/D4144
llvm-svn: 211084
Zachary Turner [Tue, 17 Jun 2014 00:38:40 +0000 (00:38 +0000)]
Fix build breakage caused by change to ValueMapTest.
llvm-svn: 211083
Duncan P. N. Exon Smith [Tue, 17 Jun 2014 00:19:35 +0000 (00:19 +0000)]
SROA: Only split loads on byte boundaries
r199771 accidently broke the logic that makes sure that SROA only splits
load on byte boundaries. If such a split happens, some bits get lost
when reassembling loads of wider types, causing data corruption.
Move the width check up to reject such splits early, avoiding the
corruption. Fixes PR19250.
Patch by: Björn Steinbrink <bsteinbr@gmail.com>
llvm-svn: 211082
Hans Wennborg [Tue, 17 Jun 2014 00:19:12 +0000 (00:19 +0000)]
Add support for the /Fi argument to clang-cl (PR20036)
Patch by Ehsan Akhgari!
Differential Revision: http://reviews.llvm.org/D4143
llvm-svn: 211081
Zachary Turner [Tue, 17 Jun 2014 00:17:38 +0000 (00:17 +0000)]
Expose ValueMap's mutex type as a typedef instead of a sys::Mutex.
This enables static polymorphism of the mutex type, which is
necessary in order to replace the standard mutex implementation
with a different type.
llvm-svn: 211080
Hans Wennborg [Tue, 17 Jun 2014 00:09:05 +0000 (00:09 +0000)]
MS static locals mangling: don't double-increment mangling number for switches
Differential Revision: http://reviews.llvm.org/D4165
llvm-svn: 211079
Hans Wennborg [Tue, 17 Jun 2014 00:00:18 +0000 (00:00 +0000)]
MS static locals mangling: don't count enum scopes
We may not have the mangling for static locals vs. enums completely figured out,
but at least for my simple test cases, enums should not increment the mangling
number.
Differential Revision: http://reviews.llvm.org/D4164
llvm-svn: 211078
Juergen Ributzka [Mon, 16 Jun 2014 23:58:24 +0000 (23:58 +0000)]
[FastISel][X86] Refactor the code to get the X86 condition from a helper function. NFC.
Make use of helper functions to simplify the branch and compare instruction
selection in FastISel. Also add test cases for compare and conditonal branch.
llvm-svn: 211077
Eli Bendersky [Mon, 16 Jun 2014 23:53:02 +0000 (23:53 +0000)]
Teach LoopUnrollPass to respect loop unrolling hints in metadata.
[This is resubmitting r210721, which was reverted due to suspected breakage
which turned out to be unrelated].
Some extra review comments were addressed. See D4090 and D4147 for more details.
The Clang change that produces this metadata was committed in r210667
Patch by Mark Heffernan.
llvm-svn: 211076
Brad Smith [Mon, 16 Jun 2014 23:03:00 +0000 (23:03 +0000)]
Use the integrated assembler by default on OpenBSD/powerpc.
llvm-svn: 211075
Kuba Brecka [Mon, 16 Jun 2014 22:55:16 +0000 (22:55 +0000)]
Don't hardcode path to codesign_allocate.
Building OS X debugserver assumes you have an Xcode installation at /Application/Xcode.app. Let's instead detect where Xcode is using xcrun.
See http://reviews.llvm.org/D4152
llvm-svn: 211074
Greg Clayton [Mon, 16 Jun 2014 22:53:16 +0000 (22:53 +0000)]
Correctly classify code sections as code sections by using the S_ATTR_PURE_INSTRUCTIONS and S_ATTR_SOME_INSTRUCTIONS section flags.
Also correctly set the symbol type of symbols for S_REGULAR and other section types.
<rdar://problem/
16896734>
llvm-svn: 211073
Zachary Turner [Mon, 16 Jun 2014 22:49:41 +0000 (22:49 +0000)]
Revert r211066, 211067, 211068, 211069, 211070.
These were committed accidentally from the wrong branch before having
a review sign-off.
llvm-svn: 211072
Zachary Turner [Mon, 16 Jun 2014 22:41:08 +0000 (22:41 +0000)]
Cleanup more unreferenced MutexGuard parameters on functions.
These parameters are intended to serve as sort of a contract that
you cannot access the functions outside of a mutex. However, the
entire JIT class cannot be accessed outside of a mutex anyway, and
all methods acquire a lock as soon as they are entered. Since the
containing class already is not intended to be thread-safe, it only
serves to add code clutter.
llvm-svn: 211071
Zachary Turner [Mon, 16 Jun 2014 22:40:48 +0000 (22:40 +0000)]
Programmer's Manual changes.
llvm-svn: 211070
Zachary Turner [Mon, 16 Jun 2014 22:40:42 +0000 (22:40 +0000)]
Kill the LLVM global lock.
llvm-svn: 211069
Zachary Turner [Mon, 16 Jun 2014 22:40:29 +0000 (22:40 +0000)]
Remove some code churn.
llvm-svn: 211068
Zachary Turner [Mon, 16 Jun 2014 22:40:17 +0000 (22:40 +0000)]
Remove some more code out into a separate CL.
llvm-svn: 211067
Zachary Turner [Mon, 16 Jun 2014 22:39:38 +0000 (22:39 +0000)]
Users of the llvm global mutex must now acquire it manually.
This allows the mutex to be acquired in a guarded, RAII fashion.
llvm-svn: 211066
Aaron Watry [Mon, 16 Jun 2014 22:32:58 +0000 (22:32 +0000)]
Fix definition of INFINITY and add NAN/HUGE_VAL[F]
v3: change __builtin_nanf() to __builtin_nanf("")
This doesn't work yet, but it was agreed to commit as-is with the logic
that "broken" is better than "completely missing" and this should be
fixed in clang.
v2: use __builtin_inff() and also add nan/huge_val definitions
Signed-off-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 211065
Jim Grosbach [Mon, 16 Jun 2014 22:18:26 +0000 (22:18 +0000)]
AArch64: Fix silly think-o in tests.
rdar://9283021
llvm-svn: 211064
Jeroen Ketema [Mon, 16 Jun 2014 22:15:50 +0000 (22:15 +0000)]
Add remaining float constants
Reviewed-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 211062
Reed Kotler [Mon, 16 Jun 2014 22:05:47 +0000 (22:05 +0000)]
Add load/store functionality
Summary:
This patches allows non conversions like i1=i2; where both are global ints.
In addition, arithmetic and other things start to work since fast-isel will use
existing patterns for non fast-isel from tablegen files where applicable.
In addition i8, i16 will work in this limited context for assignment without the need
for sign extension (zero or signed). It does not matter how i8 or i16 are loaded (zero or sign extended)
since only the 8 or 16 relevant bits are used and clang will ask for sign extension before using them in
arithmetic. This is all made more complete in forthcoming patches.
for example:
int i, j=1, k=3;
void foo() {
i = j + k;
}
Keep in mind that this pass is not enabled right now and is an experimental pass
It can only be enabled with a hidden option to llvm of -mips-fast-isel.
Test Plan: Run test-suite, loadstore2.ll and I will run some executable tests.
Reviewers: dsanders
Subscribers: mcrosier
Differential Revision: http://reviews.llvm.org/D3856
llvm-svn: 211061
Jim Grosbach [Mon, 16 Jun 2014 21:56:02 +0000 (21:56 +0000)]
AArch64: Support for __builtin_arm_rbit() and __builtin_arm_rbit64().
__builtin_arm_rbit() and __builtin_arm_rbit64().
rdar://9283021
llvm-svn: 211060
Jim Grosbach [Mon, 16 Jun 2014 21:55:58 +0000 (21:55 +0000)]
ARM: Support for __builtin_arm_rbit() intrinsic.
Reverse the bits in a word. Maps to the RBIT instruction.
rdar://9283021
llvm-svn: 211059
Jim Grosbach [Mon, 16 Jun 2014 21:55:35 +0000 (21:55 +0000)]
AArch64: Add backend intrinsic for rbit.
Define an intrinsic for the frontend to use and pattern match it to
the RBIT instruction.
rdar://9283021
llvm-svn: 211058
Jim Grosbach [Mon, 16 Jun 2014 21:55:30 +0000 (21:55 +0000)]
ARM: intrinsic support for rbit.
We already have an ARMISD node. Create an intrinsic to map to it so we can
add support for the frontend __rbit() intrinsic.
rdar://9283021
llvm-svn: 211057
Bill Schmidt [Mon, 16 Jun 2014 21:36:02 +0000 (21:36 +0000)]
[PPC64] Fix PR19893 - improve code generation for local function addresses
Rafael opened http://llvm.org/bugs/show_bug.cgi?id=19893 to track non-optimal
code generation for forming a function address that is local to the compile
unit. The existing code was treating both local and non-local functions
identically.
This patch fixes the problem by properly identifying local functions and
generating the proper addis/addi code. I also noticed that Rafael's earlier
changes to correct the surrounding code in PPCISelLowering.cpp were also
needed for fast instruction selection in PPCFastISel.cpp, so this patch
fixes that code as well.
The existing test/CodeGen/PowerPC/func-addr.ll is modified to test the new
code generation. I've added a -O0 run line to test the fast-isel code as
well.
Tested on powerpc64[le]-unknown-linux-gnu with no regressions.
llvm-svn: 211056
Eric Christopher [Mon, 16 Jun 2014 21:18:27 +0000 (21:18 +0000)]
Since the DataLayout is always found off of the subtarget go ahead
and query the base target machine implementation for it.
llvm-svn: 211055
Zachary Turner [Mon, 16 Jun 2014 20:54:28 +0000 (20:54 +0000)]
Clean up some unnecessary mutex guards.
These were being used as unreferenced parameters to enforce that
the methods must not be called without holding a mutex, but all
of the methods in question were internal, and the methods were
only exposed through an interface whose entire purpose was to
serialize access to these structures, so expecting the methods
to be accessed under a mutex is reasonable enough.
Reviewed by: blaikie
Differential Revision: http://reviews.llvm.org/D4162
llvm-svn: 211054
Sylvestre Ledru [Mon, 16 Jun 2014 20:51:40 +0000 (20:51 +0000)]
actually, just check if it is a file (including directory or symlink)
llvm-svn: 211053
Louis Gerbarg [Mon, 16 Jun 2014 20:31:50 +0000 (20:31 +0000)]
Improve comments for r211040
Added comment to clarify why we r211040 choose to bail out of fast isel instead
of generating a more complicated relocation, and fix mislabelled register in the
comments of the asan test case.
llvm-svn: 211052
Sylvestre Ledru [Mon, 16 Jun 2014 20:31:15 +0000 (20:31 +0000)]
Check that the directory does not exist.
Otherwise, it could allows local users to obtain sensitive information or
overwrite arbitrary files via a symlink attack on temporary directories with
predictable names.
Reported as CVE-2014-2893 ( https://security-tracker.debian.org/tracker/CVE-2014-2893 )
Found by Jakub Wilk
llvm-svn: 211051
Richard Smith [Mon, 16 Jun 2014 20:26:19 +0000 (20:26 +0000)]
[modules] When we merge redecl chains or mark a decl used with an update
record, mark all subsequent decls as 'used' too, to maintain the AST invariant
that getPreviousDecl()->Used implies this->Used.
llvm-svn: 211050
Aaron Watry [Mon, 16 Jun 2014 20:21:19 +0000 (20:21 +0000)]
Revert "clctypes.h: Don't rely on stddef.h for size_t and ptrdiff_t"
This reverts commit
4cf021ae67b6ea8cfd42aa76ce6f5e1c329e145a.
llvm-svn: 211049
Hans Wennborg [Mon, 16 Jun 2014 20:18:41 +0000 (20:18 +0000)]
Revert "lit: warn when passed invalid pathname" (r210597)
It was pointed out that this breaks the "virtual test discovery"
mechanism, which allows for narming tests in the test exec root.
Reverting until I can figure out how to fix this.
llvm-svn: 211048
Aaron Watry [Mon, 16 Jun 2014 19:53:59 +0000 (19:53 +0000)]
math: Implement mix builtin
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <tom@stellard.net>
llvm-svn: 211047
Aaron Watry [Mon, 16 Jun 2014 19:53:57 +0000 (19:53 +0000)]
relational: Add isequal(floatN) builtin
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <tom@stellard.net>
llvm-svn: 211046
Aaron Watry [Mon, 16 Jun 2014 19:53:54 +0000 (19:53 +0000)]
Add all(igentype) builtin
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <tom@stellard.net>
llvm-svn: 211045
Aaron Watry [Mon, 16 Jun 2014 19:53:52 +0000 (19:53 +0000)]
clctypes.h: Don't rely on stddef.h for size_t and ptrdiff_t
llvm-svn: 211044
Greg Clayton [Mon, 16 Jun 2014 19:44:24 +0000 (19:44 +0000)]
Don't allow two threads to create/use the section list before it has been fully populated.
<rdar://problem/
16937203>
llvm-svn: 211043
Tim Northover [Mon, 16 Jun 2014 18:49:36 +0000 (18:49 +0000)]
ARM: implement correct atomic operations on v7M
ARM v7M has ldrex/strex but not ldrexd/strexd. This means 32-bit
operations should work as normal, but 64-bit ones are almost certainly
doomed.
Patch by Phoebe Buckheister.
llvm-svn: 211042
David Majnemer [Mon, 16 Jun 2014 18:46:51 +0000 (18:46 +0000)]
MS ABI: Implement x86_64 RTTI
Summary:
The RTTI scheme for x86_64 is largely the same as the one for i386.
Differences are largely limited to avoiding load-time relocations by
replacing pointers to RTTI metadata with the difference of that data
relative to the load address of the module.
Interestingly, this precludes the possibility of successfully using RTTI
data from another DLL. The ImageBase reference is always relative to
the current DLL.
Differential Revision: http://reviews.llvm.org/D4148
llvm-svn: 211041
Louis Gerbarg [Mon, 16 Jun 2014 17:35:40 +0000 (17:35 +0000)]
Fix illegal relocations in X86FastISel
On x86_86 the lea instruction can only use a 32 bit immediate value. When
the code is compiled statically the RIP register is not used, meaning the
immediate is all that can be used for the relocation, which is not sufficient
in the case of targets more than +/- 2GB away. This patch bails out of fast
isel in those cases and reverts to DAG which does the right thing.
Test case included.
llvm-svn: 211040
Fariborz Jahanian [Mon, 16 Jun 2014 17:25:41 +0000 (17:25 +0000)]
Objective-C. Diagnose when property access is using declared
property accessor methods which have become deprecated
or available. // rdar://
15951801
llvm-svn: 211039
Jim Grosbach [Mon, 16 Jun 2014 16:55:20 +0000 (16:55 +0000)]
LowerSwitch: track bounding range for the condition tree.
When LowerSwitch transforms a switch instruction into a tree of ifs it
is actually performing a binary search into the various case ranges, to
see if the current value falls into one cases range of values.
So, if we have a program with something like this:
switch (a) {
case 0:
do0();
break;
case 1:
do1();
break;
case 2:
do2();
break;
default:
break;
}
the code produced is something like this:
if (a < 1) {
if (a == 0) {
do0();
}
} else {
if (a < 2) {
if (a == 1) {
do1();
}
} else {
if (a == 2) {
do2();
}
}
}
This code is inefficient because the check (a == 1) to execute do1() is
not needed.
The reason is that because we already checked that (a >= 1) initially by
checking that also (a < 2) we basically already inferred that (a == 1)
without the need of an extra basic block spawned to check if actually (a
== 1).
The patch addresses this problem by keeping track of already
checked bounds in the LowerSwitch algorithm, so that when the time
arrives to produce a Leaf Block that checks the equality with the case
value / range the algorithm can decide if that block is really needed
depending on the already checked bounds .
For example, the above with "a = 1" would work like this:
the bounds start as LB: NONE , UB: NONE
as (a < 1) is emitted the bounds for the else path become LB: 1 UB:
NONE. This happens because by failing the test (a < 1) we know that the
value "a" cannot be smaller than 1 if we enter the else branch.
After the emitting the check (a < 2) the bounds in the if branch become
LB: 1 UB: 1. This is because by checking that "a" is smaller than 2 then
the upper bound becomes 2 - 1 = 1.
When it is time to emit the leaf block for "case 1:" we notice that 1
can be squeezed exactly in between the LB and UB, which means that if we
arrived to that block there is no need to emit a block that checks if (a
== 1).
Patch by: Marcello Maggioni <hayarms@gmail.com>
llvm-svn: 211038
James Molloy [Mon, 16 Jun 2014 16:42:53 +0000 (16:42 +0000)]
Refactor the disabling of Thumb-1 LDM/STM generation
Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself.
No functionality change.
llvm-svn: 211037
Rafael Espindola [Mon, 16 Jun 2014 16:41:00 +0000 (16:41 +0000)]
Fix pr17056.
This makes llvm-nm ignore members that are not sufficiently aligned for
lib/Object to handle.
These archives are invalid. GNU AR is able to handle this, but in general
just warns about broken archive members.
We should probably start warning too, but for now just make sure llvm-nm
exits with an 0.
llvm-svn: 211036
Saleem Abdulrasool [Mon, 16 Jun 2014 16:36:25 +0000 (16:36 +0000)]
builtins: add it blocks for Thumb-2
Add the missing IT-blocks for Thumb-2 compilation for code paths exercised by
older ARM CPUs. This should fix the buildbots.
llvm-svn: 211035
Rafael Espindola [Mon, 16 Jun 2014 16:09:08 +0000 (16:09 +0000)]
Update for llvm api change.
llvm-svn: 211034
Rafael Espindola [Mon, 16 Jun 2014 16:08:36 +0000 (16:08 +0000)]
Convert the Archive API to use ErrorOr.
Now that we have c++11, even things like ErrorOr<std::unique_ptr<...>> are
easy to use.
No intended functionality change.
llvm-svn: 211033
Saleem Abdulrasool [Mon, 16 Jun 2014 16:05:24 +0000 (16:05 +0000)]
compiler-rt: prefer thumb over ARM
When possible, use Thumb or Thumb-2 over ARM instructions. This is particularly
important for pure-Thumb environments (e.g. Windows on ARM). Although, it is
possible to conditionalise this for that target specifically, this is available
on most newer ARM CPUs, and the code remains compatible with older CPUs with no
adverse effects. It therefore feels better to always prefer Thumb when
possible.
llvm-svn: 211032
Richard Smith [Mon, 16 Jun 2014 15:51:22 +0000 (15:51 +0000)]
[C++1z] Implement N4051: 'typename' is permitted instead of 'class' when declaring a template template parameter.
llvm-svn: 211031
Richard Smith [Mon, 16 Jun 2014 15:16:56 +0000 (15:16 +0000)]
Add -std=c++1z flag for C++17 features.
llvm-svn: 211030
Tilmann Scheller [Mon, 16 Jun 2014 15:15:41 +0000 (15:15 +0000)]
[AArch64] Remove dead code.
Both function declarations lack a callee and an implementation.
llvm-svn: 211029
Chandler Carruth [Mon, 16 Jun 2014 15:02:21 +0000 (15:02 +0000)]
[cmake] Switch python install to use an 'install(DIRECTORY...)' cmake
command instead of a script.
In addition to cleaning things up, this allows more easy access to the
variables. In the old version, it tried to pass variables as -D flags to
cmake, but this didn't actually work. CMake drops all of those arguments
on the floor (try passing garbage through them) and just picks up the
limited subset of pre-defined macros. So, for example, this fixes the
build with LLVM_LIBDIR_SUFFIX=64 which is how I ended up here. =]
llvm-svn: 211028
Dan Albert [Mon, 16 Jun 2014 14:51:11 +0000 (14:51 +0000)]
Swap getdtablesize() for sysconf(_SC_OPEN_MAX).
Bionic is no removing this as it was removed from POSIX 2004.
llvm-svn: 211027
Todd Fiala [Mon, 16 Jun 2014 14:49:28 +0000 (14:49 +0000)]
Move x86-specific struct user code for Linux ProcessMonitor behind #define guards.
See http://reviews.llvm.org/D4092 for details.
Change by Paul Osmialowski. (Minor tweaks to the comment by Todd.)
llvm-svn: 211026
Alp Toker [Mon, 16 Jun 2014 14:23:44 +0000 (14:23 +0000)]
Fix typos
llvm-svn: 211025
Cameron McInally [Mon, 16 Jun 2014 14:12:28 +0000 (14:12 +0000)]
Hook up vector int_ctlz for AVX512.
llvm-svn: 211024
Alp Toker [Mon, 16 Jun 2014 13:56:47 +0000 (13:56 +0000)]
Use the ShowInSystemHeader bit consistently for all diagnostics
By describing system header suppressions directly in tablegen we eliminate
special cases in getDiagnosticSeverity().
Dropping the reliance on builtin diagnostic classes when mapping also gets us
closer to the goal of reusing the diagnostic machinery for custom diagnostics.
No change in functionality.
llvm-svn: 211023
Sergey Matveev [Mon, 16 Jun 2014 13:49:13 +0000 (13:49 +0000)]
[sanitizer] Support PTRACE_GETEVENTMSG in the ptrace() interceptor.
llvm-svn: 211022
Daniel Sanders [Mon, 16 Jun 2014 13:25:35 +0000 (13:25 +0000)]
[mips][mips64r6] ssnop is deprecated on MIPS32r6/MIPS64r6
Summary: Depends on D4120
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: zoran.jovanovic, vmedic
Differential Revision: http://reviews.llvm.org/D4121
llvm-svn: 211021
Daniel Sanders [Mon, 16 Jun 2014 13:18:59 +0000 (13:18 +0000)]
[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
Summary:
There is no change to the restrictions, just the result register is stored
once in the encoding rather than twice. The rt field is zero in
MIPS32r6/MIPS64r6.
Depends on D4119
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4120
llvm-svn: 211019
Daniel Sanders [Mon, 16 Jun 2014 13:13:03 +0000 (13:13 +0000)]
[mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.
Summary:
The linked-load, store-conditional operations have been re-encoded such
that have a 9-bit offset instead of the 16-bit offset they have prior to
MIPS32r6/MIPS64r6.
While implementing this, I noticed that the atomic load/store pseudos always
emit a sign extension using sll and sra. I have improved this to use seb/seh
when they are available (MIPS32r2/MIPS64r2 and above).
Depends on D4118
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4119
llvm-svn: 211018
Simon Atanasyan [Mon, 16 Jun 2014 11:54:42 +0000 (11:54 +0000)]
[Mips] Make hilo16-5.test test case independent from external input files.
llvm-svn: 211017
Dmitri Gribenko [Mon, 16 Jun 2014 11:22:33 +0000 (11:22 +0000)]
Support/ConvertUTF: restore compatibility with MSVC, which only implements C89
llvm-svn: 211016
Dmitri Gribenko [Mon, 16 Jun 2014 11:09:46 +0000 (11:09 +0000)]
Support/ConvertUTF: implement U+FFFD insertion according to the recommendation
given in the Unicode spec
That is, replace every maximal subpart of an ill-formed subsequence with one
U+FFFD.
llvm-svn: 211015
James Molloy [Mon, 16 Jun 2014 10:39:21 +0000 (10:39 +0000)]
[AArch64] Fix a fencepost error in lowering for llvm.aarch64.neon.uqshl.
Patch by Jiangning Liu!
llvm-svn: 211014
Daniel Sanders [Mon, 16 Jun 2014 10:25:17 +0000 (10:25 +0000)]
[mips] Merge most of the big/little endian checks in atomic.ll
Summary:
There is very little difference between the big and little endian cases in
test/CodeGen/Mips/atomic.ll. Merge them together using multiple
FileCheck prefixes.
Depends on D4117
Reviewers: jkolek, zoran.jovanovic, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4118
llvm-svn: 211013
Daniel Sanders [Mon, 16 Jun 2014 10:00:45 +0000 (10:00 +0000)]
[mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6
Summary:
The error message for the invalid.s cases isn't very helpful. It happens because
there is an instruction with a wider immediate that would have matched if the
NotMips32r6 predicate were true. I have some WIP to improve the message but it
affects most error messages for removed/re-encoded instructions on
MIPS32r6/MIPS64r6 and should therefore be a separate commit.
Depens on D4115
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4117
llvm-svn: 211012
NAKAMURA Takumi [Mon, 16 Jun 2014 09:33:34 +0000 (09:33 +0000)]
clang/AST/OpenMPClause.h: Update \param VL. [-Wdocumentation]
llvm-svn: 211011
Christian Pirker [Mon, 16 Jun 2014 09:17:30 +0000 (09:17 +0000)]
ARMEB: Fix trunc store for vector types
Reviewed at http://reviews.llvm.org/D4135
llvm-svn: 211010
Joerg Sonnenberger [Mon, 16 Jun 2014 08:38:19 +0000 (08:38 +0000)]
Add Guan-Hong Liu.
llvm-svn: 211009