Dylan Baker [Tue, 1 Nov 2022 20:00:26 +0000 (13:00 -0700)]
util/glsl2spirv: close resources as soon as possible
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:59:06 +0000 (12:59 -0700)]
util/glsl2spirv: add type annotations
Which are all clean
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:58:19 +0000 (12:58 -0700)]
util/glsl2spirv: add some error handling for unexpected code paths
We expect that convert_to_static_variable and override_version will find
and replace something, so let's fail loudly if they don't.
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:55:12 +0000 (12:55 -0700)]
util/glsl2spriv: make --vn required
I'm not 100% sure whether it's right to make --vn required, or to avoid
the static conversion, but this seems correct. Mypy (type checking
coming soon) points out that if --vn is None then the
convert_to_static_variable function will fail. Our one use of this sets
--vn, so there is no change there. Making --vn required
ensures that it will never be None, avoiding the problem.
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:49:53 +0000 (12:49 -0700)]
util/glsl2spirv: fix appending extra flags
The variable is called `extra`, but what's written is `extra - flags`,
and `flags` is undefined, so if the variable was ever passed there would
be an uncaught exception.
fixes:
9786d9ef2abb45a4e832cf1347581e3ca3aae9f0
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:47:21 +0000 (12:47 -0700)]
util/glsl2spirv: let argparse actually enforce the restrictions we've set
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:41:44 +0000 (12:41 -0700)]
util/glsl2spirv: drop inconsistent use of `io.open`
In Python 3 (the only python we support) `io.open` is an alias of the
builtin `open` function, so it's not getting us anything, and we're not
using it consistently.
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
Dylan Baker [Tue, 1 Nov 2022 19:40:21 +0000 (12:40 -0700)]
util/glsl2spirv: fix type error in argument handling
args.Olib is set to `store_true`, which means it will always be `True`
or `False`, this means that the we always, unconditionally, add
`--keep-uncalled` to the command line.
fixes:
9786d9ef2abb45a4e832cf1347581e3ca3aae9f0
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19449>
David Heidelberg [Thu, 10 Nov 2022 17:23:46 +0000 (18:23 +0100)]
ci/freedreno: disable antichambers trace
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7668
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19627
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19634>
Emma Anholt [Thu, 10 Nov 2022 00:41:29 +0000 (16:41 -0800)]
turnip: Don't disable LRZ for color write mask channels beyond the format's
aztec_ruins under ANGLE was getting LRZ writes disabled because 0xf out of
the 0x3 mask was enabled. The goal was to see if there are partial writes
being done, though. This caused a 2-3% performance regression.
Fixes:
85d0205db137 ("tu: Implement extendedDynamicState3ColorWriteMask")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19635>
Emma Anholt [Mon, 3 Oct 2022 23:49:15 +0000 (16:49 -0700)]
ir3: Re-fuse ffmas after nir_lower_imul cleanup breaks them.
The nir_opt_algebraic() call to clean up nir_lower_imul's split up mul
operations (stuff like "the top 16 bits were 0, no need to mul and add
that part") would trigger the options->fuse_ffma_* early ffma splitting,
so you need to call nir_opt_algebraic_late() again after that (which, in
turn, requires a DCE).
Gets us a lot more ffmas in Aztec Ruins high under zink/angle, but doesn't
seem to change perf.
shader-db highlights:
total instructions in shared programs:
11574843 ->
10999629 (-4.97%)
instructions in affected programs: 3308870 -> 2733656 (-17.38%)
total dwords in shared programs:
24344722 ->
23230122 (-4.58%)
dwords in affected programs: 6569568 -> 5454968 (-16.97%)
total full in shared programs: 762616 -> 762224 (-0.05%)
full in affected programs: 15505 -> 15113 (-2.53%)
total stp in shared programs: 4046 -> 4050 (0.10%)
stp in affected programs: 3372 -> 3376 (0.12%)
total ldp in shared programs: 2166 -> 2170 (0.18%)
ldp in affected programs: 1716 -> 1720 (0.23%)
total (ss) in shared programs: 219541 -> 216261 (-1.49%)
(ss) in affected programs: 23227 -> 19947 (-14.12%)
total (sy) in shared programs: 101633 -> 101927 (0.29%)
(sy) in affected programs: 8611 -> 8905 (3.41%)
total waves in shared programs: 1501942 -> 1501772 (-0.01%)
waves in affected programs: 1880 -> 1710 (-9.04%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18946>
Emma Anholt [Wed, 9 Nov 2022 20:23:53 +0000 (12:23 -0800)]
ir3/ra: Make sure we don't pick a preferred reg overflowing the file.
If we're in handle_collect()'s dst allocation and are part of a merge set
near the end of the file, our check for reg_elem_size(reg) would let us
use the preferred reg when that would immediately lead to
allocate_dst_fixed() creating an interval extending thruogh reg_size(reg)
that overflows the file.
Avoids a regression on gfxbench5/gl_5_high_off/17.shader_test in the next
commit. No change on shader-db.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18946>
Caio Oliveira [Tue, 8 Nov 2022 22:14:37 +0000 (14:14 -0800)]
intel/compiler: Use std::unique_ptr for tracking the fs_visitors
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19605>
Erik Faye-Lund [Mon, 7 Nov 2022 14:24:27 +0000 (15:24 +0100)]
docs: add linkcheck job
This should make it easier to keep links in our docs up-to-date.
But, because links can die behind our backs, we can't really enable this
all over the place, or we'll risk blocking merge-requests due to
unrelated changes.
So let's just make this a periodic job on the main branch instead.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 13:46:27 +0000 (14:46 +0100)]
docs: do not linkcheck relnotes
There's a *lot* of relnotes, and we don't really actively maintain them.
Let's drop linkchecking them to speed things up a bit.
This does a whole lot of nothing unless you have Sphinx 4.4 or newer.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 11:03:57 +0000 (12:03 +0100)]
docs: configure linkcheck
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Fri, 4 Nov 2022 15:13:20 +0000 (16:13 +0100)]
docs/ci: allow overriding sphinx builder
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 14:08:46 +0000 (15:08 +0100)]
docs/panfrost: drop anchor before channel-name
The use of a hash symbol in a URI is an anchor, not to indicate an IRC
channel name. This confuses the Sphinx linkchecker.
Dropping the hash here still makes the link work fine, so let's just do
that.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:30:03 +0000 (13:30 +0100)]
docs: apply some redirects
Here's a few redirects that we should apply, in case the redirects
gets removed in the future.
These are mostly of the 301 (moved permanently) kind, but also a
few where the site probably *should* have used the permanent
error-code.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 13:32:22 +0000 (14:32 +0100)]
docs: update lavasoftware.org link
Seems lavasoftware.org now prefers using the www-version of the link.
Let's update to that, to quiet some link-checking.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 14:05:17 +0000 (15:05 +0100)]
docs/perfetto: update documentation links
These links redirect to something seemingly random. Here's my best
effort to update them to the relevant pages in the current docs.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 13:53:57 +0000 (14:53 +0100)]
docs: update link to GitLab CI docs
This link is being redirected, but not really where we want to send
people. Let's update it, so they end up in the right place.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 13:27:54 +0000 (14:27 +0100)]
docs: update link to Intel intrinsics-guide
This link is being redirected, but not really where we want to send
people. Let's update it, so they end up in the right place.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 13:02:55 +0000 (14:02 +0100)]
docs: update links to SPECviewperf 11/12
These links redirect to a catch-all page, and not really where we want
people to end up. Let's correct these links and point to the benchmark
specific pages.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:49:58 +0000 (13:49 +0100)]
docs: update link to the gl spec
This link is being redirected, but not really where we want to send
people. Let's update it, so they end up in the right place.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 11:45:40 +0000 (12:45 +0100)]
docs: drop manual URL encoding
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:10:16 +0000 (13:10 +0100)]
docs: point to github for defunct link
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 29 Jun 2020 08:36:20 +0000 (10:36 +0200)]
docs: link to web.archive.org for dead links
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 29 Jun 2020 08:37:51 +0000 (10:37 +0200)]
docs: replace dead link
While it would be possible to dig this one up through web.archive.org,
there's a much better article written by Fabian Giesen on the subject,
so let's just link that one instead.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 29 Jun 2020 08:36:02 +0000 (10:36 +0200)]
docs: update dead link
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 29 Jun 2020 08:21:44 +0000 (10:21 +0200)]
docs: remove dead link to copy of article
There's no point in linking to a copy of this article on a defunct site.
So let's just remove it, the original source works just fine.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:15:01 +0000 (13:15 +0100)]
docs: update link to glsl
The page that was linked here is defunct, and doesn't have a direct
replacement. But a good alternative is to link to the OpenGL wiki, which
has a lot of useful information on the subject.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:13:22 +0000 (13:13 +0100)]
docs/relnotes: drop links to defunct issue tracker
The Meego issue tracker has been defunct for a long time, and sadly the
content wasn't archived by web.archive.org. Let's just drop the links.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 11:02:25 +0000 (12:02 +0100)]
docs/relnotes: escape non-urls
Sphinx can be a bit overly eager at interpreting text with colons in it
as URLs. There's a few cases in our older relnotes where this happens, so
let's escape them to avoid strange, broken links in the rendered output.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Erik Faye-Lund [Mon, 7 Nov 2022 12:11:13 +0000 (13:11 +0100)]
docs: fixup broken link syntax
Seems I got this slightly wrong when I fixed up the previous syntax
issue. Whoops, let's fix that!
Fixes:
6b3b6333915 ("docs/zink: fix and cleanup rst syntax")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19574>
Lionel Landwerlin [Thu, 10 Nov 2022 09:34:50 +0000 (11:34 +0200)]
anv: fixup invalid enum for nir environment
Also switching away from PIPE_
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
8c4c4c3ee1a2 ("anv: Add softtp64 workaround")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19638>
Alyssa Rosenzweig [Mon, 7 Nov 2022 18:49:51 +0000 (13:49 -0500)]
panfrost: Require 64-byte alignment on imports
While Panfrost allocates linear images with strides that are a multiple of 64
bytes, other dma-buf producers on the system may not satisfy this requirement.
However, at least on v7 and newer, any image with a regular format must have a
stride that is a multiple of 64 bytes.
This fixes a real bug in an application that created a linear R8_UNORM image
with stride 480 bytes, imported it as an EGL_image, and then tried to texture
from it with the GPU. Previously, the driver allowed this situation but it
resulted in an imprecise fault from the GPU. This patch corrects the driver to
reject the import as invalid due to the unaligned stride, ensuring we never
attempt to texture from such a resource.
To implement, we add some new layout queries to centralize knowledge about the
stride alignment requirements, and we sprinkle in asserts to show how the
invariant is upheld throughout the lifecycle of image creation to texturing.
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19620>
Alyssa Rosenzweig [Wed, 9 Nov 2022 17:10:37 +0000 (12:10 -0500)]
panfrost: Compile indirect dispatch shader on first use
For 2D UI workloads and even most 3D workloads, the indirect dispatch shader
won't actually be needed, but we currently compile it during eglInitialize() on
every v7 application. That hurts app start-up time, especially given that this
shader doesn't hit the disk cache. We can instead defer compiling this shader
until it's actually needed, when glDispatchComputeIndirect() gets called.
The tradeoff is that the first glDispatchComputeIndirect() call will be (much)
slower than successive calls, since we need to build and compile this internal
shader. I'm unconvinced that's a problem in practice.
An app would need to call glDispatchComputeIndirect for the first time in the
middle of a scene. 2D apps never would call that, OpenCL doesn't have that, and
GL compute will have the same costs just moved around. So it's down to a 3D
GLES3.1 app that indirectly dispatches compute for the first time time in the
middle of a scene. Which, meh? It's not entirely implausible but we have bigger
fish to fry, and this fixes a real problem (about 5% of eglInitialize time spent
building this shader that won't actually get used).
es2_info starts slightly faster with this change.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19622>
Frank Binns [Thu, 3 Nov 2022 10:36:55 +0000 (10:36 +0000)]
pvr: conditionally call pvr_finishme() in pvr_csb_copy()
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19578>
Frank Binns [Tue, 1 Nov 2022 10:51:58 +0000 (10:51 +0000)]
pvr: move TODO next to related code
This also removes the pvr_finishme(), as this is an improvement rather than
something we must do.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19578>
Frank Binns [Tue, 1 Nov 2022 10:35:12 +0000 (10:35 +0000)]
pvr: replace unsupported sub-command type pvr_finishme()s with unreachable()s
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19578>
Frank Binns [Mon, 24 Oct 2022 15:37:15 +0000 (16:37 +0100)]
pvr: remove some stale FIXMEs/pvr_finishmes
* The pvr_finishme() in pvr_CreateImage() was added before vk_image_create() was
being used and is no longer relevant.
* There's nothing special we need to do for the graphics pipeline flags and
we don't currently store anything in the pipeline cache, so there's nothing
to finish here.
* The firmware interface now uses fixed sized structures, so remove related
FIXME.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19578>
Karmjit Mahil [Wed, 2 Nov 2022 15:38:08 +0000 (15:38 +0000)]
pvr: Address TODO in PVR_PDS_CONST_MAP_ENTRY_TYPE_DESCRIPTOR_SET.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19523>
Karmjit Mahil [Wed, 2 Nov 2022 14:55:42 +0000 (14:55 +0000)]
pvr: Remove some TODOs.
- All the PDS programs setup in the pipeline are necessary. We
can attempt optimisations later on.
- No need to call pvr_pds_program_program_create_and_upload() in
a loop.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19523>
Martin Roukala (né Peres) [Sun, 6 Nov 2022 10:09:24 +0000 (12:09 +0200)]
radv/ci: enable pre-merge testing for vkcts on navi21
It has been a long-time coming, hasn't it? Hopefully more will come
soon!
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
Martin Roukala (né Peres) [Sun, 6 Nov 2022 10:05:05 +0000 (12:05 +0200)]
radv/ci: move manual job decision to the jobs
This enables selectively enabling pre-merge testing on a per-job basis.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
Martin Roukala (né Peres) [Sun, 6 Nov 2022 15:49:09 +0000 (17:49 +0200)]
ci: introduce the VALVE_FARM variable
This mirrors all the other *_FARM variables, and allows developers to
quickly disable all the jobs that would otherwise run on Valve's CI
infrastructure by setting it to the 'offline' value.
To this end, .radv_rules gets split into .radv-collabora-rules and
.radv-valve-rules, since the driver will be testable in two different
test farms. Every radv job is then made to inherit from the right farm.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
Martin Roukala (né Peres) [Tue, 8 Nov 2022 14:39:39 +0000 (16:39 +0200)]
ci/b2c-test: remove a noisy 'ls -l'
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
Martin Roukala (né Peres) [Mon, 7 Nov 2022 14:13:30 +0000 (16:13 +0200)]
ci/b2c-test: update the trigger container to the latest version
This shouldn't affect anything, except some extra debug information
and some reliability improvements.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19556>
Lionel Landwerlin [Thu, 10 Nov 2022 10:20:00 +0000 (12:20 +0200)]
nir: make ray query load values visible in NIR prints
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19641>
Sarah Walker [Fri, 28 Oct 2022 14:14:15 +0000 (15:14 +0100)]
pvr: Fix segfault in pvr_CreatePipelineLayout when layout has zero bindings
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19407>
Jason Ekstrand [Tue, 30 Aug 2022 18:42:58 +0000 (13:42 -0500)]
hasvk: Switch to common code for command buffer lifecycles
This gets us command buffer object recycling.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18383>
Jason Ekstrand [Tue, 30 Aug 2022 18:42:58 +0000 (13:42 -0500)]
anv: Switch to common code for command buffer lifecycles
This gets us command buffer object recycling.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18383>
Karol Herbst [Wed, 28 Sep 2022 20:25:59 +0000 (22:25 +0200)]
rusticl: make image format/order work on radeonsi
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Sun, 25 Sep 2022 22:07:29 +0000 (00:07 +0200)]
rusticl: skip lowering image/sampler derefs if drivers tells so
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Sun, 25 Sep 2022 22:03:35 +0000 (00:03 +0200)]
nir/lower_cl_images: support keeping derefs
This is needed by radeonsi and zink
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Sat, 29 Oct 2022 17:26:08 +0000 (19:26 +0200)]
rusticl/kernel: use binding for filling image channel data and order
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Wed, 26 Oct 2022 15:00:06 +0000 (17:00 +0200)]
rusticl: use texture vars for readonly images
This is needed by zink
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Wed, 26 Oct 2022 14:59:40 +0000 (16:59 +0200)]
rusticl: do not DCE any samplers or textures
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Wed, 26 Oct 2022 14:59:19 +0000 (16:59 +0200)]
radeonsi: do not DCE texture vars
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Wed, 26 Oct 2022 14:58:56 +0000 (16:58 +0200)]
nir: properly handle CL textures
Without this tex operations would reference images as the texture, which
doesn't really makes much sense. So move to a model closer to Vulkan by
using discrete texture and sampler variables instead.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Thu, 3 Nov 2022 16:30:50 +0000 (17:30 +0100)]
nir/gather_info: take texture vars into account when counting textures
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Fri, 4 Nov 2022 09:26:15 +0000 (10:26 +0100)]
glsl: add texture subpass variants
Dzn needs those as it lowers images to textures and we want to be more
consistent about texture ops using texture vars instead of images.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Karol Herbst [Wed, 26 Oct 2022 14:56:41 +0000 (16:56 +0200)]
glsl: fix buffer texture type
Fixes:
3ace6b968b3 ("compiler/types: Add a texture type")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19381>
Samuel Pitoiset [Tue, 1 Nov 2022 09:59:08 +0000 (09:59 +0000)]
ac/nir: do not convert GS outputs to the expected variable size on GFX11
Outputs are always considered 32-bits.
Found by inspection.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19612>
Yonggang Luo [Wed, 2 Nov 2022 22:32:23 +0000 (06:32 +0800)]
zink: Only #include <vulkan/vulkan_core.h> instead #include <vulkan/vulkan.h> in kopper_interface.h
It's pulled too much system dependent headers before this commit
when #include <vulkan/vulkan.h> directly,
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
Yonggang Luo [Thu, 3 Nov 2022 16:13:47 +0000 (00:13 +0800)]
zink: struct kopper_surface is not accessed, remove it in kopper_interface.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
Yonggang Luo [Thu, 3 Nov 2022 05:19:25 +0000 (13:19 +0800)]
zink: Indent with 3 space in zink/zink_kopper.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
Yonggang Luo [Thu, 3 Nov 2022 05:18:54 +0000 (13:18 +0800)]
wgl: Trim trailing spaces in stw_st.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19491>
Yonggang Luo [Thu, 10 Nov 2022 04:34:47 +0000 (12:34 +0800)]
util: Use include_directories('..') instead include_directories('.') for inc_util
So include util headers are always using util/ prefix in mesa code base
And prevent including files under src/util without util/ prefix
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19546>
Yonggang Luo [Sat, 5 Nov 2022 11:55:32 +0000 (19:55 +0800)]
util: normalize include files under src/util/*.h with util/ prefix in mesa code base
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19546>
Yonggang Luo [Sat, 5 Nov 2022 09:18:46 +0000 (17:18 +0800)]
util: Move texcompress template files into util/format
Because these files are accessed in util/format/u_format_*.c
To make sure util are self contained we need move these files
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19547>
Yonggang Luo [Sat, 5 Nov 2022 11:25:13 +0000 (19:25 +0800)]
mesa: include <util/*.h> instead macros.h in texcompress_bptc_tmp.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19547>
Yonggang Luo [Mon, 7 Nov 2022 03:34:26 +0000 (11:34 +0800)]
util: Replace the usage of ALIGN16 with alignas(16) and them remove ALIGN16 macro
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19565>
Yonggang Luo [Mon, 7 Nov 2022 21:25:28 +0000 (05:25 +0800)]
vulkan: Replace _Alignas with alignas
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19565>
Yonggang Luo [Fri, 4 Nov 2022 01:57:22 +0000 (09:57 +0800)]
meson: Use deps_for_libmesa_util for idep_mesautil instead hand crafted list
Now the idep_mesautilc11 have no need reference when idep_mesautil is referenced
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19526>
Yonggang Luo [Fri, 4 Nov 2022 02:33:47 +0000 (10:33 +0800)]
meson: Indent util/meson.build with 2 space
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19526>
Alyssa Rosenzweig [Sat, 5 Nov 2022 04:37:52 +0000 (00:37 -0400)]
agx: Don't assert on texop twice
This is already asserted for lod modes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Mon, 24 Oct 2022 00:50:17 +0000 (20:50 -0400)]
agx: Implement unary math ops
Implement nir_op_bitfield_reverse, nir_op_bit_count, and
nir_op_ufind_msb. These map to native instructions. With appropriate
integer render target and multiple render target support, passes:
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.*vertex
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldreverse.*fragment
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*vertex
dEQP-GLES31.functional.shaders.builtin_functions.integer.bitcount.*fragment
dEQP-GLES31.functional.shaders.builtin_functions.integer.findLSB.*vertex
dEQP-GLES31.functional.shaders.builtin_functions.integer.findLSB.*fragment
dEQP-GLES31.functional.shaders.builtin_functions.integer.findMSB.*vertex
dEQP-GLES31.functional.shaders.builtin_functions.integer.findMSB.*fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Mon, 24 Oct 2022 00:46:29 +0000 (20:46 -0400)]
agx: Implement {i,u}mul_2x32_64
With support for MRT in the driver (not included here), passes:
dEQP-GLES31.functional.shaders.builtin_functions.integer.imulextended.int_highp_fragment
dEQP-GLES31.functional.shaders.builtin_functions.integer.umulextended.int_highp_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Mon, 24 Oct 2022 00:45:25 +0000 (20:45 -0400)]
agx: Implement nir_op_unpack_64_2x32_split_{x,y}
Used in the umul_extended lowering.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sat, 5 Nov 2022 04:05:55 +0000 (00:05 -0400)]
agx/ra: Remove index_to_reg
Use stronger asserts instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sat, 5 Nov 2022 03:27:28 +0000 (23:27 -0400)]
agx: Add CSE optimization pass
Ported from the Bifrost compiler, in turn based on the ir3 one. This
cleans up a lot of junk we emit during NIR->AGX and will help with some
SSA RA troubles.
total instructions in shared programs: 34803 -> 34381 (-1.21%)
instructions in affected programs: 18652 -> 18230 (-2.26%)
helped: 198
HURT: 0
helped stats (abs) min: 1.0 max: 28.0 x̄: 2.13 x̃: 1
helped stats (rel) min: 0.31% max: 12.50% x̄: 3.94% x̃: 2.78%
95% mean confidence interval for instructions value: -2.45 -1.81
95% mean confidence interval for instructions %-change: -4.40% -3.48%
Instructions are helped.
total bytes in shared programs: 238094 -> 234824 (-1.37%)
bytes in affected programs: 126472 -> 123202 (-2.59%)
helped: 200
HURT: 0
helped stats (abs) min: 6.0 max: 168.0 x̄: 16.35 x̃: 8
helped stats (rel) min: 0.37% max: 17.65% x̄: 4.25% x̃: 3.38%
95% mean confidence interval for bytes value: -18.49 -14.21
95% mean confidence interval for bytes %-change: -4.67% -3.84%
Bytes are helped.
total halfregs in shared programs: 10078 -> 10107 (0.29%)
halfregs in affected programs: 565 -> 594 (5.13%)
helped: 22
HURT: 22
helped stats (abs) min: 1.0 max: 4.0 x̄: 1.23 x̃: 1
helped stats (rel) min: 5.71% max: 25.00% x̄: 23.38% x̃: 25.00%
HURT stats (abs) min: 2.0 max: 4.0 x̄: 2.55 x̃: 2
HURT stats (rel) min: 4.44% max: 30.77% x̄: 15.61% x̃: 12.73%
95% mean confidence interval for halfregs value: 0.03 1.28
95% mean confidence interval for halfregs %-change: -10.17% 2.40%
Inconclusive result (%-change mean confidence interval includes 0).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sat, 5 Nov 2022 03:26:34 +0000 (23:26 -0400)]
agx: Describe whether instructions may be reordered
As per NIR, for the benefit of CSE. It is assumed that instructions that
cannot be eliminated also cannot be reordered.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sat, 5 Nov 2022 03:26:06 +0000 (23:26 -0400)]
agx: Add and use replace_src helper
From Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Thu, 27 Oct 2022 01:36:13 +0000 (21:36 -0400)]
agx: Use nir_opt_phi_precision
No shader-db changes, but helped a custom shader I wrote to test loops.
My shader-db is too small.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Thu, 27 Oct 2022 01:16:11 +0000 (21:16 -0400)]
agx: Pass agx_index to agx_copy
More straightforward interface and will allow including immediates later
if we want to.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Wed, 26 Oct 2022 15:23:51 +0000 (11:23 -0400)]
agx: Coalesce collects when possible
Track collects and use them as affinities when choosing registers. On
glmark2:
total instructions in shared programs: 5498 -> 5388 (-2.00%)
instructions in affected programs: 2748 -> 2638 (-4.00%)
helped: 31
HURT: 0
helped stats (abs) min: 1.0 max: 12.0 x̄: 3.55 x̃: 3
helped stats (rel) min: 0.09% max: 57.14% x̄: 10.58% x̃: 5.97%
95% mean confidence interval for instructions value: -4.61 -2.49
95% mean confidence interval for instructions %-change: -15.16% -6.00%
Instructions are helped.
total bytes in shared programs: 37280 -> 36620 (-1.77%)
bytes in affected programs: 18880 -> 18220 (-3.50%)
helped: 31
HURT: 0
helped stats (abs) min: 6.0 max: 72.0 x̄: 21.29 x̃: 18
helped stats (rel) min: 0.07% max: 48.98% x̄: 9.16% x̃: 5.17%
95% mean confidence interval for bytes value: -27.64 -14.94
95% mean confidence interval for bytes %-change: -13.03% -5.29%
Bytes are helped.
total halfregs in shared programs: 1267 -> 1279 (0.95%)
halfregs in affected programs: 37 -> 49 (32.43%)
helped: 0
HURT: 9
HURT stats (abs) min: 1.0 max: 2.0 x̄: 1.33 x̃: 1
HURT stats (rel) min: 16.67% max: 66.67% x̄: 35.58% x̃: 28.57%
95% mean confidence interval for halfregs value: 0.95 1.72
95% mean confidence interval for halfregs %-change: 21.50% 49.67%
Halfregs are HURT.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sun, 9 Oct 2022 01:02:03 +0000 (21:02 -0400)]
agx: Introduce agx_foreach_ssa_{src,dest} macros
These are convenient iterators especially in the register allocator.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sun, 9 Oct 2022 00:51:06 +0000 (20:51 -0400)]
agx/ra: Factor out assign_regs
Prepare to record bookkeeping needed for live range splits.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Sun, 9 Oct 2022 00:51:03 +0000 (20:51 -0400)]
agx/ra: Use BITSET_*_RANGE in some places
A bit neater.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Thu, 22 Sep 2022 03:40:14 +0000 (23:40 -0400)]
agx: Free dests of splits that are never read
Otherwise the registers "leak", bloating register pressure by
arbitrarily large amounts. This is easy to handle in DCE by rewriting to
a null destination, though we could use a sideband channel if we didn't
want null destinations in the IR.
glmark2 subset of shader-db is much improved:
total instructions in shared programs: 7324 -> 7313 (-0.15%)
instructions in affected programs: 483 -> 472 (-2.28%)
helped: 5
HURT: 2
total bytes in shared programs: 42788 -> 42722 (-0.15%)
bytes in affected programs: 2808 -> 2742 (-2.35%)
helped: 5
HURT: 2
total halfregs in shared programs: 2421 -> 2058 (-14.99%)
halfregs in affected programs: 1235 -> 872 (-29.39%)
helped: 28
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Tue, 25 Oct 2022 02:30:46 +0000 (22:30 -0400)]
agx: Refuse to handle discontiguous iter
This will cause problems with register allocation.
instructions HURT: shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 135 -> 136 (0.74%)
instructions HURT: shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 84 -> 85 (1.19%)
bytes HURT: shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 914 -> 922 (0.88%)
bytes HURT: shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 574 -> 580 (1.05%)
halfregs helped: shaders/glmark/1-8.shader_test MESA_SHADER_FRAGMENT: 20 -> 19 (-5.00%)
halfregs helped: shaders/glmark/1-24.shader_test MESA_SHADER_FRAGMENT: 25 -> 23 (-8.00%)
halfregs helped: shaders/glmark/7-3.shader_test MESA_SHADER_FRAGMENT: 11 -> 10 (-9.09%)
halfregs helped: shaders/glmark/4-2.shader_test MESA_SHADER_FRAGMENT: 23 -> 19 (-17.39%)
total instructions in shared programs: 5716 -> 5718 (0.03%)
instructions in affected programs: 219 -> 221 (0.91%)
helped: 0
HURT: 2
total bytes in shared programs: 38118 -> 38132 (0.04%)
bytes in affected programs: 1488 -> 1502 (0.94%)
helped: 0
HURT: 2
total halfregs in shared programs: 1639 -> 1631 (-0.49%)
halfregs in affected programs: 79 -> 71 (-10.13%)
helped: 4
HURT: 0
helped stats (abs) min: 1.0 max: 4.0 x̄: 2.00 x̃: 1
helped stats (rel) min: 5.00% max: 17.39% x̄: 9.87% x̃: 8.55%
95% mean confidence interval for halfregs value: -4.25 0.25
95% mean confidence interval for halfregs %-change: -18.31% -1.43%
Inconclusive result (value mean confidence interval includes 0).
Total CPU time (seconds): 11.41 -> 11.72 (2.72%)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Alyssa Rosenzweig [Fri, 23 Sep 2022 02:35:48 +0000 (22:35 -0400)]
agx: Don't emit writeout 0xC200
Metal omits this in OpenGL mode, and since we have no clue what it does,
I see no reason for us not to do the same.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19590>
Timothy Arceri [Tue, 8 Nov 2022 22:56:14 +0000 (09:56 +1100)]
mesa: fix typo from adding glGetObjectLabelEXT
Fixes:
675bcbb7a1c0 ("mesa: add EXT_debug_label support")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19607>
Eric Engestrom [Wed, 9 Nov 2022 21:54:23 +0000 (21:54 +0000)]
docs: update calendar for 22.3.0-rc2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19631>
Emma Anholt [Wed, 9 Nov 2022 20:44:55 +0000 (12:44 -0800)]
ci/iris: Add some flakes from the new testing on JSL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19628>
Ian Romanick [Tue, 9 Feb 2021 00:45:08 +0000 (16:45 -0800)]
intel/fs: Enable nir_op_imul_32x16 and nir_op_umul_32x16 on pre-Gfx7
Even though Intel's CI doesn't test these old platforms anymore, the
validation added in "intel/eu/validate: Validate integer multiplication
source size restrictions" combined with full shader-db runs gives me
confidence in the changes.
Sandy Bridge
total instructions in shared programs:
13902341 ->
13902167 (<.01%)
instructions in affected programs: 30771 -> 30597 (-0.57%)
helped: 66 / HURT: 0
total cycles in shared programs:
741795500 ->
741791931 (<.01%)
cycles in affected programs: 987602 -> 984033 (-0.36%)
helped: 28 / HURT: 5
Iron Lake
total instructions in shared programs: 8365806 -> 8365754 (<.01%)
instructions in affected programs: 1766 -> 1714 (-2.94%)
helped: 10 / HURT: 0
total cycles in shared programs:
248542694 ->
248542378 (<.01%)
cycles in affected programs: 29836 -> 29520 (-1.06%)
helped: 9 / HURT: 0
GM45
total instructions in shared programs: 5187127 -> 5187101 (<.01%)
instructions in affected programs: 891 -> 865 (-2.92%)
helped: 5 / HURT: 0
total cycles in shared programs:
163643914 ->
163643750 (<.01%)
cycles in affected programs: 22206 -> 22042 (-0.74%)
helped: 5 / HURT: 0
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19602>
Ian Romanick [Tue, 9 Feb 2021 02:49:06 +0000 (18:49 -0800)]
intel/fs: Slightly restructure emitting nir_op_imul_32x16 and nir_op_umul_32x16
There are no immediate values at this point, so all of this code was
bunk. :face_palm:
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19602>
Ian Romanick [Wed, 11 Mar 2020 22:37:14 +0000 (15:37 -0700)]
intel/eu/validate: Validate integer multiplication source size restrictions
v2: Expect correct result on BDW in test_eu.
v3: Fix SNB type-size check. Noticed by Marcin.
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19602>