Slava Zakharin [Tue, 24 Jan 2023 18:17:35 +0000 (10:17 -0800)]
Revert "[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations"
OpenMP buildbots are failing:
https://lab.llvm.org/buildbot/#/builders/193/builds/25434
https://lab.llvm.org/buildbot/#/builders/193/builds/25420
This reverts commit
7fbf12210007a66f7b62beadc0e5a52561cc0ab3.
Stanislav Mekhanoshin [Tue, 24 Jan 2023 17:50:44 +0000 (09:50 -0800)]
[AMDGPU] Add missing gfx11 tests in the directive-amdgcn-target.ll. NFC.
Jan Svoboda [Tue, 24 Jan 2023 00:16:27 +0000 (16:16 -0800)]
[clang][deps] NFC: Remove dead code
This patch removes some dead code in the dependency scanner.
The `ModuleDeps::ImplicitModulePCMPath` member stopped being used in
D131934.
The strict context hash was replaced in
D129884 by hash of the canonical command line.
Reviewed By: benlangmuir
Differential Revision: https://reviews.llvm.org/
D142416
Jan Svoboda [Tue, 24 Jan 2023 17:31:04 +0000 (09:31 -0800)]
[clang][deps] Account for transitive spurious dependencies
In
D106100, we started guarding against spurious dependencies on modules that ended up being textual includes and thus didn't have any AST file associated. That patch accounted only for direct dependencies. There's a way how to get spurious dependencies for modules that are transitive. This patch guards against that scenario and adds a test case.
(Note that since
D142167, we don't allow `@import FW_Private` with `-fmodule-name=FW` anymore. However, that check lives in sema, which the scanner doesn't run. Being defensive in this patch therefore still makes sense.)
rdar://
104324602
Reviewed By: benlangmuir
Differential Revision: https://reviews.llvm.org/
D142165
Ayke van Laethem [Thu, 19 Jan 2023 13:49:43 +0000 (14:49 +0100)]
[AVR] Support most address space casts
All hardware address spaces on AVR can be freely cast between (they keep
the same bit pattern). They just aren't dereferenceable when they're in
a different address space as they really do point to a separate address
space.
This is supported in avr-gcc: https://godbolt.org/z/9Gfvhnhv9
avr-gcc also supports the `__memx` address space which is 24 bits. We
don't support this address space yet but I've added a safeguard just in
case.
Differential Revison: https://reviews.llvm.org/
D142107
Florian Hahn [Tue, 24 Jan 2023 17:20:16 +0000 (17:20 +0000)]
[VPlan] Fix leak by manually cleaning up allocated Phi in test.
This should fix a LeakSanitizer failure reported here:
https://lab.llvm.org/buildbot/#/builders/5/builds/30952
Mark de Wever [Sun, 22 Jan 2023 12:31:27 +0000 (13:31 +0100)]
[libc++][format] Fixes usage of contiguous ranges.
The contiguous range made incorrect assumptions for certain input
ranges.
Fixes llvm.org/PR60164
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/
D142302
Ben Langmuir [Thu, 19 Jan 2023 17:31:31 +0000 (09:31 -0800)]
[clang][deps] Add module files for input dependencies earlier
I originally thought we needed to add module file inputs for modular
deps at the same time as outputs because they depend on the
lookupModuleOutput callback, but this is not the case: they only depend
on the callback results for other modules, which have already been
computed by this point. So move them earlier so that they're set in the
CompilerInvocation at the same time as other inputs. This makes the
code easier to understand.
This change is effectively NFC, though it technically changes the module
exact value of the context hash.
Differential Revision: https://reviews.llvm.org/
D142392
eopXD [Sun, 15 Jan 2023 17:56:23 +0000 (09:56 -0800)]
[15/15][Clang][RISCV][NFC] Set data member under Policy as constants
The object is now correct by construction.
This is the 15th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Depends on
D141793.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D141796
eopXD [Sun, 15 Jan 2023 12:27:07 +0000 (04:27 -0800)]
[14/15][Clang][RISCV] Change default policy from TAMU to TAMA
After this commit, the non-policy variants of `vid` and `viota` are no
longer available for an oveloaded version since the default policy is
now TAMA and the masked-off operand is removed.
Be noted that ALL RVV intrinsics now operate under the general
assumption that a policy behavior is "agnostic" unless specified.
Therefore this patch also changes the semantic of policy intrinsics
with the suffix of `_ta` and `tu`. These intrinsics don't have their
mask policy specified and was assumed to be undisturbed. It is now
changed to agnostic.
This is the 14th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D141793
eopXD [Sun, 15 Jan 2023 12:48:33 +0000 (04:48 -0800)]
[13/15][Clang][RISCV][NFC] Remove repeating test cases under rvv-intrinsics-autogenerated
These files were oversights in
D141198. The test cases are now under its
exact mnemonics. For example, test cases of `vle8`, `vle16`, `vle32`,
and `vle64` were under `vle.c`. Now they are exist under `vle8.c`,
`vle16.c`, `vle32.c`, and `vle64.c`, respectively.
This is the 13th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D141792
eopXD [Sun, 15 Jan 2023 12:13:48 +0000 (04:13 -0800)]
[12/15][Clang][RISCV][NFC] Refine the way to check for Policy in riscv_vector_builtin_cg.inc
The current way creates a fallacy that checking for
`PolicyAttrs == TAIL_AGNOSTIC` is implicitly equivalant to
`TAIL_AGNOSTIC_MASK_UNDISTURBED`. This works under the assumption that
an unmasked intrinsic has a policy of TAMU. The expression here is
mis-leading and will not be correct when the default policy is not
TAMU.
As this patch-set targets to change the default policy from TAMU to
TAMA, this commit is necessary before changing the default.
This is the 12th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D141789
Guillaume Chatelet [Tue, 24 Jan 2023 16:22:26 +0000 (16:22 +0000)]
Revert
D142108 "[reland][libc][NFC] Detect host CPU features using try_compile instead of try_run."
The build bots are failing.
This reverts commit
c84d74f5bfe810744de1268eb0516a6622e4aa73.
Mark de Wever [Thu, 19 Jan 2023 20:17:34 +0000 (21:17 +0100)]
[libc++][doc] Updates format status.
The paper
- P2286R8 Formatting ranges
is fully implemented modulo its feature test macro. This macro has been
revised by
- LWG3750 Too many papers bump __cpp_lib_format
The new macro depends on
- P2585R0 Improving default container formatting
This paper revises parts of P2286R8 and adds new formatter
specializations. The specialization for debug strings has some wording
issues, which is addresses in this paper
- P2733R0 Fix handling of empty specifiers in std::format
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/
D142153
eopXD [Sat, 14 Jan 2023 16:06:19 +0000 (08:06 -0800)]
[11/15][Clang][RISCV][NFC] Remove Policy::PolicyType::Omit
The attribute can be removed now as preceding patches have removed its
users.
This is the 11th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/
D141768
Yitzhak Mandelbaum [Tue, 24 Jan 2023 14:51:32 +0000 (14:51 +0000)]
[clang][dataflow] Fix bug in handling of reference-typed fields.
This patch fixes a subtle bug in how we create lvalues to reference-typed
fields. In the rare case that the field is umodeled because of the depth limit
on field modeling, the lvalue created can be malformed. This patch prevents that
and adds some related assertions to other code dealing with lvalues for
references.
Differential Revision: https://reviews.llvm.org/
D142468
Guillaume Chatelet [Tue, 24 Jan 2023 16:04:10 +0000 (16:04 +0000)]
[reland][libc][NFC] Detect host CPU features using try_compile instead of try_run.
This implements the same behavior as
D141997 but makes sure that the same detection mechanism is used between CMake and source code.
Differential Revision: https://reviews.llvm.org/
D142108
Nicolas Vasilache [Tue, 24 Jan 2023 15:45:53 +0000 (07:45 -0800)]
[mlir][Linalg] NFC - Expose packing transpose implementation as a standalone functional-style API call
LLVM GN Syncbot [Tue, 24 Jan 2023 15:24:01 +0000 (15:24 +0000)]
[gn build] Port
dc8e2ea92953
Javier Setoain [Mon, 12 Dec 2022 18:02:59 +0000 (18:02 +0000)]
[mlir][sparse][ArmSVE] Enable sparse integration tests for ArmSVE
This patch adds the logic necessary to target the sparse-tensor dialect
integration tests for SVE. As the LLVM backend for AArch64 does not
currently support product reductions, the corresponding tests are
disabled for SVE.
Not all tests have been updated yet. The remaining tests will be
refactored in a separate patch shortly.
Differential Revision: https://reviews.llvm.org/
D121304
Co-authored-by: Andrzej Warzynski <andrzej.warzynski@arm.com>
eopXD [Sat, 14 Jan 2023 15:28:06 +0000 (07:28 -0800)]
[10/15][Clang][RISCV][NFC] Don't need to check for `MaskPolicy` in `isTAPolicy` and `isTUPolicy`
Caller of the two utilities is always companied with a predicate to
check for `!IsMask`, so we don't need to check for the mask policy
here.
This also removes dependency to `Policy::PolicyType::Omit`, which will
be removed.
This is the 10th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/
D141767
eopXD [Sat, 14 Jan 2023 15:15:47 +0000 (07:15 -0800)]
[9/15][Clang][RISCV][NFC] Use correct type for `RVVTypeCache::computeTypes` under RISCVVEmitter.cpp
`MaskedPrototype` is initialized and used nowhere, this is a bug. The
existing codebase works correctly upon this bug because the default
policy for unmasked intrinsics is set to TAMU.
This is something to be fixed because when the default policy is
changed to TAMA, clang will generate incorrect result.
This is the 9th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/
D141764
Jay Foad [Tue, 24 Jan 2023 15:01:16 +0000 (15:01 +0000)]
[KnownBits] Add missing const to a couple of methods
Florian Hahn [Tue, 24 Jan 2023 14:58:21 +0000 (14:58 +0000)]
[VPlan] Add tests for VPlanVerifier (NFC).
Extra test coverage suggested for
D140514.
Francesco Petrogalli [Tue, 24 Jan 2023 13:06:17 +0000 (14:06 +0100)]
[llvm][docs] Fix indentation of item list. [NFCI]
This fixes the rendering of the items at https://llvm.org/docs/GettingStarted.html#stand-alone-builds
Differential Revision: https://reviews.llvm.org/
D142457
Alex Bradbury [Tue, 24 Jan 2023 14:18:09 +0000 (14:18 +0000)]
[clang][RISCV] Fix ABI mismatch between GCC and Clang (extension of integers on stack)
See <https://github.com/llvm/llvm-project/issues/57261> for full
details. Essentially, a previous version of the psABI indicated (by my
reading) that integer scalars passed on the stack were anyext. A [later
commit](https://github.com/riscv-non-isa/riscv-elf-psabi-doc/commit/
cec39a064ee0e5b0129973fffab7e3ad1710498f)
changed this to indicate that they are in fact signext/zeroext just as
if they were passed in registers.
This patch adds the change in the release notes but doesn't add a flag
to retain the old behaviour. The hope is that it's sufficiently hard to
trigger an issue due to this that it isn't worthwhile doing so.
Differential Revision: https://reviews.llvm.org/
D140401
Stefan Gränitz [Tue, 24 Jan 2023 10:39:25 +0000 (11:39 +0100)]
[ObjC][ARC] Share bundle handling code between steps of the ObjCARCOpts pass and cleanup (NFC)
Generalize and share code for operand bundle handling. Drop the anonymous namespace (all other helper functions are local static). Rename the existing funclet test for cleanup-pads.
Reviewed By: compnerd
Differential Revision: https://reviews.llvm.org/
D137945
Stefan Gränitz [Tue, 24 Jan 2023 10:37:23 +0000 (11:37 +0100)]
[ObjC][ARC] Teach the OptimizeSequences step of ObjCARCOpts about WinEH funclet tokens
When optimizing retain-release-sequences we insert (and delete) ObjC runtime calls. These calls need a funclet operand bundle that refers to the enclosing funclet pad whenever they are inserted in a WinEH funclet. WinEH funclets can contain multiple basic blocks. In order to find the enclosing funclet pad, we have to calculate the funclet coloring first.
Reviewed By: ahatanak
Differential Revision: https://reviews.llvm.org/
D137944
Johannes Reifferscheid [Tue, 24 Jan 2023 13:32:50 +0000 (14:32 +0100)]
Relax requirements for TileOp.
The op doesn't need to be a LinalgOp, implementing TilingInterface and
DestinationStyleOpInterace is sufficient.
Reviewed By: nicolasvasilache, ftynse
Differential Revision: https://reviews.llvm.org/
D142460
Joachim Protze [Tue, 24 Jan 2023 14:12:06 +0000 (15:12 +0100)]
[OpenMP][Archer] Use dlsym rather than weak symbols for TSan annotations
This patch fix issues reported for Ubuntu and possibly other platforms:
https://github.com/llvm/llvm-project/issues/45290
The latest comment on this issue points out that using dlsym rather than
the weak symbol approach to call TSan annotation functions fixes the issue
for Ubuntu.
Differential Revision: https://reviews.llvm.org/
D142378
Florian Hahn [Tue, 24 Jan 2023 14:14:27 +0000 (14:14 +0000)]
[SCCP] Add vector add tests for nuw/nsw inference.
Also removes a dead argument from some tests.
David Green [Tue, 24 Jan 2023 14:04:21 +0000 (14:04 +0000)]
[AAch64] Format TargetParserTest ARMCPUTestParams table. NFC
Sanjay Patel [Tue, 24 Jan 2023 13:11:19 +0000 (08:11 -0500)]
[InstCombine] reduce compare of signbits of 2 values
Test if 2 values have different or same signbits:
(X u>> BitWidth - 1) == zext (Y s> -1) --> (X ^ Y) < 0
(X u>> BitWidth - 1) != zext (Y s> -1) --> (X ^ Y) > -1
https://alive2.llvm.org/ce/z/qMwMhj
As noted in #60242, these patterns regressed between the
14.0 and 15.0 releases - probably due to a change in
canonicalization of related patterns.
The related patterns for testing if 2 values are both
pos/neg appear to be handled already.
Sanjay Patel [Tue, 24 Jan 2023 12:55:27 +0000 (07:55 -0500)]
[InstCombine] adjust/add tests for cmp-of-signbits; NFC
These were added with
e76c95fb40b1081438 with the
right test names, but the predicates weren't updated
to match.
Valentin Clement [Tue, 24 Jan 2023 13:46:11 +0000 (14:46 +0100)]
[flang] Use input type to recover the type desc when emboxing
When emboxing to a polymorphic entity without a type source box,
the type desc address must be retrived from the input type and
not from the box type.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/
D142435
Valentin Clement [Tue, 24 Jan 2023 13:45:17 +0000 (14:45 +0100)]
[flang] Handle passing NULL() to polymorphic pointer argument
Only updates the assert to check where the box is a BaseBoxType
instead of a BoxType since ClassType are also valid in that case.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/
D142442
Valentin Clement [Tue, 24 Jan 2023 13:34:16 +0000 (14:34 +0100)]
[flang][NFC] Fix typo
Aaron Ballman [Tue, 24 Jan 2023 13:21:53 +0000 (08:21 -0500)]
Fix the Clang sphinx build
This addresses issues found by:
https://lab.llvm.org/buildbot/#/builders/92/builds/39084
Paul Walker [Sat, 21 Jan 2023 13:38:58 +0000 (13:38 +0000)]
[SVE] Fix invalid INSERT_SUBVECTOR creation when lowering fixed length fp-int conversions.
The original logic resulted in inserting an integer vector into
a floating point one and vice versa. Patch also adds the missing
assert that would have caught the issue.
Differential Revision: https://reviews.llvm.org/
D142303
Michał Górny [Tue, 24 Jan 2023 11:36:09 +0000 (12:36 +0100)]
[clang] Fix linking to LLVMTestingAnnotations in standalone build
The LLVMTestingAnnotations library that is now used by unittests
is not installed as part of LLVM. In order to make it possible to build
unittests when performing the standalone build of clang, build
the library from LLVM sources locally. This mirrors the existing logic
for LLVMTestingSupport.
Differential Revision: https://reviews.llvm.org/
D142449
Marco Elver [Tue, 24 Jan 2023 10:51:22 +0000 (11:51 +0100)]
[SanitizerBinaryMetadata] Declare callbacks extern weak
Declare callbacks extern weak (if no existing declaration exists), and
only call if the function address is non-null.
This allows to attach semantic metadata to binaries where no user of
that metadata exists, avoiding to have to link empty stub callbacks.
Once the binary is linked (statically or dynamically) against a tool
runtime that implements the callbacks, the respective callbacks will be
called. This vastly simplifies gradual deployment of tools using the
metadata, esp. avoiding having to recompile large codebases with
different compiler flags (which negatively impacts compiler caches).
Reviewed By: dvyukov, vitalybuka
Differential Revision: https://reviews.llvm.org/
D142408
Masahiro ARAKAWA [Fri, 14 Oct 2022 05:18:17 +0000 (14:18 +0900)]
[docs][NFC] Add document of llvm-opt-report.
Differential Revision: https://reviews.llvm.org/
D136138
Guillaume Chatelet [Tue, 24 Jan 2023 10:58:02 +0000 (10:58 +0000)]
[NFC] Deprecate DataLayout::getPrefTypeAlignment
Caroline Concatto [Tue, 24 Jan 2023 09:34:25 +0000 (09:34 +0000)]
[AArch64][SME2] Add Multi-vector add/sub, storing into ZA intrinsic
Add the following intrinsic:
ADD single & multi
SUB single & multi
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/
D142114
Ilya Biryukov [Tue, 24 Jan 2023 10:36:46 +0000 (11:36 +0100)]
[MC] Temporarily remove the deleted constructors, they break C++20 build
This helps to unblock our internal integrate that now relies on C++20
configuration. I will follow up with a proposal to re-enable the deleted
constructors soon, but it is a bit involved to avoid increasing the
sizes of struct.
Guillaume Chatelet [Tue, 24 Jan 2023 10:39:58 +0000 (10:39 +0000)]
[NFC] Deprecate SelectionDag functions taking Alignment as unsigned
Nicolas Vasilache [Tue, 24 Jan 2023 10:27:40 +0000 (02:27 -0800)]
[mlir][Linalg] NFC - Expose packing implementation as a standalone functional-style API call
Nicolas Vasilache [Mon, 23 Jan 2023 15:43:24 +0000 (07:43 -0800)]
[mlir][Linalg] NFC - Add transform pack builder
eopXD [Sat, 14 Jan 2023 15:06:21 +0000 (07:06 -0800)]
[8/15][Clang][RISCV][NFC] Always emit PolicyAttr in riscv_vector_builtin_cg.inc
The extra logic here is redundant. Also sneaked in an one-liner for
emitting `IsMasked`.
This is the 8th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/
D141762
Guillaume Chatelet [Tue, 24 Jan 2023 09:50:16 +0000 (09:50 +0000)]
[NFC] Remove unused SelectionDag::getExtLoad function
Luke Lau [Thu, 19 Jan 2023 11:25:23 +0000 (11:25 +0000)]
[RISCV] Combine FP_TO_INT to vfwcvt/fvncvt
Adds new pseudo instructions to make sure that the fcvt instructions
have all rounding mode (RM) and unsigned (XU) variants across
single-width, widening and narrowing conversions.
And likewise, extends the VL patterns to accompany them. We don't add
new VL nodes for the widening/narrowing conversions though, instead we
just add specific patterns for vfcvts on those wider/narrower types.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D142102
Guillaume Chatelet [Mon, 23 Jan 2023 10:08:01 +0000 (10:08 +0000)]
[NFC] Deprecate SelectionDag::getLoad that takes alignment as
unsigned
Serge Pavlov [Fri, 13 Jan 2023 15:32:10 +0000 (22:32 +0700)]
[FPEnv] Fix complex operations in strictfp mode
Operations on floating-point complex data had incorrect FP attributes
in strictfp mode, because IRBuilder object was not synchronized with AST
node attributes.
Differential Revision: https://reviews.llvm.org/
D141765
eopXD [Sat, 14 Jan 2023 13:19:49 +0000 (05:19 -0800)]
[7/15][Clang][RISCV][NFC] Correct the default value for Policy to TAMU
The default value is set to `Omit`, but in fact the value is then
assigned in `updateNamesAndPolicy`, which is set to TUMU when masked and
TAMU when unmasked. This commit demonstrates so and further remove
another dependency of `Omit`.
This is the 7th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/
D141759
Valentin Clement [Tue, 24 Jan 2023 09:18:55 +0000 (10:18 +0100)]
[flang] Support polymorphic input array for PACK intrinsic
When `ARRAY` is polymorphic, the result needs to carry over
the dynamic type information. This patch updates the lowering
to make the result polymorphic when needed.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/
D142432
Caroline Concatto [Mon, 23 Jan 2023 18:01:48 +0000 (18:01 +0000)]
[AArch64][SME2] Add Multi-vector saturating extract narrow and interleave intrinsics
Add the following intrinsic:
SQCVTN
SQCVTUN
UQCVTN
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: kmclaughlin
Differential Revision: https://reviews.llvm.org/
D142089
Samuel Parker [Tue, 24 Jan 2023 09:07:37 +0000 (09:07 +0000)]
[InstCombine] trunc (fptoui|fptosi)
Attempt to fold the trunc into the fp-to-int conversion.
Differential Revision: https://reviews.llvm.org/
D142093
LLVM GN Syncbot [Tue, 24 Jan 2023 09:09:28 +0000 (09:09 +0000)]
[gn build] Port
a2b3ab8f7786
eopXD [Tue, 24 Jan 2023 08:45:11 +0000 (00:45 -0800)]
[6/15][Clang][RISCV][NFC] Instructions with a mask destination register is always tail agnostic
The logic under `computeBuiltinTypes` is an amendment to setting Policy as
`Omit`. The tail policy should be set to agnostic for those intrinsics that
has `HasTailPolicy = false`, which are the intrinsics with a mask destination
register.
This is the 6th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/
D141756
Hui [Wed, 18 Jan 2023 23:26:34 +0000 (23:26 +0000)]
[libc++][ranges] implement `std::ranges::split_view`
- implement `std::ranges::split_view` (last c++20 view)
- Work in process on testing iterator/sentinel, but since we are
getting closer to the deadline, I'd like to send the review early
Differential Revision: https://reviews.llvm.org/
D142063
Yashwant Singh [Tue, 24 Jan 2023 08:52:01 +0000 (14:22 +0530)]
[AMDGPU] Add missing physical register check in SIFoldOperands::tryFoldLoad
tryFoldLoad() is not meant to work on physical registers moreover
use_nodbg_instructions(reg) makes the compiler buggy when called with
physical reg
Fix for SWDEV-373493
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/
D141895
Jonas Hahnfeld [Fri, 20 Jan 2023 10:13:44 +0000 (11:13 +0100)]
[clang][Lex] Add back PPCallbacks::FileNotFound
This callback was removed with commit
7a124f4859, but we use it
downstream in ROOT/Cling to implement handling of a special include
syntax. Add back a "safe" version of the callback that only takes
the file name and return a bool to silently skip the file.
Differential Revision: https://reviews.llvm.org/
D142196
Christian Ulmann [Tue, 24 Jan 2023 08:44:29 +0000 (09:44 +0100)]
[mlir][FuncToLLVM] Fix arg attr memref interaction
This commit ensures that argument attributes are dropped from types
that are expanded to multiple function arguments. Previously, they
were attached to all arguments belonging to the memref, which
resulted in illegal LLVMIR, e.g., noalias on integers.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/
D142212
Guillaume Chatelet [Mon, 16 Jan 2023 09:55:47 +0000 (09:55 +0000)]
[NFC] Use new version of SelectionDAG::getLoad in NVPTXLowerFormalArguments
Let's use the new version of the API that helps tighten the alignment
values Semantic.
Differential Revision: https://reviews.llvm.org/
D141830
Matthias Springer [Tue, 24 Jan 2023 08:23:39 +0000 (09:23 +0100)]
[mlir][linalg] Convert tensor.pad to destination style
This can be a pre-processing for bufferization and allows for more efficient lowerings without an alloc.
Differential Revision: https://reviews.llvm.org/
D142207
Jay Foad [Mon, 23 Jan 2023 15:04:23 +0000 (15:04 +0000)]
[cmake] Stop using add_definitions
Since CMake 3.12 this has been superseded by add_compile_definitions and
other commands.
Differential Revision: https://reviews.llvm.org/
D142363
Jay Foad [Mon, 23 Jan 2023 15:00:43 +0000 (15:00 +0000)]
[cmake] Remove AddLLVMDefinitions
This has been unused since D31125.
Differential Revision: https://reviews.llvm.org/
D142362
Matthias Springer [Tue, 24 Jan 2023 08:10:32 +0000 (09:10 +0100)]
[mlir][linalg] Convert tensor.generate to destination style
This can be a pre-processing for bufferization and allows for more efficient lowerings without an alloc.
Differential Revision: https://reviews.llvm.org/
D142205
eopXD [Sat, 14 Jan 2023 11:58:35 +0000 (03:58 -0800)]
[5/15][Clang][RISCV][NFC] Remove extra attribute Policy::IntrinsicWithoutMU by reusing HasTailPolicy and HasMaskPolicy
Righteously there shouldn't be any special cases here because
`HasTailPolicy` and `HasMaskPolicy` is able to express necessary cases.
This commit is a part of the step-by-step effort to remove
`Policy::Scheme::Omit`, which completely does not make sense in RVV 1.0
because an RVV instruction always executes with `vta` and `vma` set
to a certain value.
This is the 5th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/
D141754
eopXD [Sat, 7 Jan 2023 09:04:26 +0000 (01:04 -0800)]
[4/15][Clang][RISCV][NFC] Remove unnecessary logic under RVVIntrinsic::computeBuiltinTypes
`PolicyAttrs::IsUnspecified` is modified in
`RVV::Intrinsic::computeBuiltInTypes` and used under
`RVVIntrinsic::updateNamesAndPolicy`. Suprisingly the modification
in `RVV::Intrinsic::computeBuiltInTypes` is completely unnecessary.
This commit removes the redundant logic.
This is the 4th commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D141577
eopXD [Sat, 7 Jan 2023 08:17:08 +0000 (00:17 -0800)]
[3/15][Clang][RISCV][NFC] Clarify edge cases of RVVIntrinsic::getSupportedMaskedPolicies for clarity
This is the 3rd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/
D141575
eopXD [Sat, 7 Jan 2023 08:05:41 +0000 (00:05 -0800)]
[2/15][Clang][RISCV][NFC] Rename Policy::IsPolicyNone to IsUnspecifed
The original naming is inaccurate. An RVV intrinsic always comes with
a corresponding policy behavior. When the policy is unspecified for an
intrinsic, its policy behavior should be it's default assumption.
This is the 2nd commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
Please refer to the cover letter in the 1st commit (
D141573) for an
overview.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/
D141574
eopXD [Thu, 5 Jan 2023 11:37:37 +0000 (03:37 -0800)]
[1/15][Clang][RISCV][NFC] Extract common utility to RISCVVIntrinsicUtils
This is the 1st commit of a patch-set that aims to change the default policy
for RVV intrinsics from TAMU to TAMA.
The patch-set work towards the simplification proposal [0] of Nick
Knight. After this patch-set, all intrinsics operates under a general
assumption that the policy behavior is agnostic.
You may find that most of the patches are NFC patches. They subtly remove
implicit assumptions that entangles the codebase, making the singular patch
that contains functional change clear and obvious.
In [2/15], The attribute `Policy::IsPolicyNone` may give the mis-perception
that an RVV intrinsic may operate without any policy. However this is not the
case because the policy CSR-s (`vta` and `vma`) always affect an RVV
instruction's behavior, except that some instructions have policy always set
as agnostic (e.g. instructions with a mask destination register is always
tail agnostic).
Next, to perform the change from TAMU to TAMA, we need to first remove
`Policy::PolicyType::Omit`. [4/15] ~ [12/15] removes it with NFC patches step
by step. Without the patches, directly applying [14/15] to the existing codebase
will not work because there will be complicated logics that are scattered in
places that is hard to maintain.
[1/15], [3/15] are not related to the main goal of this patch-set, they were
clean-up along the way as I was going through the codebase. [13/15] is a
clean-up that was an oversight in
D141198.
Finally, [14/15] performs the functional change this patch-set aims for. The
default policy is changed from TAMU to TAMA. This affects the masked version of
the intrinsics without a policy suffix. The masked-off operand is removed. Due
to the removal, masked version of `vid` and `viota` intrinsics are no longer
available for overloading.
[15/15] is a final commit to set data members of `Policy` as constants. Through
the refactoring the class `Policy` is now correct-by-construction.
The next patch-set will be to remove redundant intrinsics with a policy suffix
`_ta` and `_tama` intrinsics are redundant and will be removed. Other policy
suffix will be renamed to adapt to the general assumption that policy is
generally agnostic.
[0] https://gist.github.com/nick-knight/
6cb0b74b351a25323dfb1821d3a269b9
Pull Request: riscv-non-isa/rvv-intrinsic-doc#186
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/
D141573
eopXD [Wed, 4 Jan 2023 07:10:25 +0000 (23:10 -0800)]
[7/7][Clang][RISCV][NFC] Remove attribute `IsPrototypeDefaultTU`
This is the 7th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
This is the final commit of the patch-set. Now that no intrinsics is
using the attribute, we are safe to remove it.
Please refer to the cover letter in the 1st commit (
D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140954
eopXD [Tue, 3 Jan 2023 05:43:56 +0000 (21:43 -0800)]
[6/7][Clang][RISCV] Remove default tail-undisturbed for vmv_s_x and vfmv_s_f intrinsics
The destination parameter is removed for non-policy unmasked intrinsics.
The default policy for non-policy (implicit) vmv_s_x and vfmv_s_f
intrinsics will be tail agnostic and mask undisturbed.
Upon change of prototype, vmv_s_x and vfmv_s_f is no longer able to
have an overloading version for its non-policy and tail agnostic
intrinsics.
This is the 6th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (
D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140947
eopXD [Tue, 3 Jan 2023 05:35:07 +0000 (21:35 -0800)]
[5/7][Clang][RISCV] Remove default tail-undisturbed for vcompress intrinsics
The destination parameter is removed for non-policy unmasked intrinsics.
The default policy for non-policy (implicit) vcompress intrinsics will
be tail agnostic and mask undisturbed.
This is the 5th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (
D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140942
eopXD [Tue, 3 Jan 2023 05:19:12 +0000 (21:19 -0800)]
[4/7][Clang][RISCV] Remove default tail-undisturbed for multiply-add intrinsics
The destination parameter is still needed as the computation requires
so.
The default policy for non-policy (implicit) vslideup intrinsics
will be tail agnostic and mask undisturbed.
This is the 4th commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (
D140895) for an overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140941
eopXD [Tue, 3 Jan 2023 10:37:10 +0000 (02:37 -0800)]
[3/7][Clang][RISCV] Remove default tail-undisturbed for vslidedown intrinsics
The destination parameter is removed for non-policy unmasked vslidedown
intrinsics.
The default policy for non-policy (implicit) vslidedown intrinsics will
be tail agnostic and mask undisturbed.
This is the 3rd commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (
D140895) for an
overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140937
eopXD [Tue, 3 Jan 2023 04:06:42 +0000 (20:06 -0800)]
[2/7][Clang][RISCV] Remove default tail-undisturbed for vslideup intrinsics
The destination parameter is still needed as elements of
0 < i < max(vstart, OFFSET) in vd remains unchanged.
The default policy for non-policy (implicit) vslideup intrinsics
will be tail agnostic and mask undisturbed.
This is the 2nd commit of a patch-set that aims to remove the
IsPrototypeDefaultTU special case for the rvv-intrinsics.
Please refer to the cover letter in the 1st commit (
D140895) for an overview.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140936
eopXD [Tue, 3 Jan 2023 03:49:29 +0000 (19:49 -0800)]
[1/7][Clang][RISCV] Remove default tail-undisturbed for vector reduction intrinsics
The destination parameter is removed for non-policy unmasked intrinsics,
they are now tail agnostic. The non-policy masked intrinsics are tail
agnostic and masked undisturbed, just like normal instructions like
vadd.
This is the 1st commit of a patch-set that aims to remove the
`IsPrototypeDefaultTU` special case for the rvv-intrinsics.
The patch-set work towards the simplification proposal [0] of Nick
Knight, the plan is that after this patch-set, all non-policy
intrinsics will be aligned with default policy behavior of tail
agnostic and mask undisturbed. Then the next patch-set will aim
towards changing non-policy intrinsics to tail agnostic and mask
agnostic.
[0] https://gist.github.com/nick-knight/
6cb0b74b351a25323dfb1821d3a269b9
Pull Request: riscv-non-isa/rvv-intrinsic-doc#186
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/
D140895
Kazu Hirata [Tue, 24 Jan 2023 07:07:41 +0000 (23:07 -0800)]
[llvm] Use llvm::countr_zero instead of findFirstSet (NFC)
At each call to findFirstSet in this patch, the argument is known to
be nonzero, so we can safely switch to llvm::countr_zero, which will
become std::countr_zero once C++20 is available.
Kazu Hirata [Tue, 24 Jan 2023 06:48:42 +0000 (22:48 -0800)]
[SystemZ] Use isShiftedMask_64 instead of isStringOfOnes (NFC)
isStringOfOnes does the same thing as isShiftedMask_64, provided that
the parameter is nonzero, which is the case for both calls in this
patch.
Johannes Doerfert [Tue, 24 Jan 2023 03:53:12 +0000 (19:53 -0800)]
[Attributor] Allow (inter-procedural) "CFG" reasoning for aligned regions
If an instruction is executed in an aligned region we can ignore
threading effects and use CFG reasoning (dominance and reachability).
This is true because all threads are together in an aligned region and
there cannot be one waiting for a signal at a place not connected via
the control flow.
More dedicated tests will follow.
More details can be found here:
"Co-Designing an OpenMP GPU Runtime and Optimizations for Near-Zero
Overhead Execution", IPDPS 2022,
https://www.osti.gov/servlets/purl/
1890094
Johannes Doerfert [Tue, 24 Jan 2023 03:46:38 +0000 (19:46 -0800)]
[OpenMP] Readnone calls do not have non-local side-effects
Johannes Doerfert [Tue, 24 Jan 2023 03:45:06 +0000 (19:45 -0800)]
[OpenMP] Run the Attributor as part of the device runtime optimization
This will help us propagate assumptions to call sites, among other
things.
Shivam Gupta [Tue, 24 Jan 2023 06:25:54 +0000 (11:55 +0530)]
[Clang][NFC] Remove a redundancy check in Sema::adjustMemberFunctionCC
If the current calling convection CurCC is not equal to Target calling
convection ToCC and current calling convention (CurCC) is equal to the
default calling convention (DefaultCC), that means DefaultCC can not be
equal to ToCC so the right part of the expression DefaultCC == ToCC is
not needed.
revelant code -
if (CurCC == ToCC)
return;
if (CurCC != DefaultCC || DefaultCC == ToCC)
return;
Found by PVS-Studio - https://pvs-studio.com/en/blog/posts/cpp/1003/, N41.
Differential Revision: https://reviews.llvm.org/
D142338
Nicole Rabjohn [Tue, 24 Jan 2023 05:00:27 +0000 (00:00 -0500)]
Opting out of Clang 16 ABI Changes for AIX and z/OS
There is already a GCC compatibility gap on AIX, & GCC compatibility is
not a concern on z/OS. GCC compatibility is not sufficient motivation
for breaking ABI on AIX and z/OS. This opts out of changes introduced in
https://reviews.llvm.org/
D119051. For AIX only, also opt out of
D117616
(which z/OS had picked up at the time ABI stabilization occurred).
Differential Revision: https://reviews.llvm.org/
D142358
Mariusz Sikora [Mon, 23 Jan 2023 06:13:02 +0000 (07:13 +0100)]
[AMDGPU][NFC] Apply new naming convention for feature fmacf64
Differential Revision: https://reviews.llvm.org/
D142329
Max Kazantsev [Tue, 24 Jan 2023 05:46:48 +0000 (12:46 +0700)]
[IndVars] Improve handling of multi-exit loops with known symbolic counts
This patch does two things, both related to support of multi-exit loops with
many exits that have known symbolic max exit count. They can theoretically
go independently, but I don't know how to write a test showing separate
impact.
Part 1: `SkipLastIter` can be set to `true` not when a particular exit has exit
count same as the whole loop (and therefore it must exit on the last iteration),
but when the aggregate of first few exits has umin same as whole loop exit count.
It means that it's not known which of them will exit exactly, but one of them will.
Part 2: when `SkipLastIter` is set, and exit count is `umin(a, b, c)`, instead of
`umin(a, b, c) - 1` use `umin(a - 1, b - 1, c - 1)`. We don't care about overflows
here, but the further logic knows how to deal with umin by element, but the
`SCEVAddExpr` node will confuse it.
Differential Revision: https://reviews.llvm.org/
D141361
Reviewed By: nikic
Max Kazantsev [Tue, 24 Jan 2023 05:17:33 +0000 (12:17 +0700)]
[IndVars] Apply more optimistic SkipLastIter for AND/OR conditions
When exit by condition `C1` dominates exit by condition `C2`, and
max symbolic exit count for `C1` matches those for loop, we will
apply more optimistic logic to `C2` by setting `SkipLastIter` for it,
meaning that it will do 1 iteration less because the dominating branch
must exit on the last loop iteration.
But when we have a single exit by condition `C1 & C2`, we cannot
apply the same logic, because there is no dominating condition.
However, if we can prove that the symbolic max exit count of `C1 & C2`
matches those of `C1`, it means that for `C2` we can assume that it
doesn't matter on the last iteration (because the whole thing is `false`
because `C1` must be `false`). Therefore, in this situation, we can handle
`C2` as if it had `SkipLastIter`.
Differential Revision: https://reviews.llvm.org/
D139934
Reviewed By: nikic
Andrew Young [Tue, 24 Jan 2023 04:08:35 +0000 (20:08 -0800)]
[MLIR] Add LocationAttr declarations to ODS
This commit adds location attributes and arrays of locations to OpBase.td.
Using LocationAttrs directly in an operation is useful when the location does
not correspond 1-1 to an operation or value in the IR. We use this in CIRCT to
store the declaration location of result ports of HWModule operations.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/
D142148
Johannes Doerfert [Tue, 24 Jan 2023 03:41:02 +0000 (19:41 -0800)]
[Attributor] Check assumptions to improve `isAlignedBarrier` queries
Johannes Doerfert [Tue, 24 Jan 2023 03:40:17 +0000 (19:40 -0800)]
[Attributor] Allow to delete (assume) intrinsics outside the SCC
Johannes Doerfert [Tue, 24 Jan 2023 03:58:20 +0000 (19:58 -0800)]
[Attributor][FIX] Ensure not to run new queries during manifest
If we modified the IR during manifest, e.g., SPMDzation, we might end up
with un-cached reachability queries. This is not good as the result is
going to be optimistic. We now cache the updateImpl result and use it
during manifest.
Bug was exposed in a follow up extension.
Johannes Doerfert [Tue, 24 Jan 2023 03:38:46 +0000 (19:38 -0800)]
[Attributor][FIX] Reachability needs to process the entire worklist
Johannes Doerfert [Tue, 24 Jan 2023 04:09:09 +0000 (20:09 -0800)]
[Attributor][FIX] Replace typo with something more sane
Xiang Li [Sat, 21 Jan 2023 06:50:40 +0000 (01:50 -0500)]
[mlir] support !shape.value_shape when replace WithOp in OutlineShapeComputationPass.
Fixes #60069 https://github.com/llvm/llvm-project/issues/60069
In case like:
%1 = shape.with_shape %arg1, %0 : !shape.value_shape, !shape.shape
%2 = shape.value_of %1 : tensor<?xf32>
cannot replace %2 with %arg1.
Transform it into
%2 = shape.value_of %arg1 : tensor<?xf32>
Differential Revision: https://reviews.llvm.org/
D142275
Haowei Wu [Tue, 24 Jan 2023 02:43:23 +0000 (18:43 -0800)]
Revert "[Fuchsia] Build windows runtimes using cross compilation on Linux"
This reverts commit
20bb7658f53b0b8db165ff4d404ede3f9b34862d.
It breaks Fuchsia stage2 builders.
Alexey Bader [Tue, 24 Jan 2023 01:19:26 +0000 (17:19 -0800)]
[bugpoint] Fix compilation of bugpoint-passes on Windows
Bugpoint also depends on libLLVMSupport.dll for 'llvm_unreachable'
Reviewed By: beanz
Differential Revision: https://reviews.llvm.org/
D140609
Vitaly Buka [Tue, 24 Jan 2023 01:05:59 +0000 (17:05 -0800)]
Revert "[profile] Disable test which needs update after
D141512"
Work around with -fno-slp-vectorize.
This reverts commit
31260a4ce43aab7c04f501095a9032de063ccaf9.