Tom Rini [Mon, 3 May 2021 20:48:54 +0000 (16:48 -0400)]
freescale: Drop unnecessary cpld_data_t non-typedef
In some board cpld.h files the definition of the cpld_data struct
not-quite makes a typedef for cpld_data_t. This problem is caught with
gcc-11 as a multiple definition error. As there are no users of this
non-typedef, fix this by not declaring it one to begin with.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 3 May 2021 20:48:53 +0000 (16:48 -0400)]
ARM: mvebu: a38x: Correct mismatched bound warnings
With gcc-11 we see:
drivers/ddr/marvell/a38x/ddr3_debug.c:672:47: error: argument 2 of type 'u32[5]' {aka 'unsigned int[5]'} with mismatched bound [-Werror=array-parameter=]
672 | int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],
| ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h:10,
from drivers/ddr/marvell/a38x/ddr3_init.h:17,
from drivers/ddr/marvell/a38x/ddr3_debug.c:6:
drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h:116:47: note: previously declared as 'u32[]' {aka 'unsigned int[]'}
And similar warnings. Correct these by updating the prototype. Remove
the prototype for ddr3_tip_read_pup_value as it is unused.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 6 Jul 2021 22:10:10 +0000 (18:10 -0400)]
Merge branch '2021-07-06-platform-updates'
- mpc8379erdb DM_USB, DM_PCI and DM_ETH support.
- Drop PCI support from the integrator family of boards
- Add synquacer support
- Assorted lpc32xx updates and improvements
- snapdragon (and related) fixes, Broadcom iproc update
Stephan Gerhold [Mon, 28 Jun 2021 08:40:09 +0000 (10:40 +0200)]
serial: serial_msm: Ensure BAM/single character mode are disabled
At the moment, the U-Boot serial_msm driver does not initialize the
UART_DM_DMEN register with the required value. Usually this does not
cause any problems, because there is Qualcomm's LK bootloader running
before U-Boot which initializes the register with the correct value.
It's important that this register is initialized correctly, because
the U-Boot driver does not make use of the BAM/DMA or single character
mode functionality of the UART controller. A different bootloader
before U-Boot might initialize the register differently.
For example, on DragonBoard 410c U-Boot can also be installed to the
"aboot" partition (replacing LK entirely). In this case U-Boot is
loaded directly by SBL, which seems to use the single-character mode
for some reason. In single character mode there is always just one
char in the FIFO, instead of the 4 characters expected by
msm_serial_fetch(). It also causes issues with "earlycon" later in
the Linux kernel, which tries to output 4 chars at once,
but only the first char will be written.
This causes early UART log in Linux to be corrupted like this:
[ 00ano:ameoi .Q1B[ 00ac _idaM00080oo'ahani-lcle._20). 15NdNii 5 SPMSJ20:U2
[ 00rkoolmsamel
[ 00Fw ]elamletopsioble
[ 00ore
instead of
[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd030]
[ 0.000000] Machine model: Qualcomm Technologies, Inc. APQ 8016 SBC
[ 0.000000] earlycon: msm_serial_dm0 at MMIO 0x00000000078b0000 (options '')
[ 0.000000] printk: bootconsole [msm_serial_dm0] enabled
Make sure to initialize UART_DM_DMEN correctly to fix this issue
when loading U-Boot directly after SBL (instead of through LK).
There is no functional difference when loading U-Boot through LK
since LK also initializes UART_DM_DMEN to 0x0. [1]
[1]: https://git.linaro.org/landing-teams/working/qualcomm/lk.git/tree/platform/msm_shared/uart_dm.c?h=dragonboard410c-LA.BR.1.2.7-03810-8x16.0-linaro3#n203
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Stephan Gerhold [Sun, 27 Jun 2021 11:06:15 +0000 (13:06 +0200)]
arm: dts: db410c: Add missing cd-gpios for SD card detection
It looks like SD card detection is broken at the moment for DB410c.
The eMMC is detected correctly, but the SD card is not.
This is probably similar to the issue fixed in commit
850514740358
("mmc: msm_sdhci: Use mmc_of_parse for setting host_caps") for eMMC,
except that the SD card does not have a property like "non-removable"
that skips the card detection.
The SDHCI on DB410c cannot detect itself if a SD card is inserted,
so add the necessary cd-gpios to make SD card detection work again.
While at it, fix the #gpio-cells for the soc_gpios to avoid DTC
warnings - the soc_gpios are actually already used with two cells
for the gpio-leds so this was just wrong all the time.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sheep Sun [Sun, 20 Jun 2021 02:34:35 +0000 (10:34 +0800)]
arm: snapdragon: Fix typo in clk_bcr_update()
Fix typo in clock-snapdragon.c
Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
Sheep Sun [Sun, 20 Jun 2021 02:34:34 +0000 (10:34 +0800)]
arm: snapdragon: Use correct GICC register on APQ8016
The GICC register used by u-boot is 0x0a20c000, which is actually a GICC
for WCNSS, the WLAN processor. U-boot runs on the Application Processor,
therefore it should use APCS GICC instead. Hence, correct it with APCS GICC
register address.
Signed-off-by: Sheep Sun <sunxiaoyang2003@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:09 +0000 (22:37 -0400)]
lpc32xx: ea-lpc3250devkitv2: enable i2c (DM)
Enable a DMed i2c driver for the ea-lpc3250devkitv2 board.
Include some sample commands/output for testing.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:08 +0000 (22:37 -0400)]
Kconfig: convert CONFIG_SYS_I2C_LPC32XX
Convert the CONFIG_SYS_I2C_LPC32XX configuration symbol from an include
directive to a Kconfig value.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Trevor Woerner [Fri, 11 Jun 2021 02:37:07 +0000 (22:37 -0400)]
lpc32xx: i2c: finish DM/OF code
Add the of_match/compatible string to the lpc32xx i2c driver so it works
correctly with device-tree.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:06 +0000 (22:37 -0400)]
lpc32xx: i2c: fix base address
The lpc32xx driver was not obtaining the per-device base address correctly
from the device tree. Fix the FIXME in order to get the correct base address.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:05 +0000 (22:37 -0400)]
lpc32xx: i2c: remove unused define
The LPC32XX_I2C_STAT_DRMI is not used anywhere so remove it.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:04 +0000 (22:37 -0400)]
arm: lpc32xx: add EA LPC3250 DevKitv2 board support
Add basic support for running U-Boot on the Embedded Artists LPC3250
Developer's Kit v2 board by launching U-Boot from the board's s1l loader
(which comes pre-installed on the board).
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:03 +0000 (22:37 -0400)]
lpc32xx: import device tree from Linux
Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board
directly and unmodified from the latest Linux kernel.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Fri, 11 Jun 2021 02:37:02 +0000 (22:37 -0400)]
lpc32xx: Kconfig: switch to CONFIG_CONS_INDEX
There's nothing special or unique to the lpc32xx that requires its own config
parameter for specifying the console uart index. Therefore instead of using
the lpc32xx-specific CONFIG_SYS_LPC32XX_UART include parameter, use the
already-available CONFIG_CONS_INDEX from Kconfig.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:31 +0000 (18:45 +0900)]
configs: synquacer: Enable EFI capsule update support
Enable EFI capsule update support. With the EFI capsule update,
you can update U-Boot, TF-A and OP-TEE. TF-A and OP-TEE are
usually combined as a FIP binary, but if the binary is bigger
than 480KB, you have to modify FIP header, split the OP-TEE
and stores the OP-TEE binary in the different place. This
configuration supports both cases.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:21 +0000 (18:45 +0900)]
doc: qemu: arm64: Fix the documentation of capsule update
Since the EDK2 GenerateCapsule script is out of date and it
doesn't generate the supported version capsule file, the document
should refer the mkeficapsule in tools.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:45:10 +0000 (18:45 +0900)]
board: synquacer: Add DeveloperBox 96boards EE support
Add the DeveloperBox 96boards EE support. This board is also
known as Socionext SynQuacer E-Series. It contians one "SC2A11"
SoC, which has 24-cores of arm Cortex-A53, and 4 DDR3 slots,
3 PCIe slots (1 4x port and 2 1x ports which are expanded via
PCIe bridge chip), 2 USB 3.0 ports and 2 USB 2.0 ports, 2 SATA
ports and 1 GbE, 64MB NOR flash and 8GB eMMC on standard
MicroATX Form Factor.
For more information, see this page;
https://www.96boards.org/product/developerbox/
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:44:59 +0000 (18:44 +0900)]
ARM: dts: synquacer: Add device trees for DeveloperBox
Add device trees for 96boards EE DeveloperBox and basement SynQuacer
SoC dtsi. These files are imported from EDK2
commit
83d38b0b4c0f240d4488c600bbe87cea391f3922
as-is (except for the changes #include path and some macros).
And add U-Boot specific changes in synquacer-sc2a11-developerbox-u-boot.dtsi
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Jassi Brar [Fri, 4 Jun 2021 09:44:48 +0000 (18:44 +0900)]
i2c: synquacer: SNI Synquacer I2C controller
Add driver for class of I2C controllers found on
Socionext Synquacer platform.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Jassi Brar [Fri, 4 Jun 2021 09:44:27 +0000 (18:44 +0900)]
spi: synquacer: Add HSSPI SPI controller driver for SynQuacer
This is a driver for the HSSPI SPI controller on SynQuacer SoC.
The HSSPI has command sequence mode (memory mapped) and
direct mode (FIFO access). The driver will operate it under
the direct mode. And before booting OS, it switch back to the
command sequence mode since that is compatible with default
EDK2 behavior.
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Jassi Brar [Fri, 4 Jun 2021 09:44:16 +0000 (18:44 +0900)]
mmc: synquacer: Add SynQuacer F_SDH30 SDHCI driver
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Masami Hiramatsu [Fri, 4 Jun 2021 09:44:06 +0000 (18:44 +0900)]
pci: synquacer: Add SynQuacer ECAM based PCIe driver
Add ECAM based SynQuacer PCIe RC driver. This driver configures the
PCIe RC and filter out a ghost pcie config.
Since the Linux kernel expects "socionext,synquacer-pcie-ecam" device
is configured by firmware (EDK2), it doesn't re-configure in the kernel.
So as same as EDK2, U-Boot needs to configure it before boot the kernel.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:55 +0000 (18:43 +0900)]
gpio: Introduce CONFIG_GPIO_EXTRA_HEADER to cleanup #ifdefs
Since some SoCs and boards do not hae extra asm/arch/gpio.h,
introduce CONFIG_GPIO_EXTRA_HEADER instead of adding
!define(CONFIG_ARCH_XXXX) in asm/gpio.h.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:34 +0000 (18:43 +0900)]
dm: pci: Skip setting VGA bridge bits if parent device is the host bus
Commit
bbbcb5262839 ("dm: pci: Enable VGA address forwarding on bridges")
sets the VGA bridge bits by checking pplat->class, but if the parent
device is the pci host bus device, it can be skipped. Moreover, it
shouldn't access the pplat because the parent has different plat data.
Without this fix, "pci enum" command cause a synchronous abort.
pci_auto_config_devices: start
PCI Autoconfig: Bus Memory region: [
78000000-
7fffffff],
Physical Memory [
78000000-7fffffffx]
PCI Autoconfig: Bus I/O region: [0-ffff],
Physical Memory [
77f00000-77f0ffffx]
pci_auto_config_devices: device pci_6:0.0
PCI Autoconfig: BAR 0, Mem, size=0x1000000, address=0x78000000 bus_lower=0x79000000
PCI Autoconfig: BAR 1, Mem, size=0x8000000, No room in resource, avail start=
79000000 / size=8000000, need=8000000
PCI: Failed autoconfig bar 14
PCI Autoconfig: BAR 2, I/O, size=0x4, address=0x1000 bus_lower=0x1004
PCI Autoconfig: BAR 3, Mem, size=0x2000000, address=0x7a000000 bus_lower=0x7c000000
PCI Autoconfig: BAR 4, I/O, size=0x80, address=0x1080 bus_lower=0x1100
PCI Autoconfig: ROM, size=0x80000, address=0x7c000000 bus_lower=0x7c080000
"Synchronous Abort" handler, esr 0x96000006
elr:
00000000e002bd28 lr :
00000000e002bce8 (reloc)
elr:
00000000fff6fd28 lr :
00000000fff6fce8
x0 :
0000000000001041 x1 :
000000000000003e
x2 :
00000000ffb0f8c8 x3 :
0000000000000001
x4 :
0000000000000080 x5 :
0000000000000000
x6 :
00000000fff718fc x7 :
000000000000000f
x8 :
00000000ffb0f238 x9 :
0000000000000008
x10:
0000000000000000 x11:
0000000000000010
x12:
0000000000000006 x13:
000000000001869f
x14:
00000000ffb0fcd0 x15:
0000000000000020
x16:
00000000fff71cc4 x17:
0000000000000000
x18:
00000000ffb13d90 x19:
00000000ffb14320
x20:
0000000000000000 x21:
00000000ffb14090
x22:
00000000ffb0f8c8 x23:
0000000000000001
x24:
00000000ffb14c10 x25:
0000000000000000
x26:
0000000000000000 x27:
0000000000000000
x28:
00000000ffb14c70 x29:
00000000ffb0f830
Code:
52800843 52800061 52800e00 97ffcf65 (
b9400280)
Resetting CPU ...
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masami Hiramatsu [Fri, 4 Jun 2021 09:43:23 +0000 (18:43 +0900)]
ata: ahci-pci: Use scsi_ops to initialize ops
Without this fix, scsi-scan will cause a synchronous abort
when accessing ops->scan.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Fri, 4 Jun 2021 02:25:36 +0000 (14:25 +1200)]
arm: iproc: Add higher speed configurations
Add support for 1.3GHz, 1.35GHz and 1.4GHz parts. This is based on
equivalent code in Broadcom's LDK 5.0.6.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Linus Walleij [Sat, 15 May 2021 12:44:19 +0000 (14:44 +0200)]
ARM: integrator: Drop PCI support
We didn't convert the Integrator to use DM for PCI in
time, and we don't use it either so let's just drop
PCI support from the Integrator.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sinan Akman [Tue, 11 May 2021 18:18:02 +0000 (14:18 -0400)]
mpc8379erdb: enable DM_USB DM_PCI DM_ETH
Signed-off-by: Sinan Akman <sinan@writeme.com>
Tom Rini [Tue, 6 Jul 2021 16:22:39 +0000 (12:22 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Tue, 6 Jul 2021 16:22:10 +0000 (12:22 -0400)]
Merge branch 'network_master' of https://source.denx.de/u-boot/custodians/u-boot-net
Zong Li [Wed, 30 Jun 2021 15:23:50 +0000 (23:23 +0800)]
board: sifive: support spl multi-dtb on unmatched board
There are two revisions of unmatched board with different DDR timing,
we'd like to support multi-dtb mechanism in SPL, then it selects the
right DTB at runtime according to PCB revision in I2C EEPROM.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Wed, 30 Jun 2021 15:23:49 +0000 (23:23 +0800)]
riscv: dts: add dts for unmatched rev1
The difference between unmatched rev3 and rev1 is DDR timing, the rev3
uses 1866 MT/s for 16GiB, and rev1 uses 2133 MT/s for 8GiB.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Wed, 30 Jun 2021 15:23:48 +0000 (23:23 +0800)]
board: sifive: Add an interface to get PCB revision
There are different DDR parameter settings for different board
revisions. Add a new interface to get the PCB revision to determine
which DT should be selected at runtime.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Wed, 30 Jun 2021 15:23:47 +0000 (23:23 +0800)]
riscv: sifive: fu740: Support i2c in spl
Enable SPL_I2C_SUPPORT for fu740, and add 'u-boot,dm-spl' property in
i2c node.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Wed, 30 Jun 2021 15:23:46 +0000 (23:23 +0800)]
riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller
Enable the Opencores I2C controller on FU740
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Zong Li [Wed, 30 Jun 2021 15:23:45 +0000 (23:23 +0800)]
board: sifive: unmatched: add initial support for a platform ID EEPROM
Add initial support for the PCB description EEPROM for SiFive HiFive
Unmatched boards.
This implementation is refactored based on Paul Walmsley's porting and
adopt the suggestions from David Abdurachmanov.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tianrui Wei [Thu, 1 Jul 2021 04:54:20 +0000 (12:54 +0800)]
mmc: openpiton: add piton_mmc driver
This commit adds support to piton_mmc driver for OpenPiton-riscv64
This driver has many things set as preconfigured because the hardware
automatically configures most of the settings during startup.
Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tianrui Wei [Thu, 1 Jul 2021 04:54:19 +0000 (12:54 +0800)]
board: riscv: add openpiton-riscv64 SoC support
This patch adds openpiton-riscv64 SOC support. In particular, this
board supports a standard bootflow through zsbl->u-boot SPL->
opensbi->u-boot proper->Linux. There are separate defconfigs for
building u-boot SPL and u-boot proper
Signed-off-by: Tianrui Wei <tianrui-wei@outlook.com>
Signed-off-by: Jonathan Balkind <jbalkind@ucsb.edu>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Dimitri John Ledkov [Wed, 16 Jun 2021 15:39:06 +0000 (16:39 +0100)]
riscv: sifive: Set default fdtfile names
Set default fdtfile names for unleashed and unmatched boards, as used
in the upstream Linux kernel. This allows sysboot command to find and
load appropriate dtb for the matching kernel from universal stock
Ubuntu RISC-V rootfs images based on fdtdir setting in extlinux.conf.
Signed-off-by: Dimitri John Ledkov <dimitri.ledkov@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
cc: Paul Walmsley <paul.walmsley@sifive.com>
cc: Palmer Dabbelt <palmer@dabbelt.com>
cc: Anup Patel <anup.patel@wdc.com>
cc: Atish Patra <atish.patra@wdc.com>
cc: Pragnesh Patel <pragnesh.patel@sifive.com>
cc: Green Wan <green.wan@sifive.com>
Green Wan [Mon, 28 Jun 2021 11:13:08 +0000 (19:13 +0800)]
drivers: clk: sifive: fu740-prci: replace 'pciaux' with 'pcieaux'
Replace 'pciaux' with 'pcieaux', including name string and function
prefix. The old name string, 'pciaux', might cause an error if PCIe
driver is changed to use clk_get_by_name() with 'pcieaux' to get
clock.
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Patrick Delaunay [Tue, 30 Mar 2021 12:34:50 +0000 (14:34 +0200)]
net: dwc_eth_qos: cosmetic: remove unused define EQOS_DESCRIPTOR_ALIGN
Remove the define EQOS_DESCRIPTOR_ALIGN unused since the
commit
6f1e668d964e ("net: dwc_eth_qos: Pad descriptors to cacheline size")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Michael Walle [Wed, 23 Jun 2021 11:56:02 +0000 (13:56 +0200)]
board: sl28: add DSA support for variant 2
Now that u-boot gained DSA support, and it is already enabled for the
kontron_sl28 board, add the last missing piece and enable the
corresponding devices it in the device tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:17 +0000 (20:53 +0300)]
net: enetc: propagate the return code from phy_startup() to eth_ops::start
Make sure that errors in the PHY driver .startup() method, such as no
link, are propagated and not ignored.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:16 +0000 (20:53 +0300)]
net: enetc: force the RGMII MAC speed/duplex instead of using in-band signaling
The RGMII spec supports optional in-band status reporting for the speed
and duplex negotiated on the copper side, and the ENETC driver enables
this feature by default.
However, this does not work when the PHY does not implement the in-band
reporting, or when there is a MAC-to-MAC connection described using a
fixed-link. In that case, it would be better to disable the feature in
the ENETC MAC and always force the speed and duplex to the values that
were negotiated and retrieved over MDIO once the autoneg is finished.
Since this works always, we just do it unconditionally and drop the
in-band code.
Note that because we need to wait for the autoneg to complete, we need
to move enetc_setup_mac_iface() after phy_startup() returns, and then
pass the phydev pointer all the way to enetc_init_rgmii().
The same considerations have led to a similar Linux driver patch as well:
https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=
c76a97218dcbb2cb7cec1404ace43ef96c87d874
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:15 +0000 (20:53 +0300)]
net: enetc: require a PHY device when probing
Given that even a fixed-link has an associated phy_device, there is no
reason to operate in a mode when dm_eth_phy_connect fails.
Remove the driver checks for a NULL priv->phy and just return -ENODEV
when that happens.
Copyright updated according to corporate requirements.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:14 +0000 (20:53 +0300)]
arm: dts: ls1028a: disable enetc-2 by default
The enetc-2 port is used as DSA master (connected back-to-back to
mscc_felix_port4). Since the convention is to not enable ports in the
common SoC dtsi unless they are used on the board, then enable enetc-2
only when mscc_felix_port4 itself is enabled.
All existing device trees appear to adhere to this rule, so disable
enetc-2 in the SoC dtsi.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:13 +0000 (20:53 +0300)]
arm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC ports
To comply with the device tree bindings expectations for an Ethernet
controller, as well as to simplify the driver code, declare fixed-link
nodes for the internal ENETC ports (attached to the mscc_felix switch).
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:12 +0000 (20:53 +0300)]
arm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHY
There are no PCB trace delays on this board, so the PHY needs to enable
its internal ones in order to have a proper electrical connection to the
enetc MAC.
Fixes:
b32e9a757837 ("arm: dts: ls1028a updates for network interfaces")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Vladimir Oltean [Tue, 29 Jun 2021 17:53:11 +0000 (20:53 +0300)]
arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS
Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.
Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.
Fixes:
a7fdac7e2a2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Andre Przywara [Mon, 28 Jun 2021 13:30:31 +0000 (14:30 +0100)]
net: smc911x: Determine bus width at runtime
The SMC911x Ethernet MACs can be integrated using a 16 or 32-bit bus.
The driver needs to know about this choice, which is the reason for us
having a Kconfig symbol for that.
Now this bus width is already described using a devicetree property, and
since the driver is DM compliant and is using the DT now, we should query
this at runtime. We leave the Kconfig choice around, in case the DT is
missing this property.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Andre Przywara [Mon, 28 Jun 2021 13:30:30 +0000 (14:30 +0100)]
net: smc911x: Drop redundant CONFIG_SMC911X_16_BIT Kconfig symbol
The SMC911x Ethernet driver needs to know which accessor functions it
can use to access the MMIO registers. For that reason we have a Kconfig
choice between 16 and 32-bit bus width.
Since it's only those two options that we (and the Linux kernel)
support, and there does not seem to be any evidence of another bus
width anywhere, limit the Kconfig construct to a simple symbol.
This simplifies the code and allows a later rework to be much easier.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tim Harvey [Fri, 18 Jun 2021 22:26:21 +0000 (15:26 -0700)]
cmd: net: add a 'net list' command to list network devs
In a system with multiple network controllers it can be difficult
to know the names of the various devices available. This is especially
true for USB ether devices as they do not display device names upon
detection.
This is being added as a net sub-system in case other commands may
want to be added or moved here.
Note that this is only enabled for DM_ETH
Example:
U-Boot > net
net - NET sub-system
Usage:
net list - list available devices
U-Boot > net list
eth0 : ethernet@2188000 00:d0:12:98:f5:47 active
eth1 : e1000#0 00:d0:12:98:f5:48
eth2 : asix_eth 8c:ae:4c:f5:84:9d
eth3 : asix_eth 8c:ae:4c:f9:41:e3
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Radu Pirea (NXP OSS) [Fri, 18 Jun 2021 18:58:30 +0000 (21:58 +0300)]
phy: add nxp tja1103 phy driver
Add nxp tja1103 phy driver.
Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tom Rini [Mon, 5 Jul 2021 19:29:44 +0000 (15:29 -0400)]
Merge branch '2021-07-01-update-CI-containers'
- General test.py improvements
- Rewrite the squashfs tests
- Update our CI container to Ubuntu 20.04 "focal" base.
- Make some changes to the Azure yaml so that we can have more tests run
there.
Tom Rini [Thu, 10 Jun 2021 14:57:36 +0000 (10:57 -0400)]
Docker/CI: Update to "focal" and latest build
Move us up to being based on Ubuntu 20.04 "focal" and the latest tag
from Ubuntu for this release. For this, we make sure that "python" is
now python3 but still include python2.7 for the rx51 qemu build as that
is very old and does not support python3.
Signed-off-by: Tom Rini <trini@konsulko.com>
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:05 +0000 (19:45 -0300)]
test/py: rewrite sqfsls command test suite
Add more details to test cases by comparing each expected line with the
command's output. Add new test cases:
- sqfsls at an empty directory
- sqfsls at a sub-directory
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:04 +0000 (19:45 -0300)]
test/py: rewrite sqfsload command test suite
The previous strategy to know if a file was correctly loaded was to
check for how many bytes were read and compare it against the file's
original size. Since this is not a good solution, replace it by
comparing the checksum of the loaded bytes against the original file's
checksum. Add more test cases: files at a sub-directory and non-existent
file.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Joao Marcos Costa [Wed, 30 Jun 2021 22:45:03 +0000 (19:45 -0300)]
test/py: rewrite common tools for SquashFS tests
Remove the previous OOP approach, which was confusing and incomplete.
Add more test cases by making SquashFS images with various options,
concerning file fragmentation and its compression. Add comments to
properly document the code.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Joao Marcos Costa <jmcosta944@gmail.com>
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:56 +0000 (21:51 +0300)]
Azure: Add loop devices and CAP_SYS_ADMIN for sandbox test.py tests
The filesystem test setup needs to prepare disk images for its tests,
with either guestmount or loop mounts. The former requires access to the
host fuse device (added in a previous patch), the latter requires access
to host loop devices. Both mounts also need additional privileges since
docker's default configuration prevents the containers from mounting
filesystems (for host security).
Add any available loop devices to the container and try to add as few
privileges as possible to run these tests, which narrow down to adding
SYS_ADMIN capability and disabling apparmor confinement. However, this
much still seems to be insecure enough to let malicious container
processes escape as root on the host system [1].
[1] https://blog.trailofbits.com/2019/07/19/understanding-docker-container-escapes/
Since the mentioned tests are marked to run only on the sandbox board,
add these additional devices and privileges only when testing with that.
An alternative to using mounts is modifying the filesystem tests to use
virt-make-fs (like some EFI tests do), but it fails to generate a
partitionless FAT filesystem image on Debian systems. Other more
feasible alternatives are using guestfish or directly using libguestfs
Python bindings to create and populate the images, but switching the
test setups to these is nontrivial and is left as future work.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:55 +0000 (21:51 +0300)]
Azure: Add fuse device for test.py tests
The EFI secure boot and capsule test setups need to prepare disk images
for their tests using virt-make-fs, which requires access to the host
fuse device. This is not exposed to the docker container by default and
has to be added explicitly. Add it.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Alper Nebi Yasak [Mon, 21 Jun 2021 18:51:54 +0000 (21:51 +0300)]
tools: docker: Install a readable kernel for libguestfs-tools
The filesystem and EFI (capsule and secure boot) test setups try to use
guestmount and virt-make-fs respectively to prepare disk images to run
tests on. However, these libguestfs tools need a kernel image and fail
with the following message (revealed in debug/trace mode) if it can't
find one:
supermin: failed to find a suitable kernel (host_cpu=x86_64).
I looked for kernels in /boot and modules in /lib/modules.
If this is a Xen guest, and you only have Xen domU kernels
installed, try installing a fullvirt kernel (only for
supermin use, you shouldn't boot the Xen guest with it).
This failure then causes these tests to be skipped in CIs. Install a
kernel package in the Docker containers so the CIs can run these
tests with libguestfs tools again (assuming the container is run with
necessary host devices and privileges). As this kernel would be only
used for virtualization, we can use the kernel package specialized for
that. On Ubuntu systems kernel images are not readable by non-root
users, so explicitly add read permissions with chmod as well.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Alper Nebi Yasak [Fri, 4 Jun 2021 19:04:46 +0000 (22:04 +0300)]
test/py: Wait for guestmount worker to exit after running guestunmount
Some filesystem tests are failing when their image is prepared with
guestmount, but succeeding if loop mounts are used instead. The reason
seems to be a race condition the guestmount(1) manual page explains:
When guestunmount(1)/fusermount(1) exits, guestmount may still be
running and cleaning up the mountpoint. The disk image will not be
fully finalized.
This means that scripts like the following have a nasty race condition:
guestmount -a disk.img -i /mnt
# copy things into /mnt
guestunmount /mnt
# immediately try to use 'disk.img' ** UNSAFE **
The solution is to use the --pid-file option to write the guestmount
PID to a file, then after guestunmount spin waiting for this PID to
exit.
The Python standard library has an os.waitpid() function for waiting a
child to terminate, but it cannot wait on non-child processes. Implement
a utility function that can do this by polling the process repeatedly
for a given duration, optionally killing the process if it won't
terminate on its own. Apply the suggested solution with this utility
function, which makes the failing tests succeed again.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alper Nebi Yasak [Fri, 4 Jun 2021 19:04:45 +0000 (22:04 +0300)]
test/py: Use loop mounts if guestmount fails in filesystem tests
If guestmount isn't available on the system, filesystem test setup falls
back to using loop mounts to prepare its disk images. If guestmount is
available but fails to work, the tests are immediately skipped. Instead
of giving up on a guestmount failure, try using loop mounts as an
attempt to keep tests running.
Also stop checking if guestmount is in PATH, as trying to run a missing
guestmount can now follow the same failure codepath and fall back to
loop mounts anyway.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
AKASHI Takahiro [Sat, 3 Jul 2021 06:43:17 +0000 (15:43 +0900)]
env: efi: fix a wrong address dereference
Probably, a pointer to a variable in an inner block should not
be exposed to an outer block.
Fixes:
c70f44817d46 ("efi_loader: simplify 'printenv -e'")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
[trini: Don't make guid const now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 5 Jul 2021 15:20:30 +0000 (11:20 -0400)]
Merge branch 'next'
Tom Rini [Mon, 5 Jul 2021 15:11:28 +0000 (11:11 -0400)]
Prepare v2021.07
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 2 Jul 2021 22:56:46 +0000 (18:56 -0400)]
Merge tag 'u-boot-amlogic-
20210703' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- configs: libretech: set SPI mode to 0 to fix SPI NOR Flash probe
Da Xue [Fri, 2 Jul 2021 21:11:40 +0000 (17:11 -0400)]
configs: libretech: set SPI mode to 0
Kconfig defaults to mode 3 if CONFIG_SF_DEFAULT_MODE is not set.
It becomes an issue since meson_spifc does not support SPI_CPHA.
Needed after commit
e2e95e5e25 ("spi: Update speed/mode on change").
Fixes:
e2e95e5e25 ("spi: Update speed/mode on change")
Signed-off-by:Da Xue <da@libre.computer>
[narmstrong: reformated commit reference & added Fixes tag]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Fri, 2 Jul 2021 19:04:07 +0000 (15:04 -0400)]
Merge tag 'efi-2021-07-rc6' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-07-rc6
Bug fixes:
* improve specification compliance of UEFI capsule updates
* allow capsule update on-disk without checking OsIndications
* provide parameter checks for QueryVariableInfo()
Da Xue [Fri, 2 Jul 2021 16:32:43 +0000 (12:32 -0400)]
autoboot: fix MENUKEY
replace CONFIG_AUTOBOOT_USE_MENUKEY with CONFIG_AUTOBOOT_MENUKEY
Signed-off-by: Da Xue <da@libre.computer>
Ilias Apalodimas [Tue, 29 Jun 2021 04:55:51 +0000 (07:55 +0300)]
efi_loader: Allow capsule update on-disk without checking OsIndications
Although U-Boot supports capsule update on-disk, it's lack of support for
SetVariable at runtime prevents applications like fwupd from using it.
In order to perform the capsule update on-disk the spec says that the OS
must copy the capsule to the \EFI\UpdateCapsule directory and set a bit in
the OsIndications variable. The firmware then checks for the
EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED bit in OsIndications
variable, which is set by the submitter to trigger processing of the
capsule on the next reboot.
Let's add a config option which ignores the bit and just relies on the
capsule being present. Since U-Boot deletes the capsule while processing
it, we won't end up applying it multiple times.
Note that this is allowed for all capsules. In the future, once
authenticated capsules are fully supported, we can limit the functionality
to those only.
Signed-off-by: apalos <ilias.apalodimas@linaro.org>
Reword Kconfig description.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 29 Jun 2021 11:33:09 +0000 (13:33 +0200)]
efi_loader: clear OsIndications
After each reboot we must clear flag
EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED in variable
OsIndications.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masami Hiramatsu [Wed, 30 Jun 2021 15:49:48 +0000 (00:49 +0900)]
efi_loader: Improve the parameter check for QueryVariableInfo()
Improve efi_query_variable_info() to check the parameter settings and
return correct error code according to the UEFI Specification 2.9,
and the Self Certification Test (SCT) II Case Specification, June
2017, chapter 4.1.4 QueryVariableInfo().
Reported-by: Kazuhiko Sakamoto <sakamoto.kazuhiko@socionext.com>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 29 Jun 2021 08:09:14 +0000 (10:09 +0200)]
efi_loader: missing parentheses in query_console_size
After if we should use parentheses to keep the code readable.
Fixes:
a95f4c885991 ("efi_loader: NULL dereference in EFI console")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Tue, 22 Jun 2021 14:38:53 +0000 (17:38 +0300)]
efi_loader: Always install FMPs
We only install FMPs if a CapsuleUpdate is requested. Since we now have an
ESRT table which relies on FMPs to build the required information, it
makes more sense to unconditionally install them. This will allow userspace
applications (e.g fwupd) to make use of the ERST and provide us with files
we can use to run CapsuleUpdate on-disk
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Tue, 22 Jun 2021 14:38:52 +0000 (17:38 +0300)]
efi_loader: Force a single FMP instance per hardware store
Chapter 23 of the EFI spec (rev 2.9) says:
"A specific updatable hardware firmware store must be represented by
exactly one FMP instance".
This is not the case for us, since both of our FMP protocols can be
installed at the same time because they are controlled by a single
'dfu_alt_info' env variable.
So make the config options depend on each other and allow the user to
install one of them at any given time. If we fix the meta-data provided
by the 'dfu_alt_info' in the future, to hint about the capsule type
(fit or raw) we can revise this and enable both FMPs to be installed, as
long as they target different firmware hardware stores
Note that we are not using a Kconfig 'choice' on purpose, since we
want to allow both of those to be installed and tested in sandbox
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masami Hiramatsu [Tue, 22 Jun 2021 14:38:51 +0000 (17:38 +0300)]
efi: Fix to use null handle to create new handle for efi_fmp_raw
When running the efidebug capsule disk-update command, the efi_fmp_raw
protocol installation fails with 2 (EFI_INVALID_PARAMETER) as below.
This is because the code passes efi_root instead of the handle local var.
=> efidebug capsule disk-update
EFI: Call: efi_install_multiple_protocol_interfaces( &handle, &efi_guid_firmware_management_protocol, &efi_fmp_fit, NULL)
EFI: Entry efi_install_multiple_protocol_interfaces(
00000000fbaf5988)
EFI: Call: efi_install_protocol_interface( handle, protocol, EFI_NATIVE_INTERFACE, protocol_interface)
EFI: Entry efi_install_protocol_interface(
00000000fbaf5988,
86c77a67-0b97-4633-a187-
49104d0685c7, 0,
00000000fbfa6ee8)
EFI: new handle
00000000fbb37520
EFI: Exit: efi_install_protocol_interface: 0
EFI: 0 returned by efi_install_protocol_interface( handle, protocol, EFI_NATIVE_INTERFACE, protocol_interface)
EFI: Exit: efi_install_multiple_protocol_interfaces: 0
EFI: 0 returned by efi_install_multiple_protocol_interfaces( &handle, &efi_guid_firmware_management_protocol, &efi_fmp_fit, NULL)
EFI: Call: efi_install_multiple_protocol_interfaces( &efi_root, &efi_guid_firmware_management_protocol, &efi_fmp_raw, NULL)
EFI: Entry efi_install_multiple_protocol_interfaces(
00000000fbfec648)
EFI: Call: efi_install_protocol_interface( handle, protocol, EFI_NATIVE_INTERFACE, protocol_interface)
EFI: Entry efi_install_protocol_interface(
00000000fbfec648,
86c77a67-0b97-4633-a187-
49104d0685c7, 0,
00000000fbfa6f18)
EFI: handle
00000000fbaf8520
EFI: Exit: efi_install_protocol_interface: 2
EFI: 2 returned by efi_install_protocol_interface( handle, protocol, EFI_NATIVE_INTERFACE, protocol_interface)
EFI: Exit: efi_install_multiple_protocol_interfaces: 2
EFI: 2 returned by efi_install_multiple_protocol_interfaces( &efi_root, &efi_guid_firmware_management_protocol, &efi_fmp_raw, NULL)
Command failed, result=1
To fix this issue, pass the handle local var which is set NULL right
before installing efi_fmp_raw as same as the installing efi_fmp_fit.
(In both cases, the local reference to the handle will be just discarded)
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Thu, 1 Jul 2021 21:53:26 +0000 (17:53 -0400)]
Merge branch '2021-07-01-buildtime-gd-sanity-check' into next
- Merge build-time sanity checks to ensure the size of gd doesn't
change. This can happen during cleanups due to not all symbols being
implemented in Kconfig.
Rasmus Villemoes [Tue, 18 May 2021 09:19:47 +0000 (11:19 +0200)]
global-data.h: add build-time sanity check of sizeof(struct global_data)
The layout and contents of struct global_data depends on a lot of
CONFIG_* preprocessor macros, not all of which are entirely converted
to Kconfig - not to mention weird games played here and there. This
can result in one translation unit using one definition of struct
global_data while the actual layout is another.
That can be very hard to debug. But we already have a mechanism that
can help catch such bugs at build time, namely the asm-offsets
machinery which is necessary anyway to provide assembly code with the
necessary constants. So make sure that every C translation unit that
include global_data.h actually sees the same size of struct
global_data as that which was seen by the asm-offsets.c TU.
It is likely that this patch will break the build of some boards. For
example, without the patch from Matt Merhar
(https://lists.denx.de/pipermail/u-boot/2021-May/450135.html) or some
other fix, this breaks P2041RDB_defconfig:
CC arch/powerpc/lib/traps.o
AS arch/powerpc/cpu/mpc85xx/start.o
In file included from include/asm-generic/global_data.h:26,
from ./arch/powerpc/include/asm/global_data.h:109,
from include/init.h:21,
from arch/powerpc/lib/traps.c:7:
include/linux/build_bug.h:99:41: error: static assertion failed: "sizeof(struct global_data) == GD_SIZE"
99 | #define __static_assert(expr, msg, ...) _Static_assert(expr, msg)
| ^~~~~~~~~~~~~~
include/linux/build_bug.h:98:34: note: in expansion of macro ‘__static_assert’
98 | #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
| ^~~~~~~~~~~~~~~
include/asm-generic/global_data.h:470:1: note: in expansion of macro ‘static_assert’
470 | static_assert(sizeof(struct global_data) == GD_SIZE);
| ^~~~~~~~~~~~~
make[1]: *** [scripts/Makefile.build:266: arch/powerpc/lib/traps.o] Error 1
make: *** [Makefile:1753: arch/powerpc/lib] Error 2
make: *** Waiting for unfinished jobs....
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Rasmus Villemoes [Tue, 18 May 2021 09:19:46 +0000 (11:19 +0200)]
build_bug.h: add wrapper for _Static_assert
[Linux commit
6bab69c65013bed5fce9f101a64a84d0385b3946]
BUILD_BUG_ON() is a little annoying, since it cannot be used outside
function scope. So one cannot put assertions about the sizeof() a
struct next to the struct definition, but has to hide that in some more
or less arbitrary function.
Since gcc 4.6 (which is now also the required minimum), there is support
for the C11 _Static_assert in all C modes, including gnu89. So add a
simple wrapper for that.
_Static_assert() requires a message argument, which is usually quite
redundant (and I believe that bug got fixed at least in newer C++
standards), but we can easily work around that with a little macro
magic, making it optional.
For example, adding
static_assert(sizeof(struct printf_spec) == 8);
in vsprintf.c and modifying that struct to violate it, one gets
./include/linux/build_bug.h:78:41: error: static assertion failed: "sizeof(struct printf_spec) == 8"
#define __static_assert(expr, msg, ...) _Static_assert(expr, "" msg "")
godbolt.org suggests that _Static_assert() has been support by clang
since at least 3.0.0.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 1 Jul 2021 12:57:23 +0000 (08:57 -0400)]
Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.10
clk:
- Add driver for Xilinx Clocking Wizard IP
fdt:
- Also record architecture in /fit-images
net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds
pca953x:
- Add missing dependency on i2c
serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver
watchdog:
- Add cadence wdt expire now function
zynq:
- Update DT bindings to reflect the latest state and descriptions
zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
T Karthik Reddy [Thu, 13 May 2021 13:13:25 +0000 (07:13 -0600)]
xilinx: zynqmp: Add support for 67dr silicon
Add zynqmp 67dr silicon to zynqmp device id table.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 28 Jun 2021 11:44:16 +0000 (13:44 +0200)]
watchdog: cadence: Add expire_now method
It is working in a way that only minimal timeout is setup to reach
expiration just right after it is setup.
Please make sure that PMUFW is compiled with ENABLE_EM flag.
On U-Boot prompt you can test it like:
ZynqMP> wdt dev watchdog@
fd4d0000
ZynqMP> wdt list
watchdog@
fd4d0000 (cdns_wdt)
ZynqMP> wdt dev
dev: watchdog@
fd4d0000
ZynqMP> wdt expire
(And reset should happen here)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 28 Jun 2021 09:18:43 +0000 (11:18 +0200)]
arm64: zynqmp: Enable WDT command
Enable watchdog command to be able to work with watchdogs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Wed, 30 Jun 2021 19:48:09 +0000 (15:48 -0400)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-spi into next
- Cypress s25hl-t/s25hs-t support (Takahiro Kuwano)
Tom Rini [Wed, 30 Jun 2021 17:09:49 +0000 (13:09 -0400)]
Revert "TEST: USB_HOST not USB"
This reverts commit
4e1903a645453deab5ec5dd1cf4f0061469b99c3.
This local commit was not intended to be pushed out.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 30 Jun 2021 15:38:52 +0000 (11:38 -0400)]
TEST: USB_HOST not USB
Signed-off-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Thu, 10 Jun 2021 12:00:00 +0000 (14:00 +0200)]
spi: Update speed/mode on change
The spi_get_bus_and_cs() may be called on the same bus and chipselect
with different frequency or mode. This is valid usecase, but the code
fails to notify the controller of such a configuration change. Call
spi_set_speed_mode() in case bus frequency or bus mode changed to let
the controller update the configuration.
The problem can easily be triggered using the sspi command:
=> sspi 0:0@1000
=> sspi 0:0@2000
Without this patch, both transfers happen at 1000 Hz. With this patch,
the later transfer happens correctly at 2000 Hz.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Tue, 29 Jun 2021 15:25:39 +0000 (11:25 -0400)]
Merge tag 'efi-2021-07-rc5-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-07-rc5-2
Documentation:
* man-page for askenv
bug fixes
* correct display of BootOrder in efidebug command
* do not allow TPL_HIGH_LEVEL for CreateEvent(Ex)
* correct handling of unknown properties in SMBIOS tables
Takahiro Kuwano [Tue, 29 Jun 2021 06:01:04 +0000 (15:01 +0900)]
mtd: spi-nor-tiny: Add fixups for Cypress s25hl-t/s25hs-t
Fixes mode clocks for SPINOR_OP_READ_FAST_4B in tiny.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:01:03 +0000 (15:01 +0900)]
mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t
The nor->ready() and spansion_sr_ready() introduced earlier in this
series are used for multi-die package parts.
The nor->quad_enable() sets the volatile QE bit on each die.
The nor->erase() is hooked if the device is not configured to uniform
sectors, assuming it has 32 x 4KB sectors overlaid on bottom address.
Other configurations, top and split, are not supported at this point.
Will submit additional patches to support it as needed.
The post_bfpt/sfdp() fixes the params wrongly advertised in SFDP.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:01:02 +0000 (15:01 +0900)]
mtd: spi-nor-core: Add Cypress manufacturer ID in set_4byte
Cypress chips support SPINOR_OP_EN4B(B7h) to enable 4-byte addressing mode.
Cypress chips support B8h to disable 4-byte addressing mode instead of
SPINOR_OP_EX4B(E9h).
This patch defines new opcode and updates set_4byte() to support
enable/disable 4-byte addressing mode for Cypress chips.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:01:01 +0000 (15:01 +0900)]
mtd: spi-nor-core: Read status by Read Any Register
The spansion_sr_ready() reads status register 1 by Read Any Register
commnad. This function is called from Flash specific hook with die address
and dummy cycles to support multi-die package parts from Spansion/Cypress.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:01:00 +0000 (15:01 +0900)]
mtd: spi-nor-core: Add the ->ready() hook
For dual/quad die package devices from Spansion/Cypress, the device's
status needs to be checked by reading status registers in all dies, by
using Read Any Register command. To support this, a Flash specific hook
that can overwrite the legacy status check is needed.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:00:59 +0000 (15:00 +0900)]
mtd: spi-nor-core: Add support for volatile QE bit
Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:00:58 +0000 (15:00 +0900)]
mtd: spi-nor-core: Add support for Read/Write Any Register
Some of Spansion/Cypress chips support Read/Write Any Register commands.
These commands are mainly used to write volatile registers and access to
the registers in second and subsequent die for multi-die package parts.
The Read Any Register instruction (65h) is followed by register address
and dummy cycles, then the selected register byte is returned.
The Write Any Register instruction (71h) is followed by register address
and register byte to write.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:00:57 +0000 (15:00 +0900)]
mtd: spi-nor-ids: Add Cypress s25hl-t/s25hs-t
The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
The full version can be found in the following links (registration
required).
https://community.cypress.com/t5/Semper-Flash-Access-Program/Datasheet-Semper-Flash-with-Quad-SPI/ta-p/260789?attachment-id=19522
https://community.cypress.com/t5/Semper-Flash-Access-Program/Datasheet-2Gb-MCP-Semper-Flash-with-Quad-SPI/ta-p/260823?attachment-id=29503
S25HL/HS-T (Semper Flash with Quad SPI) Family has user-configurable
sector architecture. By default, the 512Mb and 1Gb, single-die package
parts are configured to non-uniform that 4KB sectors overlaid on bottom
address. To support this, an erase hook makes overlaid sectors appear as
uniform sectors. The 2Gb, dual-die package parts are configured to uniform
by default.
Tested on Xilinx Zynq-7000 FPGA board.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Takahiro Kuwano [Tue, 29 Jun 2021 06:00:56 +0000 (15:00 +0900)]
mtd: spi-nor: Add Cypress manufacturer ID
This patch adds Cypress manufacturer ID (34h) definition.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Mon, 28 Jun 2021 22:32:07 +0000 (18:32 -0400)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
- V3U Falcon board support