st/nine: Fix D3DQUERYTYPE_TIMESTAMPFREQ query

D3DQUERYTYPE_TIMESTAMPFREQ is supposed to give the frequency
at which the clock of D3DQUERYTYPE_TIMESTAMP runs.

PIPE_QUERY_TIMESTAMP returns a value in ns, thus the corresponding
frequency is 1000000000.
PIPE_QUERY_TIMESTAMP_DISJOINT returns the frequency at which
PIPE_QUERY_TIMESTAMP value is updated. It isn't always
1000000000.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: Change x86 FPU Control word on device creation

As on wined3d and windows, when D3DCREATE_FPU_PRESERVE is not
specified, change the fpu control word to all exceptions masked,
single precision, round to nearest.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Tiziano Bacocco <tizbac2@gmail.com>

st/nine: Do not advertise D3DDEVCAPS_TEXTURESYSTEMMEMORY

No major vendor advertises it, and we weren't supporting it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix comment in update_viewport

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Workaround barycentrics issue on some cards

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Clear struct pipe_blit_info before use.

render_condition_enable was uninitialized.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>

st/nine: NineDevice9_Clear skip fastpath for bigger depth-buffers

This adds an additional check to make sure the bound depth-buffer doesn't
exceed the rendertarget size when clearing depth and color buffer at once.
D3D9 clears only a rectangle with the same dimensions as the viewport, leaving
other parts of the depth-buffer intact.

This fixes failing WINE test visual.c:depth_buffer_test()

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix wrong assert in nine_shader

The sampler src index was wrong for texldl and texldd

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Handle special LIT case

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

mesa: Fix glGetProgramiv(GL_ACTIVE_ATTRIBUTES).

It's returning random values, because RESOURCE_VAR() is casting
different objects into ir_variable pointers.

This updates _mesa_count_active_attribs to filter the resources with the
same logic used in _mesa_longest_attribute_name_length.

https://bugs.freedesktop.org/show_bug.cgi?id=90207

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

egl: misc fixes for EGL_MESA_image_dma_buf_export

Fix define and a function argument name introduced in commit
8f7338f284cdb1fef64c85e3293d2200d0cc6387

Signed-off-by: Dave Airlie <airlied@redhat.com>

nvc0/ir: flush denorms to zero in non-compute shaders

This will set the FTZ flag (flush denorms to zero) on all opcodes that
can take it.

This resolves issues in Unigine Heaven 4.0 where there were solid-filled
boxes popping up.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89455
Cc: "10.4 10.5" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

meta: remove unneeded #include colortab.h

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: remove unneeded #include colortab.h

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: remove unused options var in compile_shader()

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

docs: more details about Viewperf 12 medical-01 test issues

nvc0: expose GLSL version 410

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: allow glsl version up to 410, enable ARB_shader_precision

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/va: add h264 decoder level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/dec: add h264 decoder level support

v2: use sps level idc as level to driver

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

vl: add level idc in sps

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/dec: separate create_video_codec to different codecs

v2: get frame size from port info

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/vdpau: add h264 decoder level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

gallium/util: get h264 level based on number of max references and resolution

v2: add commments for limitation of max references numbers,
and what the caculation is based

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

r600g,radeonsi: add a driver query returning GPU load

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

r600g,radeonsi: add driver queries for GPU temperature and shader+memory clocks

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

gm107/ir: add lane/vertex count sysvals

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

gk110/ir: add support for writing per-patch and shader outputs

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: color masking works like a blend for some formats

When there is a colormask active that does not cover all the channels,
enable reading in the destination like with a combining blend
operation. This fixes fbo-blending-formats on a3xx.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add support for S8 and Z32F_S8

Enables ARB_depth_buffer_float. There is no sampling support for
interleaved Z32F_S8, so we store the two textures separately, one as
Z32F, the other as S8. As a result, we need a lot of additional logic
for restores and transfers.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add Z32F support

32-bit depth buffers are stored as unorm, and thus need special handling
when moving to and from gmem. They are copied into gmem by writing
depth, and resolved from gmem using a special resolve bit which
apparently float-ifies the data.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno: add fd_transfer to wrap around pipe_transfer

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add support for disabling depth clipping

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

i965/vs: Remove unnecessary NULL check on generate_code() result.

Code generation is not allowed to fail for any reason - in fact,
fs_generator has no mechanism for failing.  The visitor is responsible
for that.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: fix packing support for arrays of doubles

Broke in commit f00c5f85b82efe9535b18dbf97c4591fb28aeae6 when
adding support for multidimensional arrays

Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

i965: Enable ARB_gpu_shader5 on Gen8+.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix code emission for imul_high in NIR.

Copy over from brw_fs_visitor.cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Fix stride for multiply in macro.

We have to use W/UW type for src1 of the multiply in the MUL/MACH macro,
but in order to read the low 16-bits of each 32-bit integer, we need to
set the appropriate stride.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

Revert "i965/fs: Allow SIMD16 borrow/carry/64-bit multiply on Gen > 7."

This reverts commit 9f5e5bd34d8ba48c851b442fb88f742b1ba6a571.

I have no idea what made me believe these didn't apply to Gen > 7. They
do, and without them we generate bad code that causes failures on Gen 8.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

scons: Support LLVM 3.5 and 3.6 on windows.

llvm/Config/llvm-config.h is parsed instead of llvm/Config/config.h for
detecting LLVM version
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-June/073707.html).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

mesa: fix up GLSL version when computing GL version

In some situations it is convenient for a driver to expose a higher GLSL
version while some extensions are still incomplete. However in that
situation, it would report a GLSL version that was higher than the GL
version. Avoid that situation by limiting the GLSL version to the GL
version.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

softpipe: fix another stencil-as-float issue

Hopefully this is the last one now (for texture X32_S8X24_UINT views).
+4 piglits.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90167

Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: the function name appears to have a gl prefix already

Currently we're producing errors like

User error: GL_INVALID_OPERATION in glglDeleteProgramsARB(invalid call)

And noop_warn appears to be called with the full function name. Don't
prepend a gl prefix.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>

Fix a few typos

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface().

This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.

i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface().

This moves most of the surface state set-up logic that can be shared
between textures and shader images to a separate function.

i965: Add helper functions to calculate the slice pitch of an array or 3D miptree.

scons: add target osmesa using gallium state tracker.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

radeonsi: set an optimal value for DB_Z_INFO.ZRANGE_PRECISION

Required because of a VI hw bug.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: remove deprecated and useless registers

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: remove useless includes

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium/radeon: print winsys info with R600_DEBUG=info

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

winsys/radeon: make radeon_bo_vtbl static

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

glsl: replace while loop with without_array function

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: support packing of arrays of arrays

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl: add arrays of arrays support to without_array function

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

docs/GL3: started adding support for shader_image_size

Signed-off-by: Martin Peres <martin.peres@linux.intel.com>

gallium/hud: add more options to customize HUD panes

Extends the syntax of GALLIUM_HUD environment variable to:
- Add options to set the size and exact location of each pane.
- Add an option to limit the maximum allowed value of the X axis on a
  pane, clamping the graph down to not go above this value.
- Add an option to auto-adjust the value of the Y axis down to the
  highest value still visible on the graph.

v2:
- Make the patch simpler and smaller.
- With dynamic auto-adjusting on, adjust the Y axis once per pane
  update instead of updating once every several seconds.
- No longer mishandle pane height when having more than one graph per
  pane.

i965: Fill out the rest of brw_debug_recompile_sampler_key().

This makes INTEL_DEBUG=perf report shader recompiles due to CMS vs.
UMS/IMS differences and Sandybridge textureGather workarounds.

Previously, we just flagged them as "Something else".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Disassemble sampler message names on Gen5+.

Previously, sampler messages were decoded as

sampler (1, 0, 2, 2) mlen 6 rlen 8              { align1 1H };

I don't know how much time we've collectly wasted trying to read this
format.  I can never recall which number is the surface index, sampler
index, message type, or...whatever that other number is.  Figuring out
the message name from the numerical code is also painful.

Now they decode as:

sampler sample_l SIMD16 Surface = 1 Sampler = 0 mlen 6 rlen 8 { align1 1H };

This is easy to read at a glance, and matches the format I used for
render target formats.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

i965/fs: Disallow constant propagation into POW on Gen 6.

Fixes assertion failures in three piglit tests on Gen 6 since commit
0087cf23e.

mesa: add support for exposing up to GL4.2

Add the 4.0/4.1/4.2 extensions lists to compute_version. A couple of
extensions aren't in mesa yet, so those are marked with 0 until they
become supported.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Add missing pixel_x/y to brw_instruction_name().

Forgotten in commit 529064f6.

i965/fs: Don't constant propagate into integer math instructions.

Constant combining won't promote non-floats, so this isn't safe.

Fixes regressions since commit 0087cf23e.

docs: add news item and link release notes for mesa 10.5.4

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

docs: Add sha256 sums for the 10.5.4 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit adb47b5b279b6fd920151aa7926af6ffd2069339)

Add release notes for the 10.5.4 release

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit ea0d1f575c214c09ba3df12644a960e86e031766)

mesa: put more info in glTexImage GL_OUT_OF_MEMORY error message

Give the user some idea about the size of the texture which caused
the GL_OUT_OF_MEMORY error.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Allow 2-src math instructions to have immediate src1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Transform pow(x, 4) into (x*x)*(x*x).

glsl: Transform pow(x, 4) into (x*x)*(x*x).

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: fix glGetActiveUniformsiv regression

Commit 7519ddb caused regression to glGetActiveUniformsiv.
Patch adds back validation loop of all given uniforms before
writing any values, not touching params in case of errors
is tested by the conformance suite.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90149
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>

mesa: refactor active attrib queries for glGetProgramiv

Main motivation here is to get rid of iterating IR and
encapsulate queries within program resources.
No functional changes.

Piglit tests calling the modified functionality:

   - gl-get-active-attrib-returns-all-inputs
   - glsl-1.50-get-active-attrib-array
   - getactiveattrib

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>

i965: Add an INTEL_DEBUG=spill option to test spilling

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/debug: Use the ull specifier for DEBUG enum defines

The INTEL_DEBUG variable is a uint64_t and if we want a enum value higer
than 32 bits, you need to use ull.  We might as well use it for all of them.

Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Disallow linear blits that are not cacheline aligned.

The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

The main user, intel_emit_linear_blit, now handles this properly.
But we might also have linear miptrees; just refuse to blit those.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.

The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

intel_emit_linear_blit needs to handle blits that are not cacheline
aligned, as we use it for arbitrary glBufferSubData calls and subrange
mappings.

Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst
pixel X offset field to represent the unaligned portion, and subtract
that from the address so it's cacheline aligned.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

mapi: Adding missing string.h include.

File glapi_entrypoint.c calls memcpy() function, but does not include
string.h header. So compilation can fail at error: implicit declaration
of function 'memcpy'.

Signed-off-by: Jose Fonseca <jfonseca@vmware.com>

os/os_memory_aligned.h: Handle integer overflow.

This code is only used when our memory debugging wrappers are enabled,
as we use the C runtime functions directly elsewhere.

Tested llvmpipe on Windows w/ memory debugging enabled.

VMware PR894263.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

draw: fix prim ids when there's no gs

We were resetting the prim id count for each run of the prim assembler,
hence this only worked when the draw calls were very small (the exact limit
depending on the vertex size), since larger draw calls get split up.
So, do the same as we do already if there's a gs, reset it to zero explicitly
for every new instance (this possibly could use the same variable but that
isn't doable without some heavy refactoring and I'm not sure it makes sense).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90130.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
CC: <mesa-stable@lists.freedesktop.org>

gallium/radeon: don't crash when getting out-of-bounds TEMP references

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

nir/lower_source_mods: Don't propagate register sources

The nir_lower_source_mods pass does a weak form of copy propagation to
clean up all of the mov-with-negate's that get generated.  However, we
weren't properly checking that the sources were SSA and so we could end up
moving a register read which is not, in general, valid.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir: Rewrite instr_rewrite_src

The old code wasn't correctly handling the case where the new value of the
source contains an indirect.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/locals_to_regs: Hanadle indirect accesses of length-1 arrays

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/locals_to_regs: Initialize registers with constant initializers

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/locals_to_regs: Pass around the nir_shader rather than a void * mem_ctx

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir: Add a simple growing array data structure

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/types: Make glsl_get_length smarter

Previously, this function returned the number of elements for structures
and arrays and 0 for everything else.  In NIR, this is almost never what
you want because we also treat matricies as arrays so you have to
special-case constantly.  This commit  glsl_get_length treat matrices
as an array of columns by returning the number of columns instead of 0

This also fixes a bug in locals_to_regs caused by not checking for the
matrix case in one place.

v2: Only special-case for matrices and return a length of 0 for vectors as
    we did before.  This was needed to not break the TGSI-based drivers and
    doesn't really affect NIR at the moment.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Rob Clark <robclark@freedesktop.org>

nir: Move get_const_initializer_load from vars_to_ssa to NIR core

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/lower_vars_to_ssa: Pass around the nir_shader instead of a void mem_ctx

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

i965/nir: Use the correct offsets when handling register indirects

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/print: Print the closing paren on load_const instructions

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/tex: Use the correct return size for query_levels and lod

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir: Refactor tex_instr_dest_size to use a switch statement

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

nir/lower_vars_to_ssa: Actually look for indirects when determining aliasing

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

docs: mark off texture_stencil8 (v2.1)

copy drivers from the stencil_texturing list,
softpipe is definitely broken for stencil texturing
since it uses float, but I'll look at that later.

v2.1: update relnotes

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa: add ARB_texture_stencil8 support (v4)

if we support stencil texturing, enable texture_stencil8
there is no requirement to support native S8 for this,
the texture can be converted to x24s8 fine.

v2: fold fixes from Marek in:
   a) put S8 last in the list
   b) fix renderable to always test for d/s renderable
    fixup the texture case to use a stencil only format
    for picking the format for the texture view.
v3: hit fallback for getteximage
v4: put s8 back in front, it shouldn't get picked now (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mesa: finish implementing ARB_texture_stencil8 (v5)

Parts of this were implemented previously, so finish it off.

v2: fix getteximage falling into the integer check
    add fixes for the FBO paths, (fbo-stencil8 test).

v3: fix getteximage path harder.
v4: remove swapbytes from getteximage path (Ilia)
v5: brown paper bag the swapbytes removal. (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>

mesa: remove the gl_sl_pragmas structure

This code was added by Brian Paul in 2009 but, as far as Matt and I can
tell, it's been dead ever since the new GLSL compiler was added.

Reviewed-by: Brian Paul <brianp@vmware.com>

i965: Add a brw_compiler structure and store the register sets in it

Reviewed-by: Matt Turner <mattst88@gmail.com>