Icenowy Zheng [Sat, 3 Jun 2017 09:10:25 +0000 (17:10 +0800)]
sunxi: add a defconfig for SoPine w/ official baseboard
The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM
chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card
detect pin of the MicroSD slot is broken, however, it doesn't matter as
the design of SoPine didn't allow hot-swapping the MicroSD card (The
MicroSD slot is at the back of the SoM, and when the SoM is installed on
the baseboard, it's nearly impossible to remove the MicroSD).
The official baseboard of it is a board with nearly the same connectors
with the original Pine64+, with the MicroUSB power jack replaced, and
at the position of MicroSD slot a eMMC module slot is added.
Add support for SoPine with the official baseboard by adding its
defconfig file. It still uses the device tree of Pine64, however, it
will change after a proper device tree of SoPine with baseboard is
accepted by Linux mainline.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Update board/sunxi/MAINTAINERS]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:24 +0000 (17:10 +0800)]
sunxi: add LPDDR3 timing from stock boot0
As we added LPDDR3 support in the former patch, we need a set of timing
info to really enable it.
Add the timing info used by stock boot0.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:23 +0000 (17:10 +0800)]
sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller
Some A64 boards (SoPine and Pinebook production batch) use LPDDR3 DRAM
chips.
Add support for LPDDR3 DRAM in the DesignWare-like DRAM controller code.
Real LPDDR3 chips' support is not added yet in this commit.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:22 +0000 (17:10 +0800)]
sunxi: enable DRAM initialization and SPL for V3s SoC
As we have already support for the DesignWare DRAM controller and the
integrated DDR2 chip of V3s, let's enable the SPL support for V3s.
This patch also contains the default DRAM configuration for V3s.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:21 +0000 (17:10 +0800)]
sunxi: add support for V3s DRAM controller
Allwinner V3s features a DRAM controller like the on in H3, but with a
DDR2 DRAM.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:20 +0000 (17:10 +0800)]
sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.
Add support for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:19 +0000 (17:10 +0800)]
sunxi: enable dual rank detection in DesignWare-like DRAM code
The DesignWare-like DRAM code used to set the controller defaultly to
single rank mode, which makes it not able to detect the second rank.
Set the default value to dual rank, thus the rank detection code can
work and finally the rank setting will be the correct value.
Currently we know little about the dual-rank on R40, and the usage
of A15 address line seems to be breaking dual-rank support. The only R40
board currently available (Sinovoip Banana Pi M2 Ultra) uses A15 rather
than dual-rank, thus we cannot do research for it. So dual rank detection
is temporarily disabled on R40.
This change is tested on a Orange Pi One (H3, single rank), a Pine64+
2GiB version (A64, single rank) , a Pinebook early prototype with DDR3
(A64, dual rank) and a SoPine with some LPDDR3 patch (A64, dual CS pins
on one chip).
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:18 +0000 (17:10 +0800)]
sunxi: Add selective DRAM type and timing
DRAM chip varies, and one code cannot satisfy all DRAMs.
Add options to select a timing set.
Currently only DDR3-1333 (the original set) is added into it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:17 +0000 (17:10 +0800)]
sunxi: add bank detection code to H3 DRAM initialization code
Some DDR2 DRAM have only four banks, not eight.
Add code to detect this situation.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:16 +0000 (17:10 +0800)]
sunxi: add option for 16-bit DW DRAM controller
Some Allwinner SoCs features a DesignWare-like controller with only 16
bit bus width.
Add support for them.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:15 +0000 (17:10 +0800)]
sunxi: Rename bus-width related macros in H3 DRAM code
The DesignWare DRAM controller used by H3 and newer SoCs use a bit to
identify whether the DRAM is half-width.
As H3 itself come with 32-bit DRAM, the two modes of the bit used to be
named "MCTL_CR_32BIT" and "MCTL_CR_16BIT", but for SoCs with 16-bit DRAM
they're really 8-bit and 16-bit.
Rename the bit's macro, and also rename the variable name in
dram_sun8i_h3.c.
This commit do not add 16-bit DRAM controller support, but the support
will be introduced in next commit.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Icenowy Zheng [Sat, 3 Jun 2017 09:10:14 +0000 (17:10 +0800)]
sunxi: makes an invisible option for H3-like DRAM controllers
Allwinner SoCs after H3 (e.g. A64, H5, R40, V3s) uses a H3-like
DesignWare DRAM controller, which do not have official free DRAM
initialization code, but can use modified dram_sun8i_h3.c.
Add a invisible option for easier DRAM initialization code reuse.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 30 May 2017 17:41:14 +0000 (17:41 +0000)]
sun8i: h3: Add initial NanoPi M1 Plus support
NanoPi M1 Plus is designed and developed by FriendlyElec
for professionals, enterprise users, makers and hobbyists
using the Allwinner H3 SOC.
NanoPi M1 Plus key features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 1GB DDR3 RAM
- 8GB eMMC
- microSD slot
- 10/100/1000M Ethernet
- Serial Debug Port
- 5V 2A DC power-supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Tue, 6 Jun 2017 11:13:39 +0000 (07:13 -0400)]
Merge git://git.denx.de/u-boot-ubi
Siva Durga Prasad Paladugu [Tue, 30 May 2017 12:29:06 +0000 (14:29 +0200)]
fs: usbifs: Fix warning in ubifs
This patch fixes the below warning by typecasting it properly
fs/ubifs/ubifs.c: In function 'ubifs_load':
fs/ubifs/ubifs.c:942:29: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
err = ubifs_read(filename, (void *)addr, 0, size, &actread);
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 6 Jun 2017 01:05:51 +0000 (21:05 -0400)]
Merge git://git.denx.de/u-boot-usb
Tom Rini [Tue, 6 Jun 2017 00:40:22 +0000 (20:40 -0400)]
Prepare v2017.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Phil Edworthy [Thu, 1 Jun 2017 06:33:29 +0000 (07:33 +0100)]
armv7m: Fix larger builds
The branch instruction only has an 11-bit relative target address, which
is sometimes not enough.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Phil Edworthy [Thu, 1 Jun 2017 06:33:28 +0000 (07:33 +0100)]
arm: Add Kconfig symbols used for Linux asm compatibility
Rather than change asm files that come from Linux, add the symbols
to Kconfig. Since one of the symbols is for thumb2 builds, make
CPU_V7M always select them.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Michal Simek [Wed, 31 May 2017 09:28:30 +0000 (11:28 +0200)]
arm64: hikey: Fix instructions in readme
Fix inaccurate instructions in README.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Patrice Chotard [Tue, 30 May 2017 13:06:31 +0000 (15:06 +0200)]
drivers: ram: stm32: fix compilation issue
If CONFIG_CLK flag is not set, compilation raises the
following error message:
drivers/ram/stm32_sdram.c: In function 'stm32_fmc_probe':
drivers/ram/stm32_sdram.c:154:2: error: 'ret' undeclared (first use in this function)
ret = stm32_sdram_init(dev);
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
cc: Vikas Manocha <vikas.manocha@st.com>
Michal Simek [Mon, 29 May 2017 08:26:53 +0000 (10:26 +0200)]
arm64: Add NOLOAD attribute NOLOAD to .bss sections
Mark explicitly bss sections to not be loaded at
run time.
The similar patch was done in past by:
"Fix linker scripts: add NOLOAD atribute to .bss/.sbss sections"
(sha1:
64134f011254123618798ff77c42ba196b2ec485)
The problem is related to latest toolchain added to Xilinx
v2017.1 design tools where jtag loader is trying to access
ununitialized memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 29 May 2017 07:11:32 +0000 (09:11 +0200)]
ARMv8: Add support for poweroff via PSCI
Add support for calling poweroff in case of psci is wired.
Based on the same solution as is used for reset.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Move all logic in to fwcall.c as other ARMs implement poweroff
via PMIC]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 28 May 2017 12:49:51 +0000 (08:49 -0400)]
cmd/ethsw: Disable implicit enum conversion warning
With clang-3.8 we see warnings like:
cmd/ethsw.c:304:6: warning: implicit conversion from
enumeration type 'enum ethsw_keyword_opt_id' to different enumeration type
'enum ethsw_keyword_id' [-Wenum-conversion]
ethsw_id_pvid_no,
^~~~~~~~~~~~~~~~
Because we have one enum for ethsw_keyword_id and a second enum for
ethsw_keyword_opt_id. This ends up being safe as ethsw_keyword_opt_id
explicitly starts after ethsw_keyword_id enum ends. Disable the
warning here rather than collapse these into one enum and rely on
comments to denote where optional keywords begin.
Cc: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Pantelis Antoniou [Thu, 25 May 2017 16:24:06 +0000 (19:24 +0300)]
malloc: Turn on DEBUG when enabling unit tests
Unit tests require mallinfo which in turn requires DEBUG on
dlmalloc to be enabled.
The dependancy on CONFIG_SANDBOX is wrong.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pantelis Antoniou [Thu, 25 May 2017 16:23:58 +0000 (19:23 +0300)]
arm: Always keep the dtb section on objcopy
The dtb blob section must always be present in the resulting image.
Either if OF_EMBEDED is used or if unit tests include dtb blobs.
Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Keerthy [Thu, 25 May 2017 10:07:34 +0000 (15:37 +0530)]
board: ti: am571-idx: Add vcores support
Update vcores for am571-idk board.
Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 24 May 2017 15:04:03 +0000 (11:04 -0400)]
scripts/Makefile.lib: Only apply u-boot.dtsi files in the target directory
We only want to apply files such as 'omap5-u-boot.dtsi', which resides
in arch/arm/dts/ to other files in arch/arm/dts/ and not say
test/overlay/. Rework the make logic to check for -u-boot.dtsi files in
the same directory as their target dts.
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Jean-Jacques Hiblot [Wed, 24 May 2017 10:08:27 +0000 (12:08 +0200)]
ARM: ti: Update layout for MMC and eMMC (env and dfu)
The problems with the current DFU layout are:
MMC: The space allocated for u-boot is too small for the latest u-boot
(>750KB). We need to increase it. eMMC uses a much bigger area (2MB).
eMMC: region "u-boot.img.raw" overlaps the environment area and the region
"spl-os-image.raw".
both: region "spl-os-image.raw" is quite small and can't handle android
kernels
Fixing this requires growing some regions and moving others.
Care has been taken to leave some room for further growth of
"spl-os-args.raw".
Also the "env" now appears in the dfu so that it's apparent that the
region is not free space that can be used to grow "u-boot.img.raw".
The MLO region is 0x100 sectors wide but the 0x100 are unused in case the
MLO comes too overflow this areas.
The total space allocated for those raw binaries is 16MB, of which 13+MB
are reserved for the kernel image.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tom Rini [Mon, 22 May 2017 19:21:57 +0000 (19:21 +0000)]
common/spl/Kconfig: Use 'if SPL' / 'if TPL' guards
Much of the entries here simply depend on SPL (or TPL). Instead of this
redundancy use if SPL / if TPL to guard the rest of the choices and only
show them when we have the relevant option enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Mon, 22 May 2017 11:05:36 +0000 (05:05 -0600)]
bootstage: Record time taken to set up the live device tree
This time is interesting as a comparision with the flat device tree time.
Add it to the record.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:35 +0000 (05:05 -0600)]
bootstage: Support SPL
At present bootstage only supports U-Boot proper. But SPL can also consume
boot time so it is useful to have the record start there.
Add bootstage support to SPL. Also support stashing the timing information
when SPL finishes so that it can be picked up and reported by U-Boot
proper. This provides a full boot time record, excluding only the time
taken by the boot ROM.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:34 +0000 (05:05 -0600)]
bootstage: Adjust to use const * where possible
There are a few places that should use const *, such as
bootstage_unstash(). Update these to make it clearer when parameters are
changed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:33 +0000 (05:05 -0600)]
bootstage: Tidy up error return values
We should return a proper error number instead of just -1. This helps the
caller to determine what when wrong. Update a few functions to fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:32 +0000 (05:05 -0600)]
bootstage: Record the time taken to set up driver model
Driver model is set up ones before relocation and once after. Record the
time taken in each case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:31 +0000 (05:05 -0600)]
bootstage: Init as early as possible
At present we don't allow use of bootstage before driver model is running.
This means we cannot time the init of driver model itself.
Now that bootstage requires its own board-specific timer, we can move its
init to earlier in the sequence, both before and after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:30 +0000 (05:05 -0600)]
bootstage: Support relocating boostage data
Some boards cannot access pre-relocation data after relocation. Reserve
space for this and copy it during preparation for relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:29 +0000 (05:05 -0600)]
bootstage: Use debug() for stashing messages
We don't normally want to see these messages. Change them to debug-only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:28 +0000 (05:05 -0600)]
bootstage: Show records with a zero time
We can now use the record count to determine whether a record is valid or
not. Drop the test for a zero time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:27 +0000 (05:05 -0600)]
bootstage: Use rec_count as the array index
At present bootstage has a large array with all possible bootstage IDs
recorded. It adds times to the array element indexed by the ID. This is
inefficient because many IDs are not used during boot. We can save space
by only recording those IDs which actually have timestamps.
Update the array to use a record count, which increments with each
addition of a new timestamp. This takes longer to record a time, since it
may involve an array search. Such a search may be particularly expensive
before relocation when the CPU is running slowly or the cache is off. But
at that stage there should be very few records.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:26 +0000 (05:05 -0600)]
bootstage: Fix up code style and comments
There are several code style and comment nits. Fix them and also remove
the comment about passing bootstage to the kernel being TBD. This is
already supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:25 +0000 (05:05 -0600)]
bootstage: Convert to use malloc()
At present bootstage uses the data section of the image to store its
information. There are a few problems with this:
- It does not work on all boards (e.g. those which run from flash before
relocation)
- Allocated strings still point back to the pre-relocation data after
relocation
Now that U-Boot has a pre-relocation malloc() we can use this instead,
with a pointer to the data in global_data. Update bootstage to do this and
set up an init routine to allocate the memory.
Now that we have a real init function, we can drop the fake 'reset' record
and add a normal one instead.
Note that part of the problem with allocated strings remains. They are
reallocated but this will only work where pre-relocation memory is
accessible after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:24 +0000 (05:05 -0600)]
bootstage: Change CONFIG_BOOTSTAGE_USER_COUNT to an int
There is no good read to make this hex, and integer is more natural for
this type of setting. Update it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:23 +0000 (05:05 -0600)]
bootstage: Require timer_get_boot_us() to be defined
At present we provide a default version of this function for use by
bootstage. However it uses the system timer and therefore likely requires
driver model. This makes it impossible to time driver-model init.
Drop the function and require boards to provide their own. Add a sandbox
version also. There is a default implememtation in lib/time.c for boards
which use CONFIG_SYS_TIMER_COUNTER.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 22 May 2017 11:05:22 +0000 (05:05 -0600)]
bootstage: Provide a default timer function
If CONFIG_SYS_TIMER_COUNTER is used we can provide a default microsecond
timer implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Sat, 20 May 2017 00:19:27 +0000 (05:49 +0530)]
ARM: k2g: Fix passing main pll info for higher speeds
Main pll is marked as arm plls for higher speeds. Fix this.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Thu, 18 May 2017 21:03:07 +0000 (17:03 -0400)]
cmd/elf.c: Support passing arguments with bootelf
The bootelf command could, but does not, pass additional arguments along
on the command line. Make do_bootelf consume bootelf/flags/address as
needed and then pass along anything else to the ELF application we've
launched.
Reported-by: Thomas Doerfler <thomas.doerfler@embedded-brains.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrice Chotard [Thu, 18 May 2017 07:58:00 +0000 (09:58 +0200)]
reset: sti: add deassert counter in reset channel descriptor
This deassert counter allow to manage "shared" reset lines
encountered in some specific case. On STiH410 SoC, DWC3,
EHCI and OHCI are all using a respective PHY, but all of
these PHYs shared a "global" reset.
Currently, during command "usb stop", all host controller are
stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which
means that PHY global reset is asserted. Then EHCI is shutdowned,
but its PHY reset has already been asserted which make handshake()
call failed in ehci_shutdown().
This counter allows to really assert a reset lines only when the
"last" user is asserting it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 18 May 2017 07:23:15 +0000 (09:23 +0200)]
test: py: hush: Add echo dependency
Some tests depends on echo command to be present.
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 18 May 2017 07:23:14 +0000 (09:23 +0200)]
test: py: Use global pytestmark for hush tests
All tests in test_hush_if_test depends on hush parser to be
present. This patch simplify test dependencies by using global
pytestmark.
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Uri Mashiach [Wed, 17 May 2017 14:29:28 +0000 (17:29 +0300)]
arm: am57xx: cl-som-am57x: adjust default env to the installation system
The SD card automatic installation system depends on the default
environment of the previous U-Boot.
Add the missing environment variables.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Wed, 17 May 2017 14:29:27 +0000 (17:29 +0300)]
ARM: am57xx: cl-som-am57x: support for AM5718
Disable SDRAM controller EMIF2 for single core SOC
Set SDRAM size size to 1GB
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Wed, 17 May 2017 14:29:26 +0000 (17:29 +0300)]
arm: am57xx: cl-som-am57x: change the shell prompt
Change the shell prompt to "U-Boot# ".
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Uri Mashiach [Wed, 17 May 2017 14:29:25 +0000 (17:29 +0300)]
arm: am57xx: cl-som-am57x: support for FS boot
Supported boot devices are raw QSPI and raw SD card.
Add support for a FAT16/32 file system for SD card.
The SOC's boot ROM only supports FAT file system.
Therefore remove the SPL support for the EXT file system.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 14:23:11 +0000 (08:23 -0600)]
common: microblaze: Drop arch-specific declarations
These are not needed and should not be in common.h. Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:10 +0000 (08:23 -0600)]
common: arm: freescale: layerscape: Move header files out of common.h
We should not have an arch-specific header file in common.h. Adjust the
board files a little so it is not needed, and drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:09 +0000 (08:23 -0600)]
common: arm: davinci: Move header file out of common
We should not have an arch-specific header file in common.h. Instead, use
the asm/hardware.h header to provide the required declarations, and drop
the common.h changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 14:23:08 +0000 (08:23 -0600)]
common: ep93xx: Move arch-specific declarations out of common
These declarations should not be in common. Remove those that are not
needed and move the others to an arch-specific location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:07 +0000 (08:23 -0600)]
common: freescale: Move arch-specific imx code to arch-imx
These declarations should not be in common.h. Move them to an
arch-specific header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:06 +0000 (08:23 -0600)]
common: freescale: Move arch-specific declarations
The declarations should not be in common.h. Move them to the arch-specific
headers.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 14:23:05 +0000 (08:23 -0600)]
common: powerpc: Move arch-specific headers
Set up a new asm/ppc.h header file to hold this arch-specific stuff. It
should not be in common.h. It probably should be refactored to use
asm/arch instead, but that is a job for the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:04 +0000 (08:23 -0600)]
common: Move PPC4xx_SYS_INFO() et al to arch-specific header
These definitions should not be in common.h. Move them to an arch-specific
header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:03 +0000 (08:23 -0600)]
common: Drop determine_sysper() and determine_pci_clock_per()
These arch-specific declarations should not be in common.h. Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:02 +0000 (08:23 -0600)]
common: Drop cpu_init_f() declarations
These arch-specific functions are not needed here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:23:01 +0000 (08:23 -0600)]
arm: Remove include files from common.h
With a small tweak we can avoid including these files for all boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 14:23:00 +0000 (08:23 -0600)]
arm: Include asm/setup.h explictly
Include this header where needed so we do not need to rely on common.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:59 +0000 (08:22 -0600)]
arm: Add declarations to avoid needing to include headers
At present common.h includes various ARM-specific headers. In preparation
for dropping this, add a few explicit declarations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 1 Jun 2017 01:47:48 +0000 (19:47 -0600)]
arm: Add explicit include of <asm/mach-types.h>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 17 May 2017 14:22:57 +0000 (08:22 -0600)]
nds32: Remove include files from common.h
With a few tweaks we can avoid including these files, which are only
needed by two C files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:56 +0000 (08:22 -0600)]
x86: Don't include asm/u-boot.h in common
With a small fixup to u-boot-x86.h, this is not actually needed anywhere,
so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:55 +0000 (08:22 -0600)]
sandbox: Don't include asm/u-boot.h in common
This is not actually needed anywhere, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:54 +0000 (08:22 -0600)]
mips: Don't include asm/u-boot.h in common
This is not actually needed anywhere, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Simon Glass [Wed, 17 May 2017 14:22:53 +0000 (08:22 -0600)]
arc: Don't include asm/u-boot.h in common
This is not actually needed anywhere, so drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:52 +0000 (08:22 -0600)]
nds32: Make u-boot-nds32.h a private header
Rather than including this arch-specific header file in common.h, include
it from within nds32's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:51 +0000 (08:22 -0600)]
mips: Make u-boot-mips.h a private header
Rather than including this arch-specific header file in common.h, include
it from within mips's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Simon Glass [Wed, 17 May 2017 14:22:50 +0000 (08:22 -0600)]
arm: Make u-boot-arm.h a private header
Rather than including this arch-specific header file in common.h, include
it from within arm's u-boot.h header.
Also drop the comment about something to be fixed. It has been there
forever and it is not clear what it means.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:49 +0000 (08:22 -0600)]
x86: Make u-boot-x86.h a private header
Rather than including this arch-specific header file in common.h, include
it from within x86's u-boot.h header.
Also drop the comment about something to be fixed. It is not clear what
needs fixing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:48 +0000 (08:22 -0600)]
sandbox: Make u-boot-sandbox.h a private header
Rather than including this arch-specific header file in common.h, include
it from within sandbox's u-boot.h header.
Also drop the comment about something to be fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:47 +0000 (08:22 -0600)]
arc: Make u-boot-arc.h a private header
Rather than including this arch-specific header file in common.h, include
it from within arc's u-boot.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:46 +0000 (08:22 -0600)]
samsung: Drop more references fo s3c24x0
This is dead code now. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:45 +0000 (08:22 -0600)]
samsung: nand: Drop s3c2410_nand driver
This is not used anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:44 +0000 (08:22 -0600)]
samsung: usb: Drop ohci-s3c24xx driver
This is not used anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:43 +0000 (08:22 -0600)]
samsung: mmc: Drop s3c_sdi driver
This is no-longer used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Wed, 17 May 2017 14:22:42 +0000 (08:22 -0600)]
samsung: Drop s3c24x0 arch-specific code
This is not used anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:41 +0000 (08:22 -0600)]
gpio: samsung: Drop s3c2440_gpio driver
This is no longer used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:40 +0000 (08:22 -0600)]
api: Add a header for api_init()
Put this in its own header instead of using common.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:39 +0000 (08:22 -0600)]
common: Move get_OPB_freq() and get_PCI_freq() to PPC header
These should not be in common.h. Move the to an arch-specific header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:38 +0000 (08:22 -0600)]
common: Move pcie_setup_hoses() to PPC header
Only one board needs this definition. Move it to an arch-specific header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:37 +0000 (08:22 -0600)]
common: Drop pci_master_init()
This should not be in common.h. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:36 +0000 (08:22 -0600)]
common: Move pci_target_init() to PPC header
Only one boards needs this definition. Move it to an arch-specific header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:35 +0000 (08:22 -0600)]
common: Drop pci_pre_init() and is_pci_host()
These should not be in common.h. They are used in some legacy PowerPC
code. Just drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 May 2017 14:22:34 +0000 (08:22 -0600)]
common: Drop inclusion of pci.h
This should not be in common.h - remove it and update the only file that
needs it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 16 May 2017 18:46:40 +0000 (14:46 -0400)]
t81xx: Migrate TI81XX/TI816X/TI814X symbols to Kconfig
The symbol CONFIG_TI81XX is used for the parts that are common to the
TI816x and TI814x SoCs and are not part of CONFIG_ARCH_OMAP2PLUS nor
CONFIG_AM33XX. It however has so few uses that we can just modify the
code to check for both and drop the symbol. The symbols CONFIG_TI816X
and CONFIG_TI814X are for the repective SoCs.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:39 +0000 (14:46 -0400)]
ti816x: Modernize the defconfig
- Switch to using <configs/ti_armv7_omap.h> and family. This lets us
drop lots of custom defines.
- Ensure that our default environment uses DEFAULT_LINUX_BOOT_ENV so
that Linux will boot correctly.
- Enable CONFIG_DISTRO_DEFAULTS
- Switch to using CONFIG_OF_CONTROL
- Various other cleanups to match other SoCs in the family line.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:38 +0000 (14:46 -0400)]
ti816x: Import dts files from Linux Kernel v4.11
This brings in the required dts/dtsi files for the TI8168-EVM from the
Linux Kernel v4.11 release.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:37 +0000 (14:46 -0400)]
ti816x: Enable NAND
The TI8168-EVM comes with NAND on board. Enable it and move environment
over there.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:36 +0000 (14:46 -0400)]
ti816x_evm: Disable CONFIG_USE_PRIVATE_LIBGCC
On this platform, we can trace a general failure to boot to enabling /
disabling this option. When this is enabled, we go off into the
weeds during SPL and are unable to talk with the SD card and
mmc_initialize() fails.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:35 +0000 (14:46 -0400)]
ti816x: Rework DDR initialization sequence
The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family. In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations. Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient. Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still. As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it. We also remove a bunch
of other untested code about changing the speed the DDR runs at.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 16 May 2017 18:46:34 +0000 (14:46 -0400)]
armv7: Mark the default lowlevel_init function as weak
Rather than have a long and if check in the Makefile, mark the default
lowlevel_init function as weak (as we do on armv8) so that SoCs can
override it if needed, and it will still be discarded if unused.
Provide a weak s_init as well to allow for this to link and be
discarded.
Signed-off-by: Tom Rini <trini@konsulko.com>
Anna, Suman [Tue, 16 May 2017 17:50:18 +0000 (12:50 -0500)]
configs: davinci: omapl138_lcdk: add random eth address support
Any TFTP or DHCP boot on the Davinci OMAP-L138 LCDK board requires
that the 'ethaddr' variable be defined. There are no e-fuses to store
the ethernet mac address for this platform, and neither is a MAC
address reserved in any format. So enable random MAC address support
so that networking boot can be supported.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>