Sean Fertile [Tue, 9 Jul 2019 18:09:11 +0000 (18:09 +0000)]
[Object][XCOFF] Add support for 64-bit file header and section header dumping.
Adds a readobj dumper for 32-bit and 64-bit section header tables, and extend
support for the file-header dumping to include 64-bit object files. Also
refactors the binary file parsing to be done in a helper function in an attempt
to cleanup error handeling.
Differential Revision: https://reviews.llvm.org/D63843
llvm-svn: 365524
Sanjay Patel [Tue, 9 Jul 2019 18:06:16 +0000 (18:06 +0000)]
[InstCombine] add tests for trunc(load); NFC
I'm not sure if transforming any of these is valid as
a target-independent fold, but we might as well have
a few tests here to confirm or deny our position.
llvm-svn: 365523
Sam McCall [Tue, 9 Jul 2019 17:59:50 +0000 (17:59 +0000)]
[clangd] Show documentation in hover, and fetch docs from index if needed.
Summary:
I assume showing docs is going to be part of structured hover rendering, but
it's unclear whether that's going to make clangd 9 so this is low-hanging fruit.
(Also fixes a bug uncovered in FormattedString's plain text output: need blank
lines when text follows codeblocks)
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64296
llvm-svn: 365522
Matt Arsenault [Tue, 9 Jul 2019 17:54:34 +0000 (17:54 +0000)]
AMDGPU: Fix test failing since r365512
llvm-svn: 365521
Jinsong Ji [Tue, 9 Jul 2019 17:53:09 +0000 (17:53 +0000)]
Revert "[HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()"
This reverts commit
d95557306585404893d610784edb3e32f1bfce18.
llvm-svn: 365520
Steven Wu [Tue, 9 Jul 2019 17:47:14 +0000 (17:47 +0000)]
Add lit.local.cfg to llvm-objdump tests
Add configuration file to llvm-objdump tests to treat files with .yaml
extension as tests.
llvm-svn: 365519
Erik Pilkington [Tue, 9 Jul 2019 17:29:40 +0000 (17:29 +0000)]
[ObjC] Add a warning for implicit conversions of a constant non-boolean value to BOOL
rdar://
51954400
Differential revision: https://reviews.llvm.org/D63912
llvm-svn: 365518
Nico Weber [Tue, 9 Jul 2019 17:19:47 +0000 (17:19 +0000)]
Remove a comment that has been obsolete since r327679
llvm-svn: 365517
Michael Liao [Tue, 9 Jul 2019 17:19:01 +0000 (17:19 +0000)]
[unittest] Add bogus register info.
Reviewers: dstenb
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64421
llvm-svn: 365516
Nico Weber [Tue, 9 Jul 2019 17:14:24 +0000 (17:14 +0000)]
Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm-pdbutil
llvm-pdbdump was renamed to llvm-pdbutil long ago. This updates the test
to be where you'd expect them to be.
llvm-svn: 365515
Nico Weber [Tue, 9 Jul 2019 17:02:51 +0000 (17:02 +0000)]
Make pdbdump-objfilename test work again
- The test had extension .yaml, which lit doesn't execute in this
directory. Rename to .test to make it run, and move the yaml bits
into a dedicated file, like with all other tests in this dir.
- llvm-pdbdump got renamed to llvm-pdbutil long ago, update test.
- -dbi-module-info got renamed in r305032, update test for this too.
llvm-svn: 365514
Julian Lettner [Tue, 9 Jul 2019 16:49:43 +0000 (16:49 +0000)]
[TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.8
Refine longjmp key management. For Linux, re-implement key retrieval in
C (instead of assembly). Removal of `InitializeGuardPtr` and a final
round of cleanups will be done in the next commit.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D64092
llvm-svn: 365513
Christudasan Devadasan [Tue, 9 Jul 2019 16:48:42 +0000 (16:48 +0000)]
[AMDGPU] Created a sub-register class for the return address operand in the return instruction.
Function return instruction lowering, currently uses the fixed register pair s[30:31] for holding
the return address. It can be any SGPR pair other than the CSRs. Created an SGPR pair sub-register class
exclusive of the CSRs, and used this regclass while lowering the return instruction.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D63924
llvm-svn: 365512
Sam Elliott [Tue, 9 Jul 2019 16:24:16 +0000 (16:24 +0000)]
[RISCV] Fix ICE in isDesirableToCommuteWithShift
Summary:
There was an error being thrown from isDesirableToCommuteWithShift in
some tests. This was tracked down to the method being called before
legalisation, with an extended value type, not a machine value type.
In the case I diagnosed, the error was only hit with an instruction sequence
involving `i24`s in the add and shift. `i24` is not a Machine ValueType, it is
instead an Extended ValueType which was causing the issue.
I have added a test to cover this case, and fixed the error in the callback.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64425
llvm-svn: 365511
Amara Emerson [Tue, 9 Jul 2019 16:05:59 +0000 (16:05 +0000)]
[AArch64][GlobalISel] Optimize conditional branches followed by unconditional branches
If we have an icmp->brcond->br sequence where the brcond just branches to the
next block jumping over the br, while the br takes the false edge, then we can
modify the conditional branch to jump to the br's target while inverting the
condition of the incoming icmp. This means we can eliminate the br as an
unconditional branch to the fallthrough block.
Differential Revision: https://reviews.llvm.org/D64354
llvm-svn: 365510
Hiroshi Yamauchi [Tue, 9 Jul 2019 15:57:29 +0000 (15:57 +0000)]
Revert Revert Devirtualize destructor of final class.
Revert r364359 and recommit r364100.
r364100 was reverted as r364359 due to an internal test failure, but it was a
false alarm.
llvm-svn: 365509
Simon Atanasyan [Tue, 9 Jul 2019 15:48:16 +0000 (15:48 +0000)]
[mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU
llvm-svn: 365508
Simon Atanasyan [Tue, 9 Jul 2019 15:48:05 +0000 (15:48 +0000)]
[mips] Explicitly select `mips32r2` CPU for test cases require 64-bit FPU. NFC
Support for 64-bit coprocessors on a 32-bit architecture
was added in `MIPS32 R2`.
llvm-svn: 365507
David Bolvansky [Tue, 9 Jul 2019 15:31:36 +0000 (15:31 +0000)]
[NFC] Fixed tests
llvm-svn: 365506
Mikhail Maltsev [Tue, 9 Jul 2019 15:29:06 +0000 (15:29 +0000)]
[libunwind] Fix Unwind-EHABI.cpp:getByte on big-endian targets
Summary:
The function getByte is dependent on endianness and the current
behavior is incorrect on big-endian targets.
This patch fixes the issue.
Reviewers: phosek, ostannard, dmgreen, christof, chill
Reviewed By: ostannard, chill
Subscribers: chill, christof, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D64402
llvm-svn: 365505
Simon Pilgrim [Tue, 9 Jul 2019 15:28:57 +0000 (15:28 +0000)]
[DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_t offset. NFCI.
Keep the uint64_t type from getOffsetFromBase() to stop truncation/extension overflow warnings in MSVC in alignment math.
llvm-svn: 365504
Yonghong Song [Tue, 9 Jul 2019 15:28:41 +0000 (15:28 +0000)]
[BPF] Support for compile once and run everywhere
Introduction
============
This patch added intial support for bpf program compile once
and run everywhere (CO-RE).
The main motivation is for bpf program which depends on
kernel headers which may vary between different kernel versions.
The initial discussion can be found at https://lwn.net/Articles/773198/.
Currently, bpf program accesses kernel internal data structure
through bpf_probe_read() helper. The idea is to capture the
kernel data structure to be accessed through bpf_probe_read()
and relocate them on different kernel versions.
On each host, right before bpf program load, the bpfloader
will look at the types of the native linux through vmlinux BTF,
calculates proper access offset and patch the instruction.
To accommodate this, three intrinsic functions
preserve_{array,union,struct}_access_index
are introduced which in clang will preserve the base pointer,
struct/union/array access_index and struct/union debuginfo type
information. Later, bpf IR pass can reconstruct the whole gep
access chains without looking at gep itself.
This patch did the following:
. An IR pass is added to convert preserve_*_access_index to
global variable who name encodes the getelementptr
access pattern. The global variable has metadata
attached to describe the corresponding struct/union
debuginfo type.
. An SimplifyPatchable MachineInstruction pass is added
to remove unnecessary loads.
. The BTF output pass is enhanced to generate relocation
records located in .BTF.ext section.
Typical CO-RE also needs support of global variables which can
be assigned to different values to different hosts. For example,
kernel version can be used to guard different versions of codes.
This patch added the support for patchable externals as well.
Example
=======
The following is an example.
struct pt_regs {
long arg1;
long arg2;
};
struct sk_buff {
int i;
struct net_device *dev;
};
#define _(x) (__builtin_preserve_access_index(x))
static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr) =
(void *) 4;
extern __attribute__((section(".BPF.patchable_externs"))) unsigned __kernel_version;
int bpf_prog(struct pt_regs *ctx) {
struct net_device *dev = 0;
// ctx->arg* does not need bpf_probe_read
if (__kernel_version >= 41608)
bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg1)->dev));
else
bpf_probe_read(&dev, sizeof(dev), _(&((struct sk_buff *)ctx->arg2)->dev));
return dev != 0;
}
In the above, we want to translate the third argument of
bpf_probe_read() as relocations.
-bash-4.4$ clang -target bpf -O2 -g -S trace.c
The compiler will generate two new subsections in .BTF.ext,
OffsetReloc and ExternReloc.
OffsetReloc is to record the structure member offset operations,
and ExternalReloc is to record the external globals where
only u8, u16, u32 and u64 are supported.
BPFOffsetReloc Size
struct SecLOffsetReloc for ELF section #1
A number of struct BPFOffsetReloc for ELF section #1
struct SecOffsetReloc for ELF section #2
A number of struct BPFOffsetReloc for ELF section #2
...
BPFExternReloc Size
struct SecExternReloc for ELF section #1
A number of struct BPFExternReloc for ELF section #1
struct SecExternReloc for ELF section #2
A number of struct BPFExternReloc for ELF section #2
struct BPFOffsetReloc {
uint32_t InsnOffset; ///< Byte offset in this section
uint32_t TypeID; ///< TypeID for the relocation
uint32_t OffsetNameOff; ///< The string to traverse types
};
struct BPFExternReloc {
uint32_t InsnOffset; ///< Byte offset in this section
uint32_t ExternNameOff; ///< The string for external variable
};
Note that only externs with attribute section ".BPF.patchable_externs"
are considered for Extern Reloc which will be patched by bpf loader
right before the load.
For the above test case, two offset records and one extern record
will be generated:
OffsetReloc records:
.long .Ltmp12 # Insn Offset
.long 7 # TypeId
.long 242 # Type Decode String
.long .Ltmp18 # Insn Offset
.long 7 # TypeId
.long 242 # Type Decode String
ExternReloc record:
.long .Ltmp5 # Insn Offset
.long 165 # External Variable
In string table:
.ascii "0:1" # string offset=242
.ascii "__kernel_version" # string offset=165
The default member offset can be calculated as
the 2nd member offset (0 representing the 1st member) of struct "sk_buff".
The asm code:
.Ltmp5:
.Ltmp6:
r2 = 0
r3 = 41608
.Ltmp7:
.Ltmp8:
.loc 1 18 9 is_stmt 0 # t.c:18:9
.Ltmp9:
if r3 > r2 goto LBB0_2
.Ltmp10:
.Ltmp11:
.loc 1 0 9 # t.c:0:9
.Ltmp12:
r2 = 8
.Ltmp13:
.loc 1 19 66 is_stmt 1 # t.c:19:66
.Ltmp14:
.Ltmp15:
r3 = *(u64 *)(r1 + 0)
goto LBB0_3
.Ltmp16:
.Ltmp17:
LBB0_2:
.loc 1 0 66 is_stmt 0 # t.c:0:66
.Ltmp18:
r2 = 8
.loc 1 21 66 is_stmt 1 # t.c:21:66
.Ltmp19:
r3 = *(u64 *)(r1 + 8)
.Ltmp20:
.Ltmp21:
LBB0_3:
.loc 1 0 66 is_stmt 0 # t.c:0:66
r3 += r2
r1 = r10
.Ltmp22:
.Ltmp23:
.Ltmp24:
r1 += -8
r2 = 8
call 4
For instruction .Ltmp12 and .Ltmp18, "r2 = 8", the number
8 is the structure offset based on the current BTF.
Loader needs to adjust it if it changes on the host.
For instruction .Ltmp5, "r2 = 0", the external variable
got a default value 0, loader needs to supply an appropriate
value for the particular host.
Compiling to generate object code and disassemble:
0000000000000000 bpf_prog:
0: b7 02 00 00 00 00 00 00 r2 = 0
1: 7b 2a f8 ff 00 00 00 00 *(u64 *)(r10 - 8) = r2
2: b7 02 00 00 00 00 00 00 r2 = 0
3: b7 03 00 00 88 a2 00 00 r3 = 41608
4: 2d 23 03 00 00 00 00 00 if r3 > r2 goto +3 <LBB0_2>
5: b7 02 00 00 08 00 00 00 r2 = 8
6: 79 13 00 00 00 00 00 00 r3 = *(u64 *)(r1 + 0)
7: 05 00 02 00 00 00 00 00 goto +2 <LBB0_3>
0000000000000040 LBB0_2:
8: b7 02 00 00 08 00 00 00 r2 = 8
9: 79 13 08 00 00 00 00 00 r3 = *(u64 *)(r1 + 8)
0000000000000050 LBB0_3:
10: 0f 23 00 00 00 00 00 00 r3 += r2
11: bf a1 00 00 00 00 00 00 r1 = r10
12: 07 01 00 00 f8 ff ff ff r1 += -8
13: b7 02 00 00 08 00 00 00 r2 = 8
14: 85 00 00 00 04 00 00 00 call 4
Instructions #2, #5 and #8 need relocation resoutions from the loader.
Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D61524
llvm-svn: 365503
Simon Pilgrim [Tue, 9 Jul 2019 15:24:19 +0000 (15:24 +0000)]
[ADT] Remove MSVC-only "no two-phase name lookup" typename path.
Now that we've dropped VS2015 support (D64326) we can use the regular codepath as VS2017+ correctly handles it
llvm-svn: 365502
David Bolvansky [Tue, 9 Jul 2019 15:12:01 +0000 (15:12 +0000)]
[NFC] Added tests for D64285
llvm-svn: 365501
Marco Antognini [Tue, 9 Jul 2019 15:04:27 +0000 (15:04 +0000)]
[OpenCL][Sema] Improve address space support for blocks
Summary:
This patch ensures that the following code is compiled identically with
-cl-std=CL2.0 and -fblocks -cl-std=c++.
kernel void test(void) {
void (^const block_A)(void) = ^{
return;
};
}
A new test is not added because cl20-device-side-enqueue.cl will cover
this once blocks are further improved for C++ for OpenCL.
The changes to Sema::PerformImplicitConversion are based on
the parts of Sema::CheckAssignmentConstraints on block pointer
conversions.
Reviewers: rjmccall, Anastasia
Subscribers: yaxunl, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64083
llvm-svn: 365500
Marco Antognini [Tue, 9 Jul 2019 15:04:23 +0000 (15:04 +0000)]
[OpenCL][Sema] Fix builtin rewriting
This patch ensures built-in functions are rewritten using the proper
parent declaration.
Existing tests are modified to run in C++ mode to ensure the
functionality works also with C++ for OpenCL while not increasing the
testing runtime.
llvm-svn: 365499
Aaron Ballman [Tue, 9 Jul 2019 15:02:07 +0000 (15:02 +0000)]
Ignore trailing NullStmts in StmtExprs for GCC compatibility.
Ignore trailing NullStmts in compound expressions when determining the result type and value. This is to match the GCC behavior which ignores semicolons at the end of compound expressions.
Patch by Dominic Ferreira.
llvm-svn: 365498
Chen Zheng [Tue, 9 Jul 2019 14:56:17 +0000 (14:56 +0000)]
[HardwareLoops] NFC - move hardware loop checking code to isHardwareLoopProfitable()
Differential Revision: https://reviews.llvm.org/D64197
llvm-svn: 365497
David Green [Tue, 9 Jul 2019 14:43:17 +0000 (14:43 +0000)]
[ARM] Add test for MVE and no floats. NFC
Adds a simple test that MVE with no floating point will be promoted correctly
to software float calls.
llvm-svn: 365496
Sanjay Patel [Tue, 9 Jul 2019 14:43:03 +0000 (14:43 +0000)]
[InferFunctionAttrs] add more tests for derefenceable; NFC
llvm-svn: 365495
Petar Avramovic [Tue, 9 Jul 2019 14:36:17 +0000 (14:36 +0000)]
[MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi
Select gprb or fprb when def/use register operand of G_PHI is
used/defined by either:
copy to/from physical register or
instruction with only one mapping available for that use/def operand.
Integer s64 phi is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.
Differential Revision: https://reviews.llvm.org/D64351
llvm-svn: 365494
Matt Arsenault [Tue, 9 Jul 2019 14:30:57 +0000 (14:30 +0000)]
AMDGPU/GlobalISel: Prepare some tests for store selection
Mostsly these would fail due to trying to use SI with a flat
operation. Implementing global loads with MUBUF is more work than
flat, so these won't be handled in the initial load selection.
Others fail because store of s64 won't initially work, as the current
set of patterns expect everything to be turned into v2i32.
llvm-svn: 365493
Petar Avramovic [Tue, 9 Jul 2019 14:30:29 +0000 (14:30 +0000)]
[MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 and f64 select
Select gprb or fprb when def/use register operand of G_SELECT is
used/defined by either:
copy to/from physical register or
instruction with only one mapping available for that use/def operand.
Integer s64 select is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.
For selection of floating point s32 or s64 select it is enough to set
fprb of appropriate size and selectImpl will do the rest.
Differential Revision: https://reviews.llvm.org/D64350
llvm-svn: 365492
Matt Arsenault [Tue, 9 Jul 2019 14:30:02 +0000 (14:30 +0000)]
AMDGPU/GlobalISel: Fix test
llvm-svn: 365491
Emilio Cobos Alvarez [Tue, 9 Jul 2019 14:27:01 +0000 (14:27 +0000)]
[libclang] Fix hang in release / assertion in debug when evaluating value-dependent types.
Expression evaluator doesn't work in value-dependent types, so ensure that the
precondition it asserts holds.
This fixes https://bugs.llvm.org/show_bug.cgi?id=42532
Differential Revision: https://reviews.llvm.org/D64409
llvm-svn: 365490
James Henderson [Tue, 9 Jul 2019 14:20:58 +0000 (14:20 +0000)]
[docs][llvm-dwarfdump] Fix wording
llvm-svn: 365489
Matt Arsenault [Tue, 9 Jul 2019 14:17:31 +0000 (14:17 +0000)]
AMDGPU/GlobalISel: Legalize more concat_vectors
llvm-svn: 365488
Matt Arsenault [Tue, 9 Jul 2019 14:13:09 +0000 (14:13 +0000)]
AMDGPU/GlobalISel: Improve regbankselect for icmp s16
Account for 64-bit scalar eq/ne when available.
llvm-svn: 365487
Matt Arsenault [Tue, 9 Jul 2019 14:10:43 +0000 (14:10 +0000)]
AMDGPU/GlobalISel: Make s16 G_ICMP legal
llvm-svn: 365486
Alexey Bataev [Tue, 9 Jul 2019 14:09:53 +0000 (14:09 +0000)]
[OPENMP]Fix the float point semantics handling on the device.
The device should use the same float point representation as the host.
Previous patch fixed the handling of the sizes of the float point types,
but did not fixed the fp semantics. This patch makes target device to
use the host fp semantics. this is required for the correct data
transfer between host and device and correct codegen.
llvm-svn: 365485
Matt Arsenault [Tue, 9 Jul 2019 14:05:11 +0000 (14:05 +0000)]
AMDGPU/GlobalISel: Select G_SUB
llvm-svn: 365484
Matt Arsenault [Tue, 9 Jul 2019 14:02:26 +0000 (14:02 +0000)]
AMDGPU/GlobalISel: Select G_UNMERGE_VALUES
llvm-svn: 365483
Matt Arsenault [Tue, 9 Jul 2019 14:02:20 +0000 (14:02 +0000)]
AMDGPU/GlobalISel: Select G_MERGE_VALUES
llvm-svn: 365482
Nico Weber [Tue, 9 Jul 2019 13:58:18 +0000 (13:58 +0000)]
gn build: Merge r365453
llvm-svn: 365481
Fangrui Song [Tue, 9 Jul 2019 13:32:26 +0000 (13:32 +0000)]
[ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled code
In gcc PowerPC, long double has 3 mangling schemes:
-mlong-double-64: `e`
-mlong-double-128 -mabi=ibmlongdouble: `g`
-mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`)
The current useFloat128ManglingForLongDouble() bisection is not suitable
when we support -mlong-double-128 in clang (D64277). Replace
useFloat128ManglingForLongDouble() with getLongDoubleMangling() and
getFloat128Mangling() to allow 3 mangling schemes.
I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin
support has gone: https://reviews.llvm.org/D50988).
For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC.
The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277.
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D64276
llvm-svn: 365480
Ilya Biryukov [Tue, 9 Jul 2019 13:31:43 +0000 (13:31 +0000)]
[Syntax] Move roles into a separate enum
To align with reviewer's suggestions.
llvm-svn: 365479
Nico Weber [Tue, 9 Jul 2019 13:30:03 +0000 (13:30 +0000)]
lld-link: Stop accepting /natvis and /fastfail in .drectve sections
link.exe doesn't accept them either.
Differential Revision: https://reviews.llvm.org/D64352
llvm-svn: 365478
Simon Pilgrim [Tue, 9 Jul 2019 13:07:48 +0000 (13:07 +0000)]
[CodeGen] AccelTable - remove non-constexpr (MSVC) Atom defs
Now that we've dropped VS2015 support (D64326) we can enable the constexpr variables on MSVC builds as VS2017+ correctly handles them
llvm-svn: 365477
Simon Atanasyan [Tue, 9 Jul 2019 12:55:55 +0000 (12:55 +0000)]
[mips] Implement sge/sgeu pseudo instructions
The `sge/sgeu Dst, Src1, Src2/Imm` pseudo instructions set register
`Dst` to 1 if register `Src1` is greater than or equal `Src2/Imm` and
to 0 otherwise.
Differential Revision: https://reviews.llvm.org/D64314
llvm-svn: 365476
Simon Atanasyan [Tue, 9 Jul 2019 12:55:42 +0000 (12:55 +0000)]
[mips] Implement sgt/sgtu pseudo instructions with immediate operand
The `sgt/sgtu Dst, Src1, Src2/Imm` pseudo instructions set register
`Dst` to 1 if register `Src1` is greater than `Src2/Imm` and to 0 otherwise.
Differential Revision: https://reviews.llvm.org/D64313
llvm-svn: 365475
James Henderson [Tue, 9 Jul 2019 12:41:39 +0000 (12:41 +0000)]
[docs][llvm-objdump] Make some wording improvements/simplifications.
llvm-svn: 365474
Pengfei Wang [Tue, 9 Jul 2019 12:41:12 +0000 (12:41 +0000)]
[NFC] [X86] Fix scan-build complaining
Summary:
Remove unused variable. This fixes bug:
https://bugs.llvm.org/show_bug.cgi?id=42526
Signed-off-by: pengfei <pengfei.wang@intel.com>
Reviewers: RKSimon, xiangzhangllvm, craig.topper
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64389
llvm-svn: 365473
Tim Northover [Tue, 9 Jul 2019 12:36:36 +0000 (12:36 +0000)]
OpaquePtr: pass type to CreateLoad. NFC.
This is the one place in LLVM itself that used the deprecated API for
CreateLoad, so I just added the type in.
llvm-svn: 365472
Simon Pilgrim [Tue, 9 Jul 2019 12:20:04 +0000 (12:20 +0000)]
[ADT] Enable ArrayRef/StringRef is_assignable tests on MSVC
Now that we've dropped VS2015 support (D64326) we can enable these static_asserts on MSVC builds as VS2017+ correctly handles them
llvm-svn: 365471
Tim Northover [Tue, 9 Jul 2019 12:13:31 +0000 (12:13 +0000)]
OpaquePtr: Update polly's calls to Loads.h API
The Loads.h API changed so that a Type parameter is now mandatory in
preparation for pointer types being opaque. Unfortunately I don't build
polly routinely and it still had some uses. This just provides the
(obvious) load type in each case.
llvm-svn: 365470
Djordje Todorovic [Tue, 9 Jul 2019 12:06:21 +0000 (12:06 +0000)]
[NFC][AsmPrinter] Fix the formatting for the rL365467
In addition, fix the build failure for the 'unused'
variable. The variable was used inside the 'LLVM_DEBUG()'.
llvm-svn: 365469
Tim Northover [Tue, 9 Jul 2019 11:35:35 +0000 (11:35 +0000)]
OpaquePtr: add Type parameter to Loads analysis API.
This makes the functions in Loads.h require a type to be specified
independently of the pointer Value so that when pointers have no structure
other than address-space, it can still do its job.
Most callers had an obvious memory operation handy to provide this type, but a
SROA and ArgumentPromotion were doing more complicated analysis. They get
updated to merge the properties of the various instructions they were
considering.
llvm-svn: 365468
Djordje Todorovic [Tue, 9 Jul 2019 11:33:56 +0000 (11:33 +0000)]
[DwarfDebug] Dump call site debug info
Dump the DWARF information about call sites and call site parameters into
debug info sections.
The patch also provides an interface for the interpretation of instructions
that could load values of a call site parameters in order to generate DWARF
about the call site parameters.
([13/13] Introduce the debug entry values.)
Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>
Differential Revision: https://reviews.llvm.org/D60716
llvm-svn: 365467
Ilya Biryukov [Tue, 9 Jul 2019 11:32:13 +0000 (11:32 +0000)]
Reland r365355: [Syntax] Introduce syntax trees
With a fix to a PS4 buildbot crash.
llvm-svn: 365466
Simon Pilgrim [Tue, 9 Jul 2019 11:26:35 +0000 (11:26 +0000)]
Revert rL365355 : [Syntax] Introduce syntax trees
Summary:
A tooling-focused alternative to the AST. This commit focuses on the
memory-management strategy and the structure of the AST.
More to follow later:
- Operations to mutate the syntax trees and corresponding textual
replacements.
- Mapping between clang AST nodes and syntax tree nodes.
- More node types corresponding to the language constructs.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: llvm-commits, mgorny, cfe-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D61637
........
Fixes buildbots which were crashing on SyntaxTests.exe
llvm-svn: 365465
Balazs Keri [Tue, 9 Jul 2019 11:08:18 +0000 (11:08 +0000)]
[ASTImporter] Added visibility context check for EnumDecl.
Summary:
ASTImporter makes now difference between enums with same name in different translation
units if these are not visible outside.
("Scoped enums" are not handled yet.)
Reviewers: martong, a.sidorin, shafik, a_sidorin
Reviewed By: a_sidorin
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D62484
llvm-svn: 365464
Dmitri Gribenko [Tue, 9 Jul 2019 11:04:04 +0000 (11:04 +0000)]
Enhance abseil-faster-strsplit-delimiter to handle other non-printable characters.
Summary:
Currently it fails on cases like '\001'.
Note: Since `StringLiteral::outputString` dumps most nonprintable
characters in octal value, the exact string literal format isn't preserved,
e.g. `"\x01"` becomes `'\001'`.
Reviewers: gribozavr
Reviewed By: gribozavr
Subscribers: lebedev.ri, Eugene.Zelenko, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D64151
Patch by Xiaoyi Zhang.
llvm-svn: 365463
Alex Bradbury [Tue, 9 Jul 2019 10:56:18 +0000 (10:56 +0000)]
[RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates where getMinSignedBits() > 64
APInt::getSExtValue will assert if getMinSignedBits() > 64. This can happen,
for instance, if examining an i128. Avoid this assertion by checking
Imm.getMinSignedBits() <= 64 before doing
getTLI()->isLegalAddImmediate(Imm.getSExtValue()). We could directly check
getMinSignedBits() <= 12 but it seems better to reuse the isLegalAddImmediate
helper for this.
Differential Revision: https://reviews.llvm.org/D64390
llvm-svn: 365462
James Henderson [Tue, 9 Jul 2019 10:40:50 +0000 (10:40 +0000)]
[docs][llvm-nm] Improve some wording
In particular, the --debug-syms switch really doesn't have anything to
do with debuggers, so I've updated the document accordingly.
llvm-svn: 365461
Shaurya Gupta [Tue, 9 Jul 2019 10:30:18 +0000 (10:30 +0000)]
Fixed assertion
llvm-svn: 365460
Stefan Granitz [Tue, 9 Jul 2019 10:29:07 +0000 (10:29 +0000)]
[CMake] Polish a comment
llvm-svn: 365459
Stefan Granitz [Tue, 9 Jul 2019 10:29:00 +0000 (10:29 +0000)]
[CMake] Don't initialize LLVM_INSTALL_TOOLCHAIN_ONLY in Apple-lldb-base cache
llvm-svn: 365458
Stefan Granitz [Tue, 9 Jul 2019 10:28:53 +0000 (10:28 +0000)]
[CMake] Remove old lldb_setup_framework_rpaths_in_tool()
llvm-svn: 365457
Bjorn Pettersson [Tue, 9 Jul 2019 10:27:51 +0000 (10:27 +0000)]
[SelectionDAG] Simplify some calls to getSetCCResultType. NFC
DAGTypeLegalizer and SelectionDAGLegalize has helper
functions wrapping the call to TLI.getSetCCResultType(...).
Use those helpers in more places.
llvm-svn: 365456
Bjorn Pettersson [Tue, 9 Jul 2019 10:24:50 +0000 (10:24 +0000)]
[LegalizeTypes] Fix saturation bug for smul.fix.sat
Summary:
Make sure we use SETGE instead of SETGT when checking
if the sign bit is zero at SMULFIXSAT expansion.
The faulty expansion occured when doing "expand" of
SMULFIXSAT and the scale was exactly matching the
size of the smaller type. For example doing
i64 Z = SMULFIXSAT X, Y, 32
and expanding X/Y/Z into using two i32 values.
The problem was that we sometimes did not saturate
to min when overflowing.
Here is an example using Q3.4 numbers:
Consider that we are multiplying X and Y.
X = 0x80 (-8.0 as Q3.4)
Y = 0x20 (2.0 as Q3.4)
To avoid loss of precision we do a widening
multiplication, getting a 16 bit result
Z = 0xF000 (-16.0 as Q7.8)
To detect negative overflow we should check if
the five most significant bits in Z are less than -1.
Assume that we name the 4 most significant bits
as HH and the next 4 bits as HL. Then we can do the
check by examining if
(HH < -1) or (HH == -1 && "sign bit in HL is zero").
The fault was that we have been doing the check as
(HH < -1) or (HH == -1 && HL > 0)
instead of
(HH < -1) or (HH == -1 && HL >= 0).
In our example HH is -1 and HL is 0, so the old
code did not trigger saturation and simply truncated
the result to 0x00 (0.0). With the bugfix we instead
detect that we should saturate to min, and the result
will be set to 0x80 (-8.0).
Reviewers: leonardchan, bevinh
Reviewed By: leonardchan
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64331
llvm-svn: 365455
Simon Pilgrim [Tue, 9 Jul 2019 10:12:37 +0000 (10:12 +0000)]
Retire VS2015 Support
As proposed here: https://lists.llvm.org/pipermail/llvm-dev/2019-June/133147.html
This patch raises the minimum supported version to build LLVM/Clang to Visual Studio 2017.
Differential Revision: https://reviews.llvm.org/D64326
llvm-svn: 365454
Shaurya Gupta [Tue, 9 Jul 2019 10:12:26 +0000 (10:12 +0000)]
dummy variable extraction on a function scope
Summary:
- Added extraction to a dummy variable
- using auto for the dummy variable type for now
- Works on a function scope
- Adding braces to create a compound statement not supported yet
- added unit tests
Reviewers: sammccall, kadircet
Subscribers: mgorny, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63773
llvm-svn: 365453
Simon Pilgrim [Tue, 9 Jul 2019 10:10:48 +0000 (10:10 +0000)]
Retire VS2015 Support
As proposed here: https://lists.llvm.org/pipermail/llvm-dev/2019-June/133147.html
This patch raises the minimum supported version to build LLVM/Clang to Visual Studio 2017.
Differential Revision: https://reviews.llvm.org/D64326
llvm-svn: 365452
James Henderson [Tue, 9 Jul 2019 10:03:12 +0000 (10:03 +0000)]
[docs][llvm-dwarfdump] Make some option descriptions clearer and more precise
Some of the wording in the doc (taken largely from the help text), was a
little imprecise in some cases, so this patch makes it a little more
precise.
Reviewed by: JDevlieghere, probinson
Differential Revision: https://reviews.llvm.org/D64332
llvm-svn: 365451
Haojian Wu [Tue, 9 Jul 2019 09:57:45 +0000 (09:57 +0000)]
[llvm-profdata] Don't make the output overwrite the input file.
Some file systems may not allow this behavior, the test fails on our internal
system ("Permission denied").
llvm-svn: 365450
Guillaume Chatelet [Tue, 9 Jul 2019 09:53:36 +0000 (09:53 +0000)]
Fixing @llvm.memcpy not honoring volatile.
This is explicitly not addressing target-specific code, or calls to memcpy.
Summary: https://bugs.llvm.org/show_bug.cgi?id=42254
Reviewers: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63215
llvm-svn: 365449
Jeremy Morse [Tue, 9 Jul 2019 09:38:03 +0000 (09:38 +0000)]
Revert r364515 and r364524
Jordan reports on llvm-commits a performance regression with r364515,
backing the patch out while it's investigated.
llvm-svn: 365448
Kai Luo [Tue, 9 Jul 2019 09:12:17 +0000 (09:12 +0000)]
[NFC][PowerPC] Added a test to show current codegen of MachinePRE
llvm-svn: 365447
Sylvestre Ledru [Tue, 9 Jul 2019 08:50:17 +0000 (08:50 +0000)]
Remove trailing whitespaces in the Language Extensions doc
llvm-svn: 365446
Sylvestre Ledru [Tue, 9 Jul 2019 08:45:55 +0000 (08:45 +0000)]
Add AlignConsecutiveMacros to the clang release notes
llvm-svn: 365445
Djordje Todorovic [Tue, 9 Jul 2019 08:36:34 +0000 (08:36 +0000)]
Reland "[LiveDebugValues] Emit the debug entry values"
Emit replacements for clobbered parameters location if the parameter
has unmodified value throughout the funciton. This is basic scenario
where we can use the debug entry values.
([12/13] Introduce the debug entry values.)
Co-authored-by: Ananth Sowda <asowda@cisco.com>
Co-authored-by: Nikola Prica <nikola.prica@rt-rk.com>
Co-authored-by: Ivan Baev <ibaev@cisco.com>
Differential Revision: https://reviews.llvm.org/D58042
llvm-svn: 365444
Fangrui Song [Tue, 9 Jul 2019 07:12:58 +0000 (07:12 +0000)]
[ELF] Assert sizeof(SymbolUnion) <= 80
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D64077
llvm-svn: 365443
Fangrui Song [Tue, 9 Jul 2019 06:10:21 +0000 (06:10 +0000)]
[ELF][test] Rename tail-merge-string-align2.s to merge-string-align2.s
This test was added by D64200/r365139 to check we don't merge
SHF_MERGE|SHF_STRINGS sections with different alignments (that wastes
space and can make MergeTailAlignment::Builder out of sync).
It has nothing to do with tail merge (-O2), so rename it.
llvm-svn: 365442
Serguei Katkov [Tue, 9 Jul 2019 06:07:25 +0000 (06:07 +0000)]
[Loop Peeling] Add support for peeling of loops with multiple exits
This patch modifies the loop peeling transformation so that
it does not expect that there is only one loop exit from latch.
It modifies only transformation. Update of branch weights remains
only for exit from latch.
The motivation is that in follow-up patch I plan to enable loop peeling for
loops with multiple exits but only if other exits then from latch one goes to
block with call to deopt.
For now this patch is NFC.
Reviewers: reames, mkuper, iajbar, fhahn
Reviewed By: reames, fhahn
Subscribers: zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D63921
llvm-svn: 365441
Yevgeny Rouban [Tue, 9 Jul 2019 05:07:28 +0000 (05:07 +0000)]
Prepare for making SwitchInstProfUpdateWrapper strict
This patch removes the test part that relates to the non-strict
behavior of SwitchInstProfUpdateWrapper and changes
the assertion to llvm_unreachable() to allow the check in
release builds.
This patch prepares SwitchInstProfUpdateWrapper to become
strict with one line change. That is need to revert it easily
if any failure will arise.
llvm-svn: 365439
Yonghong Song [Tue, 9 Jul 2019 04:21:50 +0000 (04:21 +0000)]
[BPF] Preserve debuginfo array/union/struct type/access index
For background of BPF CO-RE project, please refer to
http://vger.kernel.org/bpfconf2019.html
In summary, BPF CO-RE intends to compile bpf programs
adjustable on struct/union layout change so the same
program can run on multiple kernels with adjustment
before loading based on native kernel structures.
In order to do this, we need keep track of GEP(getelementptr)
instruction base and result debuginfo types, so we
can adjust on the host based on kernel BTF info.
Capturing such information as an IR optimization is hard
as various optimization may have tweaked GEP and also
union is replaced by structure it is impossible to track
fieldindex for union member accesses.
Three intrinsic functions, preserve_{array,union,struct}_access_index,
are introducted.
addr = preserve_array_access_index(base, index, dimension)
addr = preserve_union_access_index(base, di_index)
addr = preserve_struct_access_index(base, gep_index, di_index)
here,
base: the base pointer for the array/union/struct access.
index: the last access index for array, the same for IR/DebugInfo layout.
dimension: the array dimension.
gep_index: the access index based on IR layout.
di_index: the access index based on user/debuginfo types.
If using these intrinsics blindly, i.e., transforming all GEPs
to these intrinsics and later on reducing them to GEPs, we have
seen up to 7% more instructions generated. To avoid such an overhead,
a clang builtin is proposed:
base = __builtin_preserve_access_index(base)
such that user wraps to-be-relocated GEPs in this builtin
and preserve_*_access_index intrinsics only apply to
those GEPs. Such a buyin will prevent performance degradation
if people do not use CO-RE, even for programs which use
bpf_probe_read().
For example, for the following example,
$ cat test.c
struct sk_buff {
int i;
int b1:1;
int b2:2;
union {
struct {
int o1;
int o2;
} o;
struct {
char flags;
char dev_id;
} dev;
int netid;
} u[10];
};
static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr)
= (void *) 4;
#define _(x) (__builtin_preserve_access_index(x))
int bpf_prog(struct sk_buff *ctx) {
char dev_id;
bpf_probe_read(&dev_id, sizeof(char), _(&ctx->u[5].dev.dev_id));
return dev_id;
}
$ clang -target bpf -O2 -g -emit-llvm -S -mllvm -print-before-all \
test.c >& log
The generated IR looks like below:
...
define dso_local i32 @bpf_prog(%struct.sk_buff*) #0 !dbg !15 {
%2 = alloca %struct.sk_buff*, align 8
%3 = alloca i8, align 1
store %struct.sk_buff* %0, %struct.sk_buff** %2, align 8, !tbaa !45
call void @llvm.dbg.declare(metadata %struct.sk_buff** %2, metadata !43, metadata !DIExpression()), !dbg !49
call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #4, !dbg !50
call void @llvm.dbg.declare(metadata i8* %3, metadata !44, metadata !DIExpression()), !dbg !51
%4 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** @bpf_probe_read, align 8, !dbg !52, !tbaa !45
%5 = load %struct.sk_buff*, %struct.sk_buff** %2, align 8, !dbg !53, !tbaa !45
%6 = call [10 x %union.anon]* @llvm.preserve.struct.access.index.p0a10s_union.anons.p0s_struct.sk_buffs(
%struct.sk_buff* %5, i32 2, i32 3), !dbg !53, !llvm.preserve.access.index !19
%7 = call %union.anon* @llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons(
[10 x %union.anon]* %6, i32 1, i32 5), !dbg !53
%8 = call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(
%union.anon* %7, i32 1), !dbg !53, !llvm.preserve.access.index !26
%9 = bitcast %union.anon* %8 to %struct.anon.0*, !dbg !53
%10 = call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s(
%struct.anon.0* %9, i32 1, i32 1), !dbg !53, !llvm.preserve.access.index !34
%11 = call i32 %4(i8* %3, i32 1, i8* %10), !dbg !52
%12 = load i8, i8* %3, align 1, !dbg !54, !tbaa !55
%13 = sext i8 %12 to i32, !dbg !54
call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4, !dbg !56
ret i32 %13, !dbg !57
}
!19 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "sk_buff", file: !3, line: 1, size: 704, elements: !20)
!26 = distinct !DICompositeType(tag: DW_TAG_union_type, scope: !19, file: !3, line: 5, size: 64, elements: !27)
!34 = distinct !DICompositeType(tag: DW_TAG_structure_type, scope: !26, file: !3, line: 10, size: 16, elements: !35)
Note that @llvm.preserve.{struct,union}.access.index calls have metadata llvm.preserve.access.index
attached to instructions to provide struct/union debuginfo type information.
For &ctx->u[5].dev.dev_id,
. The "%6 = ..." represents struct member "u" with index 2 for IR layout and index 3 for DI layout.
. The "%7 = ..." represents array subscript "5".
. The "%8 = ..." represents union member "dev" with index 1 for DI layout.
. The "%10 = ..." represents struct member "dev_id" with index 1 for both IR and DI layout.
Basically, traversing the use-def chain recursively for the 3rd argument of bpf_probe_read() and
examining all preserve_*_access_index calls, the debuginfo struct/union/array access index
can be achieved.
The intrinsics also contain enough information to regenerate codes for IR layout.
For array and structure intrinsics, the proper GEP can be constructed.
For union intrinsics, replacing all uses of "addr" with "base" should be enough.
Signed-off-by: Yonghong Song <yhs@fb.com>
Differential Revision: https://reviews.llvm.org/D61809
llvm-svn: 365438
Serguei Katkov [Tue, 9 Jul 2019 04:20:43 +0000 (04:20 +0000)]
[LoopInfo] Update getExitEdges to accept vector of pairs for non const BasicBlock
D63921 requires getExitEdges fills a vector of Edge pairs where
BasicBlocks are not constant.
The rest Loop API mostly returns non-const BasicBlocks, so to be more consistent with
other Loop API getExitEdges is modified to return non-const BasicBlocks as well.
This is an alternative solution to D64060.
Reviewers: reames, fhahn
Reviewed By: reames, fhahn
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D64309
llvm-svn: 365437
Yonghong Song [Tue, 9 Jul 2019 04:15:12 +0000 (04:15 +0000)]
Revert "[BPF] Preserve debuginfo array/union/struct type/access index"
This reverts commit r365435.
Forgot adding the Differential Revision link. Will add to the
commit message and resubmit.
llvm-svn: 365436
Yonghong Song [Tue, 9 Jul 2019 04:04:21 +0000 (04:04 +0000)]
[BPF] Preserve debuginfo array/union/struct type/access index
For background of BPF CO-RE project, please refer to
http://vger.kernel.org/bpfconf2019.html
In summary, BPF CO-RE intends to compile bpf programs
adjustable on struct/union layout change so the same
program can run on multiple kernels with adjustment
before loading based on native kernel structures.
In order to do this, we need keep track of GEP(getelementptr)
instruction base and result debuginfo types, so we
can adjust on the host based on kernel BTF info.
Capturing such information as an IR optimization is hard
as various optimization may have tweaked GEP and also
union is replaced by structure it is impossible to track
fieldindex for union member accesses.
Three intrinsic functions, preserve_{array,union,struct}_access_index,
are introducted.
addr = preserve_array_access_index(base, index, dimension)
addr = preserve_union_access_index(base, di_index)
addr = preserve_struct_access_index(base, gep_index, di_index)
here,
base: the base pointer for the array/union/struct access.
index: the last access index for array, the same for IR/DebugInfo layout.
dimension: the array dimension.
gep_index: the access index based on IR layout.
di_index: the access index based on user/debuginfo types.
If using these intrinsics blindly, i.e., transforming all GEPs
to these intrinsics and later on reducing them to GEPs, we have
seen up to 7% more instructions generated. To avoid such an overhead,
a clang builtin is proposed:
base = __builtin_preserve_access_index(base)
such that user wraps to-be-relocated GEPs in this builtin
and preserve_*_access_index intrinsics only apply to
those GEPs. Such a buyin will prevent performance degradation
if people do not use CO-RE, even for programs which use
bpf_probe_read().
For example, for the following example,
$ cat test.c
struct sk_buff {
int i;
int b1:1;
int b2:2;
union {
struct {
int o1;
int o2;
} o;
struct {
char flags;
char dev_id;
} dev;
int netid;
} u[10];
};
static int (*bpf_probe_read)(void *dst, int size, const void *unsafe_ptr)
= (void *) 4;
#define _(x) (__builtin_preserve_access_index(x))
int bpf_prog(struct sk_buff *ctx) {
char dev_id;
bpf_probe_read(&dev_id, sizeof(char), _(&ctx->u[5].dev.dev_id));
return dev_id;
}
$ clang -target bpf -O2 -g -emit-llvm -S -mllvm -print-before-all \
test.c >& log
The generated IR looks like below:
...
define dso_local i32 @bpf_prog(%struct.sk_buff*) #0 !dbg !15 {
%2 = alloca %struct.sk_buff*, align 8
%3 = alloca i8, align 1
store %struct.sk_buff* %0, %struct.sk_buff** %2, align 8, !tbaa !45
call void @llvm.dbg.declare(metadata %struct.sk_buff** %2, metadata !43, metadata !DIExpression()), !dbg !49
call void @llvm.lifetime.start.p0i8(i64 1, i8* %3) #4, !dbg !50
call void @llvm.dbg.declare(metadata i8* %3, metadata !44, metadata !DIExpression()), !dbg !51
%4 = load i32 (i8*, i32, i8*)*, i32 (i8*, i32, i8*)** @bpf_probe_read, align 8, !dbg !52, !tbaa !45
%5 = load %struct.sk_buff*, %struct.sk_buff** %2, align 8, !dbg !53, !tbaa !45
%6 = call [10 x %union.anon]* @llvm.preserve.struct.access.index.p0a10s_union.anons.p0s_struct.sk_buffs(
%struct.sk_buff* %5, i32 2, i32 3), !dbg !53, !llvm.preserve.access.index !19
%7 = call %union.anon* @llvm.preserve.array.access.index.p0s_union.anons.p0a10s_union.anons(
[10 x %union.anon]* %6, i32 1, i32 5), !dbg !53
%8 = call %union.anon* @llvm.preserve.union.access.index.p0s_union.anons.p0s_union.anons(
%union.anon* %7, i32 1), !dbg !53, !llvm.preserve.access.index !26
%9 = bitcast %union.anon* %8 to %struct.anon.0*, !dbg !53
%10 = call i8* @llvm.preserve.struct.access.index.p0i8.p0s_struct.anon.0s(
%struct.anon.0* %9, i32 1, i32 1), !dbg !53, !llvm.preserve.access.index !34
%11 = call i32 %4(i8* %3, i32 1, i8* %10), !dbg !52
%12 = load i8, i8* %3, align 1, !dbg !54, !tbaa !55
%13 = sext i8 %12 to i32, !dbg !54
call void @llvm.lifetime.end.p0i8(i64 1, i8* %3) #4, !dbg !56
ret i32 %13, !dbg !57
}
!19 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "sk_buff", file: !3, line: 1, size: 704, elements: !20)
!26 = distinct !DICompositeType(tag: DW_TAG_union_type, scope: !19, file: !3, line: 5, size: 64, elements: !27)
!34 = distinct !DICompositeType(tag: DW_TAG_structure_type, scope: !26, file: !3, line: 10, size: 16, elements: !35)
Note that @llvm.preserve.{struct,union}.access.index calls have metadata llvm.preserve.access.index
attached to instructions to provide struct/union debuginfo type information.
For &ctx->u[5].dev.dev_id,
. The "%6 = ..." represents struct member "u" with index 2 for IR layout and index 3 for DI layout.
. The "%7 = ..." represents array subscript "5".
. The "%8 = ..." represents union member "dev" with index 1 for DI layout.
. The "%10 = ..." represents struct member "dev_id" with index 1 for both IR and DI layout.
Basically, traversing the use-def chain recursively for the 3rd argument of bpf_probe_read() and
examining all preserve_*_access_index calls, the debuginfo struct/union/array access index
can be achieved.
The intrinsics also contain enough information to regenerate codes for IR layout.
For array and structure intrinsics, the proper GEP can be constructed.
For union intrinsics, replacing all uses of "addr" with "base" should be enough.
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 365435
Denis Bakhvalov [Tue, 9 Jul 2019 03:56:44 +0000 (03:56 +0000)]
[LLD] NFC: Fixed GCC warning in ELF/Arch/RISCV.cpp
GCC emits warning on this line:
error: enumeral and non-enumeral type in conditional
expression [-Werror=extra]
Change-Id: I04969cc32e27e310968b88ebaa4e1c4894528d74
llvm-svn: 365434
Kai Luo [Tue, 9 Jul 2019 03:33:04 +0000 (03:33 +0000)]
[NFC][PowerPC] Fixed unused variable 'NewInstr'.
llvm-svn: 365433
Stanislav Mekhanoshin [Tue, 9 Jul 2019 03:20:33 +0000 (03:20 +0000)]
[AMDGPU] Added td definitions for HW regs
Infrastructure work for future commit. NFC.
Differential Revision: https://reviews.llvm.org/D64370
llvm-svn: 365432
Stanislav Mekhanoshin [Tue, 9 Jul 2019 03:10:18 +0000 (03:10 +0000)]
[AMDGPU] Always use s_memtime for readcyclecounter
Differential Revision: https://reviews.llvm.org/D64369
llvm-svn: 365431
Kai Luo [Tue, 9 Jul 2019 02:55:08 +0000 (02:55 +0000)]
[PowerPC][Peephole] Combine extsw and sldi after instruction selection
Summary:
`extsw` and `sldi` are supposed to be combined if they are in the same
BB in instruction selection phase. This patch handles the case where
extsw and sldi are not in the same BB.
Differential Revision: https://reviews.llvm.org/D63806
llvm-svn: 365430
Chen Zheng [Tue, 9 Jul 2019 02:48:30 +0000 (02:48 +0000)]
[PowerPC][NFC] remove redundant function isVFReg().
llvm-svn: 365429
Jinsong Ji [Tue, 9 Jul 2019 02:27:35 +0000 (02:27 +0000)]
[MachinePipeliner] Fix Phi refers to Phi in same stage in 1st epilogue
Summary:
This is exposed by functional testing on PowerPC.
In some pipelined loops, Phi refer to phi did not get value defined by
the Phi, hence getting wrong value later.
As the comment mentioned, we should "use the value defined by the Phi,
unless we're generating the firstepilog and the Phi refers to a Phi
in a different stage.", so Phi refering to same stage Phi should use
the value defined by the Phi here.
Reviewers: bcahoon, hfinkel
Reviewed By: hfinkel
Subscribers: MaskRay, wuzish, nemanjai, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64035
llvm-svn: 365428
Jinsong Ji [Tue, 9 Jul 2019 02:27:29 +0000 (02:27 +0000)]
[PowerPC][MachinePipeliner][NFC] Add a testcase for Phi bug.
llvm-svn: 365427
Heejin Ahn [Tue, 9 Jul 2019 02:10:33 +0000 (02:10 +0000)]
[WebAssembly] Make sret parameter work with AddMissingPrototypes
Summary:
Even with functions with `no-prototype` attribute, there can be an
argument `sret` (structure return) attribute, which is an optimization
when a function return type is a struct. Fixes PR42420.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64318
llvm-svn: 365426
Philip Reames [Tue, 9 Jul 2019 02:03:31 +0000 (02:03 +0000)]
[LoopPred] Stylistic improvement to recently added NE/EQ normalization [NFC]
llvm-svn: 365425
Matthew G McGovern [Tue, 9 Jul 2019 01:55:11 +0000 (01:55 +0000)]
[sanitizers][windows] FIX: Rtl-Heap Interception and tests
- Adds interceptors for Rtl[Allocate|Free|Size|ReAllocate]Heap
- Adds unit tests for the new interceptors and expands HeapAlloc
tests to demonstrate new functionality.
Reviewed as D62927
- adds fixes for ~win and x64 tests
> llvm-svn: 365381
llvm-svn: 365424