Simon Glass [Fri, 17 Dec 2021 03:59:21 +0000 (20:59 -0700)]
fdt: Make OF_BOARD a bool option
This should not be a separate option from OF_SEPARATE. It is a run-time
option to override the devicetree, even if present.
Move the option out of the choice.
Disable BINMAN_FDT for a few boards which don't actually use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:20 +0000 (20:59 -0700)]
arm: highbank: Add devicetree files
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:19 +0000 (20:59 -0700)]
arm: qemu-ppce500: Add a devicetree file
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:18 +0000 (20:59 -0700)]
arm: bcm7xxx: Add a devicetree file
Add an empty devicetree file for these boards. It seems to be possible to
obtain a real one from another bootloader called 'bolt' but I will leave
this to the maintainer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:17 +0000 (20:59 -0700)]
arm: xilinx_versal_virt: Add a devicetree file
Add an empty file to prevent build errors when building with
CONFIG_OF_SEPARATE enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:16 +0000 (20:59 -0700)]
arm: octeontx: Add an empty devicetree file
Add an empty file to prevent build errors when building with
CONFIG_OF_SEPARATE enabled.
Unfortunately there are no build instructions in the U-Boot tree to enable
a real file to be created.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:15 +0000 (20:59 -0700)]
arm: xenguest_arm64: Add a empty devicetree file
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
The real devicetree is created by the Xen project on-the-fly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:14 +0000 (20:59 -0700)]
arm: vexpress: Add a devicetree files for juno
Sync these file, obtained from Linux v5.15.
Add a note for the maintainer, and SPDX lines where they are missing.
The added lines are:
SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
Note, this matches the text in those files, but is not the same as the
GPL-2.0 of some files.
[1] https://releases.linaro.org/android/reference-lcr/juno/7.1-17.05/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Simon Glass [Fri, 17 Dec 2021 03:59:13 +0000 (20:59 -0700)]
arm: rpi: Sync rpi dts files from Linux
Sync these files, obtained from Linux v5.15.
This adds a devicetree file for rpi_4 which was not there before.
Testing shows no change so far as I can see:
- boots to U-Boot prompt on rpi0, rpi2
- boots to distro on rpi3
- boots to distro on rpi4
I am assuming that syncing with Linux is safe, but the maintainer should
know for sure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:12 +0000 (20:59 -0700)]
riscv: qemu: Split devicetree files for qemu_riscv32/64
This uses QEMU virt which creates its own devicetree.
Copy the existing empty version of this file, so splitting the existing
qemu-virt into two, since anyone actually trying to use this will need a
different devicetree for 32- and 64-bit machines.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:11 +0000 (20:59 -0700)]
arm: qemu: Add a devicetree file for qemu_arm64 virt
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:10 +0000 (20:59 -0700)]
arm: qemu: Add a devicetree file for qemu_arm
This uses QEMU virt which creates its own devicetree.
Add an empty version of this file, so that we can at least build this
board when devicetrees are required.
Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:09 +0000 (20:59 -0700)]
arm: riscv: qemu: Explain how to extract the generated dt
QEMU currently generates a devicetree for use with U-Boot. Explain how to
obtain it.
Also explain how to merge it to produce a devicetree with the U-Boot
features included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 17 Dec 2021 03:59:08 +0000 (20:59 -0700)]
arm: qemu: Mention -nographic in the docs
Without this option QEMU appears to hang. Add it to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Tue, 21 Dec 2021 13:02:28 +0000 (08:02 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- pci_mvebu: Misc improvements and cleanup (Pali)
- turris_mox: Remove extra newline after module topology (Marek)
Heinrich Schuchardt [Tue, 21 Dec 2021 08:00:44 +0000 (09:00 +0100)]
doc: remove duplicate page inclusion
doc/usage/index.rst in branch origin/next includes usage/environment twice.
Remove the duplicate entry.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Marek Behún [Thu, 11 Nov 2021 15:35:49 +0000 (16:35 +0100)]
arm: mvebu: turris_mox: Remove extra newline after module topology
Remove extra newline after module topology is printed.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 11 Nov 2021 15:35:47 +0000 (16:35 +0100)]
pci: pci_mvebu: Remove unused DECLARE_GLOBAL_DATA_PTR
The global data pointer is not used in this driver, remove it's
declaration.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 11 Nov 2021 15:35:43 +0000 (16:35 +0100)]
pci: pci_mvebu: Replace MBUS_PCI_*_SIZE by resource_size()
Use more appropriate resource_size() function when working with data in
struct resource.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 11 Nov 2021 15:35:42 +0000 (16:35 +0100)]
pci: pci_mvebu: Move setup for BAR[0] where other BARs are setup
Function mvebu_pcie_setup_wins() sets up all other BARs, so move setup of
BAR[0] to this function to have common code at one place.
In the past, commit
193a1e9f196b ("pci: pci_mvebu: set BAR0 after memory
space is set") moved setup of BAR[0] to another location, due to ath10k
not working in kernel, but the reason why was unknown, but it seems to
work now, and we think the issue then was cause by the PCIe Root Port
presenting itself as a Memory Controller and therefore U-Boot's code
have overwritten the BAR. Since the driver now ignores any write
operations to PCIe Root Port BARs, this should not be an issue anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 20 Dec 2021 22:12:04 +0000 (17:12 -0500)]
Merge tag 'v2022.01-rc4' into next
Prepare v2022.01-rc4
Tom Rini [Mon, 20 Dec 2021 16:15:15 +0000 (11:15 -0500)]
Prepare v2022.01-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Dec 2021 14:36:32 +0000 (09:36 -0500)]
Revert "image: Remove #ifdefs from select_ramdisk()"
This reverts commit
f33a2c1bd0fb371511a485cac1f182ba50db51be.
This causes a crash on some platforms as seen here:
https://lore.kernel.org/r/
f153017b-c41a-0d32-67b9-
f288e695f900@baylibre.com/
Reported-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Joakim Tjernlund [Wed, 8 Dec 2021 14:33:11 +0000 (15:33 +0100)]
fw_setenv: Unbreak fw_setenv caused by buggy MEMISLOCKED use
Commit "fw_setenv: lock the flash only if it was locked before"
checks for Locked status with uninitialized erase data.
Address by moving the test for MEMISLOCKED.
Fixes:
8a726b852502 ("fw_setenv: lock the flash only if it was locked before")
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Tom Rini [Mon, 20 Dec 2021 13:51:53 +0000 (08:51 -0500)]
Merge tag '
20211220-fixes-for-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for
20211220-fixes-for-2022.01
- mvtwsi: Swab the register address if its size is > 1
Stefan Roese [Thu, 18 Nov 2021 08:18:41 +0000 (09:18 +0100)]
i2c: mvtwsi: Swab the register address if its size is > 1
Testing on Armada XP with an EEPROM using register address with size
of 2 has shown, that the register address bytes are sent to the I2C
EEPROM in the incorrect order. This patch swabs the address bytes so
that the correct address is transferred to the I2C device.
BTW: This worked without any issues before migrating Armada XP to
DM I2C.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Samuel Holland <samuel@sholland.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Pali Rohár <pali@kernel.org>
Cc: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
Tom Rini [Sun, 19 Dec 2021 13:59:59 +0000 (08:59 -0500)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- Armada XP etc: Move to DM_I2C (Stefan)
- Some mvebu comphy + mox + fdt_support changes (Marek & Pali)
- mvebu: a38x: improve USB3 serdes configuration (Stefan Eichenberger)
- mvebu: Some maintainer updates (Pali)
- mvebu: Misc minor cleanup (Pali)
Pali Rohár [Fri, 17 Dec 2021 17:31:14 +0000 (18:31 +0100)]
arm: mvebu: Use printf for printing fatal errors
There is no point to hide/disable fatal errors via debug() macro.
Print fatal errors loudly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 17 Dec 2021 17:28:51 +0000 (18:28 +0100)]
arm: mvebu: Remove commented example code
Include file debug_uart.h already contains documentation how to use it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 16 Dec 2021 11:04:07 +0000 (12:04 +0100)]
arm: mvebu: serial: Add me as co-maintainer and author of Marvell serial drivers
There is no maintainer entry for serial_mvebu_a3700.c. Add entry with Pali
and Stefan as maintainers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 16 Dec 2021 11:04:06 +0000 (12:04 +0100)]
arm: mvebu: pci: Add me as co-maintainer and author of Marvell PCIe drivers
There is no maintainer entry for pci-aardvark.c. Add entry for
pci-aardvark.c and pci_mvebu.c with Pali and Stefan as maintainers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Eichenberger [Thu, 9 Dec 2021 10:19:34 +0000 (11:19 +0100)]
arm: mvebu: a38x: serdes: improve USB3 electrical configuration
This is a backport from Marvell U-Boot:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
commit
381d029e7a ("fix: serdes: a38x, a39x: Improve USB3 electrical
configuration")
Improves electrical USB3 receiver jitter tolerance test:
- De-Emphasize force, in functional mode the transmitter should always
have 3.5db de-emphasize, so we are forcing it.
- After forcing De-Emphasize, choose 3.5db (After forcing, default is
6dB so need to change it to 3.5dB).
- Align90 set to 0x58 - this is the sample point in the receiver, after
the clock is recovered this sampler samples at the chosen value, usually
it is supposed to be 0x60(which is the center of the eye), but sometimes
after adding jitter and ISI the center of the eye can move slightly and
the sample point is not necessarily the exact center, and after
optimization (searching the middle of the eye manually) it was seen that
the center of the eye is actually 0x58 and not 0x60.
- FFE Res and FFE Cap set to 0xE & 0xF respectively: improves this
settings is adequate according to how the USB3 spec defines the
interconnect, thus improves USB3 jitter tolerance settings.
- Change the resolution of the DFE to 0x3 which is 6mV(highest
resolution) , this avoids the DFE to saturate and cease to work.
- HPF set to 0x3 which is 5Khz high pass filter, the function of the HPF
is to filter the low frequency patterns(below 5Khz) to make sure that
the signal is not a noise, the setting before was 0x1(205Khz), and the
change came since the USB3 CP0 pattern, that is used in the USB3 jitter
tolerance testing, is similar to PRBS15, which has 2^15=32768bits which
is 32768*200ps (200ps is one Unit interval in USB3(5Gbps)) = 6.5us,
which is in frequency terms: 152Khz. since the PRBS15 is a random
pattern and can theoretically have once in a while a pattern that will
be at frequency of 152Khz, hence the previous setting (205khz HPF) can
possibly filter this pattern which can cause to an error in the
receiver, thus this change to avoid such scenarios.
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Signed-off-by: René Straub <rene.straub@netmodule.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Eichenberger [Thu, 9 Dec 2021 10:19:33 +0000 (11:19 +0100)]
arm: mvebu: a38x: serdes: fix serdes config for USB3
The electrical serdes configuration for USB3 expects an array as data
argument. For USB3 the second value is used (see data_arr_idx = USB3 =
1). However, because only one value is inside the array mv_seq_exec is
accessing an invalid element and the serdes is configured wrongly.
This wrong initialization is leading to an unreliable detection
mechanism for some USB3 devices. We were able to reproduce the issue
regularly with an LTE modem from Sierra Wireless (SM7455) where it was
not detected as USB3 device in 1/3 of all tests.
This commit fixes the issue by setting data_arr_idx to 0. This is the
same value as the original U-Boot from Marvell is using. There it is
called FIRST_CELL which is a define for 0.
See: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
commit
56f963ce4c ("fix: serdes: a38x, a39x: Fix USB3 serdes DB
initialization")
Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
Signed-off-by: René Straub <rene.straub@netmodule.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:15 +0000 (14:57 +0100)]
fdt_support: Add fdt_delete_disabled_nodes() and use in Turris MOX
Move Turris MOX specific remove_disabled_nodes() to fdt_support with
name fdt_delete_disabled_nodes(), so that others can potentially use it.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:14 +0000 (14:57 +0100)]
arm: mvebu: turris_mox: Fix unstable board topology reading
The pre-relocation board topology reading in board_fix_fdt() is
unstable: sometimes wrong data are read from the SPI bus.
This is due to wrong order of SPI bus configuration instructions: we
first need to set the pins to SPI mode, and only after that configure
the bus.
Also add a 1ms delay before enabling chip-select, so that the clock pin
is high for some time before reading the bus.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 26 Nov 2021 13:57:13 +0000 (14:57 +0100)]
phy: marvell: a3700: Convert to official DT bindings in COMPHY driver
Convert A3720 common PHY driver to official DT bindings.
This puts us closer to be able to synchronize A3720 device-trees with
those from Linux.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Marcin Wojtas <mw@semihalf.com>
Cc: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 26 Nov 2021 13:57:12 +0000 (14:57 +0100)]
arm: mvebu: turris_mox: Enable eth1 in U-Boot if a network module is present
Enable eth1 node in U-Boot's device-tree if a network module (SFP, Topaz
or Peridot) is detected.
This is required for proper detection of eth1 comphy in a3700 comphy
driver by the following patches.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:11 +0000 (14:57 +0100)]
arm: mvebu: turris_mox: Find DT nodes by compatible or alias instead of path
It is better to find DT nodes by compatible strings or aliases instead
of path.
There were issues with Linux some DTBs having different names of some
nodes, e.g.
internal-regs
instead of
internal-regs@
d0000000
This should be a generic fix for such issues.
Also since fdt_support now contains needed functions, we can drop our
own implementations.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:10 +0000 (14:57 +0100)]
fdt_support: Add some useful functions
Add functions
fdt_node_offset_by_pathf(),
fdt_create_phandle_by_pathf(),
fdt_set_status_by_pathf()
to get node offset, get/create node phandle and set status for node
given by path/alias formatted with sprintf.
Add functions
fdt_create_phandle_by_compatible(),
fdt_set_status_by_compatible()
to get/create node phandle and set status for first node given by
compatible.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:09 +0000 (14:57 +0100)]
fdt_support: Fix comment for fdt_create_phandle()
This function does not necessarily create a new phandle. If a phandle
exists, no new phandle is created.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 26 Nov 2021 13:57:08 +0000 (14:57 +0100)]
fdt_support: Remove FDT_STATUS_FAIL_ERROR_CODE
Since no one uses this feature and I am not aware of any parsers of this
in Linux, remove it.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 26 Nov 2021 13:57:07 +0000 (14:57 +0100)]
fdt_support: Remove fdt_alloc_phandle() in favor of fdt_generate_phandle()
Commit
f0921f5098d ("fdt: Sync up to the latest libfdt") introduced
fdt_generate_phandle() in libfdt, making fdt_alloc_phandle() obsolete in
fdt_support.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: "hui.song" <hui.song_1@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 26 Nov 2021 13:57:06 +0000 (14:57 +0100)]
treewide: Use fdt_create_phandle() where appropriate
Replace fdt_alloc_phandle() with subsequent fdt_set_phandle() by
fdt_create_phandle().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
Pali Rohár [Fri, 26 Nov 2021 13:57:05 +0000 (14:57 +0100)]
include/linux/byteorder: Fix compilation of __constant_cpu_to_be32()
The macro __constant_cpu_to_be32() uses ___constant_swab32(), which for
some reason is not defined and causes the following error during
compilation:
include/linux/byteorder/little_endian.h:28:52: warning:
implicit declaration of function ‘___constant_swab32’;
did you mean ‘__builtin_bswap32’? [-Wimplicit-function-declaration]
#define __constant_cpu_to_be32(x) ((__force __be32)___constant_swab32((x)))
Declare all ___constant_swabXX() macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:39 +0000 (09:19 +0100)]
arm: mvebu: armada-xp-theadorable.dts: Add I2C DT nodes
Now with DM I2C support enabled we need to describe the I2C busses and
devices in the DT.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:38 +0000 (09:19 +0100)]
arm: mvebu: axp: ddr: Switch to using DM I2C API
No functional change intended. This patch switches from the legacy I2C
API to the DM I2C API, so that this code can be used with DM I2C
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:37 +0000 (09:19 +0100)]
arm: mvebu: axp: Remove unreferenced ddr3_get_eprom_fabric() function
This function is not referenced in mainline U-Boot. Let's remove now.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:36 +0000 (09:19 +0100)]
arm: mvebu: axp/high_speed_env_lib: Switch to DM_I2C API
After all Armada XP boards have been switched over from legacy I2C
support to DM I2C, let's now also convert this serdes code to use
the DM I2C API.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:35 +0000 (09:19 +0100)]
arm: mvebu: theadorable: Switch to using DM I2C API
No functional change intended. This patch switches from the legacy I2C
API to the DM I2C API, so that this code can be used with DM I2C
enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:34 +0000 (09:19 +0100)]
arm: mvebu: maxbcm_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:33 +0000 (09:19 +0100)]
arm: mvebu: ds414_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
Stefan Roese [Thu, 18 Nov 2021 08:19:32 +0000 (09:19 +0100)]
arm: mvebu: db-mv784mp-gp_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 18 Nov 2021 08:19:31 +0000 (09:19 +0100)]
arm: mvebu: theadorable_debug_defconfig: Enable DM_I2C
Move to the DM I2C version, so that this board will not get dropped from
mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Sat, 18 Dec 2021 19:39:21 +0000 (14:39 -0500)]
Merge tag 'efi-2022-01-rc4-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc4-3
Documentation:
* add Calxeda Highbank/Midway board documentation
Bug fixes:
* call part_init() in blk_get_device_by_str() only for MMC
* fix an 'undefined' error in some driver model macros
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:36 +0000 (15:49 +0900)]
dm: fix an 'undefined' error in some macros
Due to a non-existing parameter name in macro's, use of those macro's will
cause a compiler error of "undefined reference".
Unfortunately, dm test doesn't fail because a wrong name ("&dev", hence it
is accidentally a valid name in the context of a caller site) is passed on.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes:
f262d4ca4b2b ("dm: core: Add a way to read platdata for all
child devices")
Fixes:
903e83ee8464 ("dm: core: Add a way to iterate through children,
probing each")
Reviewed-by: Simon Glass <sjg@chromium.org>
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:29 +0000 (15:49 +0900)]
blk: add a helper function, blk_probe_or_unbind()
This function will be commonly used in block device drivers
in the succeeding patches.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
AKASHI Takahiro [Fri, 10 Dec 2021 06:49:28 +0000 (15:49 +0900)]
part: call part_init() in blk_get_device_by_str() only for MMC
In blk_get_device_by_str(), the comment says: "Updates the partition table
for the specified hw partition."
Since hw partition is supported only on MMC, it makes no sense to do so
for other devices.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Tue, 14 Dec 2021 17:47:00 +0000 (17:47 +0000)]
doc: board: Add Calxeda Highbank/Midway documentation
The Calxeda servers are using U-Boot as the primary bootloader, which
was shipped as part of a firmware upgrade package.
Even though the machines are considered legacy at this point, the port
still works, so deserves some documentation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 17 Dec 2021 23:18:15 +0000 (18:18 -0500)]
Merge tag 'dm-pull-17dec21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next
binman support for ATF FIP
fdtgrep fixes for empty devicetree
Simon Glass [Wed, 8 Dec 2021 16:55:35 +0000 (09:55 -0700)]
fdtgrep: Handle an empty output tree
In strange cases it is possible for fdtgrep to find nothing to output.
Typically this means that the resulting SPL device tree is not going to
allow anything to boot, but at present the tree is actually invalid,
since it only has an END tag in the struct region.
The FDT spec requires at least a root node. So add a special case to
include at least this, if the FDT_REG_SUPERNODES flag is set.
This ensures that grepping an empty tree still produces a valid tree.
Also add comments to the enum since it is not completely obvious from
the names now.
The typical symptom of this problem is a message from binman:
pylibfdt error -11: FDT_ERR_BADSTRUCTURE
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 8 Dec 2021 16:55:34 +0000 (09:55 -0700)]
fdtgrep: Correct alignment of struct section
When outputting a devicetree we should not align the struct section to a
16-byte boundary. The normal position is fine, which is 8-byte aligned.
This avoids leaving adding 8 extra zero bytes in the output tree in the
case where the reserved section is empty (i.e has 16 zero bytes).
Signed-off-by: Simon Glass <sjg@chromium.org>
Ivan Mikhaylov [Thu, 9 Dec 2021 16:10:53 +0000 (16:10 +0000)]
iot2050: binman: add missing-msg for blobs
Add the 'missing-msg' for blobs for more detailed output on missing system
firmware and SEBoot blobs.
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fix minor typos:
Signed-off-by: Simon Glass <sjg@chromium.org>
Andy Shevchenko [Mon, 6 Dec 2021 11:44:13 +0000 (14:44 +0300)]
binman: Use less hard coded magic when inserting new PATH
Instead of joining hard coded '..' to the run-time path of the executable,
take just a dirname out of it. Besides that, use $(srctree) where it makes
sense.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Mon, 6 Dec 2021 11:44:12 +0000 (14:44 +0300)]
binman: Do not pollute source tree when build with `make O=...`
Importing libraries in Python caches the bytecode by default.
Since we run scripts in source tree it ignores the current directory
settings, which is $(srctree), and creates cache just in the middle
of the source tree. Move cache to the current directory.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Simon Glass [Wed, 24 Nov 2021 16:26:42 +0000 (09:26 -0700)]
Convert CONFIG_PHYSMEM to Kconfig
This converts the following to Kconfig:
CONFIG_PHYSMEM
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Sean Anderson <seanga2@gmail.com>
Simon Glass [Wed, 24 Nov 2021 04:08:59 +0000 (21:08 -0700)]
binman: Add support for ATF FIP
This format is used in firmware binaries so we may as well supported it.
With this patch binman supports creating, listing and updating FIPs, as
well as extracting files from one, provided that an FDTMAP is also present
somewhere in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 24 Nov 2021 04:08:58 +0000 (21:08 -0700)]
binman: Add a utility module for ATF FIP
Add support for this format which is used by ARM Trusted Firmware to find
firmware binaries to load.
FIP is like a simpler version of FMAP but uses a UUID instead of a name,
for each entry.
It supports reading a FIP, writing a FIP and parsing the ATF source code
to get a list of supported UUIDs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 17 Dec 2021 12:25:34 +0000 (07:25 -0500)]
Merge tag 'u-boot-at91-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.04 cycle:
This feature set includes : support for the new QSPI hardware on
sama7g5, small fixes on sam9x60 and sama7g5, some additions of commands
and PIO controller on sam9x60/sam9x60ek.
Tom Rini [Fri, 17 Dec 2021 12:24:56 +0000 (07:24 -0500)]
Merge commit '
4720b83d2c711062cfb55f03591b8f12c897d7cb' of https://github.com/tienfong/uboot_mainline
Tien Fong Chee [Sun, 7 Nov 2021 15:08:56 +0000 (23:08 +0800)]
arm: socfpga: arria10: Enable double peripheral RBF configuration
Double peripheral RBF configuration are needed on some devices or boards
to stabilize the IO configuration system.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Sun, 7 Nov 2021 15:08:55 +0000 (23:08 +0800)]
arm: socfpga: arria10: Reset MPFE NoC after program periph / combined RBF
This patch triggers warm reset to recover the MPFE NoC from corruption
due to high frequency transient clock output from HPS EMIF IOPLL at
VCO startup after peripheral RBF is programmed.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Sun, 7 Nov 2021 15:08:54 +0000 (23:08 +0800)]
arm: socfpga: arria10: Setting image magic value to romcode initswstate reg
The romcode_initswstate register need to be set with FSBL_IMAGE_IS_VALID
value if the current FSBL image is found valid, otherwise BootROM will
look for next subsequent valid FSBL image when warm reset is triggered.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Hari Prasath [Mon, 13 Dec 2021 05:00:03 +0000 (10:30 +0530)]
ARM: mach-at91: Add compile time option to choose proper timer
New SoC's of AT91 family with ARM-9 core includes a regular timer and a 64-bit
timer.This patch adds a compile time option to the Makefile such that the old
timer driver is chosen and compiled as default if none of timer configuration
options are explicitly defined in the board configs.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Tom Rini [Wed, 15 Dec 2021 19:51:44 +0000 (14:51 -0500)]
Merge tag 'clk-2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-clk
Clock patches for v2022.01-rc3
This adds better logging support for many CCF drivers, and clarifies some
documentation regarding clk_get_rate.
Patrick Delaunay [Fri, 19 Nov 2021 14:12:07 +0000 (15:12 +0100)]
clk: define LOG_CATEGORY for generic and ccf clocks
Define LOG_CATEGORY to allow filtering with log command
for generic clock and CCF clocks.
This patch also change existing printf, debug and pr_ macro
to log_ or dev_ macro.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Patrick Delaunay [Fri, 19 Nov 2021 14:12:06 +0000 (15:12 +0100)]
clk: cosmetic: reorder include files
Reorder include files in the U-Boot expected order:
the common.h header should always be first,
followed by other headers in order,
then headers with directories,
then local files.
It is a preliminary step for next patch.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Giulio Benetti [Sun, 14 Feb 2021 02:17:18 +0000 (03:17 +0100)]
clk: fix clk_get_rate() documentation
Improve clk_get_rate() @return documentation that otherwise is a bit
ambiguous. At the moment I expect to return 0 as error since the return
type is 'ulong', instead the function really returns negative value in
case the corresponding function pointer is null and returns 0 if the clock
is invalid.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tom Rini [Wed, 15 Dec 2021 16:49:30 +0000 (11:49 -0500)]
Merge tag 'rpi-next-2022.01' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- enable RPi Zero 2 W
- fix MMC numbering issue
- Update link to documentation
Tom Rini [Wed, 15 Dec 2021 12:14:20 +0000 (07:14 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Marvell/PCI: Fix size of the configuration cache and disallow ROM BAR
setting in pci_mvebu.c & pci-aardvark.c (Pali & Marek)
Pali Rohár [Thu, 11 Nov 2021 15:35:48 +0000 (16:35 +0100)]
arm: a37xx: pci: Do not allow setting ROM BAR on PCI Bridge
PCI Bridge which represents aardvark PCIe Root Port has Expansion ROM Base
Address register at offset 0x30 but its meaning is different than PCI's
Expansion ROM BAR register. Only address format of register is same.
In reality, this device does not have any configurable PCI BARs. So ensure
that write operation into BARs (including Expansion ROM BAR) is noop and
registers always contain zero address which indicates that bars are
unsupported.
Fixes:
cb056005dc67 ("arm: a37xx: pci: Add support for accessing PCI Bridge on root bus")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 11 Nov 2021 15:35:45 +0000 (16:35 +0100)]
pci: pci_mvebu: Do not allow setting ROM BAR on PCI Bridge
The PCI Bridge which represents mvebu PCIe Root Port has Expansion ROM
Base Address register at offset 0x30 but its meaning is different that
of PCI's Expansion ROM BAR register, although the address format of
the register is the same.
In reality, this device does not have any configurable PCI BARs. So
ensure that write operation into BARs (including Expansion ROM BAR) is a
noop and registers always contain zero address which indicates that BARs
are unsupported.
Fixes:
a7b61ab58d5d ("pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Thu, 11 Nov 2021 15:35:44 +0000 (16:35 +0100)]
pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 13 Dec 2021 15:20:25 +0000 (10:20 -0500)]
Merge tag 'u-boot-stm32-
20211213' of https://source.denx.de/u-boot/custodians/u-boot-stm
- enable KSZ90x1 PHY driver on DHCOR
- DHSOM boards:
- increase USB power-good delay
- add update_sf script to install U-Boot into SF
- increase PHY auto-negotiation timeout to 20 seconds
- fix SoM and board coding strap GPIO handling
# gpg verification failed.
Marek Vasut [Sat, 13 Nov 2021 02:28:03 +0000 (03:28 +0100)]
ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:27:37 +0000 (03:27 +0100)]
ARM: dts: stm32: Add custom PHY reset bindings on AV96
The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:26:39 +0000 (03:26 +0100)]
ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:26:05 +0000 (03:26 +0100)]
ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:25:13 +0000 (03:25 +0100)]
ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Sat, 13 Nov 2021 02:24:44 +0000 (03:24 +0100)]
ARM: stm32: Increase USB power-good delay on DHSOM
The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.
This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Mon, 13 Dec 2021 12:11:09 +0000 (07:11 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- A few clean ups for the RZG2
Hari Prasath [Wed, 8 Dec 2021 05:14:01 +0000 (10:44 +0530)]
ARM: mach-at91: update alternate function of signal PD20
The alternate function of PD20 is 4 as per the datasheet of
sama7g5 and not 5 as defined earlier.
Fixes:
558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Adam Ford [Mon, 6 Dec 2021 16:29:30 +0000 (10:29 -0600)]
configs: beacon-rzg2m: Config to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This changed the default boot device and caused boot failure.
Update the mmcdev variable to reflect the new aliases.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 6 Dec 2021 16:29:29 +0000 (10:29 -0600)]
ARM: rmobile: Fix rzg2_beacon_defconfig to address new aliases
The resync of the device trees from Linux 5.16-rc3 caused aliases
to appear on the MMC devices which changed the numbering.
This broke the reading/writing of the environmental variables,
so update the defconfig accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 6 Dec 2021 16:29:28 +0000 (10:29 -0600)]
arm: dts: Create common rz-g2-beacon-u-boot file
The rzg2_beacon_defconfig creates an image for RZ/G2[MNH] and
as such creates three different device trees and each of them
have a corresponding -u-boot.dtsi file which are basically
copies of each other. Create a common include file to be
referenced by each of the respective board-u-boot.dtsi files
to reduce duplicate code and simplify support going forward.
This also restores some lost functionality from the device
tree re-sync and updates the MAINTAINER file to include all
beacon-renesom device tree files.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 6 Dec 2021 16:29:27 +0000 (10:29 -0600)]
arm: dts: beacon-rzg2: Resync device trees with Linux 5.16-rc3
The device trees for the Beacon RZ/G2[MNH] boards have undergone
some changes over time, so resync them now.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 6 Dec 2021 16:29:26 +0000 (10:29 -0600)]
net: ravb: Support multiple clocks
The RZ/G2 series uses an external clock as a reference to the AVB.
If this clock is controlled by an external programmable clock,
it must be requested by the consumer or it will not turn on.
In order to do this, update the driver to use bulk enable and
disable functions to enable clocks for boards with multiple clocks.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tom Rini [Fri, 10 Dec 2021 12:58:43 +0000 (07:58 -0500)]
Merge tag 'efi-2022-01-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2022-01-rc4-2
UEFI:
* correctly handle missing TPM device
* prepare for block devices for U-Boot as EFI app
# gpg: Signature made Fri 10 Dec 2021 04:29:20 AM EST
# gpg: using RSA key
6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Simon Glass [Sat, 4 Dec 2021 15:56:32 +0000 (08:56 -0700)]
efi: Add a media/block driver for EFI block devices
Add a block driver which handles read/write for EFI block devices. This
driver actually already exists ('efi_block') but is not really suitable
for use as a real U-Boot driver:
- The operations do not provide a udevice
- The code is designed for running as part of EFI loader, so uses
EFI_PRINT() and EFI_CALL().
- The bind method probes the device, which is not permitted
- It uses 'EFI' as its parent device
The new driver is more 'normal', just requiring its platform data be set
up in advance.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Simon Glass [Sat, 4 Dec 2021 15:56:31 +0000 (08:56 -0700)]
efi: Add uclass for devices provided by UEFI firmware
UCLASS_EFI_LOADER is used for devices created by applications and
drivers loaded by U-Boots UEFI implementation.
This patch provides a new uclass (UCLASS_EFI_MEDIA) to be used for devices
that provided by a UEFI firmware calling U-Boot as an EFI application.
If the two uclasses can be unified, is left to future redesign.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Simon Glass [Sat, 4 Dec 2021 15:56:30 +0000 (08:56 -0700)]
efi: Rename UCLASS_EFI and IF_TYPE_EFI
These names are better used for access to devices provided by an EFI
layer. Use EFI_LOADER instead here, since these are only available in
U-Boot's EFI_LOADER layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>