Simon Glass [Fri, 11 Sep 2020 02:21:20 +0000 (20:21 -0600)]
Kconfig: Move DEFAULT_FDT_FILE under boot options
This relates to booting since it is the default devicetree provided to
Linux. Move it under the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:19 +0000 (20:21 -0600)]
Kconfig: Move SUPPORT_RAW_INITRD under boot options
This relates to booting, so move it under the 'boot images' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:18 +0000 (20:21 -0600)]
Kconfig: Move misc boot options under 'boot options'
There are a number of miscellaneous boot images at the top level of the
kconfig menu. Move these into the 'boot options' menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:17 +0000 (20:21 -0600)]
Kconfig: Move CONFIG_BOOTDELAY under autoboot options
This option relates to autoboot, so move it there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:16 +0000 (20:21 -0600)]
Kconfig: Move autoboot options under boot options
At present the autoboot options are in cmd/Kconfig but they don't really
relate to commands. They relate to booting, so move this menu under the
boot menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:15 +0000 (20:21 -0600)]
Kconfig: Move boot media under boot options
This relates to booting, so move it under the boot menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:14 +0000 (20:21 -0600)]
Kconfig: Move boot timing under boot options
This relates to booting, so move it under the boot menu.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:13 +0000 (20:21 -0600)]
Kconfig: Move boot menu into common/
Most of the boot options are in common/Kconfig but that file is already
extremely large. Create a new Kconfig.boot to hold the boot options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 11 Sep 2020 02:21:12 +0000 (20:21 -0600)]
Kconfig: Add a 'Boot options' menu
There are quite a few boot-related menu options at the top level. Create a
new menu to hold these and move 'Boot images' into it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 9 Oct 2020 12:58:56 +0000 (08:58 -0400)]
Merge branch '2020-10-08-misc-board-improvements'
- Move ASPEED ram driver, update.
- Exhance pinctrl/gpio support, update Kendryte K210 support
- Enhance qemu_arm64 support for a single binary to work with and
without TF-A
Andre Przywara [Wed, 30 Sep 2020 16:39:18 +0000 (17:39 +0100)]
qemu-arm64: Enable POSITION_INDEPENDENT
Now that PIE works when U-Boot is started from ROM, let's enable
CONFIG_POSITION_INDEPENDENT, which allows to load U-Boot also via
ARM Trusted-Firmware's fip.bin to DRAM, without tweaking the
configuration.
To get a writable initial stack, we need to keep the fixed initial
stack pointer, which points to DRAM in our case.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Andre Przywara [Wed, 30 Sep 2020 16:39:17 +0000 (17:39 +0100)]
qemu-arm: Drop ARCH_SUPPORT_TFABOOT
CONFIG_ARCH_SUPPORT_TFABOOT was used on the qemu-arm64 platform to
guard a tweak to the flash bank configuration. U-Boot now reads the
current flash setup from the devicetree, so there is no need for
this option anymore.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Wed, 30 Sep 2020 16:39:16 +0000 (17:39 +0100)]
qemu-arm: Remove need to specify flash banks
Currently we hard-code the number and initial addresses of QEMU's flash
banks, even though our code is perfectly able to gather the same
information from the DTB provided by QEMU.
This is especially annoying, since we have two slightly different
U-Boot configurations ("bare-metal" vs. loaded via Arm Trusted
Firmware), which need to be selected at build time.
Drop the two hard coded alternatives, and use
CONFIG_SYS_MAX_FLASH_BANKS_DETECT instead, which relies on the DTB to
figure out the actual flash configuration at runtime.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Wed, 30 Sep 2020 16:39:15 +0000 (17:39 +0100)]
arm64: PIE: Allow fixed stack pointer
Currently selecting CONFIG_POSITION_INDEPENDENT also forces us to use an
initial stack pointer relative to the beginning of the BSS section.
This makes some sense, because this should be writable memory anyway.
However the BSS section is not cleared or used until later in the
setup process (after relocation), so memory nearby might not be
available early enough to host the initial stack. This is an issue if
U-Boot is loaded from (Flash-)ROM, for instance.
Allow CONFIG_INIT_SP_RELATIVE to be turned off by a board's config, to
be able to select a fixed stack pointer, for instance in known good
DRAM.
This will help QEMU utilising PIE, when it's loaded to (Flash-)ROM.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Andre Przywara [Wed, 30 Sep 2020 16:39:14 +0000 (17:39 +0100)]
arm64: PIE: Skip fixups if distance is zero
When the actual offset between link and runtime address is zero, there
is no need for patching up U-Boot early when running with
CONFIG_POSITION_INDEPENDENT.
Skip the whole routine when the distance is 0.
This helps when U-Boot is loaded into ROM, or in otherwise sensitive
memory locations.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Andre Przywara [Wed, 30 Sep 2020 16:39:13 +0000 (17:39 +0100)]
arm64: PIE: Do not skip static relocation
When we build an arm64 target and enable POSITION_INDEPENDENT, we were
skipping our build-time dynamic relocation fixup routine (STATIC_RELA).
This was probably done because we didn't need it in this case, as the
PIE fixup routine in start.S would take care of that at runtime.
However when we now skip this routine (upon detecting that the fixup
offset is 0), this might lead to uninitialised pointers.
Remove the exception, so that we always do the build-time relocation.
NOTE: GNU binutils starting with v2.27.1 do this build-time relocation
automatically, to be in-line with other architecures. So on newer
toolchains our manual fixup is actually not needed. It doesn't hurt to
have it, though, so that we keep compatibility with the popular Linaro
toolchains, which lack this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Andre Przywara [Wed, 30 Sep 2020 14:45:07 +0000 (15:45 +0100)]
arm: Kconfig: Explain TFABOOT
The CONFIG_TFABOOT option is more about what U-Boot DOES NOT need to do
than to support some features.
Explain a bit more in the Kconfig help text to avoid misunderstandings.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Wed, 23 Sep 2020 17:09:51 +0000 (19:09 +0200)]
examples: make examples/ optional
Most users don't need the standalone API examples. Distributions like SUSE
do not supply libgcc for cross-compiling and we cannot do without on ARMv8
for building examples/.
Make examples selectable via symbol CONFIG_EXAMPLES. It defaults to
yes on ARCH_QEMU to ensure that we compile the API as part of our
continuous integration.
Cc: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Jack Mitchell [Thu, 17 Sep 2020 09:30:40 +0000 (10:30 +0100)]
wdt: designware: fix timeout calculation due to expecting KHz
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Sean Anderson [Mon, 14 Sep 2020 15:02:06 +0000 (11:02 -0400)]
riscv: Add FPIOA and GPIO support for Kendryte K210
This patch adds the necessary configs and docs for FPIOA and GPIO support
on the K210.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Heinrich Schuchardt [Mon, 14 Sep 2020 15:02:05 +0000 (11:02 -0400)]
riscv: add DT binding for BOOT button on Maix board
Add a device tree binding for the BOOT button on the Maix board.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Sean Anderson [Mon, 14 Sep 2020 15:02:04 +0000 (11:02 -0400)]
riscv: Add pinmux and gpio bindings for Kendryte K210
This patch adds the necessary device tree bindings.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Rick Chen <rick@andestech.com>
Sean Anderson [Mon, 14 Sep 2020 15:02:03 +0000 (11:02 -0400)]
test: dm: Test for default led naming
This modifies the existing led test to check for default led naming as
added in the previous patch.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:02:02 +0000 (11:02 -0400)]
led: gpio: Default to using node name if label is absent
This more closely mirrors Linux's behaviour, and will make it easier to
transition to using function+color in the future.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:02:01 +0000 (11:02 -0400)]
gpio: dw: Return output value when direction is out
dm_gpio_ops.get_value can be called when the gpio is either input or
output. The current dw code always returns the input value, which is
invalid if the direction is set to out.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Sean Anderson [Mon, 14 Sep 2020 15:02:00 +0000 (11:02 -0400)]
gpio: dw: Add a trailing underscore to generated name
Previously, if there was no bank-name property, it was easy to have
confusing gpio names like "gpio1@08", instead of "gpio1@0_8". This patch
follows the example of the sifive gpio driver.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:01:59 +0000 (11:01 -0400)]
gpio: dw: Fix warnings about casting int to pointer
Change the type of gpio_dwabp_platdata.base from fdt_addr_t to a void
pointer, since we pass it to readl.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:01:58 +0000 (11:01 -0400)]
pinctrl: Add support for Kendryte K210 FPIOA
The Fully-Programmable Input/Output Array (FPIOA) device controls pin
multiplexing on the K210. The FPIOA can remap any supported function to any
multifunctional IO pin. It can also perform basic GPIO functions, such as
reading the current value of a pin. However, GPIO functionality remains
largely unimplemented (in favor of the dedicated GPIO peripherals).
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:01:57 +0000 (11:01 -0400)]
test: pinmux: Add test for pin muxing
This extends the pinctrl-sandbox driver to support pin muxing, and adds a
test for that behaviour. The test is done in C and not python (like the
existing tests for the pinctrl uclass) because it needs to call
pinctrl_select_state. Another option could be to add a command that
invokes pinctrl_select_state and then test everything in
test/py/tests/test_pinmux.py.
The pinctrl-sandbox driver now mimics the way that many pinmux devices
work. There are two groups of pins which are muxed together, as well as
four pins which are muxed individually. I have tried to test all normal
paths. However, very few error cases are explicitly checked for.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:01:56 +0000 (11:01 -0400)]
pinctrl: Reformat documentation in dm/pinctrl.h
This normalizes the documentation to conform to kernel-doc style [1]. It
also moves the documentation for pinctrl_ops inline, and adds argument and
return-value documentation. I have kept the usual function style for these
comments. I could not find any existing examples of function documentation
inside structs.
[1] https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 14 Sep 2020 15:01:55 +0000 (11:01 -0400)]
pinctrl: Add pinmux property support to pinctrl-generic
The pinmux property allows for smaller and more compact device trees,
especially when there are many pins which need to be assigned individually.
Instead of specifying an array of strings to be parsed as pins and a
function property, the pinmux property contains an array of integers
representing pinmux groups. A pinmux group consists of the pin identifier
and mux settings represented as a single integer or an array of integers.
Each individual pin controller driver specifies the exact format of a
pinmux group. As specified in the Linux documentation, a pinmux group may
be multiple integers long. However, no existing drivers use multi-integer
pinmux groups, so I have chosen to omit this feature. This makes the
implementation easier, since there is no need to allocate a buffer to do
endian conversions.
Support for the pinmux property is done differently than in Linux. As far
as I can tell, inversion of control is used when implementing support for
the pins and groups properties to avoid allocating. This results in some
duplication of effort; every property in a config node is parsed once for
each pin in that node. This is not such an overhead with pins and groups
properties, since having multiple pins in one config node does not occur
especially often. However, the semantics of the pinmux property make such a
configuration much more appealing. A future patch could parse all config
properties at once and store them in an array. This would make it easier to
create drivers which do not function solely as callbacks from
pinctrl-generic.
This commit increases the size of the sandbox build by approximately 48
bytes. However, it also decreases the size of the K210 device tree by 2
KiB from the previous version of this series.
The documentation has been updated from the last Linux commit before it was
split off into yaml files.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dylan Hung [Mon, 7 Sep 2020 08:25:07 +0000 (16:25 +0800)]
ram: add ddr4 dual x8 configuration
the aspeed ddr sdram controller needs to know if the memory chip mounted on
the board is dual x8 die or not. Or it may get the wrong size of the
memory space.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Dylan Hung [Mon, 7 Sep 2020 08:25:06 +0000 (16:25 +0800)]
ram: move aspeed ram driver into drivers/ directory
to improve the maintainability. It is more easier to modify and add
configurations of the driver in the centralized ram driver directory.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Tom Rini [Thu, 8 Oct 2020 14:20:53 +0000 (10:20 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-cfi-flash
- Fix devicetree address determination seen on QEMU ARM64
- Use DMA for reads is available
Andre Przywara [Wed, 23 Sep 2020 23:22:04 +0000 (00:22 +0100)]
cfi_flash: Fix devicetree address determination
The cfi-flash driver uses an open-coded version of the generic
algorithm to decode and translate multiple frames of a "reg" property.
This starts off the wrong foot by using the address-cells and size-cells
properties of *this* very node, and not of the parent. This somewhat
happened to work back when we were using a wrong default size of 2,
but broke about a year ago with commit
0ba41ce1b781 ("libfdt: return
correct value if #size-cells property is not present").
Instead of fixing the reinvented wheel, just use the generic function
that does all of this properly.
This fixes U-Boot on QEMU (-arm64), which was crashing due to decoding
a wrong flash base address:
DRAM: 1 GiB
Flash: "Synchronous Abort" handler, esr 0x96000044
elr:
00000000000211dc lr :
00000000000211b0 (reloc)
elr:
000000007ff5e1dc lr :
000000007ff5e1b0
x0 :
00000000000000f0 x1 :
000000007ff5e1d8
x2 :
000000007edfbc48 x3 :
0000000000000000
x4 :
0000000000000000 x5 :
00000000000000f0
x6 :
000000007edfbc2c x7 :
0000000000000000
x8 :
000000007ffd8d70 x9 :
000000000000000c
x10:
0400000000000003 x11:
0000000000000055
^^^^^^^^^^^^^^^^
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Vignesh Raghavendra [Thu, 17 Sep 2020 11:23:08 +0000 (16:53 +0530)]
mtd: cfi_mtd: Use DMA for reads
When possible use DMA for reading from CFI flash, this provides upto 5x
improvement in read performance with high speed CFI compliant flashes
like HyperFlash.
Code will gracefully fallback to CPU copy when DMA is unavailable.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Vignesh Raghavendra [Thu, 17 Sep 2020 11:23:07 +0000 (16:53 +0530)]
dma: Reduce error level when DMA channel type does not exist
Caller would need gracefully handle failures of dma_get_device(),
therefore reduce pr_err() to pr_debug() when DMA device is not found.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 7 Oct 2020 21:25:25 +0000 (17:25 -0400)]
Merge tag 'mips-pull-2020-10-07' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- mips: octeon: add support for DDR4 memory controller
- mips: octeon: add support for DWC3 USB
- mips: octeon: add support for booting Linux
Stefan Roese [Thu, 20 Aug 2020 05:22:04 +0000 (07:22 +0200)]
mips: octeon: octeon_common.h: Increase CONFIG_SYS_BOOTM_LEN
Increase CONFIG_SYS_BOOTM_LEN to 64MiB for Linux kernel booting.
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:22:03 +0000 (07:22 +0200)]
mips: octeon: Add bootoctlinux command
Octeon needs a platform specific cmd to boot the Linux kernel, as
specific parameters need to be passed and special handling for the
multiple cores (SMP) is needed.
Co-developed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
[use gd->ram_base instead of gd->bd->bi_memstart]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Aaron Williams [Thu, 20 Aug 2020 05:22:02 +0000 (07:22 +0200)]
mips: octeon: Add bootmem support
This is needed for Linux booting, as the memory infos need to be passed
in this bootmem format to the Linux kernel.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:22:01 +0000 (07:22 +0200)]
mips: octeon: Add coremask support
This patch adds the coremask handling functions.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:22:00 +0000 (07:22 +0200)]
mips: octeon: Add header cvmx-bootinfo.h
Add header to handle bootinfo support, needed for Octeon Linux kernel
booting.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:21:59 +0000 (07:21 +0200)]
mips: octeon: Add header cvmx-fuse.h
Add header to handle Octeon fuse access.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:21:58 +0000 (07:21 +0200)]
mips: octeon: Add header octeon-feature.h
This header includes the Octeon feature detection used in many Octeon
drivers.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Thu, 20 Aug 2020 05:21:57 +0000 (07:21 +0200)]
mips: octeon: Add header cvmx-regs.h
This header includes common register defines and accessor functions.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 20 Aug 2020 05:21:56 +0000 (07:21 +0200)]
mips: octeon: lowlevel_init.S: Add NMI handling code for SMP Linux booting
This patch adds the necessary lowlevel init code, to enable SMP Linux
booting. This code will be used with the platform specific Octeon Linux
boot command "bootoctlinux", which starts a configurable number of cores
into Linux.
Additionally some erratas and lowlevel register initializations are
copied from the original Cavium / Marvell U-Boot source code, enabling
booting into the Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 20 Aug 2020 05:21:55 +0000 (07:21 +0200)]
mips: octeon: octeon-model.h: Enable inclusion from assembler files
Add the #ifdef __ASSEMBLY__ checks to enable inclusion of this header
from assembler files.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:43 +0000 (13:04 +0200)]
mips: octeon: octeon_ebb7304_defconfig: Enable USB support
This patch enables USB support with some helpful commands, like fs
support.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:42 +0000 (13:04 +0200)]
mips: octeon: Add USB DT nodes
Add the USB device tree nodes to the Octeon dts/dtsi files.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 24 Aug 2020 11:04:41 +0000 (13:04 +0200)]
mips: octeon: cache.c: Flush all pending writes in flush_dcache_range()
As noticed while working on the USB xHCI support, Octeon needs to flush
all pending writes so that the values are present in the memory. Add
this "syncw" instruction (twice) to flush_dcache_range().
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:40 +0000 (13:04 +0200)]
mips: octeon: Add mangle-port.h
Import platform specific mangle-port.h header, allowing a area specific
swapping, which is needed on Octeon for USB & PCI areas.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:39 +0000 (13:04 +0200)]
mips: octeon: cpu.c: Add table for selective swapping
Import octeon_should_swizzle_table[] which is needed for the area
specific swapping. It will be used by the platform specific
mangle-port.h header.
Imported from Linux v5.7.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:38 +0000 (13:04 +0200)]
usb: xhci: octeon: Add DWC3 glue layer for Octeon
This patch adds the glue layer for the MIPS Octeon SoCs. It's ported
mainly from the Linux code.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:37 +0000 (13:04 +0200)]
usb: xhci: xhci_bulk_tx: Don't "BUG" when comparing addresses
Octeon uses mapped addresses for virtual and physical memory. It's not
that easy to calculate the resulting addresses here. So let's remove
this BUG_ON() completely, as it's not really helpful.
Please also note, that BUG_ON() is not recommended any more in the Linux
kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Mon, 24 Aug 2020 11:04:36 +0000 (13:04 +0200)]
usb: xhci: xhci-dwc3.c: Use dev_remap_addr() instead of dev_get_addr()
On MIPS platforms, mapping of the base address is needed. This patch
switches from dev_get_addr() to dev_remap_addr() to get the mapped base
address of the xHCI controller.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:10 +0000 (08:29 +0200)]
mips: octeon: octeon_ebb7304: Add DDR4 support
This patch adds the board specific configuration (struct) for the
Octeon 3 EBB7304 EVK. This struct is ported from the 2013er Cavium /
Marvell U-Boot repository. Also, the Octeon RAM driver is enabled in
the board defconfig for its usage.
Tested with one and two DIMMs on the EBB7304 EVK (8 & 16 GiB).
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:09 +0000 (08:29 +0200)]
mips: octeon: dram.c: Add RAM driver support
This patch adds the initialization call for the Octeon RAM driver to
the Octeon platforms code. So if enabled via Kconfig, the DDR driver
will be called and the RAM will be configured and used. If the RAM
driver is not enabled, the L2 cache is still used as RAM.
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:08 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 3/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 3 includes the DIMM SPD handling code and the Kconfig / Makefile
integration.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:07 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 2 includes the very complex Octeon 3 DDR4 configuration
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:06 +0000 (08:29 +0200)]
ram: octeon: Add MIPS Octeon3 DDR4 support (part 1/3)
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently supports DDR4 on Octeon 3. It can be later
extended to support also DDR3 and Octeon 2 platforms.
Part 1 adds the base U-Boot RAM driver, which will be instantiated by
the DT based probing.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:05 +0000 (08:29 +0200)]
mips: octeon: Add octeon_ddr.h header
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:04 +0000 (08:29 +0200)]
mips: octeon Add cvmx/cvmx-lmcx-defs.h header
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Wed, 2 Sep 2020 06:29:03 +0000 (08:29 +0200)]
mips: octeon: Add octeon-model.h header
This header is used by the upcoming DDR driver and potentially by other
drivers ported from the 2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 2 Sep 2020 06:29:02 +0000 (08:29 +0200)]
mips: octeon: dts: mrvl, cn73xx.dtsi: Add memory controller DT node
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 6 Oct 2020 17:59:01 +0000 (13:59 -0400)]
Merge tag 'dm-pull-6oct20' of git://git.denx.de/u-boot-dm
bloblist enhancement for alignment
Update ofnode/dev_read phandle function
sandbox keyboard enhancements and fixes
Heinrich Schuchardt [Tue, 29 Sep 2020 01:56:20 +0000 (03:56 +0200)]
sandbox: avoid duplicate backslash input
When using SDL for input the SDL key codes are first converted to Linux key
codes and then to matrix entries of the cross wired keyboard.
We must not map any key code to two different places on the keyboard. So
comment out one backslash position.
Update the rest of the file from Linux 5.7.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 28 Sep 2020 23:41:18 +0000 (01:41 +0200)]
sandbox: add missing SDL key scan codes
Add missing SDL key scan codes, e.g.
* shift, ctrl, meta, alt
* brace/bracket
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Fri, 25 Sep 2020 07:41:16 +0000 (09:41 +0200)]
test: dm: add test for phandle access functions
Add unitary test for phandle access functions
- ofnode_count_phandle_with_args
- ofnode_parse_phandle_with_args
- dev_count_phandle_with_args
- dev_read_phandle_with_args
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Fri, 25 Sep 2020 07:41:15 +0000 (09:41 +0200)]
fdtdec: correct test on return of fdt_node_offset_by_phandle
The result of fdt_node_offset_by_phandle is negative for error,
so this patch corrects the check of this result in
fdtdec_parse_phandle_with_args.
This patch allows to have the same behavior with or without OF_LIVE
for the function dev_read_phandle_with_args with cell_name = NULL and
with invalid phandle.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Fri, 25 Sep 2020 07:41:14 +0000 (09:41 +0200)]
dm: add cells_count parameter in *_count_phandle_with_args
The cell_count argument is required when cells_name is NULL.
This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args
This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.
For example:
count = dev_count_phandle_with_args(dev, "array", NULL, 3);
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 24 Sep 2020 15:26:20 +0000 (17:26 +0200)]
dm: update test on of_offset in ofnode_valid
Update the test for node.of_offset because an invalid offset is not
always set to -1 because the return value of the libfdt functions are:
+ an error with a value < 0
+ a valid offset with value >=0
For example, in ofnode_get_by_phandle() function, we have:
node.of_offset = fdt_node_offset_by_phandle(gd->fdt_blob, phandle);
and this function can return -FDT_ERR_BADPHANDLE (-6).
Without this patch, the added test dm_test_ofnode_get_by_phandle failed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Wed, 23 Sep 2020 06:23:27 +0000 (08:23 +0200)]
dm: ofnode: Fix compile breakage with OF_CHECKS enabled
Include missing log.h and change _ofnode_to_np() to ofnode_to_np() so
that compiling with OF_CHECKS enabled does not break.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 20 Sep 2020 00:49:30 +0000 (18:49 -0600)]
bloblist: Fix up a few comments
Adjust a few comments to make the meaning clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 20 Sep 2020 00:49:29 +0000 (18:49 -0600)]
bloblist: Allow custom alignment for blobs
Some blobs need a larger alignment than the default. For example, ACPI
tables often start at a 4KB boundary. Add support for this.
Update the size of the test blob to allow these larger records.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 20 Sep 2020 00:49:28 +0000 (18:49 -0600)]
bloblist: Tidy up the data alignment
The intention which bloblists is that each blob's data is aligned in
memory. At present it is only the headers that are aligned.
Update the code to correct this and add a little more documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 20 Sep 2020 00:49:27 +0000 (18:49 -0600)]
bloblist: Compare addresses rather than pointers in tests
When running these tests on sandbox any failures result in very large or
long pointer values which are a pain to work with. Map them to an address
so it is easier to diagnose failures.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 20 Sep 2020 00:49:26 +0000 (18:49 -0600)]
bloblist: Add a command
It is helpful to be able to see basic statistics about the bloblist and
also to list its contents. Add a 'bloblist' command to handle this.
Put the display functions in the bloblist modules rather than in the
command code itself. That allows showing a list from SPL, where commands
are not available.
Also make bloblist_first/next_blob() static as they are not used outside
this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 19 Sep 2020 18:05:47 +0000 (20:05 +0200)]
doc/arch/sandbox.rst: reformat command line options
Reformat the command line options chapter so that the command line options
clearly stand out.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 19 Sep 2020 18:04:57 +0000 (20:04 +0200)]
MAINTAINERS: assign doc/arch/sandbox.rst
Add doc/arch/sandbox.rst to the scope of SANDBOX.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 6 Oct 2020 12:36:38 +0000 (08:36 -0400)]
Merge tag 'efi-2021-01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2021-01-rc1
The following bugs in the UEFI system are resolved:
* illegal free in EFI_LOAD_FILE2_PROTOCOL implementation
* incorrect documentation of EFI_LOAD_FILE2_PROTOCOL implementation
* output of CRC32 as decimal instead hexadecimal in unit test
* use EfiReservedMemoryType for no-map reserved memory
* avoid unnecessary resets in UEFI unit tests
* call EFI bootmgr even without having /EFI/boot
Tom Rini [Tue, 6 Oct 2020 12:36:10 +0000 (08:36 -0400)]
Merge tag 'u-boot-amlogic-
20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
Heinrich Schuchardt [Thu, 27 Aug 2020 10:52:20 +0000 (12:52 +0200)]
efi_loader: consider no-map property of reserved memory
The device tree may contain a /reserved-memory node. The no-map property
of the sub-nodes signals if the memory may be accessed by the UEFI payload
or not.
In the EBBR specification (https://github.com/arm-software/ebbr) the
modeling of the reserved memory has been clarified.
If a reserved memory node in the device tree has the no-map property map,
create a EfiReservedMemoryType memory map entry else use
EfiBootServicesData.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 17 Sep 2020 17:09:23 +0000 (19:09 +0200)]
efi_loader: QEMU CONFIG_EFI_GRUB_ARM32_WORKAROUND=n
CONFIG_EFI_GRUB_ARM32 is only needed for architectures with caches that are
not managed via CP15 (or for some outdated buggy versions of GRUB). It
makes more sense to disable the setting per architecture than per defconfig.
Move QEMU's CONFIG_EFI_GRUB_ARM32_WORKAROUND=n from defconfig to Kconfig.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sean Anderson [Mon, 28 Sep 2020 16:08:37 +0000 (12:08 -0400)]
efi: Fix typo in documentation
There is an extra space.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Michael Walle [Tue, 29 Sep 2020 06:54:48 +0000 (08:54 +0200)]
distro_bootcmd: call EFI bootmgr even without having /EFI/boot
Currently, the EFI bootmgr is only called if there is a EFI binary
inside the path for removable media is found, i.e. /EFI/boot/. This
doesn't make sense. It is the duty of the bootmgr to find out the
path and name of the EFI binary to boot. It should be called even
if there is no /EFI/boot directory.
Thus, call the bootmgr before we try to boot the EFI binary inside
the removable media path.
Also remove the ${fdtcontroladdr} parameter because the fallback is
handled in cmd/bootefi.c and that already takes care of correct settings
if the board has ACPI and thus no device tree at all.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 30 Sep 2020 19:52:09 +0000 (21:52 +0200)]
efi_selftest: avoid unnecessary reset
When we do not execute a test requiring ExitBootServices do not reset the
system after testing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 3 Oct 2020 11:43:45 +0000 (13:43 +0200)]
efi_selftest: print CRC32 of initrd as hexadecimal
Print the CRC32 loaded via the EFI_LOAD_FILE2_PROTOCOL as a hexadecimal
number.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 3 Oct 2020 11:12:03 +0000 (13:12 +0200)]
efi_selftest: enable printing hexadecimal numbers
Add code to use %x in efi_st_print().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 3 Oct 2020 10:50:52 +0000 (12:50 +0200)]
efi_loader: illegal free in EFI_LOAD_FILE2_PROTOCOL
strsep() changes the address that its first argument points to.
We cannot use the changed address as argument of free().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 3 Oct 2020 10:44:31 +0000 (12:44 +0200)]
efi_loader: description EFI_LOAD_FILE2_PROTOCOL
U-Boot offers a EFI_LOAD_FILE2_PROTOCOL which the Linux EFI stub can use to
load an initial RAM disk. Update the function comments of the
implementation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Mon, 5 Oct 2020 17:11:41 +0000 (13:11 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 5 Oct 2020 17:05:46 +0000 (13:05 -0400)]
Merge branch 'next'
Bring in the assorted changes that have been staged in the 'next' branch
prior to release.
Signed-off-by: Tom Rini <trini@konsulko.com>
Neil Armstrong [Thu, 1 Oct 2020 08:04:56 +0000 (10:04 +0200)]
pwm: Add driver for Amlogic Meson PWM controller
This adds the driver for the PWM controller found in the Amlogic SoCs.
This PWM is only a set of Gates, Dividers and Counters:
PWM output is achieved by calculating a clock that permits calculating
two periods (low and high). The counter then has to be set to switch after
N cycles for the first half period.
The hardware has no "polarity" setting. This driver reverses the period
cycles (the low length is inverted with the high length) for
PWM_POLARITY_INVERSED.
Disabling the PWM stops the output immediately (without waiting for the
current period to complete first).
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 2 Oct 2020 07:32:12 +0000 (09:32 +0200)]
pinctrl: meson-axg: add missing GPIOA_18
Add the missing GPIOA_18 from the missing EE gpio list.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 2 Oct 2020 07:31:46 +0000 (09:31 +0200)]
pinctrl: meson-axg-pmx: fix gpio request
The AXG pmx driver gpio request offset needs the pin base to have the
correct pin number.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Neil Armstrong [Mon, 21 Sep 2020 07:34:15 +0000 (09:34 +0200)]
board: amlogic: vim3: add support for dynamic PCIe enable
The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
an USB3.0 Type A connector and a M.2 Key M slot.
The PHY driving these differential lines is shared between
the USB3.0 controller and the PCIe Controller, thus only
a single controller can use it.
This adds this dynamic switching right before booting Linux
and the configuration steps in the boards documentation.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed warning by replacing min() by min_t()]
Neil Armstrong [Mon, 21 Sep 2020 07:34:14 +0000 (09:34 +0200)]
configs: vim3: use the vim3 board support
Use the newly added VIM3 board support instead of the generic W400.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 21 Sep 2020 07:34:13 +0000 (09:34 +0200)]
board: amlogic: add a vim3 specific board support
The VIM3 will need a specific code to enable PCIe if enabled in the MCU,
thus add a specific board support for VIM3 & VIM3L.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 21 Sep 2020 07:34:12 +0000 (09:34 +0200)]
ARM: dts: sync amlogic G12A/SM1 DT from Linux 5.9-rc1
This imports the G12A & SM1 SoC and boards DT changes from the Linux
commit
9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>