platform/upstream/llvm.git
21 months ago[InstCombine] reduce code duplication in visitSub(); NFC
Sanjay Patel [Wed, 18 Jan 2023 15:13:20 +0000 (10:13 -0500)]
[InstCombine] reduce code duplication in visitSub(); NFC

21 months ago[InstCombine][InstSimplify] add tests for i1/i2 mul with no-wrap; NFC
Sanjay Patel [Wed, 18 Jan 2023 15:03:36 +0000 (10:03 -0500)]
[InstCombine][InstSimplify] add tests for i1/i2 mul with no-wrap; NFC

A bug was introduced with 68c197f07eeae71 as noted in the
post-commit review comments, and there are potentially
missed smaller transforms/simplifications because no-wrap
multiply with only 1 or 2 bits eliminates some potential
results.

21 months ago[StatepointLowering] Move statepoint correctness checks to Verifier. NFC.
Denis Antrushin [Tue, 17 Jan 2023 11:01:42 +0000 (18:01 +0700)]
[StatepointLowering] Move statepoint correctness checks to Verifier. NFC.

Since D140504, GCStrategy is available for use in opt.
Now we can move statepoint correctness checks from
StatepointLowering.cpp to Verifier.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D141948

21 months ago[VPlan] Disconnect VPRegionBlock from successors in graph iterator(NFCI)
Florian Hahn [Wed, 18 Jan 2023 15:02:40 +0000 (15:02 +0000)]
[VPlan] Disconnect VPRegionBlock from successors in graph iterator(NFCI)

This updates the VPAllSuccessorsIterator to not connect the
VPRegionBlock itself to its successors. The successors are connected to
the exit block of the region. At the moment, this doesn't change any
exisint functionality.

But the new schema ensures the following property when used for
VPDominatorTree:

1. Entry & exit blocks of regions dominate the successors of the region.

This allows for convenient checking of dominance between defs and uses
that are not defined in the same region. I will share a follow-up patch
to use it for the VPDominatorTree soon.

Depends on D140500.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D140511

21 months ago[mlir][vector] Limit vector.mask op to single vector result
Matthias Springer [Wed, 18 Jan 2023 14:55:13 +0000 (15:55 +0100)]
[mlir][vector] Limit vector.mask op to single vector result

Multiple vector results require multiple masks and passthru values.

Depends On: D141683

Differential Revision: https://reviews.llvm.org/D141786

21 months ago[Regex] Check two chars in step back optimization (NFC)
Nikita Popov [Wed, 18 Jan 2023 14:21:27 +0000 (15:21 +0100)]
[Regex] Check two chars in step back optimization (NFC)

When stepping back, and there is a following fixed character, also
try to check whether another following fixed character matches.

For our tests the next fixed character is often " ", which occurs
pretty frequently, so checking a second character is worthwhile in
practice.

This drops FileCheck runtime for the vloxseg.c test from 25s to
17s for me.

21 months agoRevert "[ConstraintElim] Enable pass by default."
Florian Hahn [Wed, 18 Jan 2023 14:25:00 +0000 (14:25 +0000)]
Revert "[ConstraintElim] Enable pass by default."

This reverts commit fb13dcf3431cd83911fe56899d2fade808dc5b8d.

A large compile-time regression for code generated by sanitizers has
been reported. Revert while I investigate the issue. Details and
reproducers are available here: https://reviews.llvm.org/D135915

21 months ago[VPlan] Replace VPInterleaveRecipe::classof with VP_CLASSOF_IMPL. (NFC)
Florian Hahn [Wed, 18 Jan 2023 14:23:22 +0000 (14:23 +0000)]
[VPlan] Replace VPInterleaveRecipe::classof with VP_CLASSOF_IMPL. (NFC)

21 months ago[mlir][linalg][bufferize][NFC] Utilize DestinationStyleOpInterface helper
Matthias Springer [Wed, 18 Jan 2023 14:19:23 +0000 (15:19 +0100)]
[mlir][linalg][bufferize][NFC] Utilize DestinationStyleOpInterface helper

`DstBufferizableOpInterfaceExternalModel` provides suitable default implementations for Linalg ops.

Differential Revision: https://reviews.llvm.org/D141921

21 months agoHarden -slice-analysis-test MLIR testing pass to check for some invariants
Mehdi Amini [Wed, 18 Jan 2023 14:14:33 +0000 (14:14 +0000)]
Harden -slice-analysis-test MLIR testing pass to check for some invariants

The pass would assert on some input IR that it didn't expect. Instead
signal a pass failure and properly interupt the flow.

Fixes #60022

21 months ago[mlir] GreedyPatternRewriteDriver: Fix termination criteria in OpPatternRewriteDriver
Matthias Springer [Wed, 18 Jan 2023 14:10:14 +0000 (15:10 +0100)]
[mlir] GreedyPatternRewriteDriver: Fix termination criteria in OpPatternRewriteDriver

This driver should iterate until convergence or until the specified op was erased. However, it used to stop when any op was erased.

Differential Revision: https://reviews.llvm.org/D141921

21 months ago[llvm-objdump] Fix reporting error for processing target features
Elena Lepilkina [Wed, 18 Jan 2023 11:09:03 +0000 (14:09 +0300)]
[llvm-objdump] Fix reporting error for processing target features

Differential Revision: https://reviews.llvm.org/D142003

21 months agoDiagnose extensions in 'offsetof'
Aaron Ballman [Wed, 18 Jan 2023 13:49:45 +0000 (08:49 -0500)]
Diagnose extensions in 'offsetof'

https://www.open-std.org/jtc1/sc22/wg14/www/docs/n2350.htm made very
clear that it is an UB having type definitions with in offsetof.
Clang supports defining a type as the first argument as a conforming
extension due to how many projects use the construct in C99 and earlier
to calculate the alignment of a type. GCC also supports defining a type
as the first argument.

This adds extension warnings and documentation for the functionality
Clang explicitly supports.

Fixes #57065
Reverts the revert of 39da55e8f548a11f7dadefa73ea73d809a5f1729

Co-authored-by: Yingchi Long <i@lyc.dev>
Co-authored-by: Aaron Ballman <aaron@aaronballman.com>
Differential Revision: https://reviews.llvm.org/D133574

21 months ago[flang] Add TODO for allocate array with scalar source
Peixin Qiao [Wed, 18 Jan 2023 13:49:22 +0000 (21:49 +0800)]
[flang] Add TODO for allocate array with scalar source

This scenario is not supported yet.

Reviewed By: clementval, jeanPerier, sscalpone

Differential Revision: https://reviews.llvm.org/D141932

21 months ago[NFC][WebAssembly] Add tests
Samuel Parker [Wed, 18 Jan 2023 13:30:53 +0000 (13:30 +0000)]
[NFC][WebAssembly] Add tests

Add more variations to fpclamptosat.

21 months ago[InstCombine] add tests for diff-of-squares; NFC
Sanjay Patel [Tue, 17 Jan 2023 20:21:14 +0000 (15:21 -0500)]
[InstCombine] add tests for diff-of-squares; NFC

Ideally, these negative tests would have been added
before 68c197f07eea to make sure the specific
operand matching is working as expected, but I did
not remember to include them.

21 months ago[InstCombine] simplify code for matching shift-logic-shift pattern; NFC
Sanjay Patel [Tue, 17 Jan 2023 20:15:48 +0000 (15:15 -0500)]
[InstCombine] simplify code for matching shift-logic-shift pattern; NFC

We can match and capture in one statement. Also, make the
code more closely resemble the description comment by using
the constant name of an operand value.

21 months ago[include-mapping] Fix gen_std.py test
Viktoriia Bakalova [Tue, 17 Jan 2023 16:38:14 +0000 (16:38 +0000)]
[include-mapping] Fix gen_std.py test

Differential Revision: https://reviews.llvm.org/D141944

21 months ago[gn build] Port f10d452db841
LLVM GN Syncbot [Wed, 18 Jan 2023 12:50:04 +0000 (12:50 +0000)]
[gn build] Port f10d452db841

21 months agoReland "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"
wanglei [Tue, 17 Jan 2023 07:10:00 +0000 (15:10 +0800)]
Reland "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"

This implementation supports basic relocation types and adds EHFrame,
Got/Plt handling passes.
This patch also enables JIT support for LoongArch64.

With this patch, I successfully run hello.ll and simple_throw.ll
(which is generated from test-suite/SingleSource/Regression/C++/EH/simple_throw.cpp)
using the `lli` command with options `--jit-kind=orc --jit-linker=jitlink`.

Note: `hasJIT` property of LoongArch32 remains false as there is no
validation environment.

New changes: Since LoongArch does not support RuntimeDyld, JITLink is set
by default.  Add a null-terminator to eh-frame sections. This should fix
the test failure on LoongArch bot.
(https://lab.llvm.org/staging/#/builders/236/builds/896)

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D141036

21 months ago[bazel] Fix build after c33b9395b1
Benjamin Kramer [Wed, 18 Jan 2023 12:31:35 +0000 (13:31 +0100)]
[bazel] Fix build after c33b9395b1

21 months ago[BitcodeReader] Allow reading pointer types from old IR
Sebastian Neubauer [Wed, 18 Jan 2023 12:19:59 +0000 (13:19 +0100)]
[BitcodeReader] Allow reading pointer types from old IR

When opaque pointers are enabled and old IR with typed pointers is read,
the BitcodeReader automatically upgrades all typed pointers to opaque
pointers. This is a lossy conversion, i.e. when a function argument is a
pointer and unused, it’s impossible to reconstruct the original type
behind the pointer.

There are cases where the type information of pointers is needed. One is
reading DXIL, which is bitcode of old LLVM IR and makes a lot of use of
pointers in function signatures.
We’d like to keep using up-to-date llvm to read in and process DXIL, so
in the face of opaque pointers, we need some way to access the type
information of pointers from the read bitcode.

This patch allows extracting type information by supplying functions to
parseBitcodeFile that get called for each function signature or metadata
value. The function can access the type information via the reader’s
type IDs and the getTypeByID and getContainedTypeID functions.
The tests exemplarily shows how type info from pointers can be stored in
metadata for use after the BitcodeReader finished.

Differential Revision: https://reviews.llvm.org/D127728

21 months ago[VPlan] Replace VPBranchOnMaskSC::classof with VP_CLASSOF_IMPL. (NFC)
Florian Hahn [Wed, 18 Jan 2023 12:14:57 +0000 (12:14 +0000)]
[VPlan] Replace VPBranchOnMaskSC::classof with VP_CLASSOF_IMPL. (NFC)

21 months ago[RISCV][ISelLowering] Fix select lowering issue
Dmitry Bushev [Tue, 17 Jan 2023 15:19:38 +0000 (18:19 +0300)]
[RISCV][ISelLowering] Fix select lowering issue

Fix bug that leads to some pseudo instructions not being lowered.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D141395

21 months agoRemove an unused variable, NFC
Haojian Wu [Wed, 18 Jan 2023 12:08:21 +0000 (13:08 +0100)]
Remove an unused variable, NFC

21 months ago[DAG] combineInsertEltToShuffle - split off mergeInsertEltWithShuffle fold. NFC.
Simon Pilgrim [Wed, 18 Jan 2023 11:21:06 +0000 (11:21 +0000)]
[DAG] combineInsertEltToShuffle - split off mergeInsertEltWithShuffle fold. NFC.

combineInsertEltToShuffle was performing 2 very different folds in the same call, merging "(insert_vector_elt (vector_shuffle X, Y), (extract_vector_elt X, N), IdxC) --> (vector_shuffle X, Y)" and "(insert_vector_elt V, (bitcast X from vector type), IdxC) --> bitcast(shuffle (bitcast V), (extended X), Mask)"

The folds are currently still attempted in the same order as before (just as 2 seperate calls) so there should be no change in behaviour.

First step towards some adjustments to mergeInsertEltWithShuffle for D127115.

21 months ago[DAG][ARM][AArch64] Transform max(a,b) - min(a,b) -> abd(a,b)
David Green [Wed, 18 Jan 2023 11:44:26 +0000 (11:44 +0000)]
[DAG][ARM][AArch64] Transform max(a,b) - min(a,b) -> abd(a,b)

This adds both signed and unsigned transforms for
max(a, b) - min(a, b) -> abd(a, b).

unsigned: https://alive2.llvm.org/ce/z/RF4jGQ
signed: https://alive2.llvm.org/ce/z/Cjr2zE

Fixes: #59894

Differential Revision: https://reviews.llvm.org/D141706

21 months agoReland "nullptr returned from ActOnTag() is not a valid result"
Haojian Wu [Wed, 18 Jan 2023 11:18:26 +0000 (12:18 +0100)]
Reland "nullptr returned from ActOnTag() is not a valid result"

The commit was reverted in 346e1c43a11b8af5a818dac321f83f043862c1ec as
part of the f1f0a0d8e8fdd2e534d9423b2e64c6b8aaa53aee revert.

21 months agoAArch64: allocate small fixed args properly in varargs functions.
Tim Northover [Tue, 10 Jan 2023 11:52:12 +0000 (11:52 +0000)]
AArch64: allocate small fixed args properly in varargs functions.

On Darwin, function arguments occupy their real size when passed on the stack
(e.g. an i16 only consumes 2 bytes). This means that, even for fixed args in
varargs calls we need to keep track of the original type being passed before
any DAG/GISel promotions. Existing logic only applied this fix to the
non-varargs case leading to mismatch between caller & callee in those
situations.

On Linux & Windows these arguments always occupy a 64-bit slot anyway so
there's no special handling needed.

21 months agoReapply [AArch64] fold subs ugt/ult to ands when the second operand is mask/pow2
chenglin.bi [Wed, 18 Jan 2023 11:23:58 +0000 (19:23 +0800)]
Reapply [AArch64] fold subs ugt/ult to ands when the second operand is mask/pow2

Origianl patch made a mistake that ugt is reverse cc should be ule.
And ule < C will be generalize to ult < C + 1. So the new patch add support for ult < Pow2 case.

https://alive2.llvm.org/ce/z/naBw5A

Reviewed By: samtebbs, chapuni

Differential Revision: https://reviews.llvm.org/D141829

21 months ago[libc++][ranges] Remove a leftover include version control markers in Cxx20Papers.csv
Haojian Wu [Wed, 18 Jan 2023 11:04:38 +0000 (12:04 +0100)]
[libc++][ranges] Remove a leftover include version control markers in Cxx20Papers.csv

21 months ago[RISCV] Generalize performFP_TO_INTCombine to vectors
Luke Lau [Thu, 12 Jan 2023 12:20:07 +0000 (12:20 +0000)]
[RISCV] Generalize performFP_TO_INTCombine to vectors

Like in the scalar domain, combine calls to (fp_to_int (ftrunc X)) on
scalable and fixed-length vectors into a single vfcvt instruction.
For truncating rounds, the static vfcvt.rtz rounding mode is used.
Otherwise use the VFCVT_RM_ variants to set the rounding mode
dynamically.
Closes https://github.com/llvm/llvm-project/issues/56737

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141599

21 months ago[RISCV][NFC] Add test cases for rounding vfcvt
Luke Lau [Thu, 12 Jan 2023 12:14:44 +0000 (12:14 +0000)]
[RISCV][NFC] Add test cases for rounding vfcvt

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D141600

21 months ago[LLVMContext] Remove hasSetOpaquePointersValue() API (NFC)
Nikita Popov [Wed, 18 Jan 2023 10:04:12 +0000 (11:04 +0100)]
[LLVMContext] Remove hasSetOpaquePointersValue() API (NFC)

Now that we no longer perform any kind of typed pointer guessing,
we no longer need this API.

21 months ago[DAG][AArch64][ARM] Combine abd(sub(x, y)) to abd if the sub is nsw
David Green [Wed, 18 Jan 2023 10:10:52 +0000 (10:10 +0000)]
[DAG][AArch64][ARM] Combine abd(sub(x, y)) to abd if the sub is nsw

This implements the fold (abs (sub nsw x, y)) -> abds(x, y). Providing
the sub is nsw this appears to be valid without the extensions that are
usually used for abds. https://alive2.llvm.org/ce/z/XHVaB3. The
equivalent abdu combine seems to not be valid.

Differential Revision: https://reviews.llvm.org/D141665

21 months ago[LTO] Always use opaque pointers mode from config
Nikita Popov [Wed, 18 Jan 2023 10:01:16 +0000 (11:01 +0100)]
[LTO] Always use opaque pointers mode from config

Always use the configured opaque pointers mode, don't check whether
it has already been set through a different means.

Removes the last user of the hasSetOpaquePointersValue() API.

21 months ago[GlobalISel] Detect splats built with G_CONCAT_VECTORS
Diana Picus [Tue, 17 Jan 2023 08:08:34 +0000 (09:08 +0100)]
[GlobalISel] Detect splats built with G_CONCAT_VECTORS

Add support to the MI matching of vector splats for patterns that
consist of `G_CONCAT_VECTORS` of smaller splats with the same constant
value. With this, we would consider the following pseudo-MIR to be a splat:

```
%0 = G_[F]CONSTANT [...]
%1 = G_BUILD_VECTOR %0, %0, ..., %0
%2 = G_CONCAT_VECTORS %1, %1, ..., %1
```

Since it uses recursion for matching splats, it could match pretty
complicated patterns with all sorts of combinations of `G_BUILD_VECTOR`
and `G_CONCAT_VECTORS` (e.g. a `G_CONCAT_VECTORS` with
a `G_BUILD_VECTOR_TRUNC` and another `G_CONCAT_VECTORS` as operands),
and it should also look through copies etc.

This should make it easier to match complex immediates for certain
instructions on AMDGPU, where for instance a <8 x s16> will be split
before instruction selection into a `G_CONCAT_VECTORS` of <2 x s16>
splats.

Differential Revision: https://reviews.llvm.org/D141902

21 months agoFix typo. NFC
Diana Picus [Mon, 16 Jan 2023 14:03:12 +0000 (15:03 +0100)]
Fix typo. NFC

21 months ago[mlir][tblgen] Emit deprecation warning if `kEmitRawAttributes` is used
Markus Böck [Thu, 12 Jan 2023 17:07:57 +0000 (18:07 +0100)]
[mlir][tblgen] Emit deprecation warning if `kEmitRawAttributes` is used

As discussed in https://reviews.llvm.org/D140886, emitting a warning if the old API is used may be beneficial to encourage migration to the new fold API.
This reuse the existing `Deprecated` infrastructure within TableGen, and simply marks the `def` for `kEmitRawAttributesFolder` causing a use of it in a record (even if set within a base class) to emit a warning.

Error message as printed in the terminal:
```
Included from C:/llvm-project/mlir/python/mlir/dialects/TensorOps.td:13:
Included from C:/llvm-project/mlir/include\mlir/Dialect/Tensor/IR/TensorOps.td:12:
C:/llvm-project/mlir/include\mlir/Dialect/Tensor/IR/TensorBase.td:14:5: warning: Using deprecated def `kEmitRawAttributesFolder`
def Tensor_Dialect : Dialect {
    ^
note: 'useFoldAPI' of 'kEmitRawAttributesFolder' (default) has been deprecated and is pending removal. Please switch to 'kEmitFoldAdaptorFolder'. See https://discourse.llvm.org/t/psa-new-improved-fold-method-signature-has-landed-please-update-your-downstream-projects/67618
```

Differential Revision: https://reviews.llvm.org/D141604

21 months ago[gn build] Port 48c2172e51b2
LLVM GN Syncbot [Wed, 18 Jan 2023 09:05:51 +0000 (09:05 +0000)]
[gn build] Port 48c2172e51b2

21 months ago[CSKY] Fix errors caused by change of compressInst
wangpc [Wed, 18 Jan 2023 08:49:32 +0000 (16:49 +0800)]
[CSKY] Fix errors caused by change of compressInst

We don't need MCContext since D141951.

Reviewed By: zixuan-wu

Differential Revision: https://reviews.llvm.org/D141995

21 months ago[Release] Produce mlir tarball
Nikita Popov [Tue, 17 Jan 2023 11:59:54 +0000 (12:59 +0100)]
[Release] Produce mlir tarball

MLIR supports standalone builds, so I think it makes sense to also
produce a release tarball for the MLIR subproject.

Differential Revision: https://reviews.llvm.org/D141919

21 months ago[AsmParser] Remove typed pointer auto-detection
Nikita Popov [Wed, 14 Dec 2022 12:41:10 +0000 (13:41 +0100)]
[AsmParser] Remove typed pointer auto-detection

IR is now always parsed in opaque pointer mode, unless
-opaque-pointers=0 is explicitly given. There is no automatic
detection of typed pointers anymore.

The -opaque-pointers=0 option is added to any remaining IR tests
that haven't been migrated yet.

Differential Revision: https://reviews.llvm.org/D141912

21 months agoRevert "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"
wanglei [Wed, 18 Jan 2023 08:50:32 +0000 (16:50 +0800)]
Revert "[JITLink] Add an initial implementation of JITLink for ELF/LoongArch"

This reverts commit 28b6f38d0a841451af7b4893368543382dd5e630.

This breaks on LoongArch64 bot.
https://lab.llvm.org/staging/#/builders/236/builds/896

21 months agoRevert "[BitcodeReader] Allow reading pointer types from old IR"
Nikita Popov [Wed, 18 Jan 2023 08:48:31 +0000 (09:48 +0100)]
Revert "[BitcodeReader] Allow reading pointer types from old IR"

This reverts commit b56df190b01335506ce30a4559d880da76d1a181.

The unit tests are implemented in a way that requires support for
writing typed pointer bitcode, which is going away soon. Please
rewrite it in a way that not have requirement, e.g. by shipping
pre-compiled bitcode, as we do for integration tests.

21 months ago[GVN][NFC] Add pre-commit tests for non-local load cases (D141680)
Sergey Kachkov [Mon, 16 Jan 2023 14:43:35 +0000 (17:43 +0300)]
[GVN][NFC] Add pre-commit tests for non-local load cases (D141680)

Add test cases when load is non-local for select dependency, but can be
found in extended BB (chain of blocks with single predecessor). Check
that type of found load is the same.

21 months ago[CodeGen] Prevent overlapping subregs in getCoveringSubRegIndexes
Pierre van Houtryve [Thu, 12 Jan 2023 08:52:33 +0000 (03:52 -0500)]
[CodeGen] Prevent overlapping subregs in getCoveringSubRegIndexes

If `getCoveringSubRegIndexes` returns a set of subregister indexes where some subregisters overlap others, it can create unsatisfiable copy bundles that eventually cause VirtRegRewriter to error out due to "cycles in copy bundle".

We can simply prevent this by making the algorithm skip over subregisters indexes that would cause an overlap with already-covered lanes.

Note that in the case of AMDGPU, this problem is caused by the lack of subregisters indexes for 13/14/15-register tuples. We have everything up until 12, then we have 16 and 32 but nothing between 12 and 16.
This means that the best candidate to do the least amount of copies when splitting a 29-register tuple was to copy (e.g.) 0-15 and 14-29, causing an overlap.
With this change, getCoveringSubRegIndexes will now prefer using something like 0-15, 16-28 and 1

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D141576

21 months ago[AMDGPU] Precommit test for D141576
Pierre van Houtryve [Tue, 17 Jan 2023 08:50:29 +0000 (03:50 -0500)]
[AMDGPU] Precommit test for D141576

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D141903

21 months ago[LowerIFunc] Remove typed pointer test (NFC)
Nikita Popov [Wed, 18 Jan 2023 08:45:25 +0000 (09:45 +0100)]
[LowerIFunc] Remove typed pointer test (NFC)

21 months ago[HWASAN] Add leak sanitizer flag support
Kirill Stoimenov [Wed, 18 Jan 2023 07:50:27 +0000 (23:50 -0800)]
[HWASAN] Add leak sanitizer flag support

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D141710

21 months ago[HWASA] Restore LsanMetadata from D141642 Diff5
Vitaly Buka [Wed, 18 Jan 2023 07:40:30 +0000 (23:40 -0800)]
[HWASA] Restore LsanMetadata from D141642 Diff5

Unlike asan, we can't use pointer arithmetics to get from user ptr to
metadata. Asan does not use CombinedAllocator::GetMetadata and store
metadata next to the user data.

21 months ago[libc++][ranges] Mark completed Ranges papers and issues as done, bump version macro
Konstantin Varlamov [Wed, 18 Jan 2023 06:45:46 +0000 (22:45 -0800)]
[libc++][ranges] Mark completed Ranges papers and issues as done, bump version macro

All C++20 Ranges papers and LWG issues are done, with the exception of
https://wg21.link/P2210R2 ("Superior String Splitting"), and marked as
such.

All of these were already implemented prior to this patch except bumping
the feature test macro `__cpp_lib_ranges` as required by
https://wg21.link/P2325R3 ("Views should not be required to be default
constructible"). Note that, even though P2325R3 was voted into C++23, it
was voted with a recommendation for vendors to retroactively apply the
change to C++20 (see https://github.com/cplusplus/papers/issues/1007).

Differential Revision: https://reviews.llvm.org/D139900

21 months ago[gn build] Port 28b6f38d0a84
LLVM GN Syncbot [Wed, 18 Jan 2023 06:35:55 +0000 (06:35 +0000)]
[gn build] Port 28b6f38d0a84

21 months agoRevert "Diagnose extensions in 'offsetof'"
Arthur Eubanks [Wed, 18 Jan 2023 06:31:56 +0000 (22:31 -0800)]
Revert "Diagnose extensions in 'offsetof'"

This reverts commit f1f0a0d8e8fdd2e534d9423b2e64c6b8aaa53aee.

Causes crashes on

$ echo 'typedef int a; void c() { __builtin_offsetof(struct {a b}, b); }' | bin/clang -cc1 -emit-llvm -o /dev/null - -x c

21 months agoRevert "nullptr returned from ActOnTag() is not a valid result"
Arthur Eubanks [Wed, 18 Jan 2023 06:31:25 +0000 (22:31 -0800)]
Revert "nullptr returned from ActOnTag() is not a valid result"

This reverts commit 3925fbc80019f72bf3f5174736f348acfb5768b0.

Dependent commit to be reverted.

21 months ago[RISCV][NFC] Use uncompressInst to relax instructions
wangpc [Wed, 18 Jan 2023 06:24:45 +0000 (14:24 +0800)]
[RISCV][NFC] Use uncompressInst to relax instructions

As the TODO said, we can just use generated uncompressInst to
relax instructions.

Reviewed By: craig.topper, kito-cheng

Differential Revision: https://reviews.llvm.org/D141834

21 months ago[RISCV][NFC] Move compressInst/uncompressInst to RISCVBaseInfo
wangpc [Wed, 18 Jan 2023 06:24:23 +0000 (14:24 +0800)]
[RISCV][NFC] Move compressInst/uncompressInst to RISCVBaseInfo

We have several usages of compressInst/uncompressInst in different
files, which results in duplicated code. We move their implementations
to RISCVBaseInfo under namespace RISCVRVC to remove these duplications.

Reviewed By: craig.topper, asb

Differential Revision: https://reviews.llvm.org/D141897

21 months ago[TableGen][NFC] Add postfix for validators of CompressPat
wangpc [Wed, 18 Jan 2023 06:24:03 +0000 (14:24 +0800)]
[TableGen][NFC] Add postfix for validators of CompressPat

So that we won't get redefinition errors if we use compressInst
and uncompressInst in the same file.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D141896

21 months ago[JITLink] Add an initial implementation of JITLink for ELF/LoongArch
wanglei [Tue, 17 Jan 2023 07:10:00 +0000 (15:10 +0800)]
[JITLink] Add an initial implementation of JITLink for ELF/LoongArch

This implementation supports basic relocation types and adds EHFrame,
Got/Plt handling passes.
This patch also enables JIT support for LoongArch64.

With this patch, I successfully run hello.ll and simple_throw.ll
(which is generated from test-suite/SingleSource/Regression/C++/EH/simple_throw.cpp)
using the `lli` command with options `--jit-kind=orc --jit-linker=jitlink`.

Note: `hasJIT` property of LoongArch32 remains false as there is no
validation environment.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D141036

21 months ago[Serialization] Serialize the new added FunctionDeclBits: IsIneligibleOrNotSelected
Chuanqi Xu [Tue, 17 Jan 2023 09:05:52 +0000 (17:05 +0800)]
[Serialization] Serialize the new added FunctionDeclBits: IsIneligibleOrNotSelected

Close https://github.com/llvm/llvm-project/issues/59719.

The root cause of the problem is that we forgot to serialize a new
introduced bit to FunctionDeclBits. Maybe we need to find some methods
to work for detecting this.

21 months ago[NFC] Disable test on AIX due to different default output
Jake Egan [Wed, 18 Jan 2023 05:55:16 +0000 (00:55 -0500)]
[NFC] Disable test on AIX due to different default output

Previous attempt to stop this test from running on AIX didn't work,
so revert it and require not system-aix instead.

This reverts commit b1ac375e11c801be2a1e07e87be91ae54decf2eb.

21 months ago[gn build] Manually port e022ca8
Arthur Eubanks [Wed, 18 Jan 2023 06:13:29 +0000 (22:13 -0800)]
[gn build] Manually port e022ca8

21 months ago[perf-training] Check extension in findFilesWithExtension
Amir Ayupov [Tue, 10 Jan 2023 02:07:26 +0000 (18:07 -0800)]
[perf-training] Check extension in findFilesWithExtension

`findFilesWithExtension` helper checks for `endswith(extension)` instead of
exactly matching the file extension. This causes it to match unrelated files,
for example, `.profdata` files while matching `.fdata` files:

http://157.230.108.44:8011/#/builders/56/builds/247
```
Merging data from /worker/worker/bolt-x86_64-ubuntu-clang-bolt-gcc/build/tools/clang/prof.fdata.1124569.fdata...
Merging data from /worker/worker/bolt-x86_64-ubuntu-clang-bolt-gcc/build/tools/clang/test/Frontend/Output/optimization-remark-with-hotness-new-pm.c.tmp.profdata...
```

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D141342

21 months ago[mlir] Fixed memory leak after D141726.
Slava Zakharin [Wed, 18 Jan 2023 03:25:23 +0000 (19:25 -0800)]
[mlir] Fixed memory leak after D141726.

Reported in https://lab.llvm.org/buildbot/#/builders/5/builds/30788

Differential Revision: https://reviews.llvm.org/D141985

21 months agollvm-reduce: Reduce ifuncs
Matt Arsenault [Tue, 22 Nov 2022 21:55:44 +0000 (16:55 -0500)]
llvm-reduce: Reduce ifuncs

Reduce by calling the resolver function at the use site, and inserting
an indirect call. Try to delete if there are no uses left over.

We should also probably try to do something about constantexpr uses;
perhaps treat them like aliases.

21 months agoUtils: Add utility pass to lower ifuncs
Matt Arsenault [Fri, 2 Dec 2022 00:02:18 +0000 (19:02 -0500)]
Utils: Add utility pass to lower ifuncs

Create a global constructor which will initialize a global table of
function pointers. For now, this is only used as a reduction technique
for llvm-reduce.

In the future this may be useful to support ifunc on systems where the
program loader doesn't natively support it.

21 months agollvm-reduce: Simplify async usage by avoiding lambda
Matt Arsenault [Wed, 18 Jan 2023 00:14:16 +0000 (19:14 -0500)]
llvm-reduce: Simplify async usage by avoiding lambda

Use the variadic template form to avoid naming all the
parameters twice.

21 months agollvm-reduce: Use StringRef/ArrayRef
Matt Arsenault [Sat, 14 Jan 2023 21:37:46 +0000 (16:37 -0500)]
llvm-reduce: Use StringRef/ArrayRef

21 months agollvm-reduce: Add missing consts
Matt Arsenault [Sat, 14 Jan 2023 20:15:44 +0000 (15:15 -0500)]
llvm-reduce: Add missing consts

21 months ago[hwasan] Fix LsanMetadata::LsanMetadata
Vitaly Buka [Wed, 18 Jan 2023 03:21:17 +0000 (19:21 -0800)]
[hwasan] Fix LsanMetadata::LsanMetadata

21 months ago[Flang] Fix parsing error on loop count compiler directive
Nadeem, Usman [Wed, 18 Jan 2023 02:53:51 +0000 (18:53 -0800)]
[Flang] Fix parsing error on loop count compiler directive

Fixes: https://github.com/llvm/llvm-project/issues/58731
Fixes: https://github.com/llvm/llvm-project/issues/56678

Only handles this form which was reported: `!DIR$ LOOP COUNT (n1[, n2]...)`

Differential Revision: https://reviews.llvm.org/D141976

Change-Id: I768c8cb9f289c5fc4adee1ef8262c6d827574f27

21 months ago[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.
chendewen [Wed, 18 Jan 2023 03:02:46 +0000 (11:02 +0800)]
[AArch64][SVE] Add more intrinsics in 'isZeroingInactiveLanes'.

The REINTERPRET_CAST operation generates redundant and and ptrue instructions.
For some instructions, this is redundant, because its inactive lanes are zeroed by construction.
For example. Codegen before:
```
facgt p2.d, p0/z, z4.d, z1.d
ptrue p1.d
and p1.b, p2/z, p2.b, p1.b
```
After:
```
facgt p1.d, p0/z, z4.d, z1.d
```
ref: https://reviews.llvm.org/D129851

Reviewed By:sdesmalen,paulwalker-arm

Differential Revision:https://reviews.llvm.org/D141469

21 months agoAdd NVGPUUtil bazel lib
Manish Gupta [Tue, 17 Jan 2023 23:22:30 +0000 (15:22 -0800)]
Add NVGPUUtil bazel lib

21 months ago[C++20] [Modules] Deprecate `-fmodules-ts` flag
Chuanqi Xu [Mon, 16 Jan 2023 07:51:29 +0000 (15:51 +0800)]
[C++20] [Modules] Deprecate `-fmodules-ts` flag

Close https://github.com/llvm/llvm-project/issues/60060

Reviewed By: aaron.ballman, erichkeane

Differential Revision: https://reviews.llvm.org/p/erichkeane/

21 months ago[RISCV] Eliminate the need to pass both RISCVSubtarget and MCSubtargetInfo to isCompr...
Craig Topper [Wed, 18 Jan 2023 02:04:55 +0000 (18:04 -0800)]
[RISCV] Eliminate the need to pass both RISCVSubtarget and MCSubtargetInfo to isCompressibleInst.

RISCVSubtarget should be a superclass of MCSubtargetInfo so should
have all the same information. Now we pass RISCVSubtarget by
reference and name it STI.

Confusingly, we seem to have been using an MCSubtargetInfo from
the TargetMachine rather than the one associated with the function
we are operating. I'm going to assume that was a mistake and not
intentional.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D141966

21 months ago[C++] [Coroutines] Deprecates the '-fcoroutines-ts' flag
Chuanqi Xu [Thu, 12 Jan 2023 08:23:46 +0000 (16:23 +0800)]
[C++] [Coroutines] Deprecates the '-fcoroutines-ts' flag

According to https://github.com/llvm/llvm-project/issues/59110, the
`-fcoroutines-ts` flag should be deprecated.

Reviewed By: aaron.ballman, philnik

Differential Revision: https://reviews.llvm.org/D141572

21 months ago[-Wunsafe-buffer-usage][NFC] Refactor checkUnsafeBufferUsage
Jan Korous [Wed, 18 Jan 2023 01:51:37 +0000 (17:51 -0800)]
[-Wunsafe-buffer-usage][NFC] Refactor checkUnsafeBufferUsage

Differential Revision: https://reviews.llvm.org/D141333

21 months ago[HWASAN] Implemented LSAN SetLsanTag and IgnoreObjectLocked
Kirill Stoimenov [Wed, 18 Jan 2023 00:50:48 +0000 (16:50 -0800)]
[HWASAN] Implemented LSAN SetLsanTag and IgnoreObjectLocked

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D141642

21 months ago[NFC][bazel] Add export_files for utils/textmate/mlir.json
Jordan Rupprecht [Wed, 18 Jan 2023 01:16:36 +0000 (17:16 -0800)]
[NFC][bazel] Add export_files for utils/textmate/mlir.json

21 months ago[libc++][NFC] Split up ranges.transform.pass.cpp
Nikolas Klauser [Tue, 17 Jan 2023 21:48:00 +0000 (22:48 +0100)]
[libc++][NFC] Split up ranges.transform.pass.cpp

`ranges.transform.pass.cpp` takes ~42s to run on my machine, `ranges.transform.binary.pass.cpp` takes ~26s and `ranges.transform.unary.pass.cpp` takes ~2s.

Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D141965

21 months ago[NFC] [scudo] syntax-check DCHECK arguments if DCHECK is off
Florian Mayer [Fri, 13 Jan 2023 19:15:37 +0000 (11:15 -0800)]
[NFC] [scudo] syntax-check DCHECK arguments if DCHECK is off

This is a widespread technique, used in at least:

* ABSL: https://github.com/abseil/abseil-cpp/blob/master/absl/log/internal/check_op.h#L52
* Chromium: https://source.chromium.org/chromium/chromium/src/+/main:base/check.h;l=185?q=DCHECK%20f:base&ss=chromium
* Android: https://cs.android.com/android/platform/superproject/+/master:system/libbase/include/android-base/logging.h;drc=bda7f0a0cc945c860713a1dc497919f17fad1651;l=321

Reviewed By: Chia-hungDuan, vitalybuka

Differential Revision: https://reviews.llvm.org/D141713

21 months ago[-Wunsafe-buffer-usage] Emit warnings about unsafe operations on arrays
Rashmi Mudduluru [Wed, 18 Jan 2023 00:28:23 +0000 (16:28 -0800)]
[-Wunsafe-buffer-usage] Emit warnings about unsafe operations on arrays

Differential Revision: https://reviews.llvm.org/D141725/new/

21 months ago[HWASan] link to doc in reports on Android
Florian Mayer [Tue, 17 Jan 2023 21:51:29 +0000 (13:51 -0800)]
[HWASan] link to doc in reports on Android

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D141973

21 months ago[OpenMP] Support kernel record and replay
Giorgis Georgakoudis [Tue, 17 Jan 2023 23:35:44 +0000 (15:35 -0800)]
[OpenMP] Support kernel record and replay

This patch adds functionality for recording and replaying the execution of OpenMP offload kernels, based on an original implementation by Steve Rangel. The patch extends libomptarget to extract a json description of the kernel, the device image binary, and a device memory snapshot before and after the execution of a recorded kernel. Kernel recording/replaying in libomptarget is controlled through env vars (LIBOMPTARGET_RECORD, LIBOMPTARGET_REPLAY). It provides a tool, llvm-omp-kernel-replay, for replaying a kernel using the extracted information with the ability to verify replayed execution using the post-execution device memory snapshot, also supporting changing the number of teams/threads for replaying.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D138931

21 months ago[nfc][mlgo] Remove abstraction layers for training logger
Mircea Trofin [Tue, 17 Jan 2023 21:57:02 +0000 (13:57 -0800)]
[nfc][mlgo] Remove abstraction layers for training logger

This follows from D141720

Differential Revision: https://reviews.llvm.org/D141967

21 months ago[MachineBasicBlock] Explicit FT branching param
Anshil Gandhi [Tue, 17 Jan 2023 21:34:27 +0000 (14:34 -0700)]
[MachineBasicBlock] Explicit FT branching param

Introduce a parameter in getFallThrough() to optionally
allow returning the fall through basic block in spite of
an explicit branch instruction to it. This parameter is
set to false by default.

Introduce getLogicalFallThrough() which calls
getFallThrough(false) to obtain the block while avoiding
insertion of a jump instruction to its immediate successor.

This patch also reverts the changes made by D134557 and
solves the case where a jump is inserted after another jump
(branch-relax-no-terminators.mir).

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D140790

21 months agoRevert ""Reland "[pgo] Avoid introducing relocations by using private alias""
Arthur Eubanks [Tue, 17 Jan 2023 23:40:49 +0000 (15:40 -0800)]
Revert ""Reland "[pgo] Avoid introducing relocations by using private alias""

This reverts commit 6e5cbc097a5ac7fa95a8f425af8b03958151c763.

Causes link errors, see http://go/crb/1408161.

21 months agoFix OSX build break introduced by D141720
Mircea Trofin [Tue, 17 Jan 2023 23:14:30 +0000 (15:14 -0800)]
Fix OSX build break introduced by D141720

21 months ago[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.
Rahman Lavaee [Wed, 7 Dec 2022 06:37:33 +0000 (22:37 -0800)]
[Propeller] Use Fixed MBB ID instead of volatile MachineBasicBlock::Number.

Let Propeller use specialized IDs for basic blocks, instead of MBB number.

This allows optimizations not just prior to asm-printer, but throughout the entire codegen.
This patch only implements the functionality under the new `LLVM_BB_ADDR_MAP` version, but the old version is still being used. A later patch will change the used version.

####Background
Today Propeller uses machine basic block (MBB) numbers, which already exist, to map native assembly to machine IR.  This is done as follows.
    - Basic block addresses are captured and dumped into the `LLVM_BB_ADDR_MAP` section just before the AsmPrinter pass which writes out object files. This ensures that we have a mapping that is close to assembly.
    - Profiling mapping works by taking a virtual address of an instruction and looking up the `LLVM_BB_ADDR_MAP` section to find the MBB number it corresponds to.
    - While this works well today, we need to do better when we scale Propeller to target other Machine IR optimizations like spill code optimization.  Register allocation happens earlier in the Machine IR pipeline and we need an annotation mechanism that is valid at that point.
    - The current scheme will not work in this scenario because the MBB number of a particular basic block is not fixed and changes over the course of codegen (via renumbering, adding, and removing the basic blocks).
    - In other words, the volatile MBB numbers do not provide a one-to-one correspondence throughout the lifetime of Machine IR.  Profile annotation using MBB numbers is restricted to a fixed point; only valid at the exact point where it was dumped.
    - Further, the object file can only be dumped before AsmPrinter and cannot be dumped at an arbitrary point in the Machine IR pass pipeline.  Hence, MBB numbers are not suitable and we need something else.
####Solution
We propose using fixed unique incremental MBB IDs for basic blocks instead of volatile MBB numbers. These IDs are assigned upon the creation of machine basic blocks. We modify `MachineFunction::CreateMachineBasicBlock` to assign the fixed ID to every newly created basic block.  It assigns `MachineFunction::NextMBBID` to the MBB ID and then increments it, which ensures having unique IDs.

 To ensure correct profile attribution, multiple equivalent compilations must generate the same Propeller IDs. This is guaranteed as long as the MachineFunction passes run in the same order. Since the `NextBBID` variable is scoped to `MachineFunction`, interleaving of codegen for different functions won't cause any inconsistencies.

The new encoding is generated under the new version number 2 and we keep backward-compatibility with older versions.

####Impact on Size of the `LLVM_BB_ADDR_MAP` Section
Emitting the Propeller ID results in a 23% increase in the size of the `LLVM_BB_ADDR_MAP` section for the clang binary.

Reviewed By: tmsriram

Differential Revision: https://reviews.llvm.org/D100808

21 months ago[RISCV] Use zeroext instead of signext in mask reduction tests. NFC
Craig Topper [Tue, 17 Jan 2023 23:15:41 +0000 (15:15 -0800)]
[RISCV] Use zeroext instead of signext in mask reduction tests. NFC

This is more consistent with ABI and how bools on RISC-V are
represented.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D141963

21 months ago[libc++] Add ALLOW_RETRIES to a few flaky tests
Nikolas Klauser [Tue, 17 Jan 2023 02:54:32 +0000 (03:54 +0100)]
[libc++] Add ALLOW_RETRIES to a few flaky tests

Fixes #59464

Reviewed By: ldionne, Mordante, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D141885

21 months ago[SystemZ][z/OS] Fix cityhash lit for EBCDIC
Zibi Sarbinowski [Tue, 17 Jan 2023 22:34:43 +0000 (16:34 -0600)]
[SystemZ][z/OS] Fix cityhash lit for EBCDIC

This will fix __murmur2_or_cityhash.pass.cpp in EBCDIC mode. The reason it fails is because of string literals are being used as input to CityHash algorithm so we need to adjust the EBCDIC expected results.

Reviewed By: #libc, philnik

Differential Revision: https://reviews.llvm.org/D141623

21 months ago[CompilerRT] Remove sanitizer support for i386 iossim
usama hameed [Wed, 11 Jan 2023 01:54:46 +0000 (17:54 -0800)]
[CompilerRT] Remove sanitizer support for i386 iossim

Summary:
This patch removes building sanitizers for i386 iossim. This is to reduce the toolchain size.
Reviewers:

Subscribers:

21 months ago[CompilerRT] Remove ubsan static runtime on Apple
usama hameed [Wed, 11 Jan 2023 23:16:30 +0000 (15:16 -0800)]
[CompilerRT] Remove ubsan static runtime on Apple

This patch removes the static ubsan runtime on Apple devices. The motivation
is to reduce the toolchain size.

rdar://102061519

Differential Revision: https://reviews.llvm.org/D141550

21 months ago[ORC-RT] Reapply ab59185fbfb (Add IntervalMap/Set), with missing files included.
Lang Hames [Tue, 17 Jan 2023 21:45:38 +0000 (13:45 -0800)]
[ORC-RT] Reapply ab59185fbfb (Add IntervalMap/Set), with missing files included.

The original commit was reverted in c151e8428a due missing files (thanks Kazu!).

21 months agoRevert "[ORC-RT] Add IntervalMap and IntervalSet collections."
Kazu Hirata [Tue, 17 Jan 2023 21:36:03 +0000 (13:36 -0800)]
Revert "[ORC-RT] Add IntervalMap and IntervalSet collections."

This reverts commit ab59185fbfb15c9ce5a64e3aacd3a8c7f6a97621.

It looks like this commit is missing interval_set_test.cpp.

21 months ago[Analysis] Fix a warning
Kazu Hirata [Tue, 17 Jan 2023 21:36:02 +0000 (13:36 -0800)]
[Analysis] Fix a warning

This patch fixes:

  llvm/include/llvm/Analysis/Utils/TrainingLogger.h:94:14: error:
  private field 'IncludeReward' is not used
  [-Werror,-Wunused-private-field]

21 months ago[RISCV][TableGen] Correct formatting in RISCVGenCompressInstEmitter.inc. NFC
Craig Topper [Tue, 17 Jan 2023 21:35:08 +0000 (13:35 -0800)]
[RISCV][TableGen] Correct formatting in RISCVGenCompressInstEmitter.inc. NFC

21 months ago[clang][sema][Matrix] Move code from try-cast to `TypeLocVisitor`. NFC intended.
Volodymyr Sapsai [Tue, 10 Jan 2023 20:24:07 +0000 (12:24 -0800)]
[clang][sema][Matrix] Move code from try-cast to `TypeLocVisitor`. NFC intended.

`MatrixTypeLoc` is not "sugar" `TypeLoc` and doesn't require to use the
underlying `TypeLoc` instead.

Differential Revision: https://reviews.llvm.org/D141422

21 months ago[ORC-RT] Add IntervalMap and IntervalSet collections.
Lang Hames [Tue, 17 Jan 2023 01:22:28 +0000 (17:22 -0800)]
[ORC-RT] Add IntervalMap and IntervalSet collections.

IntervalMap is an optionally-coalescing map -- it uses half-open ranges as keys,
allows lookups based on elements of the ranges (returning an iterator to the
containing range) and optionally coalesces adjacent ranges that have the same
value.

IntervalSet is an optionally-coalescing set based on IntervalMap.

These collections will be used to store and lookup metadata section ranges,
e.g. unwind-info ranges.