serge-sans-paille [Tue, 13 Apr 2021 14:14:32 +0000 (16:14 +0200)]
Simplify BitVector code
Instead of managing memory by hand, delegate it to std::vector. This makes the
code much simpler, and also avoids repeatedly computing the storage size.
According to valgrind --tool=callgrind, this also slightly decreases the
instruction count, but by a small margin.
Differential Revision: https://reviews.llvm.org/D100387
Mehdi Amini [Wed, 14 Apr 2021 19:25:43 +0000 (19:25 +0000)]
Revert "Refactor the architecture of mlir-reduce"
This reverts commit
a32846b1d0147f30f6dde4bfec453cd681937005.
The build is broken with -DBUILD_SHARED_LIBS=ON:
tools/mlir/lib/Reducer/CMakeFiles/obj.MLIRReduce.dir/Tester.cpp.o: In function `mlir::Tester::isInteresting(mlir::ModuleOp) const':
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xa8): undefined reference to `mlir::OpPrintingFlags::OpPrintingFlags()'
Tester.cpp:(.text._ZNK4mlir6Tester13isInterestingENS_8ModuleOpE+0xc6): undefined reference to `mlir::Operation::print(llvm::raw_ostream&, mlir::OpPrintingFlags)'
Mehdi Amini [Tue, 13 Apr 2021 00:46:48 +0000 (00:46 +0000)]
Update OpBase.td AttrDef class to define default value for returnType and convertFromStorage (NFC)
Differential Revision: https://reviews.llvm.org/D100356
Fred Riss [Wed, 6 May 2020 00:49:24 +0000 (17:49 -0700)]
[lldb] Only override target arch if it is compatible
It looks like the goal of this code is to provide a more precise
architecture definition for the target when attaching to a process. When
attaching to a foreign debugserver, you might get into a situation where
the active (host) platform will give you bogus information on the target
process.
This change allows the platform to override the target arch only with a
compatible architecture. This fixes TestTargetXMLArch.py on Apple
Silicon. Another alternative would be to just fail in this scenario and
update the test(s).
Pavel Labath [Tue, 13 Apr 2021 16:02:20 +0000 (18:02 +0200)]
[lldb/test] Remove the "expect_captures" feature of lldb-server tests
This functionality is used exactly once, and it is trivial to implement
it differently (capture into two distinct variables, and compare for
equality afterwards).
Pavel Labath [Tue, 13 Apr 2021 14:07:28 +0000 (16:07 +0200)]
[lldb] Move QThreadSuffixSupported and QListThreadsInStopReply into llgs
These were in the shared llgs+platform code, but they only make sense
for llgs (as they deal with how the server reports information about
debugged processes).
Nico Weber [Wed, 14 Apr 2021 18:59:18 +0000 (14:59 -0400)]
fix typo to cycle bots
Mehrnoosh Heidarpour [Wed, 14 Apr 2021 18:49:46 +0000 (20:49 +0200)]
[InstCombine] Conditionally emit nowrap flags when combining two adds
Currently, the InstCombineCompare is combining two add operations
into a single add operation which always has a nsw flag, without
checking the conditions to see if this flag should be present
according to the original two add operations or not.
This patch will change the InstCombineCompare to emit the nsw or
nuw only when these flags are allowed to be generated according to
the original add operations and remove the possibility of applying
wrong optimization with passes that will perform on the IR later
in the pipeline.
To confirm that the current results are buggy and the results after
proposed patch are the correct IR the following examples from Alive2
are attached; the same results can be seen in the case of nuw flag
and nsw is just used as an example. The following link shows that
the generated IR with current LLVM is a buggy IR when none of the
original add operations have nsw flag.
https://alive2.llvm.org/ce/z/WGaDrm
The following link proves that the generated IR after the patch in
the former case is the correct IR.
https://alive2.llvm.org/ce/z/wQ7G_e
Differential Revision: https://reviews.llvm.org/D100095
Nico Weber [Wed, 14 Apr 2021 18:52:41 +0000 (14:52 -0400)]
fix typo to cycle bots
LLVM GN Syncbot [Wed, 14 Apr 2021 18:37:22 +0000 (18:37 +0000)]
[gn build] Port
f992cfba7173
LLVM GN Syncbot [Wed, 14 Apr 2021 18:37:21 +0000 (18:37 +0000)]
[gn build] Port
e98060fa72cc
Nico Weber [Wed, 14 Apr 2021 18:27:36 +0000 (14:27 -0400)]
[gn build] try to make sync_source_lists_from_cmake.py py3-compatible
William S. Moses [Sun, 4 Apr 2021 02:44:51 +0000 (22:44 -0400)]
[SROA][TBAA] Handle shift of regular TBAA nodes
SROA shifts TBAA nodes in a way that may present a problem for !tbaa but not !tbaa.struct nodes.
Differential Revision: https://reviews.llvm.org/D99851
peter klausler [Wed, 14 Apr 2021 17:57:53 +0000 (10:57 -0700)]
[flang] Correct the interpretation of BIND(C,NAME='')
An empty NAME= should mean that there is no C binding, not the
binding that would result from BIND(C) without a NAME=.
See 18.10.2p2.
Differential Revision: https://reviews.llvm.org/D100494
Alex Lorenz [Wed, 14 Apr 2021 18:27:03 +0000 (11:27 -0700)]
[clang][FileManager] Support empty file name in getVirtualFileRef for serialized diagnostics
After https://reviews.llvm.org/D90484 libclang is unable to read a serialized diagnostic file
which contains a diagnostic which came from a file with an empty filename. The reason being is
that the serialized diagnostic reader is creating a virtual file for the "" filename, which now
fails after the changes in https://reviews.llvm.org/D90484. This patch restores the previous
behavior in getVirtualFileRef by allowing it to construct a file entry ref with an empty name by
pretending its name is "." so that the directory entry can be created.
Differential Revision: https://reviews.llvm.org/D100428
Louis Dionne [Wed, 14 Apr 2021 18:06:55 +0000 (14:06 -0400)]
[libc++] Move guards against std::auto_ptr outside of auto_ptr.h
This makes it clear that headers like <memory> which include auto_ptr
only do that when compiling under an older Standard, or when the removed
feature is explicitly requested.
Louis Dionne [Wed, 14 Apr 2021 18:00:48 +0000 (14:00 -0400)]
[libc++] Move __memory/utilities.h to __memory/allocation_guard.h
This matches the granularity of other headers that were split off of <__memory>.
Louis Dionne [Wed, 14 Apr 2021 17:59:03 +0000 (13:59 -0400)]
[libc++] Split up __memory/base.h into meaningful headers
Shu-Chun Weng [Wed, 14 Apr 2021 07:08:40 +0000 (00:08 -0700)]
[libTooling] Add smart pointer support to the `access` Stencil
This extends smart pointer support beyond the existing `maybeDeref` and
`maybeAddressOf`.
Differential Revision: https://reviews.llvm.org/D100450
Thomas Lively [Wed, 14 Apr 2021 17:42:44 +0000 (10:42 -0700)]
[WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}
Add a custom DAG combine and ISD opcode for detecting patterns like
(uint_to_fp (extract_subvector ...))
before the extract_subvector is expanded to ensure that they will ultimately
lower to f64x2.convert_low_i32x4_{s,u} instructions. Since these instructions
are no longer prototypes and can now be produced via standard IR, this commit
also removes the target intrinsics and builtins that had been used to prototype
the instructions.
Differential Revision: https://reviews.llvm.org/D100425
Martin Probst [Wed, 14 Apr 2021 17:28:51 +0000 (19:28 +0200)]
clang-format: fix undefined behavior.
The previous change failed to initialize the SymbolsMerged field.
Reid Kleckner [Wed, 14 Apr 2021 17:39:48 +0000 (10:39 -0700)]
[COFF] Simplify ICF associated comdat handling
This is a different approach from D98993 that should achieve most of the
same benefit. The two changes are:
1. Sort the list of associated child sections by section name
2. Do not consider associated sections to have children themselves
This fixes the main issue, which was that we sometimes considered an
.xdata section to have a child .pdata section. That lead to slow links
and larger binaries (less xdata folding).
Otherwise, this should be NFC: we go back to ignoring .debug/.gljmp and
other metadata sections rather than only looking at pdata/xdata. We
discovered that we do care about other associated sections, like ASan
global registration metadata.
Nikita Popov [Wed, 14 Apr 2021 17:37:47 +0000 (19:37 +0200)]
[ValueTracking] Don't require strictly positive for mul nsw recurrence
Just like in the mul nuw case, it's sufficient that the step is
non-zero. If the step is negative, then the values will jump
between positive and negative, "crossing" zero, but the value of
the recurrence is never actually zero.
Mark de Wever [Wed, 14 Apr 2021 17:33:03 +0000 (19:33 +0200)]
[NFC][libc++] Fixes a documentation typo.
peter klausler [Tue, 13 Apr 2021 23:04:42 +0000 (16:04 -0700)]
[flang] Fix Boolean flag arguments
Two sites in io-api.cpp pass the wrong Boolean flag value to
signify that a new anonymous unit is a formatted file.
Differential Revision: https://reviews.llvm.org/D100419
Jacques Pienaar [Wed, 14 Apr 2021 17:16:30 +0000 (10:16 -0700)]
Refactor the architecture of mlir-reduce
Add iterator for ReductionNode traversal and use range to indicate the region we would like to keep. Refactor the interaction between Pass/Tester/ReductionNode.
Now it'll be easier to add new traversal type and OpReducer
Reviewed By: jpienaar, rriddle
Differential Revision: https://reviews.llvm.org/D99713
Alexey Bataev [Wed, 14 Apr 2021 17:04:40 +0000 (10:04 -0700)]
[SLP]Added a tests for shuffled matched tree entries, NFC.
Momchil Velikov [Wed, 14 Apr 2021 17:05:18 +0000 (18:05 +0100)]
Remove deprecated member functions (NFC)
Remove the member functions getByValAlign and getOrigAlign, there were
no users left.
Differential Revision: https://reviews.llvm.org/D99098
Nikita Popov [Wed, 14 Apr 2021 17:04:01 +0000 (19:04 +0200)]
[ValueTracking] Don't require non-zero step for add nuw
It's okay if the step is zero, we'll just stay at the same non-zero
value in that case. The valuable part of this is that the step
doesn't even need to be a constant anymore.
Nikita Popov [Wed, 14 Apr 2021 16:59:11 +0000 (18:59 +0200)]
[ValueTracking] Add additional non-zero add recurrence test (NFC)
Also drop a number of unused parameters from existing tests.
Stanislav Mekhanoshin [Tue, 13 Apr 2021 19:29:50 +0000 (12:29 -0700)]
[AMDGPU] Factor out SelectSAddrFI()
This is a service function generally useful for selection
of a FI in an SADDR. NFC for now, needed for future patch.
Differential Revision: https://reviews.llvm.org/D100406
peter klausler [Tue, 13 Apr 2021 23:07:58 +0000 (16:07 -0700)]
[flang] Handle END= situations better in runtime input
Debug the input path for READ statements with END= labels;
don't emit errors when the program can handle them.
BeginReadingRecord() member functions have been made
"bool" for more convenient handling of error cases,
and some code in IoErrorHandler has been cleaned up.
Differential Revision: https://reviews.llvm.org/D100421
Sander de Smalen [Wed, 14 Apr 2021 15:53:01 +0000 (16:53 +0100)]
[TTI] NFC: Change getArithmeticInstrCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D100317
Sander de Smalen [Wed, 14 Apr 2021 15:52:51 +0000 (16:52 +0100)]
[TTI] NFC: Change getFPOpCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D100316
Sander de Smalen [Wed, 27 Jan 2021 10:52:58 +0000 (10:52 +0000)]
[TTI] NFC: Change getVectorInstrCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D100315
Sander de Smalen [Wed, 14 Apr 2021 15:50:20 +0000 (16:50 +0100)]
[TTI] NFC: Change getShuffleCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D100314
Sander de Smalen [Tue, 26 Jan 2021 16:32:30 +0000 (16:32 +0000)]
[TTI] NFC: Change getCFInstrCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: samparker
Differential Revision: https://reviews.llvm.org/D100313
Sander de Smalen [Wed, 14 Apr 2021 15:48:07 +0000 (16:48 +0100)]
[TTI] NFC: Change getCallInstrCost to return InstructionCost
This patch migrates the TTI cost interfaces to return an InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D100312
Thomas Lively [Wed, 14 Apr 2021 16:19:26 +0000 (09:19 -0700)]
[WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops
Now that these instructions are no longer prototypes, we do not need to be
careful about keeping them opt-in and can use the standard LLVM infrastructure
for them. This commit removes the bespoke intrinsics we were using to represent
these operations in favor of the corresponding target-independent intrinsics.
The clang builtins are preserved because there is no standard way to easily
represent these operations in C/C++.
For consistency with the scalar codegen in the Wasm backend, the intrinsic used
to represent {f32x4,f64x2}.nearest is @llvm.nearbyint even though
@llvm.roundeven better captures the semantics of the underlying Wasm
instruction. Replacing our use of @llvm.nearbyint with use of @llvm.roundeven is
left to a potential future patch.
Differential Revision: https://reviews.llvm.org/D100411
Mark de Wever [Sat, 20 Feb 2021 10:00:00 +0000 (11:00 +0100)]
[libc++] Make chars_format a bitmask type.
Some of Microsoft's unit tests in D70631 fail because libc++'s
implementation of std::chars_format isn't a proper bitmask type. Adding
the required functions to make std::chars_format a proper bitmask type.
Implements parts of P0067: Elementary string conversions
Differential Revision: https://reviews.llvm.org/D97115
Sjoerd Meijer [Wed, 14 Apr 2021 16:08:09 +0000 (17:08 +0100)]
[SCCP] Follow up of rGbbab9f986c6d. NFC.
This addresses the linter messages, mainly the inconsistent capitalisation of
member functions.
Ties Stuij [Tue, 30 Mar 2021 15:57:50 +0000 (16:57 +0100)]
[arm][compiler-rt] add armv8m.main and arv8.1m.main targets
These changes were enough to compile compiler-rt builtins for armv8m.main and
armv8.1m.main.
Differential Revision: https://reviews.llvm.org/D99600
Tobias Gysi [Wed, 14 Apr 2021 15:18:41 +0000 (15:18 +0000)]
[mlir][linalg] update fusion to support linalg index operations.
The patch updates the linalg fusion pass to add the tile offsets to the indices.
Differential Revision: https://reviews.llvm.org/D100456
Martin Probst [Wed, 14 Apr 2021 15:01:04 +0000 (17:01 +0200)]
review comments
track symbol merge status in references to avoid excesive rewrites
Martin Probst [Wed, 14 Apr 2021 11:43:38 +0000 (13:43 +0200)]
clang-format: [JS] merge import lines.
Multiple lines importing from the same URL can be merged:
import {X} from 'a';
import {Y} from 'a';
Merge to:
import {X, Y} from 'a';
This change implements this merge operation. It takes care not to merge in
various corner case situations (default imports, star imports).
Differential Revision: https://reviews.llvm.org/D100466
Hans Wennborg [Tue, 13 Apr 2021 11:59:03 +0000 (13:59 +0200)]
Add flag for showing skipped headers in -H / --show-includes output
Consider the following set of files:
a.cc:
#include "a.h"
a.h:
#ifndef A_H
#define A_H
#include "b.h"
#include "c.h" // This gets "skipped".
#endif
b.h:
#ifndef B_H
#define B_H
#include "c.h"
#endif
c.h:
#ifndef C_H
#define C_H
void c();
#endif
And the output of the -H option:
$ clang -c -H a.cc
. ./a.h
.. ./b.h
... ./c.h
Note that the include of c.h in a.h is not shown in the output (GCC does the
same). This is because of the include guard optimization: clang knows c.h is
covered by an include guard which is already defined, so when it sees the
include in a.h, it skips it. The same would have happened if #pragma once were
used instead of include guards.
However, a.h *does* include c.h, and it may be useful to show that in the -H
output. This patch adds a flag for doing that.
Differential revision: https://reviews.llvm.org/D100480
Simon Pilgrim [Wed, 14 Apr 2021 14:49:22 +0000 (15:49 +0100)]
[X86] Add PR49028 test case
Benjamin Kramer [Wed, 14 Apr 2021 14:37:38 +0000 (16:37 +0200)]
[Instcombine] Disable memcpy of alloca bypass for instruction sources
This transformation is fundamentally broken when it comes to dominance,
it just happened to work when the source of the memcpy can be moved into
the place of the alloca. The bug shows up a lot more often since
077bff39d46364035a5dcfa32fc69910ad0975d0 allows the source to be a
switch.
It would be possible to check dominance of the source and all its
operands, but that seems very heavy for instcombine.
hsmahesha [Wed, 14 Apr 2021 14:49:25 +0000 (20:19 +0530)]
[AMDGPU] Rename "LDS lowering" pass name.
Rename the name of "LDS lowering" pass from `amdgpu-disable-lower-module-lds` to
`amdgpu-enable-lower-module-lds` as later is consistent and reads better.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D100441
Simon Pilgrim [Wed, 14 Apr 2021 14:07:43 +0000 (15:07 +0100)]
[X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-able binary shuffles.
In the fold SHUFFLE(BINOP(X,Y),BINOP(Z,W)) -> BINOP(SHUFFLE(X,Z),SHUFFLE(Y,W)), check if both X/Z AND Y/W have at least one merge-able shuffle in which case the total number of shuffle should still fall.
Helps with instruction count regressions we saw while fixing PR48823
Simon Pilgrim [Wed, 14 Apr 2021 10:33:41 +0000 (11:33 +0100)]
[SLP] createOp - fix null dereference warning. NFCI.
Only attempt to propagateIRFlags if we have both SelectInst - afaict we shouldn't have matched a min/max reduction without both SelectInst, but static analyzer doesn't know that.
Pablo Barrio [Wed, 24 Mar 2021 11:03:05 +0000 (11:03 +0000)]
[AArch64][v8.5A] Add BTI to all function starts
The existing BTI placement pass avoids inserting "BTI c" when the
function has local linkage and is only directly called. However,
even in this case, there is a (small) chance that the linker later
adds a hunk with an indirect call to the function, e.g. if the
function is placed in a separate section and moved far away from
its callers. Make sure to add BTI for these functions too.
Differential Revision: https://reviews.llvm.org/D99417
Hanhan Wang [Wed, 14 Apr 2021 14:22:41 +0000 (07:22 -0700)]
[mlir][StandardToSPIRV] Add support for lowering memref<?xi1> to SPIR-V
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D100452
LLVM GN Syncbot [Wed, 14 Apr 2021 13:59:02 +0000 (13:59 +0000)]
[gn build] Port
bbab9f986c6d
Sjoerd Meijer [Mon, 12 Apr 2021 18:10:15 +0000 (19:10 +0100)]
[SCCP] Create SCCP Solver
This refactors SCCP and creates a SCCPSolver interface and class so that it can
be used by other passes and transformations. We will use this in D93838, which
adds a function specialisation pass.
This is based on an early version by Vinay Madhusudan.
Differential Revision: https://reviews.llvm.org/D93762
Nico Weber [Wed, 14 Apr 2021 13:24:45 +0000 (09:24 -0400)]
[llvm-symbolizer] remove unused variable
This should've been removed in D83530.
Differential Revision: https://reviews.llvm.org/D100434
Erich Keane [Tue, 13 Apr 2021 19:44:09 +0000 (12:44 -0700)]
CPUDispatch- allow out of line member definitions
ICC permits this, and after some extensive testing it looks like we can
support this with very little trouble. We intentionally don't choose to
do this with attribute-target (despite it likely working as well!)
because GCC does not support that, and introducing said
incompatibility doesn't seem worth it.
Sanjay Patel [Wed, 14 Apr 2021 13:04:15 +0000 (09:04 -0400)]
[InstSimplify] improve efficiency for detecting non-zero value
Stepping through callstacks in the example from D99759 reveals
this potential compile-time improvement.
The savings come from avoiding ValueTracking's computing known
bits if we have already dealt with special-case patterns.
Further improvements in this direction seem possible.
This makes a degenerate test based on PR49785 about 40x faster
(25 sec -> 0.6 sec), but it does not address the larger question
of how to limit computeKnownBitsFromAssume(). Ie, the original
test there is still infinite-time for all practical purposes.
Differential Revision: https://reviews.llvm.org/D100408
Sanjay Patel [Wed, 14 Apr 2021 12:48:47 +0000 (08:48 -0400)]
[ValueTracking] match negative-stepping non-zero recurrence
This is pulled out of D100408.
This avoids a regression that would be exposed by making the
calling code from InstSimplify more efficient.
Sven van Haastregt [Wed, 14 Apr 2021 12:56:26 +0000 (13:56 +0100)]
[OpenCL][Docs] Update OpenCL 3.0 implementation status
Reviewed-By: Anastasia Stulova
Hansang Bae [Mon, 12 Apr 2021 18:26:14 +0000 (13:26 -0500)]
[OpenMP] Fix printing routine for OMP_TOOL_VERBOSE_INIT
Also fixed typo in the verbose message.
Differential Revision: https://reviews.llvm.org/D100414
Sebastian Neubauer [Wed, 14 Apr 2021 12:55:01 +0000 (14:55 +0200)]
[AMDGPU] Mark scavenged SGPR as used
Otherwise it reuses the same register for storing the stack slot
offset if the stack slot offset is big.
Differential Revision: https://reviews.llvm.org/D100461
Sanjay Patel [Wed, 14 Apr 2021 12:30:42 +0000 (08:30 -0400)]
[ValueTracking] reduce code duplication; NFC
The start value can't be null for something to be a non-zero
recurrence, so hoist that common check out of the switch.
Subsequent checks may be incomplete or over-specified as noted in:
D100408
Max Kazantsev [Wed, 14 Apr 2021 12:14:54 +0000 (19:14 +0700)]
[Test] Account for possibility to free memory in loop load PRE test
Zarko Todorovski [Wed, 14 Apr 2021 11:25:07 +0000 (07:25 -0400)]
[AIX] Allow safe for 32bit P8 VSX pattern matching
Pull some of the safe for 32bit pattern matching for Pwr8 and above.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D97909
Martin Storsjö [Wed, 14 Apr 2021 11:59:37 +0000 (14:59 +0300)]
[lit] Remove unnecessary testcases from lit-quoting.txt that fail on macOS
These were added in
37935405efbebc4bd9f1ffac9152571c6a8469dc,
but they fail on macOS (and on Windows with MSYS based tools, before
relanding D98859). Remove the tests that exercise "not not echo", as
the primary thing to test is the plain echo patterns above.
Sanjay Patel [Tue, 13 Apr 2021 18:46:21 +0000 (14:46 -0400)]
[ValueTracking] add unit test for isKnownNonZero(); NFC
We call various value tracking APIs from within -instsimplify,
so I don't think this is visible in a larger test.
Martin Storsjö [Sun, 11 Apr 2021 09:38:40 +0000 (12:38 +0300)]
[clang] [AArch64] Fix Windows va_arg handling for larger structs
Aggregate types over 16 bytes are passed by reference.
Contrary to the x86_64 ABI, smaller structs with an odd (non power
of two) are padded and passed in registers.
Differential Revision: https://reviews.llvm.org/D100374
David Spickett [Mon, 1 Mar 2021 10:55:49 +0000 (10:55 +0000)]
[lldb][AArch64] Simplify MTE memory region test
By checking for cpu and toolchain features ahead
of time we don't need the custom return codes.
Reviewed By: omjavaid
Differential Revision: https://reviews.llvm.org/D97684
Tim Northover [Wed, 14 Apr 2021 10:04:36 +0000 (11:04 +0100)]
SDAG: constant fold bf16 -> i16 casts
This direction is particularly useful because i16 constants are much more
likely to be legal than bf16.
Martin Storsjö [Wed, 14 Apr 2021 09:59:29 +0000 (12:59 +0300)]
[Passes] Enable the relative lookup table converter pass on aarch64
After
d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37, it should work fine
for aarch64 on COFF too. (It was disabled when the patch was
(re)applied in
e96df3e531f506eea75da0f13d0f8aa9a267f975, pending
that fix.)
Roman Lebedev [Wed, 14 Apr 2021 10:02:20 +0000 (13:02 +0300)]
[InstCombine] tmp alloca bypass: ensure that the replacement dominates all alloca uses
After
077bff39d46364035a5dcfa32fc69910ad0975d0,
isDereferenceableForAllocaSize() can recurse into selects,
which is causing a problem for the new test case,
reduced from https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20210412/904154.html
because the replacement (the select) is defined after the first use
of an alloca, so we'd end up with a verifier error.
Now, this new check is too restrictive.
We likely can handle *some* cases, by trying to sink all uses of an alloca
to after the the def.
Simon Pilgrim [Wed, 14 Apr 2021 09:54:18 +0000 (10:54 +0100)]
[X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0)
Relax the fold from rGbaadbe04bf75 to compare any op, not just logic ops, now that the movmsk regressions have been handled.
Simon Pilgrim [Tue, 13 Apr 2021 17:54:00 +0000 (18:54 +0100)]
[X86] Regenerate PR32284.ll test case prefixes. NFC.
Use X64 for 64-bit targets and X86 for 32-bit targets
Simon Pilgrim [Tue, 13 Apr 2021 17:29:15 +0000 (18:29 +0100)]
[X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits in MOVMSK(SHUFFLE(X,u)) -> MOVMSK(X) fold
Extension to rG74f98391a7a4, we can also include any of the upper (known zero) bits in the comparison in the shuffle removal fold, just as long as we demand all the elements of the movmsk source vector.
Nemanja Ivanovic [Wed, 14 Apr 2021 10:00:17 +0000 (05:00 -0500)]
[PowerPC] Fix incorrect subreg typo from
0148bf53f0a0
Martin Storsjö [Tue, 6 Apr 2021 10:33:14 +0000 (13:33 +0300)]
[lit] Always quote arguments containing '[' on windows
This avoids breaking clang-tidy/infrastructure/validate-check-names.cpp
if 'not' is evaluated as a lit internal tool (making TestRunner
invoke 'grep' directly in that test, instead of invoking 'not', which
then invokes 'grep').
The quoting of arguments is still brittle if the executable is an
MSYS based tool though, as MSYS based tools incorrectly unescape
backslashes in quoted arguments (contrary to regular win32 argument
parsing rules), see D99406 and
https://github.com/msys2/msys2-runtime/issues/36 for more examples
of the issues.
Differential Revision: https://reviews.llvm.org/D99938
Martin Storsjö [Tue, 30 Mar 2021 09:28:47 +0000 (12:28 +0300)]
[ARM] [COFF] Properly produce cross-section relative relocations
Differential Revision: https://reviews.llvm.org/D99574
Martin Storsjö [Tue, 30 Mar 2021 09:28:33 +0000 (12:28 +0300)]
[AArch64] [COFF] Properly produce cross-section relative relocations
This fixes breakage on Windows/ARM64 after D94355.
Modelled after the corresponding code for X86; not entirely familiar
with those aspects of that layer otherwise.
Differential Revision: https://reviews.llvm.org/D99572
Martin Storsjö [Wed, 14 Apr 2021 06:05:43 +0000 (09:05 +0300)]
[lldb] Silence GCC warnings about control reaching the end of non-void functions. NFC.
Also remove a superfluous semicolon after the braces for a switch
statement (that wasn't warned about).
Differential Revision: https://reviews.llvm.org/D100447
Liu, Chen3 [Fri, 2 Apr 2021 00:45:26 +0000 (08:45 +0800)]
[i386] Modify the alignment of __m128/__m256/__m512 vector type according i386 abi.
According to i386 System V ABI:
1. when __m256 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 32 byte boundary at the time of the call.
2. when __m512 are required to be passed on the stack, the stack pointer must be aligned on a 0 mod 64 byte boundary at the time of the call.
The current method of clang passing __m512 parameter are as follow:
1. when target supports avx512, passing it with 64 byte alignment;
2. when target supports avx, passing it with 32 byte alignment;
3. Otherwise, passing it with 16 byte alignment.
Passing __m256 parameter are as follow:
1. when target supports avx or avx512, passing it with 32 byte alignment;
2. Otherwise, passing it with 16 byte alignment.
This pach will passing __m128/__m256/__m512 following i386 System V ABI and
apply it to Linux only since other System V OS (e.g Darwin, PS4 and FreeBSD) don't
want to spend any effort dealing with the ramifications of ABI breaks at present.
Differential Revision: https://reviews.llvm.org/D78564
Balázs Kéri [Wed, 14 Apr 2021 08:01:05 +0000 (10:01 +0200)]
[clang-tidy] Add exception flag to bugprone-unhandled-exception-at-new test.
Bogdan Graur [Wed, 14 Apr 2021 07:35:25 +0000 (09:35 +0200)]
[NFC] Fix unused variable warning.
Differential Revision: https://reviews.llvm.org/D100451
Tres Popp [Tue, 13 Apr 2021 15:31:41 +0000 (17:31 +0200)]
[mlir] Change verification order to prevent null dereference
Differential Revision: https://reviews.llvm.org/D100390
LLVM GN Syncbot [Wed, 14 Apr 2021 07:28:18 +0000 (07:28 +0000)]
[gn build] Port
530456caf908
Serguei Katkov [Wed, 14 Apr 2021 06:30:58 +0000 (13:30 +0700)]
[GreedyRA ORE] Separate Folder Reloads and Zero Cost Folder Reloads
Patchpoint instructions have operands which is actually zero cost
(or the same as register) to use the value from the stack.
In terms of statistic it makes same to separate them.
Move from computation instructions related to stack spill/reload to
number of stack slot referenced.
Reviewers: reames, MatzeB, anemet, thegameg
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100016
Balázs Kéri [Wed, 14 Apr 2021 06:47:08 +0000 (08:47 +0200)]
[clang-tidy] Add new check 'bugprone-unhandled-exception-at-new'.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D97196
Jan Svoboda [Tue, 30 Mar 2021 08:45:04 +0000 (10:45 +0200)]
[clang] Fix copy constructor of CompilerInvocation
The `CompilerInvocationBase` class factors out members of `CompilerInvocation` that need special handling (initialization or copy constructor), so that `CompilerInvocation` can be implemented as a simple value object.
Currently, the `AnalyzerOpts` member of `CompilerInvocation` violates that setup. This patch extracts the member to `CompilerInvocationBase` and handles it in the copy constructor the same way other it handles other members.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D99568
Bogdan Graur [Wed, 14 Apr 2021 07:08:28 +0000 (09:08 +0200)]
[NFC] Fix unused warning.
Differential Revision: https://reviews.llvm.org/D100449
Pengfei Wang [Wed, 14 Apr 2021 06:21:52 +0000 (14:21 +0800)]
[LLD] Implement /guard:[no]ehcont
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D99078
Harald van Dijk [Wed, 14 Apr 2021 07:04:37 +0000 (08:04 +0100)]
Revert "Title: [RISCV] Add missing part of instruction vmsge {u}. VX Review By: craig.topper Differential Revision : https://reviews.llvm.org/D100115"
This reverts commit
4d9ccb18f50803a1aa9c0332dc72472bdfec8bc4.
LLVM GN Syncbot [Wed, 14 Apr 2021 06:32:13 +0000 (06:32 +0000)]
[gn build] Port
cbc9c4ea90e1
Nathan Ridge [Mon, 22 Feb 2021 07:55:13 +0000 (02:55 -0500)]
[clangd] Add support for inline parameter hints
Differential Revision: https://reviews.llvm.org/D98748
Serguei Katkov [Mon, 12 Apr 2021 08:12:28 +0000 (15:12 +0700)]
[Live Intervals] Teach Greedy RA to recognize special case live-through
Statepoint instruction has a deopt section which is actually live-through the call.
Currently this is handled by special post pass after RA - fixup-statepoint-caller-saved.
This change teaches Greedy RA that if segment of live interval is ended with statepoint
instruction and its reg is used in deopt bundle then this live interval interferes regmask of this statepoint
and as a result caller-saved register cannot be assigned to this live interval.
Reviewers: reames, dantrushin
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D100296
Hanhan Wang [Wed, 14 Apr 2021 05:36:41 +0000 (22:36 -0700)]
[mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D100403
Min-Yih Hsu [Wed, 14 Apr 2021 04:15:47 +0000 (21:15 -0700)]
[M68k] Put M68kInfo as the direct library dependency for AsmParser
M68kAsmParser uses `llvm::getTheM68kTarget` from M68kInfo, therefore we
should put M68kInfo as its direct dependency. Otherwise the build will
fail when building LLVM libraries as shared objects (building LLVM
libraries statically won't have this problem though).
Serguei Katkov [Wed, 14 Apr 2021 03:37:54 +0000 (10:37 +0700)]
[Live Intervals] Factor-out unionBitMask. NFC.
For further re-usage in other place.
Jonas Devlieghere [Wed, 14 Apr 2021 03:36:02 +0000 (20:36 -0700)]
[lldb] Disable TestClangModulesUpdate.py because it's flaky
The test is failing intermittently on GreenDragon.
rdar://
76540904
Jonas Devlieghere [Wed, 14 Apr 2021 02:04:06 +0000 (19:04 -0700)]
[lldb] Build debugserver 2-way fat on AS
When compiling for arm, build debugserver 2 way fat with an arm64 and
arm64e slice. You can only debug arm64e processes using an arm64e
debugserver.
Wang, Pengfei [Wed, 14 Apr 2021 01:32:48 +0000 (09:32 +0800)]
[X86][AMX] Refactor for PostRA ldtilecfg pass.
This is a follow up of D99010. We didn't consider the live range of shape registers when hoist ldtilecfg. There maybe risks, e.g. we happen to insert it to an invalid range of some registers and get unexpected error.
This patch fixes this problem by storing the value to corresponding stack place of ldtilecfg after all its definition immediately.
This patch also fix a problem in previous code: If we don't have a ldtilecfg which dominates all AMX instructions, we cannot initialize shapes for other ldtilecfg.
There're still some optimization points left. E.g. eliminate unused mov instructions, break the def-use dependency before RA etc.
Reviewed By: LuoYuanke, xiangzhangllvm
Differential Revision: https://reviews.llvm.org/D99966