Pali Rohár [Mon, 25 Oct 2021 13:12:57 +0000 (15:12 +0200)]
tools: kwboot: Recalculate 4-byte data checksum after injecting baudrate code
If data part of image is modified, update 4-byte data checksum.
It looks like A385 BootROM does not verify this checksum for image
loaded via UART, but we do not know if other BootROMs are also ignoring
it. It is always better to provide correct checksum.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Oct 2021 13:12:56 +0000 (15:12 +0200)]
tools: kwboot: Inject baudrate change back code after data part
Some vendor U-Boot kwbimage binaries (e.g. those for A375) have load
address set to zero. Therefore it is not possible to inject code which
changes baudrate back to 115200 Bd before the data part.
So instead inject it after the data part and change kwbimage execution
address to that offset. Also store original execution address into
baudrate change code, so after it changes baudrate back to 115200 Bd, it
can jump to orignal address.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Oct 2021 13:12:55 +0000 (15:12 +0200)]
tools: kwboot: Validate 4-byte image data checksum
Data part of the image contains 4-byte checksum. Validate it when
processing the image.
Signed-off-by: Pali Rohár <pali@kernel.org>
[ refactored ]
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Oct 2021 13:12:54 +0000 (15:12 +0200)]
tools: kwboot: Reserve enough space for patching kwbimage in memory
SPI image header and data parts do not have to be aligned to 128 byte
xmodem block size. So reserve additional memory for aligning header part
and additional memory for aligning data part.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Oct 2021 13:12:53 +0000 (15:12 +0200)]
tools: kwboot: Fix initialization of tty device
Explicitly disable 2 stop bits by clearing CSTOPB flag, disable modem
control flow by clearing CRTSCTS flag and do not send hangup after closing
device by clearing HUPCL flag.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Mon, 25 Oct 2021 13:12:52 +0000 (15:12 +0200)]
tools: kwboot: Initialize rfds to zero
Explicitly zero out the rfds fd_set with FD_ZERO() before using it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:15 +0000 (16:22 +0200)]
pci: pci_mvebu: Fix comment about driver class name
This is a pci driver, not an eth driver.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:14 +0000 (16:22 +0200)]
pci: pci_mvebu: Setup PCI controller to Root Complex mode
Root Complex should be the default mode, let's set it explicitly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:13 +0000 (16:22 +0200)]
pci: pci_mvebu: Do not automatically enable bus mastering on PCI Bridge
Now that PCI Bridge is working, U-Boot's CONFIG_PCI_PNP code automatically
enables memory access and bus mastering when it is needed. So do not
prematurely enable memory access and bus mastering.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:12 +0000 (16:22 +0200)]
pci: pci_mvebu: Fix place of link up detection
PCI Bridge is always accessible also when link is down. So move detection
of link up from mvebu_pcie_of_to_plat() function to mvebu_pcie_valid_addr()
function which is used when accessing PCI config space.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:11 +0000 (16:22 +0200)]
pci: pci_mvebu: Remove unused functions
Functions mvebu_pcie_get_local_bus_nr() and mvebu_pcie_get_local_dev_nr()
are not used, so remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:10 +0000 (16:22 +0200)]
pci: pci_mvebu: Properly configure and use PCI Bridge (PCIe Root Port)
The mysterious "Memory controller" PCI device which is present in PCI
config space is improperly configured and crippled PCI Bridge which acts
as PCIe Root Port for endpoint PCIe card.
This PCI Bridge reports in PCI config space incorrect Class Code (Memory
Controller) and incorrect Header Type (Type 0). It looks like HW bug in
mvebu PCIe controller but apparently it can be changed via mvebu registers
to correct values.
The worst thing is that this PCI Bridge is crippled and its PCI config
registers in range 0x10-0x34 alias access to internal mvebu registers which
have different functionality as PCI Bridge registers. Moreover,
configuration of PCI primary and secondary bus numbers (registers 0x18
and 0x19) is done via totally different mvebu registers via totally strange
method and cannot be done via PCI Bridge config space.
Due to above fact about PCI config range 0x10-0x34, allocate a private
cfgcache[] buffer in the driver, to which PCI config access requests to
the 0x10-0x34 space will be redirected in mvebu_pcie_read_config() and
mvebu_pcie_write_config() functions. Function mvebu_pcie_write_config()
will also catch writes to PCI_PRIMARY_BUS (0x18) and PCI_SECONDARY_BUS
(0x19) registers and set PCI Bridge primary and secondary bus numbers via
mvebu's own method.
Also, Expansion ROM Base Address register (0x38) is available, but at
different offset 0x30. So recalculate register offset before accessing PCI
config space.
After these steps U-Boot sees working PCI Bridge and CONFIG_PCI_PNP code
can finally start enumerating all PCIe devices correctly, even with more
complicated PCI topology. So update also mvebu_pcie_valid_addr() function
to reflect state of the real device topology.
Each PCIe port is de-facto isolated and every PCI Bridge which is part of
PCIe Root Complex is also isolated, so put them on separate PCI buses as
(local) device 0.
U-Boot already supports enumerating separate PCI buses, real (HW) bus
number can be retrieved by "PCI_BUS(bdf) - dev_seq(bus)" code, so update
config read/write functions to properly handle more complicated tree
topologies (e.g. when a PCIe switch with multiple PCI buses is connected
to the PCIe port).
Local bus number and local device number on mvebu are used for determining
which config request type is used (Type 0 vs Type 1). On normal non-broken
PCIe hardware it is done by primary and secondary bus numbers. So correctly
translate settings between these numbers to ensure that correct config
requests are sent over the PCIe bus.
As bus numbers are correctly re-configured, it does not make sense to print
some initial bogus configuration during probe, so remove this debug code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:09 +0000 (16:22 +0200)]
pci: pci_mvebu: Fix read_config() with PCI_SIZE_8 or PCI_SIZE_16
When reading 8 or 16 bits from config space, use appropriate readb() or
readw() calls. This ensures that PCIe controller does not read more bits
from endpoint card as asked by read_config() function.
Technically there should not be an issue with reading data from config
space which are not later used as there are no clear-by-read registers.
But it is better to use correct read operation based on requested size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 14:22:08 +0000 (16:22 +0200)]
pci: pci_mvebu: Fix write_config() with PCI_SIZE_8 or PCI_SIZE_16
Current implementation of write_config() is broken for PCI_SIZE_8 or
PCI_SIZE_16 as it always uses writel(), which means that write operation
is always 32-bit, so upper 24 bits for PCI_SIZE_8 and upper 16 bits for
PCI_SIZE_16 are cleared.
Fix this by using writeb() and writew(), respectively.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 1 Nov 2021 19:16:16 +0000 (15:16 -0400)]
Prepare v2022.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 1 Nov 2021 12:19:22 +0000 (12:19 +0000)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 1 Nov 2021 12:14:45 +0000 (08:14 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- Fixes for x86 build with Clang/LLVM compiler
- Tangier ACPI changes
- Edison SD card detect pin fix
- EFI on x86 doc update with latest instructions
- PXE utility fixes to align with latest x86 zboot implementation
Andy Shevchenko [Wed, 27 Oct 2021 14:23:38 +0000 (17:23 +0300)]
x86: tangier: pinmux: Move error message to the caller
Move error message to the caller of mrfld_pinconfig*() in order
to unify them in the future.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Wed, 27 Oct 2021 14:23:37 +0000 (17:23 +0300)]
x86: tangier: pinmux: Move is_protected assignment closer to its user
Move is_protected assignment closer to its user.
This increases readability and makes maintenance easier.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Wed, 27 Oct 2021 11:28:10 +0000 (14:28 +0300)]
x86: edison: Don't take SD card detect pin into consideration
There are two PCB designs in the wild which use the opposite
signaling for SD card detection. This makes U-Boot working
in one case and failing in the other. Quirk this out by
disconnecting SD card detection pin from the PCB by switching
it to mode 3. In the disconnected state the read value is always
the same and inverted to what we are expecting in the code.
BugLink: https://github.com/edison-fw/meta-intel-edison/issues/136
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Wed, 27 Oct 2021 11:28:09 +0000 (14:28 +0300)]
x86: tangier: Enable support for SD/SDIO family in the pinmux driver
We would need to quirk out the Card Detect case and for that we allow
configuring the SD/SDIO family of pins.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Alistair Delva [Wed, 20 Oct 2021 21:31:30 +0000 (21:31 +0000)]
x86: Fix i8254 ifdef include guard
When building U-Boot with clang, it notices that the i8254.h include
guard does not work correctly due to a typo. Fix it.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the other same typo at the end of the same file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Alistair Delva [Wed, 20 Oct 2021 21:31:29 +0000 (21:31 +0000)]
x86: chromebook_coral: fix C block comment
Fix a warning seen when compiling this dts file.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Wed, 20 Oct 2021 12:51:18 +0000 (15:51 +0300)]
x86: tangier: Replace Method() by Name() for _STA object
There is no point to use Method() for the constant.
Replace it with Name() defined object. For the _STA
case it saves 3 bytes per each entry.
Before: 2881
After: 2833
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Zhaofeng Li [Wed, 20 Oct 2021 07:18:15 +0000 (00:18 -0700)]
pxe_utils: Clean up {bootm,zboot}_argv generation
Signed-off-by: Zhaofeng Li <hello@zhaofeng.li>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Zhaofeng Li [Wed, 20 Oct 2021 07:18:14 +0000 (00:18 -0700)]
pxe_utils: Fix arguments to x86 zboot
bootm and zboot accept different arguments:
> bootm [addr [arg ...]]
> - boot application image stored in memory
> passing arguments 'arg ...'; when booting a Linux kernel,
> 'arg' can be the address of an initrd image
> zboot [addr] [size] [initrd addr] [initrd size] [setup] [cmdline]
> addr - The optional starting address of the bzimage.
> If not set it defaults to the environment
> variable "fileaddr".
> size - The optional size of the bzimage. Defaults to
> zero.
> initrd addr - The address of the initrd image to use, if any.
> initrd size - The size of the initrd image to use, if any.
In the zboot flow, the current code will reuse the bootm args and attempt
to pass the initrd arg (argv[2]) as the kernel size (should be argv[3]).
zboot also expects the initrd address and size to be separate arguments.
Let's untangle them and have separate argv/argc locals.
Signed-off-by: Zhaofeng Li <hello@zhaofeng.li>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 21 Jun 2021 02:12:32 +0000 (10:12 +0800)]
docs: uefi: Update stale U-Boot on EFI doc
The existing intructions in the U-Boot on EFI doc do not work with
the latest QEMU. Update the doc with the correct instructions, as
well as using the new OVMF URL link.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sun, 31 Oct 2021 19:48:43 +0000 (15:48 -0400)]
Merge tag 'dm-pull-boo21' of https://source.denx.de/u-boot/custodians/u-boot-dm
Environment tidy-ups
patman 'postfix' support
fix binman test race condition causing a timeout error
# gpg: Signature made Sun 31 Oct 2021 03:36:55 PM EDT
# gpg: using RSA key
B25C0022AF86A7CC1655B6277F173A3E9008ADE6
# gpg: issuer "sjg@chromium.org"
# gpg: Good signature from "Simon Glass <sjg@chromium.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B25C 0022 AF86 A7CC 1655 B627 7F17 3A3E 9008 ADE6
Marek Vasut [Sat, 23 Oct 2021 01:06:03 +0000 (03:06 +0200)]
bootstage: Add SPL support
Allow usage of the bootstage facilities in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Fri, 22 Oct 2021 23:07:04 +0000 (19:07 -0400)]
patman: Add "postfix" support to patch subjects
In some communities, it may be necessary to append something after PATCH
in the subject line. For example, the Linux networking subsystem
expects [1] patch subject prefixes like [RFC PATCH net-next 0/99]. This
adds support for such "postfix"s to patman. Although entirely cosmetic,
it is still nice to have.
[1] https://www.kernel.org/doc/html/latest/networking/netdev-FAQ.html#how-do-i-indicate-which-tree-net-vs-net-next-my-patch-should-be-in
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:25 +0000 (15:47 +0200)]
env: Use static_assert() to check if default_environment is too large
Check sizeof(default_environment) against ENV_SIZE in a static_assert()
instead of runtime.
Only check if !USE_HOSTCC (for in fw_env tool ENV_SIZE expands to a
variable, and cannot be checked statically) nad
!DEFAULT_ENV_INSTANCE_EMBEDDED, for in that case the default_environment
variable is not set.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:24 +0000 (15:47 +0200)]
env: Always use char for default_environment
Sometimes we use uchar and sometimes char for the default environment
array. By always using char, we can get rid of some explicit casts.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:23 +0000 (15:47 +0200)]
board: freescale: various boards: Let env subsystem set gd->env_addr
Various freescale boards set gd->env_addr to default_environment in
board_init(), conditional on CONFIG_ENV_IS_NOWHERE, but this is
redundant, since it is done by env_init() before board_init() is called.
Let the env subsystem handle this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mian Yousaf Kaukab <ykaukab@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:22 +0000 (15:47 +0200)]
board: synquacer: developerbox: Don't set gd->env_addr to default_environment
This board sets gd->env_addr to default_environment in board_init(), but
the board has environment in SPI flash according to defconfig. Let the
env API handle environment automatically.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:21 +0000 (15:47 +0200)]
env: flash: Cosmetic fix
Change tab to space in env_flash_init().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:20 +0000 (15:47 +0200)]
env: flash: Let generic env_init() assign default environment
env_flash_init() (both implementations) assigns default environment if
ENV_INVALID, but this is done in the generic env_init() function, which
calls this initializer, so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:19 +0000 (15:47 +0200)]
env: nowhere: Cosmetic fix
Use spaces instead of tabs in assignments, since there are no lines to
align assignment values to.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:18 +0000 (15:47 +0200)]
env: nowhere: Let generic env_init() assign default environment
env_nowhere_init() assigns default environment if ENV_INVALID, but this
is done in the generic env_init() function, which calls this
initializer, so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:17 +0000 (15:47 +0200)]
env: nvram: Cosmetic fix in env_nvram_init()
Use spaces consistently in assignments instead of tabs.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:16 +0000 (15:47 +0200)]
env: nvram: Let generic env_init() assign default environment
env_nvram_init() assigns default environment if ENV_INVALID, but this is
done in the generic env_init() function, which calls this initializer,
so drop it from here.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:15 +0000 (15:47 +0200)]
env: nand: Put ENV_INVALID into gd->env_valid if default environment
env_nand_init() says the environment is valid even if it is assigning
default environment due to not being able to access nand pre-reloaction
(determined by macro values). Change this to ENV_INVALID and let the
generic env_init() function, which calls this initializer, assign the
default environment.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:14 +0000 (15:47 +0200)]
env: sf: Put ENV_INVALID into gd->env_valid on CRC failure
env_sf_init_addr() says the environment is valid even if it is assigning
default environment due to CRC failure. Change this to ENV_INVALID and
let the generic env_init() function, which calls this initializer,
assign the default environment.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:13 +0000 (15:47 +0200)]
env: sf: Use ENV_VALID enum names instead of literals
The function env_sf_init_addr() assigns number literals (1) instead of
ENV_VALID to gd->env_valid. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Behún [Fri, 22 Oct 2021 13:47:12 +0000 (15:47 +0200)]
env: sf: Cosmetic fix in env_sf_init_addr()
In the if clause we use tabs and in the else clause spaces. Let's use
spaces in the if clause too.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alistair Delva [Wed, 20 Oct 2021 21:31:33 +0000 (21:31 +0000)]
x86: Fix linking u-boot with ld.lld
When linking the final u-boot binary with LLD, the following link errors
are seen:
ld.lld: error: can't create dynamic relocation R_386_32 against local
symbol in readonly segment; recompile object files with
-fPIC or pass '-Wl,-z,notext' to allow text relocations
in the output
>>> defined in arch/x86/cpu/start.o
>>> referenced by arch/x86/cpu/start.o:(.text.start+0x32)
[...]
>>> defined in arch/x86/cpu/start16.o
>>> referenced by arch/x86/cpu/start16.o:(.start16+0x1C)
According to Nick Desaulniers:
"This is a known difference between GNU and LLVM linkers; the GNU
linkers permit relocations in readonly segments (making them not read
only), LLVM does not (by default)."
Since U-Boot apparently seems to use relocations in readonly segments,
change the global linker flags to permit them when linking with LLD by
specifying '-z notext'.
Signed-off-by: Alistair Delva <adelva@google.com>
Cc: Nick Desaulniers <ndesaulniers@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 20 Oct 2021 01:16:55 +0000 (21:16 -0400)]
sandbox: Migrate ARCH_MAP_SYSMEM to Kconfig
Move this from a hard-coded define in config.mk to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 18 Oct 2021 18:13:15 +0000 (12:13 -0600)]
binman: Allow timeout to occur in the image or its section
At present testThreadTimeout() assumes that the expected timeout happens
first when building the section, but it can just as easily happen at the
top-level image. Update the test to cope with both.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Hannu Lounento [Mon, 18 Oct 2021 05:49:03 +0000 (08:49 +0300)]
image.h: make image_sign_info.fit point to const
The data blob apparently does not need to be modified through the fit
field of the image_sign_info struct so make it point to const to avoid
the need to cast away constness in functions that assign a pointer to
const data to the field.
fit_image_setup_verify already had to cast away constness as it assigned
a const void * argument to the field. The cast can now be removed.
Signed-off-by: Hannu Lounento <hannu.lounento@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 31 Oct 2021 16:48:08 +0000 (12:48 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- usb_mass_storage, xhci-brcm bugfixes
Tom Rini [Sun, 31 Oct 2021 16:47:35 +0000 (12:47 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- rzg2_beacon updates
Tom Rini [Sun, 31 Oct 2021 16:21:12 +0000 (12:21 -0400)]
Merge branch '2021-10-31-assorted-platform-updates'
- Revert GIC LPI changes that need to be reworked.
- mvebu SATA booting bugfix
- Samsung Galaxy S9/S9+(SM-G96x0), Samsung Galaxy A and Apple M1
platform support.
Dzmitry Sankouski [Sun, 17 Oct 2021 10:45:42 +0000 (13:45 +0300)]
board: samsung: add support for Galaxy A series of 2017 (a5y17lte)
Samsung Galaxy A3, A5, A7 (2017) - middle class Samsung smartphones.
U-boot can be used as chain-loaded bootloader to gain control
on booting vanilla linux(and possibly others) kernels
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:45:41 +0000 (13:45 +0300)]
SoC: exynos: add support for exynos 78x0
Samsung Exynos 7880 \ 7870 - SoC for mainstream smartphones and tablets
introduced on March 2017.
Features:
- 8 Cortex A53 cores
- ARM Mali-T830 MP3 GPU
- LTE Cat. 7 (7880) or 6 (7870) modem
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:45:40 +0000 (13:45 +0300)]
pinctrl: exynos: add support for multiple pin banks
Iterate all pin banks to find a pin
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:45:39 +0000 (13:45 +0300)]
serial: samsung: add support for skip debug init in s5p
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:32 +0000 (13:44 +0300)]
board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) board
Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone,
for China \ Hong Kong markets.
Has unlockable bootloader, unlike SM-G960U (American market version),
which allows running u-boot as a chain-loaded bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:31 +0000 (13:44 +0300)]
SoC: qcom: add support for SDM845
Hi-end qualcomm chip, introduced in late 2017.
Mostly used in flagship phones and tablets of 2018.
Features:
- arm64 arch
- total of 8 Kryo 385 Gold / Silver cores
- Hexagon 685 DSP
- Adreno 630 GPU
Tested only as second-stage bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:30 +0000 (13:44 +0300)]
clocks: qcom: add clocks for SDM845 debug uart
Allows to change clock frequency of debug uart,
thus supporting wide range of baudrates.
Enable / disable functionality is not implemented yet.
In most use cases of SDM845 (i.e. mobile phones and tablets)
it's not needed, because qualcomm first stage bootloader leaves it
initialized, and on the other hand there's no possibility to
replace signed first stage bootloader with u-boot.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:29 +0000 (13:44 +0300)]
pinctrl: qcom: add pinctrl and gpio drivers for SDM845 SoC
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
[trini: Add CONFIG_SDM845 around sdm845_data usage]
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:28 +0000 (13:44 +0300)]
spmi: msm: add arbiter version 5 support
Currently driver supports only version 1 and 2.
Version 5 has slightly different registers structure
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Dzmitry Sankouski [Sun, 17 Oct 2021 10:44:27 +0000 (13:44 +0300)]
serial: qcom: add support for GENI serial driver
Generic Interface (GENI) Serial Engine (SE) based uart
can be found on newer qualcomm SOCs, starting from SDM845.
Tested on Samsung SM-G9600(starqltechn)
by chain-loading u-boot with stock bootloader.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Mark Kettenis [Sat, 23 Oct 2021 14:58:07 +0000 (16:58 +0200)]
doc: board: apple: Add Apple M1 documentation
Provide preliminary instructions on how to get U-Boot to run on
Apple Silicon Macs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 23 Oct 2021 14:58:06 +0000 (16:58 +0200)]
arm: dts: apple: Add preliminary device trees
Add preliminary device trees for the Apple M1 mini (2020) and
Apple M1 Macbook Pro 13" (2020). Device tree bindings for
the Apple M1 SoC are still being formalized and these device
trees will be synchronized with the Linux kernel as needed.
The device trees in this commit are based on the initial Apple
M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl,
pmgr, usb based on bindings on track for inclusion in Linux
5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and
watchdog that don't have a proposed binding yet.
These device trees are provided as a reference only as U-Boot
uses the device tree passed by the m1n1 bootloader.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 23 Oct 2021 14:58:05 +0000 (16:58 +0200)]
iommu: Add Apple DART driver
The DART is an IOMMU that is used on Apple's M1 SoC. This driver
configures the DART such that it operates in bypass mode which is
enough to support DMA for the USB3 ports integrated on the SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 23 Oct 2021 14:58:04 +0000 (16:58 +0200)]
serial: s5p: Add Apple M1 support
Apple M1 SoCs include an S5L UART which is a variant of the S5P
UART. Add support for this variant and enable it by default
on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 23 Oct 2021 14:58:03 +0000 (16:58 +0200)]
arm: apple: Add initial support for Apple's M1 SoC
Add support for Apple's M1 SoC that is used in "Apple Silicon"
Macs. This builds a basic U-Boot that can be used as a payload
for the m1n1 boot loader being developed by the Asahi Linux
project.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Add MAINTAINERS entry]
Mark Kettenis [Sat, 23 Oct 2021 14:58:02 +0000 (16:58 +0200)]
test: Add tests for IOMMU uclass
Add a set of tests for the IOMMU uclass.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mark Kettenis [Sat, 23 Oct 2021 14:58:01 +0000 (16:58 +0200)]
iommu: Add IOMMU uclass
This uclass is intended to manage IOMMUs on systems where the
IOMMUs are not in bypass mode by default. In that case U-Boot
cannot ignore the IOMMUs if it wants to use devices that need
to do DMA and sit behind such an IOMMU.
This initial IOMMU uclass implementation does not implement and
device ops and is intended for IOMMUs that have a bypass mode
that does not require address translation. Support for IOMMUs
that do require address translation is planned and device ops
will be defined when support for such IOMMUs will be added.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 29 Oct 2021 12:09:48 +0000 (14:09 +0200)]
arm: mvebu: Fix booting from SATA
Use proper SATA macro for boot_device switch in spl_boot_device() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
2226ca173486 ("arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage header")
Michael Walle [Wed, 27 Oct 2021 16:54:54 +0000 (18:54 +0200)]
Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"
Stop using the device tree as a source for ad-hoc information.
This reverts commit
2ae7adc659f7fca9ea65df4318e5bca2b8274310.
Signed-off-by: Michael Walle <michael@walle.cc>
[trini: Also make board/broadcom/bcmns3/ns3.c fail clearly now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 27 Oct 2021 16:54:53 +0000 (18:54 +0200)]
Revert "arm64: Layerscape: Survive LPI one-way reset workaround"
Ad-hoc bindings that are not part of the upstream device tree / bindings
are not allowed in-tree. Only bindings that are in-progress with
upstream and then re-synced once agreed upon are.
This reverts commit
af288cb291da3abef6be0875527729296f7de7a0.
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Sean Anderson [Fri, 29 Oct 2021 15:05:54 +0000 (11:05 -0400)]
cmd: usb_mass_storage: Use part_get_info_by_dev_and_name_or_num
This allows specifying partitions using more extended syntax. This is
particularly useful to access eMMC hardware partitions. For example,
this allows something like
ums 0 mmc 0.0,0.1,0.2,0.3
to expose four LUNs for each of the four default eMMC hardware
partitions. Note that the comma syntax was already present, and this
syntax is already documented.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Stefan Agner [Wed, 6 Oct 2021 12:05:29 +0000 (14:05 +0200)]
usb: xhci-brcm: Include header file needed for dev_err
dev_err seems to be moved to different header file. Include
dm/device_compat.h file to compile properly.
Fixes:
69dae8902b16 ("linux/compat.h: Remove redefinition of dev_xxx macros")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Adam Ford [Mon, 20 Sep 2021 16:14:32 +0000 (11:14 -0500)]
ARM: rmobile: Rename r8a774a1_beacon_defconfig to rzg2_beacon_defconfig
Now that the three M/N/H variants can be built from one config,
rename the defconfig file to be more generic since it supports multiple
RZ/G2.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Sep 2021 16:14:31 +0000 (11:14 -0500)]
ARM: rmobile: beacon: Enable reference clocks for USB and AVB
Both Ethernet and USB drivers get their reference clocks from
the versaclock. Enable that driver and the common clock driver
by default.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Sep 2021 16:14:30 +0000 (11:14 -0500)]
ARM: rmobile: Beacon: Remove dead code
There are a few do-nothing functions that can be removed.
Remove them.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Sep 2021 16:14:29 +0000 (11:14 -0500)]
ARM: rmobile: beacon: Remove duplicated for RZ/G2 M/N/H
Now that TARGET_BEACON_RZG2M can handle all the work that
was done with TARGET_BEACON_RZG2N and TARGET_BEACON_RZG2H,
remove them since they just create more duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Sep 2021 16:14:28 +0000 (11:14 -0500)]
ARM: rmobile: beacon: Support RZ/G2 [M/N/H] on TARGET_BEACON_RZG2M
The three different boards share the same board file and only differ
in terms of which SoC is being used. By enabling FIT on
TARGET_BEACON_RZG2M, it can support all three boards and elimate
duplicate code.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Mon, 20 Sep 2021 16:14:27 +0000 (11:14 -0500)]
ARM: rmobile: Enable board detection when FIT is enabled
There are three boards from Beacon, RZ/G2 M/N/H which all
use the same board file, but different device trees.
Add code to automatically select the proper device tree
based on the CPU type.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tom Rini [Fri, 29 Oct 2021 12:27:32 +0000 (08:27 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
- Fix mmc_switch timeout
- Update mmc hwpartitiion command
- Support wait_dat0 for Freescale eSDHC/sdhci drivers
Usama Arif [Tue, 19 Oct 2021 14:49:48 +0000 (15:49 +0100)]
mmc: arm_pl180_mmci: Enable HWFC for specific versions of MCI
There are 4 registers (PERIPHID{0-3}) that contain the ID of MCI.
For MMCs' with peripheral id 0x02041180 and 0x03041180, H/W flow control
needs to be enabled for multi block writes (MMC CMD 18).
Signed-off-by: Usama Arif <usama.arif@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Kirill Kapranov [Sat, 9 Oct 2021 20:49:59 +0000 (23:49 +0300)]
mmc: Fix mmc_switch excessive timeout
Fix branching to avoid premature falling back on a long timeout instead
of continuation of the initialization attempt.
Clear of the comment to avoid the ambiguity.
Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Fri, 24 Sep 2021 00:23:34 +0000 (09:23 +0900)]
cmd: mmc: check whether card is SD or eMMC before hwpartition
It doesn't need to follow more sequence to do the hwparititioning,
because SD doesn't support hwpartitioning feature.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Wed, 15 Sep 2021 09:43:13 +0000 (11:43 +0200)]
cmd: mmc: Support mmc hwpartition user enh start -
Add option to extend the hardware partition to the maximum size by
using the '-' dash sign instead of $cnt parameter. This is useful
in case we want to switch the entire eMMC user area into pSLC mode,
especially in case the device may be populated with different size
eMMCs. With this change, we do not have to calculate the number of
blocks of the user area manually.
To switch the pSLC mode for user area, use e.g. the following.
WARNING: This is a one-time irreversible change.
=> mmc hwpartition user enh 0 - wrrel on complete
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Stephen Carlson [Tue, 17 Aug 2021 19:46:41 +0000 (12:46 -0700)]
drivers: mmc: Add wait_dat0 support for sdhci driver
Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Stephen Carlson [Tue, 17 Aug 2021 19:46:40 +0000 (12:46 -0700)]
drivers: mmc: Add wait_dat0 support for Freescale eSDHC driver
Adds an implementation of the wait_dat0 MMC operation for the Freescale
eSHDC driver, allowing the driver to continue when the card is ready
rather than waiting for the worst case time on each MMC switch operation.
Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Thu, 28 Oct 2021 11:57:54 +0000 (07:57 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Fix usage of BIN header arguments (Pali)
- mvebu: turris_omnia: Fix MTD partitions order for Linux (Pali)
- mvebu: nandpagesize support for kwbimage v1 (Pali)
Pali Rohár [Fri, 22 Oct 2021 10:41:10 +0000 (12:41 +0200)]
arm: mvebu: Fix comments about kwbimage structures
kwbimage v1 is used on more SoCs.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 10:37:48 +0000 (12:37 +0200)]
arm: mvebu: Update name of kwbimage v1 field at offset 0x2-0x3
At this offset is stored nand page size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 10:37:47 +0000 (12:37 +0200)]
tools: kwboot: Patch nandpagesize to zero also for v1 image
kwbimage v1 has also nandpagesize field. So set it to zero for both image
versions when image is not signed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 22 Oct 2021 10:37:46 +0000 (12:37 +0200)]
tools: kwbimage: Add support for NAND_PAGE_SIZE command also for v1 images
The NAND_PAGE_SIZE command is already supported by mkimage for v0 images,
but not for v1 images.
A38x and A39x BootROM supports reading NAND flash page size from v1 image
in the same way as Kirkwood BootROM from v0 image. It it documented in A38x
and A39x Functional Specification.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 21 Oct 2021 15:55:48 +0000 (17:55 +0200)]
arm: mvebu: turris_omnia: Fix MTD partitions order for Linux
Linux enumerates MTD partitions in DTB order, while the fdt_add_subnode()
function puts a new subnode at the beginning.
To fix this, put MTD partitions into DTB in reverse order.
Fixes:
92f36c8e74c1 ("arm: mvebu: turris_omnia: fixup MTD partitions in Linux' DTB")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 21 Oct 2021 14:46:09 +0000 (16:46 +0200)]
arm: mvebu: Remove dummy BIN header arguments for SPL binary
U-Boot SPL binary does not read BIN header arguments, so passing some dummy
values
0000005b and
00000068 has no effect for U-Boot SPL code.
Probably these two values comes from old Marvell DDR training code which
was separated from U-Boot and used it for some configuration.
Seems that two 32-bit values were specified here to ensure SPL code
alignment to 128-bit boundary as it is required e.g. for A370 or AXP
processors. Main kwbimage header is 64-byte long which is aligned to
128-bit boundary. Optional kwbheader is 32-bit long, number of BIN header
arguments is stored in 32-bit number. So for alignment to 128-bit boundary
is needed 64-bit padding which exactly these two 32-bit dummy arguments
provided.
Now when mkimage correctly aligns start of executable code in BIN header to
128-bit boundary, there is no requirement to put dummy argument values into
kwbimage. So remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 21 Oct 2021 14:46:08 +0000 (16:46 +0200)]
arm: mvebu: Add documentation for save_boot_params() function
Important detail is availability of kwbimage BIN header arguments passed
via r0 and r1 registers by BootROM.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 21 Oct 2021 14:46:07 +0000 (16:46 +0200)]
tools: kwbimage: Align BIN header executable code to 128-bit boundary
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 21 Oct 2021 14:46:06 +0000 (16:46 +0200)]
tools: kwboot: Align UART baudrate change code in BIN header to 128-bit boundary
ARM executable code inside the BIN header on some mvebu platforms
(e.g. A370, AXP) must always be aligned with the 128-bit boundary. This
requirement can be met by inserting dummy arguments into BIN header.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Ilias Apalodimas [Tue, 26 Oct 2021 06:12:33 +0000 (09:12 +0300)]
sandbox: Remove OF_HOSTFILE
OF_HOSTFILE is used on sandbox configs only. Although it's pretty
unique and not causing any confusions, we are better of having simpler
config options for the DTB.
So let's replace that with the existing OF_BOARD. U-Boot would then
have only three config options for the DTB origin.
- OF_SEPARATE, build separately from U-Boot
- OF_BOARD, board specific way of providing the DTB
- OF_EMBED embedded in the u-boot binary(should not be used in production
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 26 Oct 2021 22:42:26 +0000 (18:42 -0400)]
Merge tag 'efi-2022-01-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc1-2
doc:
Remove obsolete PPC4XX references
UEFI:
Implement missing TCG2 measurements
Code clean up
# gpg: Signature made Tue 26 Oct 2021 05:56:47 PM EDT
# gpg: using RSA key
6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Tom Rini [Tue, 26 Oct 2021 22:34:55 +0000 (18:34 -0400)]
Merge branch '2021-10-26-add-nand-biterr-and-bugfixes'
- Add biterr sub-command to "nand"
- scmi, rsa, uuid bugfixes, re-sort DFU menu in Kconfig and remove
superfluous checks before free in env.
Masahisa Kojima [Tue, 26 Oct 2021 08:27:27 +0000 (17:27 +0900)]
efi_loader: add DeployedMode and AuditMode variable measurement
This commit adds the DeployedMode and AuditMode variable
measurement required in TCG PC Client Platform Firmware
Profile Specification.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>