Roman Lebedev [Wed, 3 Jul 2019 16:48:53 +0000 (16:48 +0000)]
[NFC][InstCombine] onehot_merge.ll: add last few tests in the state they regress to in D62818
llvm-svn: 365056
Sanjay Patel [Wed, 3 Jul 2019 16:46:14 +0000 (16:46 +0000)]
[SLP] add tests for bitcasted vector pointer load; NFC
I'm not sure if this falls within the scope of SLP,
but we could create vector loads for some of these
patterns.
llvm-svn: 365055
Amaury Sechet [Wed, 3 Jul 2019 16:34:36 +0000 (16:34 +0000)]
Use getAllOnesConstants instead of -1 in DAGCombiner. NFC
llvm-svn: 365054
Philip Reames [Wed, 3 Jul 2019 16:34:08 +0000 (16:34 +0000)]
[SCEV] Preserve flags on add/muls in getSCEVATScope
We haven't changed the set of users, just specialized an operand for those users. Given that, the previous wrap flags must still be correct.
Sorry for the lack of test case. Noticed this while working on something else, and haven't figured out to exercise this standalone.
llvm-svn: 365053
Kostya Kortchinsky [Wed, 3 Jul 2019 16:32:01 +0000 (16:32 +0000)]
[scudo][standalone] Link tests against libatomic
Summary:
Some clang versions (< 6.0) do not inline the atomic builtin functions
leaving unresolved references to `__atomic_load_8` and so on (seems to
be mostly 64-bit atomics on 32-bit platforms).
I tried without success to use some cmake magic to detect when that
would be the case, and decided to fall back to unconditionally
linking libatomic.
Reviewers: morehouse, eugenis, vitalybuka, hctim, tejohnson
Reviewed By: tejohnson
Subscribers: mgorny, delcypher, jfb, #sanitizers, llvm-commits
Tags: #llvm, #sanitizers
Differential Revision: https://reviews.llvm.org/D64134
llvm-svn: 365052
Amaury Sechet [Wed, 3 Jul 2019 16:15:59 +0000 (16:15 +0000)]
[DAGCombine] More diamong carry pattern optimization.
Summary:
This diff improve the capability of DAGCOmbine to generate linear carries propagation in presence of a diamond pattern. It is now able to match a large variety of different patterns rather than some hardcoded one.
Arguably, the codegen in test cases is not better, but this is to be expected. The goal of this transformation is more about canonicalisation than actual optimisation.
Reviewers: hfinkel, RKSimon, craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D57302
llvm-svn: 365051
Simon Pilgrim [Wed, 3 Jul 2019 15:46:08 +0000 (15:46 +0000)]
[X86][AVX] combineX86ShufflesRecursively - peek through extract_subvector
If we have more then 2 shuffle ops to combine, try to use combineX86ShuffleChainWithExtract to see if some are from the same super vector.
llvm-svn: 365050
Fangrui Song [Wed, 3 Jul 2019 15:38:59 +0000 (15:38 +0000)]
[ELF][RISCV] Error on R_RISCV_PCREL_LO12_[IS] that point to absolute symbols
The referenced symbol is expected to point to an R_RISCV_*_HI20
relocation. An absolute symbol has no associated section, therefore
there cannot be a matching R_RISCV_*_HI20.
This fixes the crash reported by PR42038. For reference, ld.bfd errors:
(.init+0x4): dangerous relocation: %pcrel_lo missing matching %pcrel_hi
Differential Revision: https://reviews.llvm.org/D63273
llvm-svn: 365049
Fangrui Song [Wed, 3 Jul 2019 15:26:54 +0000 (15:26 +0000)]
Revert D63432 "[ELF] Allow placing SHF_MERGE sections with different alignments into the same MergeSyntheticSection"
This reverts r365015.
David Zarzycki reported this change broke stage2 and stage3 tests. The
root cause is still not very clear, but I guess some SHF_MERGE sections
with the same name have different alignments. They were not merged
before but were merged after r365015.
Something that assumes address uniqueness of such mergeable data caused
the bug.
llvm-svn: 365048
Teresa Johnson [Wed, 3 Jul 2019 15:12:38 +0000 (15:12 +0000)]
[ThinLTO] Fix gcc warnings from commit
Remove an unnecessary const from an Optional return type introduced
in r364960 that gcc 7.4.0 warns about. It is unnecessary and possibly
incorrect.
llvm-svn: 365047
Sam Parker [Wed, 3 Jul 2019 14:39:23 +0000 (14:39 +0000)]
[ARM] Fix for NDEBUG builds
Fix unused variable warning as well as a nonsense assert.
Differential Revision: https://reviews.llvm.org/D63816
llvm-svn: 365046
Kostya Kortchinsky [Wed, 3 Jul 2019 14:38:47 +0000 (14:38 +0000)]
[scudo][standalone] Potential fix for missing sized delete
Summary:
In some setups, using `-fsized-deallocation` would end up not finding
a sized delete operator at link time. For now, avoid using the flag
and declare the sized delete operator in the cpp test only.
This is a tentative fix as I do not have the failing setup.
Reviewers: rnk, morehouse, hctim, eugenis, vitalybuka
Reviewed By: rnk, hctim
Subscribers: mgorny, delcypher, #sanitizers, llvm-commits
Tags: #llvm, #sanitizers
Differential Revision: https://reviews.llvm.org/D64086
llvm-svn: 365045
Simon Pilgrim [Wed, 3 Jul 2019 14:34:16 +0000 (14:34 +0000)]
[X86][AVX] Combine vpermi(bitcast(x)) -> bitcast(vpermi(x))
iff the number of elements doesn't change.
This gets around an issue with combineX86ShuffleChain not being able to hint which domain is preferred for shuffles that can be done with either.
Fixes regression introduced in rL365041
llvm-svn: 365044
James Molloy [Wed, 3 Jul 2019 14:33:29 +0000 (14:33 +0000)]
[SelectionDAG] Propagate alias metadata to target intrinsic nodes
When a target intrinsic has been determined to touch memory, we construct a MachineMemOperand during SDAG construction. In this case, we should propagate AAMDNodes metadata to the MachineMemOperand where available.
Differential revision: https://reviews.llvm.org/D64131
llvm-svn: 365043
James Henderson [Wed, 3 Jul 2019 14:21:48 +0000 (14:21 +0000)]
[docs][llvm-objcopy] Write documentation for llvm-objcopy
This patch addresses https://bugs.llvm.org/show_bug.cgi?id=42183 by replacing
the stub markdown doc for llvm-objcopy with a full one describing the current
options available in llvm-objcopy.
Reviewed by: jakehehrlich, MaskRay
Differential Revision: https://reviews.llvm.org/D63820
llvm-svn: 365042
Simon Pilgrim [Wed, 3 Jul 2019 14:17:21 +0000 (14:17 +0000)]
[X86][AVX] combineX86ShuffleChainWithExtract - add number of non-zero extract_subvectors to the combine depth
This better accounts for the cost/benefit of removing extract_subvectors from the shuffle and will be more useful in future patches.
The vpermq predicate regression will be fixed shortly.
llvm-svn: 365041
Eugene Leviant [Wed, 3 Jul 2019 14:14:52 +0000 (14:14 +0000)]
[ThinLTO] Optimize writeonly globals out
Differential revision: https://reviews.llvm.org/D63444
llvm-svn: 365040
Owen Reynolds [Wed, 3 Jul 2019 13:47:29 +0000 (13:47 +0000)]
[llvm-ar][test] Add to MRI test coverage
This reapplies 363232 that was reverted due to a buildbot test failure, this build bot has now been fixed.
Differential Revision: https://reviews.llvm.org/D63197
llvm-svn: 365039
Stefan Granitz [Wed, 3 Jul 2019 13:21:48 +0000 (13:21 +0000)]
[CMake] Avoid libcxxabi dependency when building LLDB from the monorepo on macOS
libc++abi became mandatory to link the libc++ binaries. LLDB only needs the build artifacts and not the linked output (we don't ship `libc++.dylib` and/or `libc++.a`). Disable the respective link steps to avoid the dependency to libc++abi.
<rdar://problem/
51980716>
llvm-svn: 365038
Kristof Umann [Wed, 3 Jul 2019 13:03:33 +0000 (13:03 +0000)]
Revert "[analyzer][CFG] Return the correct terminator condition"
This reverts commit
7a57118a6fcfa3770f984453543bbdfd0b233e84.
Causes a bunch of crashes, I need to time to evaluate this.
llvm-svn: 365037
Kristof Umann [Wed, 3 Jul 2019 12:53:19 +0000 (12:53 +0000)]
[analyzer][CFG] Return the correct terminator condition
For the following terminator statement:
if (A && B && C && D)
The built CFG is the following:
[B5 (ENTRY)]
Succs (1): B4
[B1]
1: 10
2: j
3: [B1.2] (ImplicitCastExpr, LValueToRValue, int)
4: [B1.1] / [B1.3]
5: int x = 10 / j;
Preds (1): B2
Succs (1): B0
[B2]
1: C
2: [B2.1] (ImplicitCastExpr, LValueToRValue, _Bool)
T: if [B4.4] && [B3.2] && [B2.2]
Preds (1): B3
Succs (2): B1 B0
[B3]
1: B
2: [B3.1] (ImplicitCastExpr, LValueToRValue, _Bool)
T: [B4.4] && [B3.2] && ...
Preds (1): B4
Succs (2): B2 B0
[B4]
1: 0
2: int j = 0;
3: A
4: [B4.3] (ImplicitCastExpr, LValueToRValue, _Bool)
T: [B4.4] && ...
Preds (1): B5
Succs (2): B3 B0
[B0 (EXIT)]
Preds (4): B1 B2 B3 B4
However, even though the path of execution in B2 only depends on C's value,
CFGBlock::getCondition() would return the entire condition (A && B && C). For
B3, it would return A && B. I changed this the actual condition.
Differential Revision: https://reviews.llvm.org/D63538
llvm-svn: 365036
Fangrui Song [Wed, 3 Jul 2019 12:48:04 +0000 (12:48 +0000)]
[ELF][RISCV] Allow R_RISCV_ADD in relocateNonAlloc()
gcc may generate .debug_info/.debug_aranges/.debug_line/etc that are
relocated by R_RISCV_ADD*/R_RISCV_SUB* pairs.
Allow R_RISCV_ADD in non-SHF_ALLOC section to fix link errors like:
ld.lld: error: print.c:(.debug_frame+0x60): has non-ABS relocation R_RISCV_ADD64 against symbol '.L0 '
Differential Revision: https://reviews.llvm.org/D63259
llvm-svn: 365035
Simon Atanasyan [Wed, 3 Jul 2019 12:28:05 +0000 (12:28 +0000)]
[mips] Mark general scheduling model as complete
llvm-svn: 365034
Simon Atanasyan [Wed, 3 Jul 2019 12:27:58 +0000 (12:27 +0000)]
[mips] Add missing atomic instructions to general scheduling definitions
llvm-svn: 365033
Simon Atanasyan [Wed, 3 Jul 2019 12:27:51 +0000 (12:27 +0000)]
[mips] Add missing microMIPS instructions to general scheduling definitions
llvm-svn: 365032
Simon Pilgrim [Wed, 3 Jul 2019 12:20:28 +0000 (12:20 +0000)]
Fix -Wcast-qual const warning. NFCI.
llvm-svn: 365031
Kristof Umann [Wed, 3 Jul 2019 12:06:10 +0000 (12:06 +0000)]
Make a buildbot using a buggy gcc happy
When specializing a template in a namespace, it has to be in a namespace
block, else gcc will get confused. Hopefully this fixes the issue.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56480
llvm-svn: 365030
Kristof Umann [Wed, 3 Jul 2019 11:54:47 +0000 (11:54 +0000)]
Specialize an anchor() function in the correct namespace
llvm-svn: 365029
Kristof Umann [Wed, 3 Jul 2019 11:39:12 +0000 (11:39 +0000)]
[analyzer][Dominator] Add post dominators to CFG + a new debug checker
Transform clang::DominatorTree to be able to also calculate post dominators.
* Tidy up the documentation
* Make it clang::DominatorTree template class (similarly to how
llvm::DominatorTreeBase works), rename it to clang::CFGDominatorTreeImpl
* Clang's dominator tree is now called clang::CFGDomTree
* Clang's brand new post dominator tree is called clang::CFGPostDomTree
* Add a lot of asserts to the dump() function
* Create a new checker to test the functionality
Differential Revision: https://reviews.llvm.org/D62551
llvm-svn: 365028
Simon Pilgrim [Wed, 3 Jul 2019 11:23:27 +0000 (11:23 +0000)]
[X86][SSE] lowerUINT_TO_FP_v2i32 - explicitly cast half word to double
Fixes MSVC analyzer extension->double warning.
llvm-svn: 365027
Kristof Umann [Wed, 3 Jul 2019 11:14:42 +0000 (11:14 +0000)]
[Dominators] PR42041: Skip nullpointer successors
https://bugs.llvm.org/show_bug.cgi?id=42041
In Clang's CFG, we use nullpointers to represent unreachable nodes, for
example, in the included testfile, block B0 is unreachable from block
B1, resulting in a nullpointer dereference somewhere in
llvm::DominatorTreeBase<clang::CFGBlock, false>::recalculate.
This patch fixes this issue by specializing
llvm::DomTreeBuilder::SemiNCAInfo::ChildrenGetter::Get for
clang::CFG to not contain nullpointer successors.
Differential Revision: https://reviews.llvm.org/D62507
llvm-svn: 365026
Simon Pilgrim [Wed, 3 Jul 2019 10:59:52 +0000 (10:59 +0000)]
[X86][SSE] LowerINSERT_VECTOR_ELT - ensure insertion index correctness. NFCI.
Assert that the insertion index is in range and use uint64_t for the index to fix MSVC/cppcheck truncation warning.
llvm-svn: 365025
Simon Pilgrim [Wed, 3 Jul 2019 10:47:33 +0000 (10:47 +0000)]
[X86][SSE] LowerScalarImmediateShift - ensure shift amount correctness. NFCI.
Assert that the shift amount is in range and create vXi8 shift masks in a way that doesn't cause MSVC/cppcheck shift result is truncated then extended warnings.
llvm-svn: 365024
Simon Atanasyan [Wed, 3 Jul 2019 10:33:16 +0000 (10:33 +0000)]
[mips] Add SIGRIE,GINVI,GINVT to general scheduling definitions
llvm-svn: 365023
Simon Atanasyan [Wed, 3 Jul 2019 10:33:09 +0000 (10:33 +0000)]
[mips] Add missing mips16 instructions to general scheduling definitions
llvm-svn: 365022
Simon Atanasyan [Wed, 3 Jul 2019 10:33:01 +0000 (10:33 +0000)]
[mips] Add missing MSA and ASE instructions to general scheduling definitions
llvm-svn: 365021
Simon Atanasyan [Wed, 3 Jul 2019 10:32:54 +0000 (10:32 +0000)]
[mips] Replace some itineraries by instructions in the general scheduling definitions
llvm-svn: 365020
Simon Pilgrim [Wed, 3 Jul 2019 10:26:28 +0000 (10:26 +0000)]
Fix MSVC "signed/unsigned mismatch" warning. NFCI.
Fixes PR42426.
llvm-svn: 365019
Simon Pilgrim [Wed, 3 Jul 2019 10:22:08 +0000 (10:22 +0000)]
Fix uninitialized variable warnings. NFCI.
Both MSVC and cppcheck don't like the fact that the variables are initialized via references.
llvm-svn: 365018
Ivan Donchevskii [Wed, 3 Jul 2019 10:21:50 +0000 (10:21 +0000)]
[clang-tidy] Fix the YAML created for checks like modernize-pass-by-value
Currently this check generates the replacement with the newline in the end.
The proper way to export it to YAML is to have two \n\n instead of one.
Without this fix clients should reinterpret the replacement as
"#include <utility> " instead of "#include <utility>\n"
Differential Revision: https://reviews.llvm.org/D63482
llvm-svn: 365017
Simon Pilgrim [Wed, 3 Jul 2019 10:04:16 +0000 (10:04 +0000)]
[X86] LowerFunnelShift - use modulo constant shift amount.
This avoids the use of getZExtValue and uses the modulo shift amount which is whats expected for funnel shifts anyhow.
llvm-svn: 365016
Fangrui Song [Wed, 3 Jul 2019 10:03:49 +0000 (10:03 +0000)]
[ELF] Allow placing SHF_MERGE sections with different alignments into the same MergeSyntheticSection
This should fix PR42289: the Linux kernel has a use case that input
files have .rodata.cst32 sections with different alignments. The
expectation (and what ld.bfd and gold do) is that in the -r link, there
is only one .rodata.cst32 (SHF_MERGE sections with different alignments
can be combined), but lld currently creates one for each different
alignment.
The current merging strategy:
1) Group SHF_MERGE sections by (name, sh_flags, sh_entsize and
sh_addralign). String merging is performed among a group, even if -O0 is specified.
2) Create one output section for each group. This is a special case in
addInputSec().
This patch changes 1) to:
1) Group SHF_MERGE sections by (name, sh_flags, sh_entsize).
String merging is performed among a group, even if -O0 is specified.
We will thus create just one .rodata.cst32 . This also improves merging
efficiency when sections with the same name but different alignments are
combined.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D63432
llvm-svn: 365015
Oliver Stannard [Wed, 3 Jul 2019 09:58:52 +0000 (09:58 +0000)]
[ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize
For Thumb2, we prefer low regs (costPerUse = 0) to allow narrow
encoding. However, current allocation order is like:
R0-R3, R12, LR, R4-R11
As a result, a lot of instructs that use R12/LR will be wide instrs.
This patch changes the allocation order to:
R0-R7, R12, LR, R8-R11
for thumb2 and -Osize.
In most cases, there is no extra push/pop instrs as they will be folded
into existing ones. There might be slight performance impact due to more
stack usage, so we only enable it when opt for min size.
https://reviews.llvm.org/D30324
llvm-svn: 365014
Sven van Haastregt [Wed, 3 Jul 2019 09:57:59 +0000 (09:57 +0000)]
Remove some autoconf references from docs and comments
The autoconf build system support has been removed a while ago, remove
some outdated references.
Differential Revision: https://reviews.llvm.org/D63608
llvm-svn: 365013
Simon Pilgrim [Wed, 3 Jul 2019 09:54:25 +0000 (09:54 +0000)]
Fix MSVC "not all control paths return a value" warnings. NFCI.
llvm-svn: 365012
Roman Lebedev [Wed, 3 Jul 2019 09:41:50 +0000 (09:41 +0000)]
[InstCombine] Y - ~X --> X + Y + 1 fold (PR42457)
Summary:
I *think* we'd want this new variant, because we obviously
have better handling for `add` as compared to `sub`/`not`.
https://rise4fun.com/Alive/WMn
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]]
Reviewers: spatel, nikic, huihuiz, efriedma
Reviewed By: spatel
Subscribers: RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63992
llvm-svn: 365011
Roman Lebedev [Wed, 3 Jul 2019 09:41:35 +0000 (09:41 +0000)]
[Codegen][X86][AArch64][ARM][PowerPC] Inc-of-add vs sub-of-not (PR42457)
Summary:
This is the backend part of [[ https://bugs.llvm.org/show_bug.cgi?id=42457 | PR42457 ]].
In middle-end, we'd want to prefer the form with two adds - D63992,
but as this diff shows, not every target will prefer that pattern.
Out of 4 targets for which i added tests all seem to be ok with inc-of-add for scalars,
but only X86 prefer that same pattern for vectors.
Here i'm adding a new TLI hook, always defaulting to the inc-of-add,
but adding AArch64,ARM,PowerPC overrides to prefer inc-of-add only for scalars.
Reviewers: spatel, RKSimon, efriedma, t.p.northover, hfinkel
Reviewed By: efriedma
Subscribers: nemanjai, javed.absar, kristof.beyls, kbarton, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64090
llvm-svn: 365010
Eugene Leviant [Wed, 3 Jul 2019 09:36:32 +0000 (09:36 +0000)]
[SCEV][LSR] Prevent using undefined value in binops
On some occasions ReuseOrCreateCast may convert previously
expanded value to undefined. That value may be passed by
SCEVExpander as an argument to InsertBinop making IV chain
undefined.
Differential revision: https://reviews.llvm.org/D63928
llvm-svn: 365009
Alexander Potapenko [Wed, 3 Jul 2019 09:28:50 +0000 (09:28 +0000)]
MSan: handle callbr instructions
Summary:
Handling callbr is very similar to handling an inline assembly call:
MSan must checks the instruction's inputs.
callbr doesn't (yet) have outputs, so there's nothing to unpoison,
and conservative assembly handling doesn't apply either.
Fixes PR42479.
Reviewers: eugenis
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64072
llvm-svn: 365008
Dmitri Gribenko [Wed, 3 Jul 2019 09:20:18 +0000 (09:20 +0000)]
[clang-tidy] new check: bugprone-posix-return
Summary:
Checks if any calls to posix functions (except posix_openpt) expect negative return values.
These functions return either 0 on success or an errno on failure, which is positive only.
Reviewers: JonasToth, gribozavr, alexfh, hokein
Reviewed By: gribozavr
Subscribers: Eugene.Zelenko, lebedev.ri, llozano, george.burgess.iv, xazax.hun, srhines, mgorny, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63623
Patch by Jian Cai.
llvm-svn: 365007
Fangrui Song [Wed, 3 Jul 2019 08:13:17 +0000 (08:13 +0000)]
Change std::{lower,upper}_bound to llvm::{lower,upper}_bound or llvm::partition_point. NFC
llvm-svn: 365006
Kadir Cetinkaya [Wed, 3 Jul 2019 07:47:19 +0000 (07:47 +0000)]
[clang][HeaderSearch] Shorten paths for includes in mainfile's directory
Summary:
Currently HeaderSearch only looks at SearchDir's passed into it, but in
addition to those paths headers can be relative to including file's directory.
This patch makes sure that is taken into account.
Reviewers: gribozavr
Subscribers: jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63295
llvm-svn: 365005
Rui Ueyama [Wed, 3 Jul 2019 07:08:27 +0000 (07:08 +0000)]
Avoid identifiers that are different only in case. NFC.
llvm-svn: 365004
Rui Ueyama [Wed, 3 Jul 2019 06:11:50 +0000 (06:11 +0000)]
Avoid identifiers that are different only in case. NFC.
Some variables in lld have the same name as functions ignoring case.
This patch gives them different names, so that my next patch is easier
to read.
llvm-svn: 365003
Serguei Katkov [Wed, 3 Jul 2019 05:59:23 +0000 (05:59 +0000)]
[LoopPeel] Re-factor llvm::peelLoop method. NFC.
Extract code dealing with branch weights in separate functions.
Reviewers: reames, mkuper, iajbar, fhahn
Reviewed By: reames, fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D63917
llvm-svn: 365002
Rui Ueyama [Wed, 3 Jul 2019 05:52:35 +0000 (05:52 +0000)]
Revert r364999: [lld] Use -o /dev/null in test when output is not needed.
This reverts commit r364999 as it broke a build. Looks like `%t.archive.o`
is used two lines below where it was created.
llvm-svn: 365001
Jordan Rupprecht [Wed, 3 Jul 2019 04:01:51 +0000 (04:01 +0000)]
Revert [InlineCost] cleanup calculations of Cost and Threshold
This reverts r364422 (git commit
1a3dc761860d620ac8ed7e32a4285952142f780b)
The inlining cost calculation is incorrect, leading to stack overflow due to large stack frames from heavy inlining.
llvm-svn: 365000
Sam Clegg [Wed, 3 Jul 2019 02:41:00 +0000 (02:41 +0000)]
[lld] Use -o /dev/null in test when output is not needed.
Feedback nit from rL364998
llvm-svn: 364999
Sam Clegg [Wed, 3 Jul 2019 02:29:02 +0000 (02:29 +0000)]
[ELF] Error on archive with missing index
This matches the wasm lld and GNU ld behavior.
The ELF linker has special handling for bitcode archives but if that
doesn't kick in we probably want to error out rather than silently
ignore the library.
Differential Revision: https://reviews.llvm.org/D63781
llvm-svn: 364998
Teresa Johnson [Wed, 3 Jul 2019 02:14:47 +0000 (02:14 +0000)]
[ThinLTO] Reenable test with workaround for known failure
Reenable the testing disabled in r364978 with the same workaround used
for this failure in the cfi-devirt.ll test. The known issue is PR39436,
and the workaround is to add -verify-machineinstrs=0.
llvm-svn: 364997
Kito Cheng [Wed, 3 Jul 2019 02:13:11 +0000 (02:13 +0000)]
[ELF][RISCV] Support RISC-V in getBitcodeMachineKind
Add Triple::riscv64 and Triple::riscv32 to getBitcodeMachineKind for get right
e_machine during LTO.
Reviewed By: ruiu, MaskRay
Differential Revision: https://reviews.llvm.org/D52165
llvm-svn: 364996
Michael Liao [Wed, 3 Jul 2019 02:00:21 +0000 (02:00 +0000)]
[AMDGPU] Enable serializing of argument info.
Summary:
- Support serialization of all arguments in machine function info. This
enables fabricating MIR tests depending on argument info.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64096
llvm-svn: 364995
Amara Emerson [Wed, 3 Jul 2019 01:49:06 +0000 (01:49 +0000)]
[AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms.
There are two main issues preventing us from generating immediate form shifts:
1) We have partial SelectionDAG imported support for G_ASHR and G_LSHR shift
immediate forms, but they currently don't work because the amount type is
expected to be an s64 constant, but we only legalize them to have homogenous
types.
To deal with this, first we introduce a custom legalizer to *only* custom legalize
s32 shifts which have a constant operand into a s64.
There is also an additional artifact combiner to fold zexts(g_constant) to a
larger G_CONSTANT if it's legal, a counterpart to the anyext version committed
in an earlier patch.
2) For G_SHL the importer can't cope with the pattern. For this I introduced an
early selection phase in the arm64 selector to select these forms manually
before the tablegen selector pessimizes it to a register-register variant.
Differential Revision: https://reviews.llvm.org/D63910
llvm-svn: 364994
Chen Zheng [Wed, 3 Jul 2019 01:49:03 +0000 (01:49 +0000)]
[PowerPC] exclude ICmpZero in LSR if icmp can be replaced in later hardware loop.
Differential Revision: https://reviews.llvm.org/D63477
llvm-svn: 364993
Artem Dergachev [Wed, 3 Jul 2019 01:26:41 +0000 (01:26 +0000)]
[analyzer] exploded-graph-rewriter: Implement bug nodes and sink nodes.
Add a label to nodes that have a bug report attached or on which
the analysis was generally interrupted.
Fix printing has_report and implement printing is_sink in the graph dumper.
Differential Revision: https://reviews.llvm.org/D64110
llvm-svn: 364992
Artem Dergachev [Wed, 3 Jul 2019 01:26:38 +0000 (01:26 +0000)]
[analyzer] exploded-graph-rewriter: NFC: Add more comments.
llvm-svn: 364991
Artem Dergachev [Wed, 3 Jul 2019 01:26:35 +0000 (01:26 +0000)]
[analyzer] exploded-graph-rewriter: Collapse very long statement pretty-prints.
When printing various statements that include braces (compound
statements, lambda expressions, statement-expressions, etc.),
replace the code between braces with '...'.
Differential Revision: https://reviews.llvm.org/D64104
llvm-svn: 364990
Artem Dergachev [Wed, 3 Jul 2019 01:26:32 +0000 (01:26 +0000)]
[analyzer] exploded-graph-rewriter: Implement checker messages.
They are displayed as raw lines and diffed via difflib on a per-checker basis.
Differential Revision: https://reviews.llvm.org/D64100
llvm-svn: 364989
Alex Lorenz [Wed, 3 Jul 2019 01:02:43 +0000 (01:02 +0000)]
[triple] Use 'macabi' environment name for the Mac Catalyst triples
The 'macabi' environment name is preferred instead of 'maccatalyst'.
llvm-svn: 364988
Nilanjana Basu [Wed, 3 Jul 2019 00:51:49 +0000 (00:51 +0000)]
Revert Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable
This reverts r364982 (git commit
2082bf28ebea76cc187b508f801122866420d9ff)
llvm-svn: 364987
Jonas Devlieghere [Wed, 3 Jul 2019 00:45:53 +0000 (00:45 +0000)]
[VFS] Add reverse iterator to OverlayFileSystem
Add a reverse iterator to the overlay file system. This makes it
possible to take overlays from one OverlayFileSystem, and add them to
another.
Differential revision: https://reviews.llvm.org/D64113
llvm-svn: 364986
Guanzhong Chen [Wed, 3 Jul 2019 00:37:49 +0000 (00:37 +0000)]
[WebAssembly] Prevent inline assembly from being mangled by SjLj
Summary:
Before, inline assembly gets mangled by the SjLj transformation.
For example, in a function with setjmp/longjmp, this LLVM IR code
call void asm sideeffect "", ""()
would be transformed into
call void @__invoke_void(void ()* asm sideeffect "", "")
This is invalid, and results in the error:
Cannot take the address of an inline asm!
In this diff, we skip the transformation for inline assembly.
Reviewers: aheejin, tlively
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D64115
llvm-svn: 364985
Matt Arsenault [Wed, 3 Jul 2019 00:30:47 +0000 (00:30 +0000)]
CodeGen: Set hasSideEffects = 0 on BUNDLE
The BUNDLE itself should not have side effects, and this is a property
of instructions inside the bundle. The hasProperty check already
searches for any member instructions, which was pointless since it was
overridden by this bit.
Allows me to distinguish bundles that have side effects vs. do not in
a future patch. Also fixes an unnecessary scheduling barrier in the
bundle AMDGPU uses to get PC relative addresses.
llvm-svn: 364984
Matt Arsenault [Wed, 3 Jul 2019 00:30:44 +0000 (00:30 +0000)]
AMDGPU: Look through bundles for existing waitcnts
These aren't produced now, but will be in a future patch.
llvm-svn: 364983
Nilanjana Basu [Wed, 3 Jul 2019 00:26:23 +0000 (00:26 +0000)]
Changing CodeView debug info type record representation in assembly files to make it more human-readable & editable
llvm-svn: 364982
Alex Lorenz [Tue, 2 Jul 2019 23:47:11 +0000 (23:47 +0000)]
Add support for the 'macCatalyst' MachO platform
Mac Catalyst is a new MachO platform in macOS Catalina.
It always uses the build_version MachO load command.
Differential Revision: https://reviews.llvm.org/D64107
llvm-svn: 364981
Jim Ingham [Tue, 2 Jul 2019 23:38:07 +0000 (23:38 +0000)]
Fix for r364686 - actually set symbol_is_missing_weak...
This was set in a std::function, but I was shadowing a
variable that I thought I was capturing. Even with this bug
we were correctly not raising an error and returning an address
of 0x0. We were not marking the symbol as weak, but apparently
the JIT didn't need that, so the test still passed.
llvm-svn: 364980
Jason Molenda [Tue, 2 Jul 2019 23:36:39 +0000 (23:36 +0000)]
Update cmake build setup so lldb doesn't link against the DebugSymbols
framework on macOS, in line with the source/xcode project changes in
r364243.
<rdar://problem/
49458356>
llvm-svn: 364979
Teresa Johnson [Tue, 2 Jul 2019 23:28:28 +0000 (23:28 +0000)]
[ThinLTO] Work around existing failure exposed by new test
When adding summary entries for index-based WPD (r364960), an added
test also included some additional testing of the existing hybrid
Thin/Regular LTO WPD (test/ThinLTO/X86/devirt.ll). That part of the
test is producing a failure on the llvm-clang-x86_64-expensive-checks-win
bot:
*** Bad machine code: Explicit definition marked as use ***
- function: __typeid__ZTS1A_0_branch_funnel
- basic block: %bb.0 (0x81d4c58)
- instruction: ICALL_BRANCH_FUNNEL %0:gr64, @0, 16, @_ZN1B1fEi, 48, @_ZN1C1fEi
- operand 0: %0:gr64
LLVM ERROR: Found 1 machine code errors.
This is functionality unrelated to the summary entries added with my
patch, so I am disabling this part of the new test until it is
addressed. I'll continue to investigate the failure.
llvm-svn: 364978
Craig Topper [Tue, 2 Jul 2019 23:20:03 +0000 (23:20 +0000)]
[X86] Add a DAG combine for turning *_extend_vector_inreg+load into an appropriate extload if the load isn't volatile.
Remove the corresponding isel patterns that did the same thing without checking for volatile.
This fixes another variation of PR42079
llvm-svn: 364977
Jason Molenda [Tue, 2 Jul 2019 23:06:13 +0000 (23:06 +0000)]
add symbols/declvendor.cpp.
llvm-svn: 364976
Mitch Phillips [Tue, 2 Jul 2019 22:36:45 +0000 (22:36 +0000)]
Attempt #2 to fix gcc builds. This time check
against CXX compiler ID instead of CRT test ID.
llvm-svn: 364975
Jonas Devlieghere [Tue, 2 Jul 2019 22:18:35 +0000 (22:18 +0000)]
[swig] Don't mess with swig internals.
As of SWIG 4.0, __swig_getmethods__ and __swig_setmethods__ are no
longer defined. It appears that there's no need to mess with these
internals, we can simplify define the corresponding properties inline.
Originally I wanted to use the swig extension %attribute and
%attributeref to define properties. However, I couldn't find a way to
add documentation to these attributes. Since we already had the
properties defined inline, we might as well keep them.
Differential revision: https://reviews.llvm.org/D63530
llvm-svn: 364974
Teresa Johnson [Tue, 2 Jul 2019 22:06:02 +0000 (22:06 +0000)]
[ThinLTO] Dump input on failure in devirt test
To help track down bug exposed by llvm-clang-x86_64-expensive-checks-win
bot.
llvm-svn: 364973
Mitch Phillips [Tue, 2 Jul 2019 21:58:19 +0000 (21:58 +0000)]
Only use -mno-omit-leaf-frame-pointer with clang builds.
Fix build breakage caused by D64085
llvm-svn: 364972
Alex Lorenz [Tue, 2 Jul 2019 21:37:00 +0000 (21:37 +0000)]
[triple] add 'macCatalyst' environment type
Mac Catalyst is a new deployment platform in macOS Catalina.
Differential Revision: https://reviews.llvm.org/D64097
llvm-svn: 364971
Eli Friedman [Tue, 2 Jul 2019 21:35:15 +0000 (21:35 +0000)]
[ARM] Fix unwind info for Thumb1 functions that save high registers.
There were two issues here: one, some of the relevant instructions were
missing the expected "FrameSetup" flag, and two,
ARMAsmPrinter::EmitUnwindingInstruction wasn't expecting "mov"
instructions in the prologue.
I'm sticking the additional state into ARMFunctionInfo so it's obvious
it only applies to the current function.
I considered a few alternative approaches where we would compute the
correct unwind information as part of the prologue/epilogue lowering,
but it seems like a lot of work to introduce pseudo-instructions, and
the current code seems to be reliable enough.
Fixes https://bugs.llvm.org/show_bug.cgi?id=42408.
Differential Revision: https://reviews.llvm.org/D63964
llvm-svn: 364970
David Bolvansky [Tue, 2 Jul 2019 21:16:34 +0000 (21:16 +0000)]
[NFC] Strenghten isInteger condition for rL364940
llvm-svn: 364969
Teresa Johnson [Tue, 2 Jul 2019 21:07:45 +0000 (21:07 +0000)]
[ThinLTO] Address post-review suggestions for index-based WPD summary
Removes a couple of unnecessary and/or redundant checks introduced by
r364960.
llvm-svn: 364968
Raphael Isemann [Tue, 2 Jul 2019 21:07:25 +0000 (21:07 +0000)]
[lldb] Mention automatic codesign setup script [NFC]
The script is the modern way of getting the certificate, so we should mention it in
the documentation.
Patch idea by Davidino Italiano!
llvm-svn: 364967
Mitch Phillips [Tue, 2 Jul 2019 20:33:19 +0000 (20:33 +0000)]
[GWP-ASan] [Scudo] Add GWP-ASan backtrace for alloc/free to Scudo.
Summary:
Adds allocation and deallocation stack trace support to Scudo. The
default provided backtrace library for GWP-ASan is supplied by the libc
unwinder, and is suitable for production variants of Scudo. If Scudo in future
has its own unwinder, it may choose to use its own over the generic unwinder
instead.
Reviewers: cryptoad
Reviewed By: cryptoad
Subscribers: kubamracek, mgorny, #sanitizers, llvm-commits, morehouse, vlad.tsyrklevich, eugenis
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D64085
llvm-svn: 364966
Teresa Johnson [Tue, 2 Jul 2019 20:24:00 +0000 (20:24 +0000)]
[gold] Fix test after BitStream reader error changes
The recent change to the BitStream reader error handling in r364464
changed the error message format (from "LLVM ERROR:" to just "error"),
leading to a failure in this test which is only executed for very recent
versions of gold. Fix this by removing that part of the error message
check, leaving only the interesting part of the message to be checked.
llvm-svn: 364965
Vasileios Porpodas [Tue, 2 Jul 2019 20:20:28 +0000 (20:20 +0000)]
[SLP] Recommit: Look-ahead operand reordering heuristic.
Summary: This patch introduces a new heuristic for guiding operand reordering. The new "look-ahead" heuristic can look beyond the immediate predecessors. This helps break ties when the immediate predecessors have identical opcodes (see lit test for an example).
Reviewers: RKSimon, ABataev, dtemirbulatov, Ayal, hfinkel, rnk
Reviewed By: RKSimon, dtemirbulatov
Subscribers: hiraditya, phosek, rnk, rcorcs, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60897
llvm-svn: 364964
Julie Hockett [Tue, 2 Jul 2019 19:59:56 +0000 (19:59 +0000)]
[clang-doc] Serialize child namespaces and records
Serialization of child namespaces and records is now handled.
Namespaces can have child records and child namespaces.
Records can only have child records.
Committed on behalf of Diego Astiazarán (diegoaat97@gmail.com).
Differential Revision: https://reviews.llvm.org/D63911
llvm-svn: 364963
Alex Langford [Tue, 2 Jul 2019 19:53:07 +0000 (19:53 +0000)]
[Symbol] Add DeclVendor::FindTypes
Summary:
Following up on the plan I outlined in D63622, we can remove the
dependence on clang in all the places where we only want to find the
types from the DeclVendor. This means that currently DeclVendor depends
on clang, but centralizing the dependency makes it easier to refactor
cleanly.
Differential Revision: https://reviews.llvm.org/D63853
llvm-svn: 364962
Jessica Paquette [Tue, 2 Jul 2019 19:44:16 +0000 (19:44 +0000)]
[AArch64][GlobalISel] Teach tryOptSelect to handle G_ICMP
This teaches `tryOptSelect` to handle folding G_ICMP, and removes the
requirement that the G_SELECT we're dealing with is floating point.
Some refactoring to make this work nicely as well:
- Factor out the scalar case from the selection code for G_ICMP into
`emitIntegerCompare`.
- Make `tryOptCMN` return a MachineInstr* instead of a bool.
- Make `tryOptCMN` not modify the instruction being selected.
- Factor out the CMN emission into `emitCMN` for readability.
By doing this this way, we can get all of the compare selection optimizations
in select emission.
Differential Revision: https://reviews.llvm.org/D64084
llvm-svn: 364961
Teresa Johnson [Tue, 2 Jul 2019 19:38:02 +0000 (19:38 +0000)]
[ThinLTO] Add summary entries for index-based WPD
Summary:
If LTOUnit splitting is disabled, the module summary analysis computes
the summary information necessary to perform single implementation
devirtualization during the thin link with the index and no IR. The
information collected from the regular LTO IR in the current hybrid WPD
algorithm is summarized, including:
1) For vtable definitions, record the function pointers and their offset
within the vtable initializer (subsumes the information collected from
IR by tryFindVirtualCallTargets).
2) A record for each type metadata summarizing the vtable definitions
decorated with that metadata (subsumes the TypeIdentiferMap collected
from IR).
Also added are the necessary bitcode records, and the corresponding
assembly support.
The follow-on index-based WPD patch is D55153.
Depends on D53890.
Reviewers: pcc
Subscribers: mehdi_amini, Prazek, inglorion, eraman, steven_wu, dexonsmith, arphaman, llvm-commits
Differential Revision: https://reviews.llvm.org/D54815
llvm-svn: 364960
Matt Arsenault [Tue, 2 Jul 2019 19:15:45 +0000 (19:15 +0000)]
AMDGPU: Custom lower vector_shuffle for v4i16/v4f16
Ordinarily it is lowered as a build_vector of each extract_vector_elt,
which in turn get lowered to bitcasts and bit shifts. Very little
understand the lowered extract pattern, resulting in much worse
code. We treat concat_vectors of v2i16 as legal, so prefer that.
llvm-svn: 364959
Teresa Johnson [Tue, 2 Jul 2019 18:54:03 +0000 (18:54 +0000)]
[RA] Fix spelling of Greedy register allocator internal option
The internal option added with r323870 has a typo. It isn't being used
by any tests, but I decided to fix the spelling and leave it in for use
in debugging the changes added in that patch.
llvm-svn: 364958
Craig Topper [Tue, 2 Jul 2019 18:39:59 +0000 (18:39 +0000)]
[X86] Copy test cases from vector-zext.ll to vector-zext-widen.ll. Same for vector-sext.ll. NFC
llvm-svn: 364957