Tom Rini [Sat, 24 Sep 2022 17:58:49 +0000 (13:58 -0400)]
Merge branch '2022-09-24-add-console-flush' into next
To quote the author:
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Some console devices, like UART, have putc/puts functions which just put
characters into HW transmit queue and do not wait until all data are
transmitted. Doing some sensitive operations (like changing baudrate or
starting kernel which resets UART HW) cause that U-Boot messages are lost.
Therefore introduce a new flush() function, implement it for all serial
devices via pending(false) callback and use this new flush() function on
sensitive places after which output device may go into reset state.
This change fixes printing of U-Boot messages:
"## Starting application at ..."
"## Switch baudrate to ..."
In addition, take a patch from Heinrich to rename some EFI test
functions in order to not conflict with this series.
Pali Rohár [Mon, 5 Sep 2022 09:31:21 +0000 (11:31 +0200)]
boot: Call flush() before booting
In a lot of cases kernel resets UART HW. To ensure that U-Boot messages
printed before booting the kernel are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:20 +0000 (11:31 +0200)]
serial: Call flush() before changing baudrate
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:19 +0000 (11:31 +0200)]
serial: Implement serial_flush() function for console flush() fallback
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.
Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:18 +0000 (11:31 +0200)]
serial: Implement flush callback
UART drivers have putc/puts functions which just put characters into HW
transmit queue and do not wait until all data are transmitted.
Implement flush callback via serial driver's pending(false) callback which
waits until HW transmit all characters from the queue.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:17 +0000 (11:31 +0200)]
console: Implement flush() function
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Therefore introduce a new flush() and fflush() functions into console code.
These functions will call .flush callback of associated stdio_dev device.
As this function may increase U-Boot side, allow to compile U-Boot without
this function. For this purpose there is a new config CONSOLE_FLUSH_SUPPORT
which is enabled by default and can be disabled. It is a good idea to have
this option enabled for all boards which have enough space for it.
When option is disabled when U-Boot defines just empty static inline
function fflush() to avoid ifdefs in other code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:16 +0000 (11:31 +0200)]
sandbox: Add function os_flush()
It flushes stdout.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Thu, 22 Sep 2022 13:26:43 +0000 (15:26 +0200)]
efi_selftest: prefix test functions with efi_st_
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.
Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Fri, 23 Sep 2022 22:42:53 +0000 (18:42 -0400)]
Merge branch '2022-09-23-4gb-ddr-in-32bit-ppc' into next
To quote the author, for the first 9 patches:
This patch series fixes U-Boot code to correctly handle RAM size larger
than 2 GB and then fixes fsl ddr driver to do not crash U-Boot when 4 GB
DDR module is detected when U-Boot operates in 32-bit mode (as opposite
of the 36-bit mode).
With this patch series it is possible to boot 32-bit U-Boot with 4 GB
SODIMM DDR3 module without crashes. U-Boot will still use just
CONFIG_MAX_MEM_MAPPED amount of RAM, but it is better than crashing due
to the truncating of 4GB value to 32-bit number (which is zero).
I tested this patch series on powerpc P2020 based board but only with
U-Boot v2022.04 because U-Boot master branch is still broken on P2020.
And then the final two patches here are (in my mind at least) related
clean-ups.
Pali Rohár [Sun, 18 Sep 2022 11:23:27 +0000 (13:23 +0200)]
board_f: show_dram_config: Print also real DRAM size
32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
U-Boot currently prints only effective size of RAM which can use, which may
be misleading as somebody would expect that this line prints total size of
connected DDR modules. So change show_dram_config code to prints both real
and effective DRAM size if they are different. If they are same then print
just one number like before. It is possible that effective size is just few
bytes smaller than the real size, so print both numbers only in case
function print_size() prints formats them differently.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Mon, 12 Sep 2022 19:02:27 +0000 (21:02 +0200)]
display_options: print_size: Fix order overflow
Function print_size() round size to the nearst value with one decimal
fraction number. But in special cases also unit order may overflow.
For example value
1073689396 is printed as "1024 MiB" and value
1073741824
as "1 GiB".
Fix this issue by detecting order overflow and increasing unit order.
With this change also value
1073689396 is printed as "1 GiB".
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Sun, 11 Sep 2022 09:29:16 +0000 (11:29 +0200)]
powerpc/mpc85xx: Fix re-align of unmapped DDR memory message for non-SPL builds
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:46 +0000 (17:32 +0200)]
powerpc/mpc85xx: Explain TLB unmapped memory message
Currently U-Boot SPL prints just generic message "2 GiB left unmapped".
Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot".
This is just U-Boot configuration and operating system may map more (or
also less) memory.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:45 +0000 (17:32 +0200)]
ddr: fsl: Fix re-align of verbose DRAM information for non-SPL builds
During init_dram() is called also compute_lowest_common_dimm_parameters()
function which prints multi-line detailed output. So print also re-aligning
filler after "Detected ?DIMM" line to have "DRAM: " output aligned.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:44 +0000 (17:32 +0200)]
ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode
U-Boot core code already handles the case when RAM size is bigger than
CONFIG_MAX_MEM_MAPPED. So there is no need to do duplicate check in fsl ddr
driver for CONFIG_MAX_MEM_MAPPED. Instead simplify code to just check if
RAM size can be representable in phys_size_t type. And avoid printing
warning if phys_size_t is just 1 byte smaller than RAM size, which is the
typical situation with 4 GB DDR module.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:43 +0000 (17:32 +0200)]
ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_t
Function fsl_ddr_compute() always return size in unsigned long long type,
but function fsl_ddr_sdram_size() returns size in phys_size_t type.
When 36-bit addressing mode is not enabled then phys_size_t type is only
32-bit and thus it cannot store value 4GB (0x100000000). Function
fsl_ddr_sdram_size() in this case returns truncated value 0x0.
Fix this issue by returning the highest representable value, which is
0xffffffff (4GB - 1 byte).
This change fixes crashing of proper U-Boot because it detected 4 GB module
as RAM with zero size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:42 +0000 (17:32 +0200)]
ddr: fsl: Fix checking for maximal mappable memory
Check needs to be done against CONFIG_MAX_MEM_MAPPED macro and not fixed
size 4GB (as CONFIG_MAX_MEM_MAPPED can be lower and for example for e500
cores it is just 2GB). Also fix printf re-align, which should be applied
only for non-SPL builds, during init_dram() call.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:41 +0000 (17:32 +0200)]
board_f: Fix printing gd->ram_size and gd->ram_top
Members gd->ram_size and gd->ram_top are of type phys_addr_t which does not
have to fit into ulong type. So cast them into unsigned long long.
Fixes:
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:40 +0000 (17:32 +0200)]
board_f: Fix types for board_get_usable_ram_top()
Commit
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.
So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.
Fixes:
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:39 +0000 (17:32 +0200)]
common/memsize.c: Fix get_effective_memsize() to check for overflow
Ensure that top of RAM can be represented by phys_size_t type. If RAM is
too large or RAM base address is too upper then limit RAM size to prevent
address space overflow.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:38 +0000 (17:32 +0200)]
common/memsize.c: Fix get_effective_memsize() to always check for CONFIG_MAX_MEM_MAPPED
CONFIG_MAX_MEM_MAPPED when defined specifies upper memory mapped limit.
So check for it always, and not only when CONFIG_VERY_BIG_RAM is defined.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tom Rini [Fri, 23 Sep 2022 19:09:44 +0000 (15:09 -0400)]
Merge branch '2022-09-23-add-mediatek-mt7986-support' into next
To quote the author:
This patch series add support for MediaTek MT7981/MT7986 SoCs with their
reference boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for
these boards. The clock, pinctrl drivers and the SoC initializaton code
are also included.
Product spec for MT7986:
https://www.mediatek.com/products/home-networking/mediatek-filogic-830
Weijie Gao [Fri, 9 Sep 2022 12:00:27 +0000 (20:00 +0800)]
MAINTAINERS: update maintainer for MediaTek ARM platform
Add new files for MediaTek ARM platform
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:25 +0000 (20:00 +0800)]
tools: mtk_image: add support for nand headers used by newer chips
This patch adds more nand headers in two new types:
1. HSM header, used for spi-nand thru SNFI interface
2. SPIM header, used for spi-nand thru spi-mem interface
The original nand header is renamed to AP header.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:21 +0000 (20:00 +0800)]
tools: mtk_image: split the code of generating NAND header into a new file
The predefined NAND headers take too much spaces in the mtk_image.c.
Moving them into a new file can significantly improve the readability of
both mtk_image.c and the new mtk_nand_headers.c.
This is a preparation for adding more NAND headers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:18 +0000 (20:00 +0800)]
tools: mtk_image: split gfh header verification into a new function
The verification code of gfh header for NAND and non-NAND are identical.
It's better to define a individual function to reduce redundancy.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:16 +0000 (20:00 +0800)]
cpu: add basic cpu driver for MediaTek ARM chips
Add basic CPU driver used to retrieve CPU model information.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Weijie Gao [Fri, 9 Sep 2022 12:00:12 +0000 (20:00 +0800)]
clk: mediatek: add clock driver support for MediaTek MT7981 SoC
This patch adds clock driver support for MediaTek MT7981 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:09 +0000 (20:00 +0800)]
clk: mediatek: add clock driver support for MediaTek MT7986 SoC
This patch adds clock driver support for MediaTek MT7986 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:07 +0000 (20:00 +0800)]
clk: mediatek: add CLK_XTAL support for clock driver
This adds the CLK_XTAL macro/flag to allow modeling clocks which are
directly connected to the xtal clock.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:04 +0000 (20:00 +0800)]
clk: mediatek: add infrasys clock mux support
This patch adds infrasys clock mux support for mediatek clock drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:01 +0000 (20:00 +0800)]
clk: mediatek: add support to configure clock driver parent
This patch adds support for a clock node to configure its parent clock
where possible.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:59 +0000 (19:59 +0800)]
clk: mediatek: add CLK_BYPASS_XTAL flag to allow bypassing searching clock parent of xtal clock
The mtk clock framework in u-boot uses array index for searching clock
parent (kernel uses strings for search), so we need to specify a special
clock with ID=0 for CLK_XTAL in u-boot.
In the mt7622/mt7629 clock tree, the clocks with ID=0 never call
mtk_topckgen_get_mux_rate, adn return xtal clock directly. This what we
expected.
However for newer chips, they may have some clocks with ID=0 not
representing the xtal clock and still needs mtk_topckgen_get_mux_rate be
called. Current logic will make entire clock driver not working.
This patch adds a flag to indicate that whether a clock driver needs clocks
with ID=0 to call mtk_topckgen_get_mux_rate.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:57 +0000 (19:59 +0800)]
pinctrl: mediatek: add pinctrl driver for MT7986 SoC
This patch adds pinctrl and gpio support for MT7986 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:55 +0000 (19:59 +0800)]
pinctrl: mediatek: add pinctrl driver for MT7981 SoC
This patch adds pinctrl and gpio support for MT7981 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:52 +0000 (19:59 +0800)]
dt-bindings: pinctrl: mediatek: add a header for common pinconf parameters
This patch adds a pinctrl header for common pinconf parameters such as
pull-up/pull-down resistors and drive strengths.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:50 +0000 (19:59 +0800)]
arm: dts: mt7622: add i2c support
Add both hardware and software i2c support for mt7622.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:48 +0000 (19:59 +0800)]
i2c: add support for MediaTek I2C interface
This patch adds support for MediaTek I2C interface
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:45 +0000 (19:59 +0800)]
spi: add support for MediaTek spi-mem controller
This patch adds support for spi-mem controller found on newer MediaTek SoCs
This controller supports Single/Dual/Quad SPI mode.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:43 +0000 (19:59 +0800)]
watchdog: mediatek: add support for MediaTek MT7986 SoC
Add watchdog support for MediaTek MT7986 SoC
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:41 +0000 (19:59 +0800)]
timer: mtk: add support for MediaTek MT7981/MT7986 SoCs
This patch add general-purpose timer support for MediaTek MT7981/MT7986.
These two SoCs uses a newer version of timer with its register definition
slightly changed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:38 +0000 (19:59 +0800)]
pwm: mtk: add support for MediaTek MT7981 SoC
This patch adds PWM support for MediaTek MT7981 SoC.
MT7981 uses a different register offset so we have to add a version field
to indicate the IP core version.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:36 +0000 (19:59 +0800)]
pwm: mtk: add support for MediaTek MT7986 SoC
This patch adds PWM support for MediaTek MT7986 SoC.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:33 +0000 (19:59 +0800)]
arm: dts: mt7622: force high-speed mode for uart
The input clock for uart is too slow (25MHz) which introduces frequent data
error on both receiving and transmitting even if the baudrate is 115200.
Using high-speed can significantly solve this issue.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:31 +0000 (19:59 +0800)]
serial: mtk: add support for using dynamic baud clock souce
The baud clock on some platform may change due to assigned-clock-parent
set in DT. In current flow the baud clock is only retrieved during probe
stage. If the parent of the source clock changes after probe stage, the
setbrg will set wrong baudrate.
To get the right clock rate, this patch records the baud clk struct to the
driver's priv, and changes the driver's flow to get the clock rate before
calling _mtk_serial_setbrg().
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:28 +0000 (19:59 +0800)]
net: mediatek: add support for MediaTek MT7981/MT7986
This patch adds support for MediaTek MT7981 and MT7986. Both chips uses
PDMA v2.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:26 +0000 (19:59 +0800)]
net: mediatek: add support for PDMA v2
This patch adds support for PDMA v2 hardware. The PDMA v2 has extended the
DMA descriptor to 8-words, and some of its fields have changed comparing
to the v1 hardware.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:24 +0000 (19:59 +0800)]
net: mediatek: stop using bitfileds for DMA descriptors
This patch is a preparation for adding a new version of PDMA of which the
DMA descriptor fields has changed. Using bitfields will result in a complex
modification. Convert bitfields to u32 units can solve this problem easily.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:21 +0000 (19:59 +0800)]
net: mediatek: use a struct to cover variations of all SoCs
Using a single soc id to control different initialization and TX/RX flow
for all SoCs is not extensible if more hardware variations are added in
the future.
This patch introduces a struct to replace the original mtk_soc to allow
the driver be able handle newer hardwares.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:19 +0000 (19:59 +0800)]
mmc: mediatek: add support for MediaTek MT7891/MT7986 SoCs
Add eMMC and SDXC support for MediaTek MT7981/MT7986 SoCs
Both chips support SDXC and eMMC 4.5. MT7986A supports eMMC 5.1.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:16 +0000 (19:59 +0800)]
board: mediatek: add MT7981 reference boards
This patch adds general board files based on MT7981 SoCs.
MT7981 uses one mmc controller for booting from both SD and eMMC, and the
pins of mmc controller are also shared with spi controller.
So three configs are need for these boot types:
1. mt7981_rfb_defconfig - SPI-NOR and SPI-NAND
2. mt7981_emmc_rfb_defconfig - eMMC only
3. mt7981_sd_rfb_defconfig - SD only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:13 +0000 (19:59 +0800)]
board: mediatek: add MT7986 reference boards
Add general board files based on MT7986 SoCs.
MT7986 uses one mmc controller for booting from both SD and eMMC.
Both MT7986A and MT7986B use the same pins for spi controller.
Configs for various boot types:
1. mt7986_rfb_defconfig - SPI-NOR and SPI-NAND for MT7986A/B
2. mt7986a_bpir3_emmc_defconfig - eMMC for MT7986A only
3. mt7986a_bpir3_sd_defconfig - SD for MT7986A only
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:11 +0000 (19:59 +0800)]
arm: mediatek: add support for MediaTek MT7981 SoC
This patch adds basic support for MediaTek MT7981 SoC.
This include the file that will initialize the SoC after boot and its
device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 11:59:09 +0000 (19:59 +0800)]
arm: mediatek: add support for MediaTek MT7986 SoC
This patch adds basic support for MediaTek MT7986 SoC.
This include the file that will initialize the SoC after boot and its
device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tom Rini [Tue, 20 Sep 2022 12:50:07 +0000 (08:50 -0400)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan)
- u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali)
- mvebu: theadorable: Misc updates in defconfig und dts (Stefan)
Tom Rini [Tue, 20 Sep 2022 12:49:36 +0000 (08:49 -0400)]
Merge tag 'u-boot-at91-2023.01-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.01 cycle:
This feature set includes the important update on PIO4 pinctrl driver
that solves a long time mismatch between Linux and U-boot, related on
the unification of pinctrl and gpio driver support, now respecting the
pinctrl bindings ABI; and also support for pinctrl subnodes. The feature
set also adds support for PDA screen detection for sam9x60_curiosity
board , one fix for SD-Card reinsertion and one fix for sam9x60 clocks.
Stefan Roese [Thu, 15 Sep 2022 14:20:43 +0000 (16:20 +0200)]
kirkwood: lsxl: Sync defconfigs
With the recent changes in the Orion timer driver Kconfig setup, the
board specific enabling is not needed any more. This patch sync's these
2 boards with their current defconfig version.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michael Walle <michael@walle.cc>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:42 +0000 (16:20 +0200)]
arm: mvebu: dts: mvebu-u-boot.dtsi: Add "u-boot, dm-pre-reloc" to timer DT node
Adding the "u-boot,dm-pre-reloc" DT property to the timer node is
necesssary to support the timer in the early boot phases (e.g.
SPL & pre-reloc).
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:41 +0000 (16:20 +0200)]
arm: mvebu: dts: armada-375.dtsi: Add timer0 & timer1
Add the DT bindings / descriptions for timer0 & timer1, exactly as done
in mainline Linux.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:40 +0000 (16:20 +0200)]
arm: mvebu: dts: Makefile: Compile Armada 375 dtb in a separate step
This patch changes the compilation, so that the Armada 375 board(s) are
compiled in a separate step. This is necessary for the timer dts
conversion, as A375 has a different / timer description in the dts.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:39 +0000 (16:20 +0200)]
arm: mvebu: Use CONFIG_TIMER on all MVEBU & KIRKWOOD platforms
Now that the new timer support is available for these platforms, let's
select this IF for all these platforms. This way it's not necessary
that each board changes it's config header.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:38 +0000 (16:20 +0200)]
timer: orion-timer: Add timer_get_boot_us() for BOOTSTAGE support
Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE
enabled, like pogo_v4.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 14:20:37 +0000 (16:20 +0200)]
timer: orion-timer: Add support for other Armada SoC's
This patch adds support for other Marvell Armada SoC's, supporting the
25MHz fixed clock operation, like the Armada XP etc.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Stefan Roese [Thu, 15 Sep 2022 13:21:22 +0000 (15:21 +0200)]
arm: mvebu: theadorable: Update eth & mdio DT nodes
With the recent changes in the Marvel mvneta network driver, the MDIO
bus is not connected any more. This patch updates the DT nodes to use
the nodes from the dtsi files instead of creating ad-hoc nodes.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 15 Sep 2022 13:21:21 +0000 (15:21 +0200)]
arm: mvebu: theadorable: Misc defconfig changes
- Remove EFI support as it's not used on this board
- Disable CONFIG_FIT_PRINT to reduce the serial output (minimal speedup)
Signed-off-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 14 Sep 2022 16:48:16 +0000 (18:48 +0200)]
arm: mvebu: Add default SPL_SIZE_LIMIT for 32-bit SoCs
32-bit Marvell Armada BootROMs limit maximal size of SPL image to 192 kB.
So define 192 kB (= 0x30000) limit as default value for SPL_SIZE_LIMIT.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 14 Sep 2022 13:06:46 +0000 (15:06 +0200)]
arm: mvebu: turris_omnia: Add CONFIG_BOARD_SIZE_LIMIT
Maximal size of u-boot kwb image binary is $CONFIG_ENV_OFFSET which is
0xF0000 = 983040 bytes. So add missing CONFIG_BOARD_SIZE_LIMIT definition
to ensure that u-boot binary does not overflow to the u-boot env storage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 14 Sep 2022 13:06:14 +0000 (15:06 +0200)]
Makefile: Add missing CONFIG_BOARD_SIZE_LIMIT check for u-boot-spl.kwb
Currently CONFIG_BOARD_SIZE_LIMIT check is ignored for u-boot-spl.kwb
target. Fix it by adding missing $(BOARD_SIZE_CHECK) macro.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Mon, 19 Sep 2022 17:19:39 +0000 (13:19 -0400)]
Merge branch 'master' into next
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 19 Sep 2022 16:17:04 +0000 (12:17 -0400)]
Prepare v2022.10-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 19 Sep 2022 15:22:26 +0000 (11:22 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tim Harvey [Thu, 8 Sep 2022 16:11:13 +0000 (09:11 -0700)]
imx8m*_venice_defconfig: fix default bootcmd
commit
970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
had an unintended side effect of resulting in a bootcmd env var change
for boards like venice that did not have CONFIG_USE_BOOTCOMMAND defined
and relied on it being defaulted in include/config_distro_bootcmd.h.
Following that patch it instead got defaulted in tools/env/fw_env_private.h
Fix this by enabling CONFIG_USE_BOOTCOMMAND for venice.
Fixes: commit
970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tom Rini [Mon, 19 Sep 2022 12:38:32 +0000 (08:38 -0400)]
Merge tag 'u-boot-imx-
20220919' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20220919
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13500
- Fix imx8mn-beacon-kit-u-boot
- Merged Purism
- imxrt1170 (already merged in u-boot-imx)
- Fixes in crypto FSL
- Toradex : fixes Verdin
- Serial Driver: fixes when not used as console
- DH Boards : fixes + USB
- Fix CONFIG_SYS_MALLOC_F_LEN (Kconfig)
- Add imx6ulz_smm_m2
Marek Behún [Mon, 19 Sep 2022 09:32:08 +0000 (11:32 +0200)]
powerpc: mpc85xx: Fix incorrect application of patch
I messed up application of patch
5a428e751044 ("mmc: fsl_esdhc_spl: Add
support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from
a work-in-progress branch where I changed usage of
CONFIG_SDCARD to CONFIG_SD_BOOT
and refactored
SYS_MPC85XX_NO_RESETVEC
mess.
But these changes aren't in master yet. Fix the wrong usage of these
macros.
Fixes:
5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without
CONFIG_SYS_MMC_U_BOOT_OFFS")
Signed-off-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
Sergiu Moga [Thu, 1 Sep 2022 14:22:42 +0000 (17:22 +0300)]
pinctrl: at91-pio4: Add support for pinctrl config subnodes
Previously, in order for the `pinctrl-*` DT node properties
to be properly processed, the pinctrl's subnodes were limited
to only having the `pinmux` property as well as other additional
properties (slew-rate, bias-disable, etc.). Now, with this patch
the pinctrl driver is made to work similarly to the one from Linux.
It can now distinguish between one subnode and a subnode with multiple
subnodes.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Sergiu Moga [Thu, 1 Sep 2022 14:22:41 +0000 (17:22 +0300)]
pinctrl: at91-pio4: Bind GPIO driver to the pinctrl DT node
This has been done in order to align the DT of U-Boot with the DT
of Linux. In Linux, a phandle from a '-gpio' DT property is linked
to the pinctrl driver, a single driver that handles both pinctrl
settings and offers GPIO API to callers. On the other hand,
U-Boot redirects such phandle to a corresponding UCLASS_GPIO
driver, because U-Boot offers two different types of drivers
in this case: UCLASS_PINCTRL which handles pin functions and
UCLASS_GPIO which handles gpio requests as a gpio provider.
Due to this, we have two drivers in Uboot, but the Devicetree
has a single node. Thus, just one of the drivers can be probed
for the DT node during platform initialization, before relocation.
Our previous solution in U-Boot was to have a different devicetree:
the gpio node has a subnode for the pinctrl driver, which
is not compliant with Linux ABI. Furthermore, our documentation
for this type of nodes mentions no such gpio compatible.
After this patch, we can no longer add nodes with a gpio
compatible in the DT. Thus, in order to link the pinctrl driver to
the gpio one, a hook to the bind method of the former in U-Boot has
been added and the GPIO related compatibles have been removed to
avoid conflict when compatibles are enumerated and bound to drivers
during platform start before relocation. The bind method will attach
the GPIO driver to the pinctrl DT node so that every phandle coming
from '-gpio' DT properties will be redirected to a valid driver
attached to the pinctrl DT node.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Sergiu Moga [Thu, 1 Sep 2022 14:22:40 +0000 (17:22 +0300)]
ARM: dts: at91: sama7: Align with Linux Devicetree
This patch makes sure that the Devicetree for the sama7
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Sergiu Moga [Thu, 1 Sep 2022 14:22:39 +0000 (17:22 +0300)]
ARM: dts: at91: sama5: Align with Linux Devicetree
This patch makes sure that the Devicetree for the sama5
boards are aligned with the Devicetree from Linux. This
implies removing the GPIO compatible and replacing it
with the PINCTRL one, as well as unifying the SDMMC
pinctrl related subnodes under one single subnode.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Mihai Sain [Tue, 19 Jul 2022 13:51:59 +0000 (16:51 +0300)]
clk: at91: sam9x60: change parent clock from mck_pres to mck_div
ddrck and qspick should have mck_div as parent clocks to be in sync with
linux driver.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Durai Manickam KR [Thu, 7 Jul 2022 11:10:56 +0000 (16:40 +0530)]
ARM: dts: at91: sam9x60_curiosity: add onewire support
Add support for onewire memory.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Durai Manickam KR [Thu, 7 Jul 2022 11:10:55 +0000 (16:40 +0530)]
board: sam9x60_curiosity: add pda detect call at init time
Call the PDA detection mechanism at boot time so that we can
have the pda environment variable ready for use.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Durai Manickam KR [Thu, 7 Jul 2022 11:10:54 +0000 (16:40 +0530)]
configs: sama9x60_curiosity: add onewire and eeprom drivers
SAM9X60 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol. Enabling one wire and eeprom drivers
for this memory.
Signed-off-by: Durai Manickam KR <durai.manickamkr@microchip.com>
Sergiu Moga [Wed, 22 Jun 2022 13:30:47 +0000 (16:30 +0300)]
mmc: atmel_sdhci: re-enable sdhci after SD Card re-insertion
Whenever the SD Card would be removed and then re-inserted while in the
U-Boot command line, the `SDBPWR` bit of the `SDMMC_PCR` register would
remain unset afterwards. In order for the bit to be set again after
re-insertion, register an additional `deferred_probe` method that the
DM would then transparently call. This method will call the generic
`sdhci_probe` which will, during its execution flow, set this bit to 1.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reported-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Michael Trimarchi [Sun, 18 Sep 2022 15:09:53 +0000 (17:09 +0200)]
bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards
Introduce BSH SystemMaster (SMM) M2 board family, which consists of:
imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards.
Add support for imx6ulz BSH SMM M2 board:
- 128 MiB DDR3 RAM
- 256MiB Nand
- USBOTG1 peripheral - fastboot.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Tue, 30 Aug 2022 12:34:26 +0000 (14:34 +0200)]
ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing
Adjust the DRAM timing settings for this board per ones provided
by hardware department. The change is applied to the LPDDR4 MR11
register CA ODT configuration, from RZQ/6 to RZQ/3, which fixes
stability issues on subset of boards. The DDR PHY PIE block has
been updated accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Fri, 26 Aug 2022 21:16:27 +0000 (23:16 +0200)]
ARM: imx: Enable SPL GPIO hog on i.MX8M Plus DHCOM
Enable GPIO hog support in SPL to match the GPIO hog support in U-Boot proper.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marcel Ziswiler [Mon, 22 Aug 2022 13:06:03 +0000 (15:06 +0200)]
verdin-imx8mm: various config additions and improvements
- integrate bootcount using SNVS_LP general purpose register LPGPR0
- enable link-time optimisation
- explicitly set a boot delay of one second
- enable CRC32 and MD5
- enable command for low-level access to data in a partition
- enable time commands
- enable PMIC commands
- improve ETHPRIME configuration
- enable eMMC HS400 functionality
- enable fixed PHY and MDIO driver model
- remove stale PFUZE100 PMIC driver
- enable thermal management unit driver
- enable more USB host functionality
- enable hexdump
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Peng Fan [Thu, 15 Sep 2022 01:38:18 +0000 (09:38 +0800)]
Kconfig: enlarge CONFIG_SYS_MALLOC_F_LEN
"alloc space exhausted" happens in very early stage, which could be seen
with DEBUG_UART options enabled and leeds to an non-functional board.
kontron_pitx_imx8m:
CONFIG_DEBUG_UART_BASE=0x30880000 # for serial3
CONFIG_DEBUG_UART_CLOCK=
24000000
imx8mqevk:
CONFIG_DEBUG_UART_BASE=0x30860000 # for uart1
CONFIG_DEBUG_UART_CLOCK=
24000000
It is because CONFIG_SYS_MALLOC_F_LEN is too small and still leave
CONFIG_SPL_SYS_MALLOC_F_LEN as 0x2000.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Johannes Schneider [Tue, 6 Sep 2022 12:15:04 +0000 (14:15 +0200)]
serial: mxc: have putc use the TXFIFO
only waiting for TXEMPTY leads to corrupted messages going over the
wire - which is fixed by making use of the FIFO
this change is following the linux kernel uart driver
(drivers/tty/serial/imx.c), which also checks UTS_TXFULL
instead of UTS_TXEMPTY
Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Johannes Schneider [Tue, 6 Sep 2022 12:15:03 +0000 (14:15 +0200)]
serial: mxc: enable the RX pipeline
on imx8(mm) the RXDMUXSEL needs to be set for data going over the wire
(as observable on a connected 'scope) to actually make it into the
RXFIFO
the reference manual is not overly clear about this, and only
mentiones that "UCR3_RXDMUXSEL should always be set." - and since the
CR3 register reverts to its reset values after setting the baudrate,
setting this bit is done during '_mxc_serial_setbgr'
Signed-off-by: Johannes Schneider <johannes.schneider@leica-geosystems.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Mon, 5 Sep 2022 10:57:00 +0000 (07:57 -0300)]
MAINTAINERS: imx: Add an entry for the serial driver
Currently, when running ./scripts/get_maintainer.pl on serial_mxc.c
no i.MX maintainer is returned.
Fix it by adding an entry for this driver.
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Angus Ainslie [Thu, 25 Aug 2022 13:46:02 +0000 (06:46 -0700)]
board: purism: add the Purism Librem5 phone
Initial commit of Librem5 u-boot and SPL
Signed-off-by: Angus Ainslie <angus@akkea.ca>
Co-developed-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Denys Drozdov [Tue, 23 Aug 2022 11:05:49 +0000 (13:05 +0200)]
verdin-imx8mp: do not save environment when it's nowhere
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Denys Drozdov [Tue, 23 Aug 2022 11:05:48 +0000 (13:05 +0200)]
verdin-imx8mm: do not save environment when it's nowhere
This code part is broken, remove it.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Marcel Ziswiler [Mon, 22 Aug 2022 13:06:02 +0000 (15:06 +0200)]
verdin-imx8mm: improve and extend boot devices
- Annotate boot devices available in spl_board_boot_device().
- Drop SD3_BOOT/MMC3_BOOT not available for boot on Verdin iMX8M Mini.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Mon, 22 Aug 2022 13:06:01 +0000 (15:06 +0200)]
verdin-imx8mm: prepare for optional job ring driver model
Prepare for optional job ring driver model. Sec may be initialized based
on the job ring information processed from the device tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Mon, 22 Aug 2022 13:06:00 +0000 (15:06 +0200)]
verdin-imx8mm: verdin-imx8mp: update env memory layout
Update the distro config env memory layout for the Verdin iMX8M Mini and
Verdin iMX8M Plus:
- loadaddr=0x48280000 allows for 128.5MB area for uncompressing (ie FIT
images, kernel_comp_addr_r, kernel_comp_size)
- fdt_addr_r = loadaddr + 127.5MB : allows for 127.5MB kernel
- scriptaddr = fdt_addr_r + 512KB : allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB : allows for 512KB script
Memory layout taken from commit
fd5c7173ade4
("imx8m{m,n}_venice: update env memory layout") but moved loadaddr by an
additional 0.5MB to avoid "Moving Image from 0x48200000 to 0x48280000"
during booti plus actually defining kernel_comp_size to make booti work.
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marek Vasut [Fri, 19 Aug 2022 11:02:53 +0000 (13:02 +0200)]
ARM: imx: Update DDR frequency on i.MX8M Plus DHCOM
Commit
99c7cc58e12 ("ddr: imx: Add i.MX9 DDR controller driver")
contains an inobvious side-effect which renders all systems using
DRAM controller at 3732 MT/s unbootable. The change is located in
ddrphy_init_set_dfi_clk(), where the switch case statement entry
3732 changed to entry 3733, so any board with DDR calibration data
for 3732 MT/s operations needs to be updated to 3733 MT/s to match
the change.
Since there is currently only one such board, update the board instead
of handling both 3732 and 3733 options in the driver. It is likely the
NXP MX8MP RPA update will follow and use the later value too.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Fri, 19 Aug 2022 11:02:23 +0000 (13:02 +0200)]
imx8m: ddrphy_utils: Remove unused file
The ddrphy_utils.c is now deduplicated in drivers/ddr/imx/phy/ddrphy_utils.c ,
this drivers/ddr/imx/imx8m/ddrphy_utils.c is a remnant from when the
deduplication was implemented and was not removed. Remove it as it is
unused.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Fri, 12 Aug 2022 20:59:10 +0000 (22:59 +0200)]
ARM: imx: dh-imx6: Increase SF erase area for u-boot update
Erase the entire U-Boot area during U-Boot update instead of just
a subset of it. This way, in case u-boot-with-spl.imx grows, the
sf write won't write over non-erased part of the SPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>