Jakub Jelinek [Fri, 27 Jan 2023 19:11:20 +0000 (20:11 +0100)]
libstdc++: Fix up FAIL in 17_intro/names.cc on glibc < 2.19 [PR108568]
On gcc112 which has glibc 2.17 I've noticed
FAIL: 17_intro/names.cc (test for excess errors)
FAIL: experimental/names.cc (test for excess errors)
These are because glibc < 2.19 used __unused as field member of various structs,
including mcontext_t in sys/ucontext.h on ppc64le.
This was changed in glibc with
https://gcc.gnu.org/pipermail/libc-alpha/2013-November/045766.html
names.cc even has
#ifdef __GLIBC_PREREQ
#if ! __GLIBC_PREREQ(2, 19)
// Glibc defines this prior to 2.19
#undef __unused
#endif
#endif
for it, but it doesn't work. The reason is that __GLIBC_PREREQ is defined in
<features.h> but nothing included that header before this spot (it is included later
from bits/stdc++.h).
The following patch on Linux/Hurd conditionally includes features.h to get
the needed macros before deciding if __unused should be undefined or not.
If needed, I could use __GLIBC_PREREQ then but would need to check if it is
defined and between 1996 and 1999 it wasn't.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR libstdc++/108568
* testsuite/17_intro/names.cc (__unused): For linux or GNU hurd
include features.h if present and then check __GLIBC__ and
__GLIBC_MINOR__ macros for glibc prior to 2.19, instead of testing
__GLIBC_PREREQ which isn't defined yet.
Richard Sandiford [Fri, 27 Jan 2023 17:04:28 +0000 (17:04 +0000)]
testsuite: Two adjustments to gcc.dg/vect/complex
fast-math-bb-slp-complex-add-pattern-half-float.c no longer fails.
The scans in (loop test) fast-math-complex-add-half-float.c were
marked UNRESOLVED because they scanned slp1 rather than vect.
gcc/testsuite/
* gcc.dg/vect/complex/fast-math-bb-slp-complex-add-pattern-half-float.c:
Remove XFAIL.
* gcc.dg/vect/complex/fast-math-complex-add-half-float.c: Fix names
of dump files.
Richard Sandiford [Fri, 27 Jan 2023 17:04:28 +0000 (17:04 +0000)]
aarch64: Prevent simd tests from being optimised away
The vqdml[as]l[hs]_laneq_* tests were folded at compile time, meaning
that we didn't have any Advanced SIMD instructions in the assembly.
Kyrill's preference was to use wrapper functions, so this patch does
that for the failing tests and for others that had scan-assemblers
with inline intrinsics calls. (There were some tests that already
used wrapper functions, some that used volatile, some that used
inline asm barriers, and some that had no separation.)
Doing that for vqdmulhs_lane_s32.c meant that we generated the scalar
form of the instruction, rather than a vector instruction operating
on lane 0. That seems fair enough, so the patch keeps that test but
adds a second one for lane 1.
gcc/testsuite/
* gcc.target/aarch64/simd/vfma_f64.c: Use a wrapper function
rather than an asm barrier.
* gcc.target/aarch64/simd/vfms_f64.c: Likewise.
* gcc.target/aarch64/simd/vmul_f64_1.c: Use a wrapper function
rather than volatile.
* gcc.target/aarch64/simd/vmul_n_f64_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlalh_laneq_s16_1.c: Use a wrapper
function. Remove -fno-inline.
* gcc.target/aarch64/simd/vqdmlals_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlslh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsls_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhs_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_laneq_s16_1.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_laneq_s32_1.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise.
Allow the scalar form to be used when operating on lane 0.
Add a test for lane 1.
Richard Sandiford [Fri, 27 Jan 2023 17:03:51 +0000 (17:03 +0000)]
Add support for conditional xorsign [PR96373]
This patch is an optimisation, but it's also a prerequisite for
fixing PR96373 without regressing vect-xorsign_exec.c.
Currently the vectoriser vectorises:
for (i = 0; i < N; i++)
r[i] = a[i] * __builtin_copysignf (1.0f, b[i]);
as two unconditional operations (copysign and mult).
tree-ssa-math-opts.cc later combines them into an "xorsign" function.
This works for both Advanced SIMD and SVE.
However, with the fix for PR96373, the vectoriser will instead
generate a conditional multiplication (IFN_COND_MUL). Something then
needs to fold copysign & IFN_COND_MUL to the equivalent of a conditional
xorsign. Three obvious options were:
(1) Extend tree-ssa-math-opts.cc.
(2) Do the fold in match.pd.
(3) Leave it to rtl combine.
I'm against (3), because this isn't a target-specific optimisation.
(1) would be possible, but would involve open-coding a lot of what
match.pd does for us. And, in contrast to doing the current
tree-ssa-math-opts.cc optimisation in match.pd, there should be
no danger of (2) happening too early. If we have an IFN_COND_MUL
then we're already past the stage of simplifying the original
source code.
There was also a choice between adding a conditional xorsign ifn
and simply open-coding the xorsign. The latter seems simpler,
and means less boiler-plate for target-specific code.
The signed_or_unsigned_type_for change is needed to make sure
that we stay in "SVE space" when doing the optimisation on 128-bit
fixed-length SVE.
gcc/
PR tree-optimization/96373
* tree.h (sign_mask_for): Declare.
* tree.cc (sign_mask_for): New function.
(signed_or_unsigned_type_for): For vector types, try to use the
related_int_vector_mode.
* genmatch.cc (commutative_op): Handle conditional internal functions.
* match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
gcc/testsuite/
PR tree-optimization/96373
* gcc.target/aarch64/sve/cond_xorsign_1.c: New test.
* gcc.target/aarch64/sve/cond_xorsign_2.c: Likewise.
Richard Sandiford [Fri, 27 Jan 2023 17:03:50 +0000 (17:03 +0000)]
vect/aarch64: Fix various sve/cond*.c failures
Quite a few gcc.target/aarch64/sve/cond*.c tests started failing
after g:
68e0063397ba820e71adc220b2da0581dce29ffa, but it turns out
that we were cheating passes before the patch.
The tests involve comparing the cost of N wide compares, a pack
sequence, and a narrow COND_EXPR with the cost of a single COND_EXPR
on fewer elements. The costs for the former included all operations,
but the costs for the latter didn't model the comparison embedded in
the COND_EXPR. The patch made us include the comparison on both sides,
making it apples-for-apples, but that's enough to tip the balance in
favour of using the wider types.
I think the new choice does reflect the current SVE cost model
correctly. (Whether and how the model should be tweaked is a
different question.) This patch therefore changes the tuning
vector length to one that makes the choice more obvious.
That in turn needs a tweak to compare_inside_loop_cost.
The function compares body_cost1/vf1 with body_cost2/vf2,
but for fully-amsked loops, it limits vf to the actual number
of iterations. This is so that (say) an expensive 16-element
vector body doesn't win over a cheaper 8-element vector body
when there are only 7 elements to process.
However, the limit was applied using known_le, regardless of
the tuning target. For a heuristic like this, it seems better
to use the likely minimum (which is a concept that was only
added after this code went in).
g:
68e0063397ba820e71adc220b2da0581dce29ffa also fixed
vcond_4_costly.c.
gcc/
* tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
Use the likely minimum VF when bounding the denominators to
the estimated number of iterations.
gcc/testsuite/
* gcc.target/aarch64/sve/cond_asrd_1.c: Tune for a 256-bit
vector length.
* gcc.target/aarch64/sve/cond_cnot_4.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_6.c: Likewise.
* gcc.target/aarch64/sve/cond_unary_5.c: Likewise.
* gcc.target/aarch64/sve/cond_unary_6.c: Likewise.
* gcc.target/aarch64/sve/cond_uxt_5.c: Likewise.
* gcc.target/aarch64/sve/vcond_4_costly.c: Remove XFAILs.
Gaius Mulley [Fri, 27 Jan 2023 16:38:29 +0000 (16:38 +0000)]
Tidy up to declarations allowing files to be built by gm2
This patch adds missing declarations in export qualified lists
and fixes comparisons of an address type against NIL.
These changes allow make m2/stage2/cc1gm2 to succeed when in
maintainer mode.
gcc/m2/ChangeLog:
* gm2-compiler/M2Options.def: Export GetMQ, SetMQ.
* gm2-compiler/M2Preprocess.mod: (MakeSaveTempsFileName):
Test NewDir against NIL. Test Dumpdir against NIL.
Test GetMD () against NIL. Test GetMMD () against NIL.
Test GetMQ () against NIL. Test GetObj () against NIL.
Test tempfile against NIL.
* gm2-compiler/P2SymBuild.def: Export
BuildNoReturnAttribute.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Jonathan Wakely [Fri, 27 Jan 2023 11:29:21 +0000 (11:29 +0000)]
libstdc++: Use constant for name of tzdata file
There's a string_view with this filename, which should have been used
instead of a string literal.
libstdc++-v3/ChangeLog:
* src/c++20/tzdb.cc (tzdata_stream): Use constant instead of
string literal.
Jonathan Wakely [Fri, 27 Jan 2023 11:28:37 +0000 (11:28 +0000)]
libstdc++: Use dg-bogus in new test [PR108554]
libstdc++-v3/ChangeLog:
PR libstdc++/108554
* testsuite/23_containers/map/modifiers/108554.cc: Use dg-bogus.
Richard Biener [Fri, 13 Jan 2023 07:57:12 +0000 (08:57 +0100)]
Clarify -shared effect on crtfastmath.o
This rewords the note to not specifically mention crtfastmath.o
but FP environment altering by -ffast-math or -Ofast.
PR target/55522
* doc/invoke.texi (-shared): Clarify effect on -ffast-math
and -Ofast FP environment side-effects.
Richard Biener [Fri, 13 Jan 2023 07:53:44 +0000 (08:53 +0100)]
mips: Don't add crtfastmath.o for -shared
Don't add crtfastmath.o for -shared to avoid altering the FP
environment when loading a shared library.
PR target/55522
* config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
Don't add crtfastmath.o for -shared.
Richard Biener [Fri, 13 Jan 2023 07:52:07 +0000 (08:52 +0100)]
ia64: Don't add crtfastmath.o for -shared
Don't add crtfastmath.o for -shared to avoid altering the FP
environment when loading a shared library.
PR target/55522
* config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
for -shared.
Richard Biener [Fri, 13 Jan 2023 07:50:14 +0000 (08:50 +0100)]
alpha: Don't add crtfastmath.o for -shared
Don't add crtfastmath.o for -shared to avoid altering the FP
environment when loading a shared library.
PR target/55522
* config/alpha/linux.h (ENDFILE_SPEC): Don't add
crtfastmath.o for -shared.
Andrew MacLeod [Mon, 16 Jan 2023 20:02:51 +0000 (15:02 -0500)]
Correctly detect shifts out of range
get_shift_range was incorrectly communicating that it couldn't calculate
a range when the shift values was always out fo range. Fix this and
alwasy return [0, 0] when the shift value is always out of range.
PR tree-optimization/108306
gcc/
* range-op.cc (operator_lshift::fold_range): Return [0, 0] not
varying for shifts that are always out of void range.
(operator_rshift::fold_range): Return [0, 0] not
varying for shifts that are always out of void range.
gcc/testsuite/
* gcc.dg/pr108306.c: New.
Andrew MacLeod [Wed, 25 Jan 2023 16:13:23 +0000 (11:13 -0500)]
Do not try to logical fold floating point relations.
relation_fold_and_or looks for relations among common operands feeding
logical ands and ors. With no knowledge of NANs, it should not attempt
to do this with floating point ssa names.
PR tree-optimization/108447
gcc/
* gimple-range-fold.cc (old_using_range::relation_fold_and_or):
Do not attempt to fold HONOR_NAN types.
gcc/testsuite/
* gcc.dg/pr108447.c: New.
Ju-Zhe Zhong [Fri, 27 Jan 2023 12:30:20 +0000 (20:30 +0800)]
RISC-V: Fix testcases check.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: Fix testcase check.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: Ditto.
Ju-Zhe Zhong [Fri, 20 Jan 2023 02:24:34 +0000 (10:24 +0800)]
RISC-V: Add vle/vse C++ overloaded API intrinsic testcases
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vle-1.C: New test.
* g++.target/riscv/rvv/base/vle_tu-1.C: New test.
* g++.target/riscv/rvv/base/vle_tum-1.C: New test.
* g++.target/riscv/rvv/base/vle_tumu-1.C: New test.
* g++.target/riscv/rvv/base/vse-1.C: New test.
* g++.target/riscv/rvv/base/riscv_vector.h: New.
Ju-Zhe Zhong [Fri, 20 Jan 2023 02:20:29 +0000 (10:20 +0800)]
RISC-V: Fix vop_m overloaded C++ API name.
According to https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/master/
For "vop_m" intrinsics, C++ overloaded API does not have "_m" suffix.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
Remove _m suffix for "vop_m" C++ overloaded API name.
Ju-Zhe Zhong [Thu, 19 Jan 2023 14:31:08 +0000 (22:31 +0800)]
RISC-V: Add vse.v C API intrinsics testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vse-1.c: New test.
* gcc.target/riscv/rvv/base/vse-2.c: New test.
* gcc.target/riscv/rvv/base/vse-3.c: New test.
* gcc.target/riscv/rvv/base/vse_m-1.c: New test.
* gcc.target/riscv/rvv/base/vse_m-2.c: New test.
* gcc.target/riscv/rvv/base/vse_m-3.c: New test.
Ju-Zhe Zhong [Thu, 19 Jan 2023 14:12:49 +0000 (22:12 +0800)]
RISC-V: Add vle.v C API intrinsics testcases
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vle-1.c: New test.
* gcc.target/riscv/rvv/base/vle-2.c: New test.
* gcc.target/riscv/rvv/base/vle-3.c: New test.
* gcc.target/riscv/rvv/base/vle_m-1.c: New test.
* gcc.target/riscv/rvv/base/vle_m-2.c: New test.
* gcc.target/riscv/rvv/base/vle_m-3.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vle_tumu-3.c: New test.
Ju-Zhe Zhong [Thu, 19 Jan 2023 06:07:49 +0000 (14:07 +0800)]
RISC-V: Add vlm/vsm C/C++ API intrinsics support
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
(vsm): Ditto.
* config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
(vbool64_t): Ditto.
(vbool32_t): Ditto.
(vbool16_t): Ditto.
(vbool8_t): Ditto.
(vbool4_t): Ditto.
(vbool2_t): Ditto.
(vbool1_t): Ditto.
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
(rvv_arg_type_info::get_tree_type): Ditto.
(function_expander::use_contiguous_load_insn): Ditto.
* config/riscv/vector.md (@pred_store<mode>): Ditto.
gcc/testsuite/ChangeLog:
* g++.target/riscv/rvv/base/vsm-1.C: New test.
* g++.target/riscv/rvv/rvv.exp: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-1.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-2.c: New test.
* gcc.target/riscv/rvv/base/vlm_vsm-3.c: New test.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:29:15 +0000 (11:29 +0800)]
RISC-V: Finalize testcases for final version VSETVL PASS.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: Adjust for final implementation.
* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-44.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-65.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-66.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_single-9.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-13.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-11.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-12.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-13.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-14.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-2.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-4.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-5.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-6.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-7.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-8.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-9.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-10.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-73.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-74.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-75.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-14.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-15.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-16.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-17.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-18.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-19.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-20.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvl-9.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c: New test.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:24:34 +0000 (11:24 +0800)]
RISC-V: Finalize VSETVL PASS implementation
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
(vsetvl_discard_result_insn_p): New function.
(reg_killed_by_bb_p): rename to find_reg_killed_by.
(find_reg_killed_by): New name.
(get_vl): allow it to be called by more functions.
(has_vsetvl_killed_avl_p): Add condition.
(get_avl): allow it to be called by more functions.
(insn_should_be_added_p): New function.
(get_all_nonphi_defs): Refine function.
(get_all_sets): Ditto.
(get_same_bb_set): New function.
(any_insn_in_bb_p): Ditto.
(any_set_in_bb_p): Ditto.
(get_vl_vtype_info): Add VLMAX forward optimization.
(source_equal_p): Fix issues.
(extract_single_source): Refine.
(avl_info::multiple_source_equal_p): New function.
(avl_info::operator==): Adjust for final version.
(vl_vtype_info::operator==): Ditto.
(vl_vtype_info::same_avl_p): Ditto.
(vector_insn_info::parse_insn): Ditto.
(vector_insn_info::available_p): New function.
(vector_insn_info::merge): Adjust for final version.
(vector_insn_info::dump): Add hard_empty.
(pass_vsetvl::hard_empty_block_p): New function.
(pass_vsetvl::backward_demand_fusion): Adjust for final version.
(pass_vsetvl::forward_demand_fusion): Ditto.
(pass_vsetvl::demand_fusion): Ditto.
(pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
(pass_vsetvl::compute_local_properties): Adjust for final version.
(pass_vsetvl::can_refine_vsetvl_p): Ditto.
(pass_vsetvl::refine_vsetvls): Ditto.
(pass_vsetvl::commit_vsetvls): Ditto.
(pass_vsetvl::propagate_avl): New function.
(pass_vsetvl::lazy_vsetvl): Adjust for new version.
* config/riscv/riscv-vsetvl.h (enum def_type): New enum.
Xi Ruoyao [Fri, 27 Jan 2023 11:03:05 +0000 (19:03 +0800)]
testsuite: Use noipa attribute for pr95115 test
This prevent the compiler from deeming the NaN result "unused" and
remove the calculation raising INVALID exception. See the discussion
in PR107608 for details.
gcc/testsuite/ChangeLog:
* gcc.dg/pr95115.c (x): Add noipa attribute.
Tobias Burnus [Fri, 27 Jan 2023 10:32:19 +0000 (11:32 +0100)]
OpenMP/Fortran: Fix has_device_addr clause splitting [PR108558]
gcc/fortran/ChangeLog:
PR fortran/108558
* trans-openmp.cc (gfc_split_omp_clauses): Handle has_device_addr.
libgomp/ChangeLog:
PR fortran/108558
* testsuite/libgomp.fortran/has_device_addr.f90: New test.
Jakub Jelinek [Fri, 27 Jan 2023 10:17:35 +0000 (11:17 +0100)]
doc: Fix up return type of __builtin_va_arg_pack_len [PR108560]
__builtin_va_arg_pack_len as implemented returned int since its introduction
in 2007. The initial documentation didn't mention any return type,
which changed in 2010 in r0-103077-gab940b73bfabe2cec4 during some
documentation formatting cleanups
https://gcc.gnu.org/legacy-ml/gcc-patches/2010-09/msg01632.html
I can understand that for formatting some type was needed there
but what exactly hasn't been really discussed.
So, I think we should change documentation to match the implementation,
rather than change implementation to match the documentation.
Most people don't use more than
2147483647 arguments to inline functions,
and on poor targets with 16-bit ints I bet even having more than 65535
arguments to inline functions would be highly unexpected.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR other/108560
* doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
from size_t to int.
Jakub Jelinek [Fri, 27 Jan 2023 10:16:43 +0000 (11:16 +0100)]
cgraph: Adjust verify_corresponds_to_fndecl [PR106061]
IPA passes redirect some calls in what it determines to be unreachable code
to builtin_decl_unreachable. But that function returns sometimes
builtin_decl_explicit (BUILT_IN_UNREACHABLE) (which was what GCC 12
and earlier did always), or builtin_decl_explicit (BUILT_IN_TRAP)
(e.g. for -funreachable-traps, -O0, -Og).
Now the cgraph verification code has a code to verify cgraph edges
and has there an exception for these redirections to BUILT_IN_UNREACHABLE,
but doesn't have for BUILT_IN_TRAP, so e.g. the following testcase
ICEs during that verification.
The following patch just adds BUILT_IN_TRAP to those exceptions.
2023-01-27 Jakub Jelinek <jakub@redhat.com>
PR ipa/106061
* cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
redirection of calls to __builtin_trap in addition to redirection
to __builtin_unreachable.
* gcc.dg/pr106061.c: New test.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:09:21 +0000 (11:09 +0800)]
RISC-V: Fix bug of before_p function
compare_with will return other than -1, so it should check less than 0
rather than check exactly with -1.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:13:05 +0000 (11:13 +0800)]
RISC-V: Refine function args of some functions.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
(emit_vsetvl_insn): Ditto.
Ju-Zhe Zhong [Thu, 19 Jan 2023 07:02:58 +0000 (15:02 +0800)]
RISC-V: Fix pred_mov constraint for vle.v
The original constraint is incorrect in pred_mov pattern.
Take a look at Alternative 2, the operands[0] is "vr",
operands[1] which is mask operand can be "vm".
Such alternative matching will give the wrong codegen (vle.v v0,0(a5),v0.t)
This is illegal according to RVV ISA.
To fix this issue and not destroy the RA performance, fix this pattern in
this patch.
gcc/ChangeLog:
* config/riscv/vector.md: Fix constraints.
Ju-Zhe Zhong [Fri, 20 Jan 2023 09:33:09 +0000 (17:33 +0800)]
RISC-V: Add TARGET_MIN_VLEN > 32 into iterators of EEW = 64 vector modes
According to RVV ISA, RVV doesn't support EEW == 64 vector type for zve32x
and zve32f. So it makes sense add predicate in the iterators of EEW = 64
vector modes.
gcc/ChangeLog:
* config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
Jakub Jelinek [Fri, 27 Jan 2023 09:51:35 +0000 (10:51 +0100)]
tree: Fix up tree_code_{length,type}
On Thu, Jan 26, 2023 at 09:45:35AM -0500, Patrick Palka via Gcc-patches wrote:
> > +#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) TYPE,
> > +#define END_OF_BASE_TREE_CODES tcc_exceptional,
> > +
> > +
> > /* Class of tree given its code. */
> > -extern const enum tree_code_class tree_code_type[];
> > +constexpr enum tree_code_class tree_code_type[] = {
> > +#include "all-tree.def"
> > +};
> > +
> > +#undef DEFTREECODE
> > +#undef END_OF_BASE_TREE_CODES
> >
> > /* Each tree code class has an associated string representation.
> > These must correspond to the tree_code_class entries. */
> > extern const char *const tree_code_class_strings[];
> >
> > /* Number of argument-words in each kind of tree-node. */
> > -extern const unsigned char tree_code_length[];
> > +
> > +#define DEFTREECODE(SYM, NAME, TYPE, LENGTH) LENGTH,
> > +#define END_OF_BASE_TREE_CODES 0,
> > +constexpr unsigned char tree_code_length[] = {
> > +#include "all-tree.def"
> > +};
> > +
> > +#undef DEFTREECODE
> > +#undef END_OF_BASE_TREE_CODES
>
> IIUC defining these globals as non-inline constexpr gives them internal
> linkage, and so each TU contains its own unique copy of these globals.
> This bloats cc1plus by a tiny bit and is technically an ODR violation
> because some inline functions such as tree_class_check also ODR-use
> these variables and so each defn of tree_class_check will refer to a
> "different" tree_code_class. Since inline variables are a C++17
> feature, I guess we could fix this by defining the globals the old way
> before C++17 and as inline constexpr otherwise?
And I'd argue with the tiny bit.
In my x86_64-linux cc1plus from today, I see 193 _ZL16tree_code_length vars,
374 bytes each, and 324 _ZL14tree_code_type vars, 1496 bytes each.
So, that means waste of 555016 .rodata bytes, plus being highly non-cache
friendly.
The following patch does that.
Tested on x86_64-linux in my -O0 working tree (system gcc 12
compiler) where .rodata shrunk with the patch by 928896 bytes, in last
stage of a bootstrapped tree (built by today's prev-gcc) where .rodata
shrunk by 561728 bytes (in neither case .text or most other sections
changed sizes) and on powerpc64le-linux --disable-bootstrap
(system gcc 4.8.5) to test also the non-C++17 case plus with
fully x86_64-linux, i686-linux and powerpc64le-linux bootstraps/regtests.
BTW, wonder if tree_code_type couldn't be an array of unsigned char
elements rather than enum tree_code_class and we'd then cast it
to the enum in the macro, that would shrink that array from 1496 bytes
to 374. Of course, that sounds like stage1 material.
2023-01-27 Patrick Palka <ppalka@redhat.com>
Jakub Jelinek <jakub@redhat.com>
* tree-core.h (tree_code_type, tree_code_length): For
C++17 and later, add inline keyword, otherwise don't define
the arrays, but declare extern arrays.
* tree.cc (tree_code_type, tree_code_length): Define these
arrays for C++14 and older.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:06:59 +0000 (11:06 +0800)]
RISC-V: Change parse_insn into public for future use.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.h: Change it into public.
Ju-Zhe Zhong [Wed, 18 Jan 2023 03:03:47 +0000 (11:03 +0800)]
RISC-V: Reorder VSETVL pass location
Insert before dce means we don't invoke DCE by this pass itself, and
also we can leverage the effort of BB reorder.
gcc/ChangeLog:
* config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
pass.
Ju-Zhe Zhong [Wed, 18 Jan 2023 02:50:14 +0000 (10:50 +0800)]
RISC-V: Change VSETVL PASS always call split_all_insns
Since LCM will destroy CFG, we are going to reorder the location of VSETVL PASS
at least before bbro (block-reorder PASS) which is before split3 PASS. We need
to call it in VSETVL PASS to get final RVV instructions patterns.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
Ju-Zhe Zhong [Wed, 18 Jan 2023 02:44:15 +0000 (10:44 +0800)]
RISC-V: Fix incorrect attributes of vsetvl instructions pattern
gcc/ChangeLog:
* config/riscv/vector.md: Fix incorrect attributes.
Iain Sandoe [Thu, 26 Jan 2023 13:49:11 +0000 (13:49 +0000)]
Modula-2: Add claimed command line options to lang.opt [PR108555].
This is a partial reversion of the changes in r13-5373-g80cf2c5e8f496b.
As observed in the PR, handling the C and Driver options in the Modula-2
lang-specific code could be difficult to emulate; This reverts to adding
the required options to the language-specific .opt file.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108555
PR modula2/108182
PR modula2/102343
gcc/m2/ChangeLog:
* gm2-lang.cc (gm2_langhook_option_lang_mask): Do not claim CL_C
or CL_DRIVER.
(gm2_langhook_init_options): Handle options that we want to pass
to the preprocessor.
* lang-specs.h: Pass -B and -save-temps to regular compile lines.
* lang.opt: Add C and Driver options that Modula-2 intercepts for
internal use. Reorder options into two sections and to collate.
Tobias Burnus [Fri, 27 Jan 2023 08:13:16 +0000 (09:13 +0100)]
gomp/declare-variant-1*.f90: Update for Windows
Replace target selector 'lp64' by '! ilp32' to handle
Windows which uses 32bit long (and vice versa for '! lp64').
gcc/testsuite/ChangeLog:
* gfortran.dg/gomp/declare-variant-10.f90: Update scan-tree's
target selector to handle Windows.
* gfortran.dg/gomp/declare-variant-11.f90: Likewise.
* gfortran.dg/gomp/declare-variant-12.f90: Likewise.
Richard Biener [Fri, 13 Jan 2023 08:01:12 +0000 (09:01 +0100)]
LoongArch: Don't add crtfastmath.o for -shared
Don't add crtfastmath.o for -shared to avoid altering the FP
environment when loading a shared library.
PR target/55522
* config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
Don't add crtfastmath.o for -shared.
Alexandre Oliva [Fri, 27 Jan 2023 01:52:07 +0000 (22:52 -0300)]
[docs] note that -g opts are implicitly negatable too
Back in 2017, I made -g* options implicitly negatable, without
realizing there was documentation that required updating. Oops.
Fixed, at last!
for gcc/ChangeLog
* doc/options.texi (option, RejectNegative): Mention that
-g-started options are also implicitly negatable.
GCC Administrator [Fri, 27 Jan 2023 00:17:53 +0000 (00:17 +0000)]
Daily bump.
Gaius Mulley [Thu, 26 Jan 2023 21:43:22 +0000 (21:43 +0000)]
PR-108551 gcc/m2/gm2-libs-pim/Termbase.mod:128:1 error end of non-void
cc1gm2 generates an error: control reaches end of non-void function when
compiling Termbase.mod if -Werror=return-type is present.
../gcc/m2/gm2-libs-pim/Termbase.mod: In function 'Termbase_KeyPressed':
../gcc/m2/gm2-libs-pim/Termbase.mod:128:1: error: control reaches end
of non-void function [-Werror=return-type]
128 | END KeyPressed ;
| ^~~
This occurs as cc1gm2 does skips over the <* noreturn *> attribute. This
patch records the <* noreturn *> attribute in the m2 symbol table and
later on sets TREE_THIS_VOLATILE when creating the function decl.
The patch also contains a fix for the main scaffold which also omitted
a return 0 after the exception handler code.
gcc/m2/ChangeLog:
* gm2-compiler/M2GCCDeclare.mod: Import IsProcedureNoReturn.
(DeclareProcedureToGccWholeProgram): New variable declared and set
returnType. Pass returnType to BuildEndFunctionDeclaration.
Extra parameter IsProcedureNoReturn passed to
BuildEndFunctionDeclaration.
* gm2-compiler/M2Quads.mod (BuildM2MainFunction): Correct
scaffold comment and add extra return 0.
* gm2-compiler/P2Build.bnf: Import BuildNoReturnAttribute.
(ProcedureHeading): Process EndBuildFormalParameters before
parsing AttributeNoReturn.
(DefProcedureHeading): Process EndBuildFormalParameters before
parsing AttributeNoReturn.
(AttributeNoReturn): Call BuildNoReturnAttribute.
* gm2-compiler/P2SymBuild.def (BuildNoReturnAttribute): New
procedure.
* gm2-compiler/P2SymBuild.mod (BuildNoReturnAttribute): New
procedure.
* gm2-compiler/SymbolTable.def (PutProcedureInline): Corrected
comment.
(PutProcedureNoReturn): New procedure.
(IsProcedureNoReturn): New procedure function.
* gm2-compiler/SymbolTable.mod (SymProcedure): IsNoReturn
new field.
(MakeProcedure): Initialize IsNoReturn to FALSE.
(PutProcedureNoReturn): New procedure.
(IsProcedureNoReturn): New procedure function.
* gm2-gcc/m2decl.cc (m2decl_BuildEndFunctionDeclaration):
Add extra parameter isnoreturn. Set TREE_THIS_VOLATILE
to isnoreturn.
* gm2-gcc/m2decl.def (BuildEndFunctionDeclaration): Add
extra parameter isnoreturn.
* gm2-gcc/m2decl.h (m2decl_BuildEndFunctionDeclaration): Add
extra parameter isnoreturn.
* gm2-gcc/m2except.cc (m2except_InitExceptions): Change all
function decl to pass an extra parameter isnoreturn.
gcc/testsuite/ChangeLog:
* gm2/warnings/returntype/fail/badreturn.mod: New test.
* gm2/warnings/returntype/fail/warnings-returntype-fail.exp:
New test.
* gm2/warnings/returntype/pass/Termbase.mod: New test.
* gm2/warnings/returntype/pass/goodreturn.mod: New test.
* gm2/warnings/returntype/pass/keypressedsimple.mod: New test.
* gm2/warnings/returntype/pass/warnings-returntype-pass.exp:
New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Gaius Mulley [Thu, 26 Jan 2023 21:41:53 +0000 (21:41 +0000)]
Fix comment so that /* does not appear inside a comment.
The block comment in m2.flex associated with splitSlashStar
contains /* which causes a warning. This patch obfuscates
the comment /* symbols.
* m2.flex (splitSlashStar): Fix comment so that /* does not
appear inside the comment.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Kito Cheng [Tue, 17 Jan 2023 16:14:57 +0000 (00:14 +0800)]
RISC-V: Use get_typenode_from_name to get fixed-width integer type nodes
[u]int32_t are using different type between glibc and newlib, so getting
those node by int or long type isn't portable way, I also update all
other fixed-width integer types to prevent this happened again in future :P
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc (register_builtin_types):
Use get_typenode_from_name to get fixed-width integer type
nodes.
* config/riscv/riscv-vector-builtins.def: Update define with
fixed-width integer type nodes.
Ju-Zhe Zhong [Mon, 9 Jan 2023 23:38:38 +0000 (07:38 +0800)]
RISC-V: Add testcases for AVL=REG support
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/avl_single-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-20.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-21.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-22.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-23.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-24.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-25.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-26.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-27.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-28.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-29.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-30.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-31.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-32.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-33.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-34.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-35.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-36.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-37.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-38.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-39.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-40.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-41.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-42.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-43.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-44.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-45.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-46.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-47.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-48.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-49.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-50.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-51.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-52.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-53.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-54.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-55.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-56.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-57.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-58.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-59.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-60.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-61.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-62.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-63.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-64.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-65.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-66.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-67.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-68.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-69.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-14.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-15.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-16.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-17.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-18.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-19.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-70.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-71.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/avl_single-9.c: New test.
Ju-Zhe Zhong [Wed, 4 Jan 2023 13:48:48 +0000 (21:48 +0800)]
RISC-V: Add testcases for IMM (0 ~ 31) AVL
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_bb_prop-9.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-10.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-11.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-12.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-13.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-14.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-15.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-16.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-17.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_loop_invariant-9.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-1.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-2.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-3.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-4.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-5.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-6.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-7.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-8.c: New test.
* gcc.target/riscv/rvv/vsetvl/imm_switch-9.c: New test.
Ju-Zhe Zhong [Mon, 9 Jan 2023 23:29:11 +0000 (07:29 +0800)]
RISC-V: Fix bugs of supporting AVL=REG (single-real-def) in VSETVL PASS
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
(real_insn_and_same_bb_p): New function.
(same_bb_and_after_or_equal_p): Remove it.
(before_p): New function.
(reg_killed_by_bb_p): Ditto.
(has_vsetvl_killed_avl_p): Ditto.
(get_vl): Move location so that we can call it.
(anticipatable_occurrence_p): Fix issue of AVL=REG support.
(available_occurrence_p): Ditto.
(dominate_probability_p): Remove it.
(can_backward_propagate_p): Remove it.
(get_all_nonphi_defs): New function.
(get_all_predecessors): Ditto.
(any_insn_in_bb_p): Ditto.
(insert_vsetvl): Adjust AVL REG.
(source_equal_p): New function.
(extract_single_source): Ditto.
(avl_info::single_source_equal_p): Ditto.
(avl_info::operator==): Adjust for AVL=REG.
(vl_vtype_info::same_avl_p): Ditto.
(vector_insn_info::set_demand_info): Remove it.
(vector_insn_info::compatible_p): Adjust for AVL=REG.
(vector_insn_info::compatible_avl_p): New function.
(vector_insn_info::merge): Adjust AVL=REG.
(vector_insn_info::dump): Ditto.
(pass_vsetvl::merge_successors): Remove it.
(enum fusion_type): New enum.
(pass_vsetvl::get_backward_fusion_type): New function.
(pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
(pass_vsetvl::forward_demand_fusion): Ditto.
(pass_vsetvl::demand_fusion): Ditto.
(pass_vsetvl::prune_expressions): Ditto.
(pass_vsetvl::compute_local_properties): Ditto.
(pass_vsetvl::cleanup_vsetvls): Ditto.
(pass_vsetvl::commit_vsetvls): Ditto.
(pass_vsetvl::init): Ditto.
* config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
(enum merge_type): New enum.
Ju-Zhe Zhong [Mon, 9 Jan 2023 23:17:20 +0000 (07:17 +0800)]
RISC-V: Add probability model of each block to prevent endless loop of Phase 3
Notice that the PASS is just simpily pick the probability >= 50%
to do the backward fusion which will create endless loop on Phase 3.
Adding this probability to fix this bug.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc
(vector_infos_manager::vector_infos_manager): Add probability.
(vector_infos_manager::dump): Ditto.
(pass_vsetvl::compute_probabilities): Ditto.
* config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
Ju-Zhe Zhong [Mon, 9 Jan 2023 23:10:59 +0000 (07:10 +0800)]
RISC-V: Remove dirty_pat since it is redundant
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
(vector_insn_info::merge): Ditto.
(vector_insn_info::dump): Ditto.
(pass_vsetvl::merge_successors): Ditto.
(pass_vsetvl::backward_demand_fusion): Ditto.
(pass_vsetvl::forward_demand_fusion): Ditto.
(pass_vsetvl::commit_vsetvls): Ditto.
* config/riscv/riscv-vsetvl.h: Ditto.
Ju-Zhe Zhong [Mon, 9 Jan 2023 22:56:43 +0000 (06:56 +0800)]
RISC-V: Rename insn into rinsn for rtx_insn * [NFC]
Since the PASS is implemented base on RTL_SSA framework.
According to rtl_ssa, they name insn_info * as insn and
name rtx_insn * rinsn. I follow this rule in this pass but I missed
this function. So rename it to make codes be consistent to RTL_SSA
framework.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
rinsn.
Ju-Zhe Zhong [Mon, 9 Jan 2023 22:47:26 +0000 (06:47 +0800)]
RISC-V: Refine codes in backward fusion [NFC]
This NFC patch is preparing for the following patches.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
Ju-Zhe Zhong [Mon, 9 Jan 2023 22:40:07 +0000 (06:40 +0800)]
RISC-V: Avoid redundant flow in forward fusion
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
Add pre-check for redundant flow.
Ju-Zhe Zhong [Mon, 9 Jan 2023 22:33:07 +0000 (06:33 +0800)]
RISC-V: Cleanup the codes of bitmap create and free [NFC]
This patch is a NFC patch to move the codes into a wrapper function so that
they can be reused. I will reuse them in the following patches.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
(vector_infos_manager::free_bitmap_vectors): Ditto.
(pass_vsetvl::pre_vsetvl): Adjust codes.
* config/riscv/riscv-vsetvl.h: New function declaration.
Ju-Zhe Zhong [Wed, 4 Jan 2023 13:45:26 +0000 (21:45 +0800)]
RISC-V: Refine Phase 3 of VSETVL PASS
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
(vector_insn_info::set_demand_info): New function.
(pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
(pass_vsetvl::merge_successors): Ditto.
(pass_vsetvl::compute_global_backward_infos): Ditto.
(pass_vsetvl::backward_demand_fusion): Ditto.
(pass_vsetvl::forward_demand_fusion): Ditto.
(pass_vsetvl::demand_fusion): New function.
(pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
* config/riscv/riscv-vsetvl.h: New function declaration.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-27.c: Update
testcase.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-28.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-45.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-25.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-26.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-27.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-28.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-3.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_conflict-7.c: Ditto.
* gcc.target/riscv/rvv/vsetvl/vlmax_switch_vtype-12.c: Ditto.
Ju-Zhe Zhong [Tue, 3 Jan 2023 07:30:30 +0000 (15:30 +0800)]
RISC-V: Fix bugs of available condition.
Suppose there are 2 demand infos:
Demand 1: demand TAIL.
Demand 2: not demand TAIL.
If a block is demand 1, we should adjust this block is available both for demand 1 && 2.
However, if a block is demand 2, we should only adjust this block is available for demand 2 only.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
Ju-Zhe Zhong [Tue, 3 Jan 2023 07:24:36 +0000 (15:24 +0800)]
RISC-V: Simplify codes of changing vsetvl instruction
This patch is NFC patch. I move these code as a function since we will
reuse it in the following patch (Refine phase 3 of VSETVL PASS)
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
(pass_vsetvl::compute_global_backward_infos): Simplify codes.
Ju-Zhe Zhong [Tue, 3 Jan 2023 07:16:41 +0000 (15:16 +0800)]
RISC-V: Fix backward_propagate_worthwhile_p
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
(backward_propagate_worthwhile_p): Fix non-worthwhile.
Ju-Zhe Zhong [Tue, 3 Jan 2023 07:11:59 +0000 (15:11 +0800)]
RISC-V: Fix wrong in_group flag in validate_change call function
Since we only change insn which is not in group. The flag currently is not correct.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
Ju-Zhe Zhong [Tue, 3 Jan 2023 06:55:30 +0000 (14:55 +0800)]
RISC-V: Fix bugs for refine vsetvl a5, zero into vsetvl zero, zero incorrectly
Currently we support this optimization:
bb 0:
vsetvli a5,zero,e32,mf2
bb 1:
vsetvli a5,zero,e64,m1 --> vsetvli zero,zero,e64,m1
According RVV ISA, we can do this optimization only if both RATIO and AVL are equal.
However, current VSETVL PASS missed the check of AVL. This patch add this condition
check to fix bugs.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
(pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
(pass_vsetvl::commit_vsetvls): Ditto.
* config/riscv/riscv-vsetvl.h: New function declaration.
Ju-Zhe Zhong [Tue, 3 Jan 2023 01:39:57 +0000 (09:39 +0800)]
RISC-V: Fix vsetivli instruction asm for IMM AVL
Notice that we should used vsetivli zero,4 instead of vsetvli zero,4
for IMM AVL (0 ~ 31) according to RVV ISA.
This patch fix vsetivli instruction asm bug.
gcc/ChangeLog:
* config/riscv/vector.md:
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vle-constraint-1.c:
Ju-Zhe Zhong [Thu, 29 Dec 2022 15:34:02 +0000 (23:34 +0800)]
RISC-V: Fix inferior codegen for vse intrinsics.
Currently we use pred_mov to to do the codegen for vse intrinsics. However, it
generates inferior codegen when I am testing AVL model of VSETVL PASS using vse
intrinsics.
Consider this following code:
void f2 (int * restrict in, int * restrict out, void * restrict mask_in, int n)
{
vfloat32mf2_t v = __riscv_vle32_v_f32mf2 ((float *)(in + 10000), 19);
__riscv_vse32_v_f32mf2 ((float *)(out + 10000), v, 19);
vbool64_t mask = *(vbool64_t*)mask_in;
for (int i = 0; i < n; i++)
{
vint16mf2_t v1 = __riscv_vle16_v_i16mf2 ((int16_t *)(in + i + 1), 19);
__riscv_vse16_v_i16mf2 ((int16_t *)(out + i + 1), v1, 19);
vint32mf2_t v2 = __riscv_vle32_v_i32mf2 ((int32_t *)(in + i + 2), 19);
__riscv_vse32_v_i32mf2 ((int32_t *)(out + i + 2), v2, 19);
vint32mf2_t v3 = __riscv_vle32_v_i32mf2_tumu (mask, v2, (int32_t *)(in + i + 200), 13);
__riscv_vse32_v_i32mf2 ((int32_t *)(out + i + 200), v2, 13);
vfloat64m1_t v4 = __riscv_vle64_v_f64m1_m (mask, (double *)(in + i + 300), 11);
__riscv_vse64_v_f64m1 ((double *)(out + i + 300), v4, 11);
vfloat64m1_t v5 = __riscv_vle64_v_f64m1_tum (mask, v4, (double *)(in + i + 500), 11);
__riscv_vse64_v_f64m1 ((double *)(out + i + 500), v5, 11);
vfloat64m1_t v6 = __riscv_vle64_v_f64m1_mu (mask, v5, (double *)(in + i + 600), 11);
__riscv_vse64_v_f64m1_m (mask, (double *)(out + i + 600), v6, 11);
vuint8mf4_t v7 = __riscv_vle8_v_u8mf4 ((uint8_t *)(in + i + 700), 11);
__riscv_vse8_v_u8mf4 ((uint8_t *)(out + i + 700), v7, 11);
}
}
Before this patch:
csrr t2,vlenb
srli t2,t2,1
slli s0,t2,2
vsetvli zero,19,e16,mf2,ta,ma
sub s0,s0,t2
csrr t2,vlenb
vle16.v v24,0(a3)
mv a4,a3
vse16.v v24,0(a1)
srli t2,t2,1
add a2,a3,t6
add s0,s0,sp
vsetvli zero,19,e32,mf2,ta,ma
addi a3,a3,4
vle32.v v24,0(a3)
vsetvli zero,t0,e32,mf2,ta,ma
vse32.v v24,0(s0)
slli s0,t2,2
sub s0,s0,t2
add s0,s0,sp
vsetvli t0,zero,e32,mf2,ta,ma
vle32.v v24,0(s0)
mv s0,t2
slli t2,t2,2
mv a5,a1
vsetvli zero,19,e32,mf2,ta,ma
addi a1,a1,4
sub t2,t2,s0
vse32.v v24,0(a1)
add t2,t2,sp
vsetvli t0,zero,e32,mf2,ta,ma
addi t1,a5,796
vle32.v v24,0(t2)
addi t5,a4,1196
addi a7,a5,1196
addi t4,a4,1996
addi a6,a5,1996
vsetvli zero,13,e32,mf2,ta,ma
add a4,a4,t3
vse32.v v24,0(t1)
add a5,a5,t3
vsetvli zero,11,e64,m1,tu,mu
vle64.v v24,0(t5),v0.t
vse64.v v24,0(a7)
vle64.v v24,0(t4),v0.t
vse64.v v24,0(a6)
vle64.v v24,0(a4),v0.t
vse64.v v24,0(a5),v0.t
vsetvli zero,11,e8,mf4,ta,ma
vle8.v v24,0(a2)
vse8.v v24,0(a2)
bne a0,a3,.L8
csrr t0,vlenb
slli t1,t0,1
add sp,sp,t1
lw s0,12(sp)
addi sp,sp,16
jr ra
We are generating redundant spilling codes.
Here we introduce a dedicated pred_store pattern for vse intrinsics like
maskstore in ARM SVE.
After this patch:
vsetvli zero,19,e16,mf2,ta,ma
mv a5,a4
vle16.v v24,0(a0)
mv a3,a0
vse16.v 19,0(a4)
addi t1,a4,796
vsetvli zero,19,e32,mf2,ta,ma
addi a0,a0,4
addi a4,a4,4
vle32.v v24,0(a0)
addi t0,a3,1196
vse32.v 19,0(a4)
addi a7,a5,1196
addi t6,a3,1996
addi a6,a5,1996
add t5,a3,t4
vsetvli zero,13,e32,mf2,ta,ma
add a2,a5,t4
vse32.v 13,0(t1)
add a3,a3,t3
vsetvli zero,11,e64,m1,tu,mu
add a5,a5,t3
vle64.v v24,0(t0),v0.t
vse64.v 11,0(a7)
vle64.v v24,0(t6),v0.t
vse64.v 11,0(a6)
vle64.v v24,0(t5),v0.t
vse64.v 11,0(a2),v0.t
vsetvli zero,11,e8,mf4,ta,ma
vle8.v v24,0(a3)
vse8.v 11,0(a5)
bne a1,a4,.L8
.L6:
ret
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
pred_store for vse.
* config/riscv/riscv-vector-builtins.cc
(function_expander::add_mem_operand): Refine function.
(function_expander::use_contiguous_load_insn): Adjust new
implementation.
(function_expander::use_contiguous_store_insn): Ditto.
* config/riscv/riscv-vector-builtins.h: Refine function.
* config/riscv/vector.md (@pred_store<mode>): New pattern.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vse-constraint-1.c: New test.
Ju-Zhe Zhong [Wed, 28 Dec 2022 05:11:08 +0000 (13:11 +0800)]
RISC-V: Fix pointer tree type for store pointer.
For store intrinsic,
the function type should be void store (T *...) instead of void store (const T *...)
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
Harald Anlauf [Wed, 25 Jan 2023 21:47:26 +0000 (22:47 +0100)]
Fortran: fix ICE in check_host_association [PR108544]
gcc/fortran/ChangeLog:
PR fortran/108544
* resolve.cc (check_host_association): Extend host association check
so that it is not restricted to functions. Also prevent NULL pointer
dereference.
gcc/testsuite/ChangeLog:
PR fortran/108544
* gfortran.dg/pr108544.f90: New test.
* gfortran.dg/pr96102b.f90: New test.
Marek Polacek [Wed, 25 Jan 2023 22:19:54 +0000 (17:19 -0500)]
opts: SANITIZE_ADDRESS wrongly cleared [PR108543]
Here we crash on a null fndecl ultimately because we haven't defined
the built-ins described in sanitizer.def. So
builtin_decl_explicit (BUILT_IN_ASAN_POINTER_SUBTRACT);
returns NULL_TREE, causing an ICE later.
DEF_SANITIZER_BUILTIN only actually defines the built-ins when flag_sanitize
has SANITIZE_ADDRESS, or some of the other SANITIZE_*, but it doesn't check
SANITIZE_KERNEL_ADDRESS or SANITIZE_USER_ADDRESS. Unfortunately, with
-fsanitize=address -fno-sanitize=kernel-address
or
-fsanitize=kernel-address -fno-sanitize=address
SANITIZE_ADDRESS ends up being unset from flag_sanitize even though
_USER/_KERNEL are set. That's because -fsanitize=address means
SANITIZE_ADDRESS | SANITIZE_USER_ADDRESS and -fsanitize=kernel-address
is SANITIZE_ADDRESS | SANITIZE_KERNEL_ADDRESS but parse_sanitizer_options
does
flags &= ~sanitizer_opts[i].flag;
so the subsequent -fno- unsets SANITIZE_ADDRESS. Then no sanitizer
built-ins are actually defined.
I'm not sure why SANITIZE_ADDRESS isn't just SANITIZE_USER_ADDRESS |
SANITIZE_KERNEL_ADDRESS, I don't think we need 3 bits.
PR middle-end/108543
gcc/ChangeLog:
* opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
if it was previously set.
gcc/testsuite/ChangeLog:
* c-c++-common/asan/pointer-subtract-5.c: New test.
* c-c++-common/asan/pointer-subtract-6.c: New test.
* c-c++-common/asan/pointer-subtract-7.c: New test.
* c-c++-common/asan/pointer-subtract-8.c: New test.
Iain Sandoe [Thu, 26 Jan 2023 09:46:32 +0000 (09:46 +0000)]
Modula-2: Remove debug code [PR108553].
Remove debugging code accidentally left in place in r13-5373-g80cf2c5e8f496b.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108553
gcc/m2/ChangeLog:
* gm2-lang.cc (gm2_langhook_init_options): Remove debug code.
Jakub Jelinek [Thu, 26 Jan 2023 16:21:22 +0000 (17:21 +0100)]
frange: Fix up foperator_{,not_}equal::fold_range for signed zeros [PR108540]
The following testcases are miscompiled, because threader sees some
SSA_NAME would have -0.0 value and when computing range of SSA_NAME == 0.0
foperator_equal::fold_range sees one operand has [-0.0, -0.0] singleton
range, the other [0.0, 0.0], they aren't equal (frange operator== uses
real_identical etc. rather than real comparisons) and so it thinks they
compare unequal. With signed zeros -0.0 == 0.0 is true though, so we
need to special case the both ranges singleton code.
Similarly, if we see op1 range being say [-42.0, -0.0] and op2 range
[0.0, 42.0], we'd check that the intersection of the two ranges is empty
(that is correct) and fold the result of == between such operands to
[0, 0] which is wrong, because -0.0 == 0.0, it needs to be [0, 1].
Similarly for foperator_not_equal::fold_range.
2023-01-26 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/108540
* range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
are singletons, use range_true even if op1 != op2
when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
even if intersection of the ranges is empty and one has
zero low bound and another zero high bound, use range_true_and_false
rather than range_false.
(foperator_not_equal::fold_range): If both op1 and op2
are singletons, use range_false even if op1 != op2
when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
even if intersection of the ranges is empty and one has
zero low bound and another zero high bound, use range_true_and_false
rather than range_true.
* gcc.c-torture/execute/ieee/pr108540-1.c: New test.
* gcc.c-torture/execute/ieee/pr108540-2.c: New test.
Jakub Jelinek [Thu, 26 Jan 2023 16:20:23 +0000 (17:20 +0100)]
value-relation: Small tweaks to tables
As I said earlier, all these tables are used solely in value-relation.cc
and never modified, plus because VREL_LAST is small especially the
two-dimensional arrays are vast a lot of .data (or .rodata) space
- 576 bytes each. The following patch makes those arrays static const
and uses unsigned char instead of relation_kind so that the
two-dimensional arrays shrink to 144 bytes.
2023-01-26 Jakub Jelinek <jakub@redhat.com>
* value-relation.cc (kind_string): Add const.
(rr_negate_table, rr_swap_table, rr_intersect_table,
rr_union_table, rr_transitive_table): Add static const, change
element type from relation_kind to unsigned char.
(relation_negate, relation_swap, relation_intersect, relation_union,
relation_transitive): Cast rr_*_table element to relation_kind.
(relation_to_code): Add static const.
(relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
Richard Sandiford [Thu, 26 Jan 2023 16:01:09 +0000 (16:01 +0000)]
testsuite: Fix hwasan/arguments-3.c failures
This testcase had three dg-error tests for ".*<message>.*".
But since . matches \n in Tcl regexps, the first dg-error
ate all the output, leaving the other two to fail.
The regexp is eventually embedded in a larger one, so we
can't prefix it with (?n). But the .*s aren't necessary,
since dg-error tests for a partial rather than a full match.
gcc/testsuite/
* c-c++-common/hwasan/arguments-3.c: Remove extraneous .*s.
Richard Sandiford [Thu, 26 Jan 2023 15:51:00 +0000 (15:51 +0000)]
aarch64: Remove expected error for compound literals
GCC no longer treats empty compound literals as an error
(see
14cfa01755a66afbae2539f8b5796c960ddcecc6).
gcc/testsuite/
* gcc.target/aarch64/bfloat16_scalar_typecheck.c: Accept empty
compound literals.
Richard Sandiford [Thu, 26 Jan 2023 15:51:00 +0000 (15:51 +0000)]
Update guality XFAILs for aarch64*-*-*
As in previous years, this patch updates the list of guality
XFAILs for aarch64*-*-*, based this time on an aarch64-linux-gnu
target with GDB 12 installed. The justification for XFAILing
without specific PRs is that anyone who is interested in improving
debug quality can look at the XFAILs in the guality directory,
which is more likely to be kept up-to-date than a bugzilla ticket.
gcc/testsuite/
* gcc.dg/guality/pr36728-2.c: Update XFAILs for aarch64*-*-*.
* gcc.dg/guality/pr54519-1.c: Likewise.
* gcc.dg/guality/pr54519-3.c: Likewise.
* gcc.dg/guality/pr54693-2.c: Likewise.
* gcc.dg/guality/sra-1.c: Likewise.
Richard Sandiford [Thu, 26 Jan 2023 15:50:59 +0000 (15:50 +0000)]
aarch64: Suppress warnings in pr99766.C
pr99766.C is an ICE regression test that now triggers a warning
about converting float to _Float16.
gcc/testsuite/
* g++.target/aarch64/sve/pr99766.C: Disable warnings.
Richard Sandiford [Thu, 26 Jan 2023 15:50:59 +0000 (15:50 +0000)]
aarch64: Remove slp_13.c XFAILs
These tests started passing after
g:
b073f2b098ba7819450d6c14a0fb96cb1c09f242.
gcc/testsuite/
* gcc.target/aarch64/sve/slp_13.c: Remove XFAILs.
Marek Polacek [Fri, 11 Nov 2022 22:59:30 +0000 (17:59 -0500)]
c++: Reject UDLs in certain contexts [PR105300]
In this PR, we are crashing because we've encountered a UDL where a
string-literal is expected. This patch makes the parser reject string
and character UDLs in all places where the grammar requires a
string-literal and not a user-defined-string-literal.
I've introduced two new wrappers; the existing cp_parser_string_literal
was renamed to cp_parser_string_literal_common and should not be called
directly. finish_userdef_string_literal is renamed from
cp_parser_userdef_string_literal.
PR c++/105300
gcc/c-family/ChangeLog:
* c-pragma.cc (handle_pragma_message): Warn for CPP_STRING_USERDEF.
gcc/cp/ChangeLog:
* parser.cc: Remove unnecessary forward declarations.
(cp_parser_string_literal): New wrapper.
(cp_parser_string_literal_common): Renamed from
cp_parser_string_literal. Add a bool parameter. Give an error when
UDLs are not permitted.
(cp_parser_userdef_string_literal): New wrapper.
(finish_userdef_string_literal): Renamed from
cp_parser_userdef_string_literal.
(cp_parser_primary_expression): Call cp_parser_userdef_string_literal
instead of cp_parser_string_literal.
(cp_parser_linkage_specification): Move a variable declaration closer
to its first use.
(cp_parser_static_assert): Likewise.
(cp_parser_operator): Call cp_parser_userdef_string_literal instead of
cp_parser_string_literal.
(cp_parser_asm_definition): Move a variable declaration closer to its
first use.
(cp_parser_asm_specification_opt): Move variable declarations closer to
their first use.
(cp_parser_asm_operand_list): Likewise.
(cp_parser_asm_clobber_list): Likewise.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/udlit-error1.C: New test.
David Malcolm [Thu, 26 Jan 2023 14:12:21 +0000 (09:12 -0500)]
analyzer: fix SARD-tc841-basic-00182-min.c test case [PR108507]
gcc/testsuite/ChangeLog:
PR analyzer/108507
* gcc.dg/analyzer/SARD-tc841-basic-00182-min.c: Add
-Wno-stringop-overflow.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Thu, 26 Jan 2023 14:12:21 +0000 (09:12 -0500)]
analyzer: fix false positives from -Wanalyzer-infinite-recursion [PR108524]
Reject -Wanalyzer-infinite-recursion diagnostics in which control flow
has been affected by conjured_svalues between the initial call to a
function and the subsequent entry to that function. This prevents false
positives such as in qemu's recursive JSON parser where function calls are
changing state in the rest of the program (e.g. consuming tokens), despite
the modelled state being effectively identical at both nested entrypoints.
gcc/analyzer/ChangeLog:
PR analyzer/108524
* analyzer.h (class feasible_node): New forward decl.
* diagnostic-manager.cc (epath_finder::get_best_epath): Add "pd"
param.
(epath_finder::explore_feasible_paths): Likewise.
(epath_finder::process_worklist_item): Likewise. Use it to call
pending_diagnostic::check_valid_fpath_p on the final fpath to
give pending_diagnostic a way to add additional restrictions on
feasibility.
(saved_diagnostic::calc_best_epath): Pass pending_diagnostic to
epath_finder::get_best_epath.
* infinite-recursion.cc: Include "analyzer/feasible-graph.h".
(infinite_recursion_diagnostic::check_valid_fpath_p): New.
(infinite_recursion_diagnostic::fedge_uses_conjured_svalue_p): New.
(infinite_recursion_diagnostic::expr_uses_conjured_svalue_p): New.
* pending-diagnostic.h (pending_diagnostic::check_valid_fpath_p):
New vfunc.
gcc/testsuite/ChangeLog:
PR analyzer/108524
* gcc.dg/analyzer/infinite-recursion-pr108524-1.c: New test.
* gcc.dg/analyzer/infinite-recursion-pr108524-2.c: New test.
* gcc.dg/analyzer/infinite-recursion-pr108524-qobject-json-parser.c:
New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Jonathan Wakely [Thu, 26 Jan 2023 11:35:00 +0000 (11:35 +0000)]
libstdc++: Add workaround for old tzdata.zi files
The tzdata.zi file in the RHEL 6 tzdata-2018e-3.el6 package (with
version "unknown") does not conform to the current rules described in
the zic(8) man page. Specifically, a Rule name must not start with the
character '+' in the current rules, but the older tzdata.zi file
used "+" as the name of rules for the "Europe/Sofia" zone.
Add a special case to the logic that detects whether a RULES field
refers to a named rule or is an offset from standard time. For a string
matching exactly "+" treat it as a named Rule, but for any other string
starting with '+' treat it as an offset.
libstdc++-v3/ChangeLog:
* src/c++20/tzdb.cc (operator>>(istream&, ZoneInfo&)): Allow
rules named "+" for compatibility with older tzdata.zi files.
Jonathan Wakely [Thu, 26 Jan 2023 10:55:28 +0000 (10:55 +0000)]
libstdc++: Add returns_nonnull to non-inline std::map detail [PR108554]
std::map uses a non-inline function to rebalance its tree and the
compiler can't see that it always returns a valid pointer (assuming
valid inputs, which is a precondition anyway). This can result in
-Wnull-derefernce warnings for valid code, because the compiler thinks
there is a path where the function returns null.
Adding the returns_nonnull attribute tells the compiler that is can't
happen. While we're doing that, we might as well also add a nonnull
attribute to the rebalancing functions too.
libstdc++-v3/ChangeLog:
PR libstdc++/108554
* include/bits/stl_tree.h (_Rb_tree_insert_and_rebalance): Add
nonnull attribute.
(_Rb_tree_rebalance_for_erase): Add nonnull and returns_nonnull
attributes.
* testsuite/23_containers/map/modifiers/108554.cc: New test.
Jonathan Wakely [Thu, 26 Jan 2023 09:26:35 +0000 (09:26 +0000)]
libstdc++: Fix strings read from /etc/sysconfig/clock [PR108530]
In r13-5339-ge00d5cafbe1a77 I made std::chrono::current_zone() look for
DEFAULT_TIMEZONE in /etc/sysconfig/clock but that is the wrong variable.
Old Suse systems use TIMEZONE to determine which zone /etc/localtime is
a copy of, and old RHEL system use ZONE.
libstdc++-v3/ChangeLog:
PR libstdc++/108530
* src/c++20/tzdb.cc (current_zone): Look for TIMEZONE or ZONE in
/etc/sysconfig/clock, not DEFAULT_TIMEZONE.
Gerald Pfeifer [Thu, 26 Jan 2023 13:00:14 +0000 (14:00 +0100)]
libstdc++: Move open-std.org to https in bugs manual
libstdc++-v3/ChangeLog:
* doc/xml/manual/intro.xml: Update links to www.open-std.org to
use https.
* doc/html/manual/bugs.html: Regenerate.
Richard Biener [Thu, 26 Jan 2023 07:59:20 +0000 (08:59 +0100)]
tree-optimization/108547 - robustify uninit predicate analysis
Predicate analysis, when looking through casts doesn't bother to
convert boundary constants to the type of the bounded variables.
The following robustifies value_sat_pred_p to use widest_ints
to deal with this, like other code in predicate analysis.
PR tree-optimization/108547
* gimple-predicate-analysis.cc (value_sat_pred_p):
Use widest_int.
* gcc.dg/uninit-pr108547.c: New testcase.
Siddhesh Poyarekar [Thu, 26 Jan 2023 12:07:03 +0000 (07:07 -0500)]
tree-optimization/108522 Use component_ref_field_offset
Instead of using TREE_OPERAND (expr, 2) directly, use
component_ref_field_offset instead, which does scaling for us. The
function also substitutes PLACEHOLDER_EXPRs but it is not relevant for
tree-object-size.
gcc/ChangeLog:
PR tree-optimization/108522
* tree-object-size.cc (compute_object_offset): Make EXPR
argument non-const. Call component_ref_field_offset.
gcc/testsuite/ChangeLog:
PR tree-optimization/108522
* gcc.dg/builtin-dynamic-object-size-0.c (DEFSTRUCT): New
macro.
(test_dynarray_struct_member_b, test_dynarray_struct_member_c,
test_dynarray_struct_member_d,
test_dynarray_struct_member_subobj_b,
test_dynarray_struct_member_subobj_c,
test_dynarray_struct_member_subobj_d): New tests.
(main): Call them.
Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
Kyrylo Tkachov [Thu, 26 Jan 2023 11:49:47 +0000 (11:49 +0000)]
aarch64: Add Linux kernel hwcap string for FEAT_CSSC
The Linux kernel has done basic enablement and detection of FEAT_CSSC so
we can use the cpuinfo string that they've specified.
This patchlet does that.
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
* config/aarch64/aarch64-option-extensions.def (cssc): Specify
FEATURE_STRING field.
Gerald Pfeifer [Thu, 26 Jan 2023 11:25:44 +0000 (12:25 +0100)]
doc: Refer to projects as GCC and GDB
...instead of gcc and gdb which are the executables (and in case of
GCC the C language front end).
gcc/ChangeLog:
* doc/sourcebuild.texi: Refer to projects as GCC and GDB.
Jakub Jelinek [Thu, 26 Jan 2023 09:41:10 +0000 (10:41 +0100)]
openmp, c++: Workaround fold_for_warn ICE on invalid OpenMP collapsed loops [PR108503]
My recent change to deduce structured binding vars earlier caused the following
invalid testcase to ICE. The problem is that because at cp_convert_omp_range_for
when !processing_template_decl we aren't yet ready to finalize the structured bindings
(e.g. can't emit there associated code) but need to deduce types of the vars so that
we don't get errors if we parse invalid uses of those vars in inner loops of the
collapsed construct. This is done by temporarily bumping processing_template_decl
around the call to cp_finish_decomp. Unfortunately, as we can't finalize it yet,
the types of the vars will be deduced, but their DECL_VALUE_EXPR is not finalized
yet and if say fold_for_warn tries to constant expression evaluate them, it
recurses on DECL_VALUE_EXPR and ICEs because it sees e.g. ARRAY_REF (with NULL type)
on a VAR_DECL with class type.
The following patch works around that by temporarily hiding the DECL_VALUE_EXPRs
by clearing DECL_HAS_VALUE_EXPR_P in that case during cp_convert_omp_range_for
and arranging for cp_finish_omp_range_for to set it back before doing the
final cp_finish_decomp.
2023-01-25 Jakub Jelinek <jakub@redhat.com>
PR c++/108503
* parser.cc (cp_convert_omp_range_for): If cp_finish_decomp has been
called in !processing_template_decl with processing_template_decl
temporarily set, clear DECL_HAS_VALUE_EXPR_P on the vars temporarily.
(cp_finish_omp_range_for): And set it back again here.
* g++.dg/gomp/pr108503.C: New test.
Richard Biener [Thu, 26 Jan 2023 07:38:35 +0000 (08:38 +0100)]
tree-optimization/108523 - testcase for the bug
This adds a reduced testcase for the PR.
PR tree-optimization/108523
* gcc.dg/torture/pr108523.c: New testcase.
Gaius Mulley [Thu, 26 Jan 2023 01:41:09 +0000 (01:41 +0000)]
libgm2/configure.ac use newer automake (1.15.1)
Use a newer automake (1.15.1).
libgm2/ChangeLog:
* configure.ac (AM_INIT_AUTOMAKE): Specify 1.15.1.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
Gaius Mulley [Thu, 26 Jan 2023 00:55:56 +0000 (00:55 +0000)]
PR-108135 Remove PACKAGE_* definitions from gm2config.h
PR-108135 gcc/m2/configure generates gm2config.h and
automatically adds PACKAGE defines. gcc/m2/Make-lang.in
now removes these PACKAGE definitions. The patch also
contains fixes to remove an unused variable Dim from
BuildConstHighFromSym and also uses withTok in StartBuildWith.
StartBuildWith will generate a nop (for improved debugging)
if requested.
gcc/m2/ChangeLog:
* Make-lang.in (m2/gm2config.h): Rewrite rule to be
dependent upon m2/gm2config.aci.
(m2/gm2config.aci): Newrule.
* configure.ac (AC_CONFIG_HEADERS): Change destination
to gm2config.aci.
* configure: Regenerate.
* gm2-libs/config-host: Regenerate.
* gm2-compiler/M2GCCDeclare.mod (AddSymToWatch): Comment
out.
* gm2-compiler/M2Quads.mod (BuildConstHighFromSym): Remove
Dim.
(StartBuildWith): Call BuildStmtNoteTok.
(BuildStmtNoteTok): New procedure.
(BuildStmtNote): Re-implement re-factor into two
procedures and call BuildStmtNoteTok.
* gm2config.h.in: Remove.
* gm2config.aci.in: New file.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
GCC Administrator [Thu, 26 Jan 2023 00:17:46 +0000 (00:17 +0000)]
Daily bump.
Steve Kargl [Wed, 25 Jan 2023 19:38:43 +0000 (20:38 +0100)]
Fortran: ICE in gfc_compare_array_spec [PR108528]
gcc/fortran/ChangeLog:
PR fortran/108528
* array.cc (compare_bounds): Return false instead of generating an
internal error on an invalid argument type.
gcc/testsuite/ChangeLog:
PR fortran/108528
* gfortran.dg/pr108528.f90: New test.
Iain Sandoe [Mon, 16 Jan 2023 14:07:20 +0000 (14:07 +0000)]
modula-2: Fixes for preprocessing [PR102343, PR108182].
Modula-2 uses the C preprocessor to implement handling for conditional
code and macros. However, this is not done directly, because the process
is applied recursively to imported definitions and modules.
The cc1gm2 executable records the parameters as a template command line
needed to create a composite 'cc1 -E' for each file to be preprocessed
starting with the main file from the original command line.
This patch fixes the capture of the C preprocessor template to include
the target information needed for correct multilib operation.
In order to match the existing semantics of '-E, -M and -MM' these have
to be handled as a 'pre-processor only' job (i.e. the recursion is omitted
and only the main file is processed).
Whereas C-family front ends always pre-process, Modula-2 only does so
when specifically requested (via the -fcpp option).
'-MD, -MMD and -MQ' also require special handling, since (in principle)
these options can be applied to any command line (with -fcpp) providing
dependency information as a by-product.
TODO: the preprocessor is not able to determine def and mod dependencies
for Modula-2 and so the output of this only shows the object to module
dep. We should be able to append the .def and .mod dependencies.
The patch amends save-temps handling to cater for the preprocessor
recursion and to avoid writing saved files into the source directories.
The patch changes the extension for Modula-2 preprocessed source to .m2i
to avoid clashes with .i.
The main driver code is amended to add default handlers for .mod and .m2i
so that a useful error message will be emitted if the Modula-2 compiler
is not built-in.
The compiler will now also handle code generation from a .m2i preprocessed
source.
TODO: We should not need to pass the '-c' option to the compiler to alter
the processing of init code.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/102343
PR modula2/108182
gcc/ChangeLog:
* gcc.cc: Provide default specs for Modula-2 so that when the
language is not built-in better diagnostics are emitted for
attempts to use .mod or .m2i file extensions.
gcc/m2/ChangeLog:
* gm2-compiler/M2Comp.mod: Early exit for pre-processor-only jobs.
* gm2-compiler/M2Options.def (SetPPOnly, GetPPOnly, SetMD, GetMD,
SetMMD, GetMMD, SetMQ, GetMQ, SetObj, GetObj, SetDumpDir,
GetDumpDir):New.
* gm2-compiler/M2Options.mod:(SetPPOnly, GetPPOnly, SetMD, GetMD,
SetMMD, GetMMD, SetMQ, GetMQ, SetObj, GetObj, SetDumpDir,
GetDumpDir):New.
* gm2-compiler/M2Preprocess.def (PreprocessModule): Add flag to
indicate the main file.
* gm2-compiler/M2Preprocess.mod: Handle Preprocess-only jobs,
handle MD, MMD and MQ options.
* gm2-gcc/m2options.h (M2Options_SetPPOnly, M2Options_GetPPOnly,
M2Options_SetDumpDir, M2Options_SetMD, M2Options_GetMD,
M2Options_SetMMD, M2Options_GetMMD, M2Options_SetMQ, M2Options_GetMQ,
M2Options_SetObj, M2Options_GetObj): New.
* gm2-gcc/m2type.cc (m2type_InitBaseTypes): Early exit for pre-
processor-only jobs.
* gm2-lang.cc (gm2_langhook_init): Handle preprocess-only commands.
(gm2_langhook_option_lang_mask): Claim C and Driver options so that
we can intercept them for building pre-processor commands.
(gm2_langhook_init_options): Collect the preprocessor line here.
Save options that have different actions for preprocessor and compile
commands.
(gm2_langhook_handle_option): Only handle the modula-2 options here.
(gm2_langhook_post_options): Do not create a back-end for pre-
processor-only jobs.
* gm2spec.cc (lang_specific_driver): Ignore PCH options, append a
scaffold-main for cases where we are building a main module with
-c.
* lang-specs.h: Revise to handle preprocessor-only jobs and to
consume pre-processed files.
* lang.opt: Remove Driver and C options copies (we claim these
separately).
Jakub Jelinek [Wed, 25 Jan 2023 14:13:30 +0000 (15:13 +0100)]
c++: Fix up mangling of static lambdas [PR108525]
Before the P1169R4 changes, operator () of a lambda was
always a method, so it was fine to pass method_p = 1 unconditionally,
but it isn't always the case, so this patch adds a check for whether
it is a method or nor.
2023-01-25 Jakub Jelinek <jakub@redhat.com>
PR c++/108525
* mangle.cc (write_closure_type_name): Don't assume all
lambda operator() fns are methods.
* g++.dg/cpp23/static-operator-call5.C: New test.
Andrea Corallo [Wed, 18 Jan 2023 16:38:42 +0000 (17:38 +0100)]
arm: fix missing extern "C" in MVE tests
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vhaddq_n_s16.c: Add missing extern
"C".
* gcc.target/arm/mve/intrinsics/vhaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhaddq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vhsubq_x_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_p_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vmladavaxq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_n_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqaddq_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlahq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlashq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u64.c: Likewise.
* gcc.target/arm/mve/intrinsics/vsetq_lane_u8.c: Likewise.
Andrea Corallo [Tue, 29 Nov 2022 15:45:10 +0000 (16:45 +0100)]
arm: improve tests for vld2q*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vld2q_f16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vld2q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vld2q_u8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:49:36 +0000 (17:49 +0100)]
arm: improve tests and fix vqnegq*
gcc/ChangeLog:
* config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqnegq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqnegq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:47:54 +0000 (17:47 +0100)]
arm: improve tests for vqrdmulhq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_n_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmulhq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:47:00 +0000 (17:47 +0100)]
arm: improve tests for vqrdmlsdhxq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhxq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:46:25 +0000 (17:46 +0100)]
arm: improve tests for vqrdmlsdhq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlsdhq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:45:45 +0000 (17:45 +0100)]
arm: improve tests for vqdmlsdhxq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhxq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:44:48 +0000 (17:44 +0100)]
arm: improve tests for vqdmlsdhq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqdmlsdhq_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:44:29 +0000 (17:44 +0100)]
arm: improve tests for vqrdmlashq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmlashq_n_s8.c: Likewise.
Andrea Corallo [Mon, 28 Nov 2022 16:42:42 +0000 (17:42 +0100)]
arm: improve tests for vqrdmladhxq*
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s16.c: Use
check-function-bodies instead of scan-assembler checks. Use
extern "C" for C++ testing.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_m_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vqrdmladhxq_s8.c: Likewise.