Jan Vesely [Sat, 15 Feb 2020 03:29:04 +0000 (22:29 -0500)]
libclc: cmake configure should depend on file list
This makes sure targets are rebuilt if a file is added or removed.
Reviewer: tstellar
Differential Revision: https://reviews.llvm.org/D74662
Raphael Isemann [Tue, 25 Feb 2020 07:47:41 +0000 (08:47 +0100)]
[lldb][NFC] Move namespace lookup in ClangASTSource to own function.
Beside being cleaner we can probably reuse that logic elsewhere.
Kang Zhang [Tue, 25 Feb 2020 09:19:27 +0000 (09:19 +0000)]
[NFC][PowerPC] Add a new test case scalar_cmp.ll
Pavel Labath [Tue, 25 Feb 2020 08:57:42 +0000 (09:57 +0100)]
[lldb] s/CHECK-NEXT/CHECK-DAG in dwp-debug-types.s
These can come out nondeterministically for two reasons:
- sorting based on ConstStringified pointer values
- different relative speeds of the indexing threads
Making these nondeterministic without incurring performance penalties is
hard, so I just make the test expect them in any order (the order is not
important in this test anyway.
Raphael Isemann [Tue, 25 Feb 2020 08:11:13 +0000 (09:11 +0100)]
[lldb][NFC] Make ArrayRef initialization more obvious in lldb-test.cpp
Seems like this code raised some alarm bells as it looks like an ArrayRef
to a temporary initializer list, but it's actually just calling the ArrayRef(T*, T*)
constructor. Let's clarify this and directly call the right ArrayRef constructor here.
Fixes rdar://problem/
59176052
Alex Brachet [Tue, 25 Feb 2020 08:46:09 +0000 (03:46 -0500)]
[libc] [UnitTest] Give UnitTest gtest like colors
Summary:
This is a quality of life change to make it a little nicer to look at, NFC.
This patch makes the RUN and OK lines green and FAILED lines red to match gtest's output.
Reviewers: sivachandra, gchatelet, PaulkaToast
Reviewed By: gchatelet
Subscribers: MaskRay, tschuett, libc-commits
Differential Revision: https://reviews.llvm.org/D75103
Craig Topper [Tue, 25 Feb 2020 07:17:48 +0000 (23:17 -0800)]
[X86] Pass parameters into selectVectorAddr to remove dependency on X86MaskedGatherScatterSDNode.
Might be able to get rid of X86ISD::SCATTER and some uses of
X86ISD::GATHER. Which require isel to use ISD::SCATTER and
ISD::GATHER as well.
Craig Topper [Tue, 25 Feb 2020 06:54:20 +0000 (22:54 -0800)]
[X86] Remove mask output from X86 gather/scatter ISD opcodes.
Instead add it when we make the machine nodes during instruction
selections.
This makes this ISD node closer to ISD::MGATHER. Trying to see
if we remove the X86 specific ones.
Nathan James [Tue, 25 Feb 2020 07:51:07 +0000 (07:51 +0000)]
[ASTMatchers] Adds a matcher called `hasAnyOperatorName`
Summary:
Acts on `BinaryOperator` and `UnaryOperator` and functions the same as `anyOf(hasOperatorName(...), hasOperatorName(...), ...)`
Documentation generation isn't perfect but I feel that the python doc script needs updating for that
Reviewers: aaron.ballman, gribozavr2
Reviewed By: aaron.ballman, gribozavr2
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75040
Nathan James [Tue, 25 Feb 2020 02:07:45 +0000 (02:07 +0000)]
[ASTMatchers] Matcher macros with params move params instead of copying
Summary: Use move semantics instead of copying for AST Matchers with parameters
Reviewers: aaron.ballman, gribozavr2
Reviewed By: gribozavr2
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75096
Raphael Isemann [Tue, 25 Feb 2020 07:20:41 +0000 (08:20 +0100)]
[lldb] Fix that a crashing test is marked as unsupported when it prints UNSUPPORTED before crashing
Summary:
I added an `abort()` call to some code and noticed that the test suite was still passing and it just marked my test as "UNSUPPORTED".
It seems the reason for that is that we expect failing tests to print "FAIL:" which doesn't happen when we crash. If we then also
have an unsupported because we skipped some debug information in the output, we just mark the test passing because it is unsupported
on the current platform.
This patch marks any test that has a non-zero exit code as failing even if it doesn't print "FAIL:" (e.g., because it crashed).
Reviewers: labath, JDevlieghere
Reviewed By: labath, JDevlieghere
Subscribers: aprantl, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D75031
Pavel Labath [Tue, 25 Feb 2020 07:26:55 +0000 (08:26 +0100)]
[lldb] Mark ObjectFileBreakpad test inputs as non-text
These are technically text files, but the object file layer treats them
as binary, and the relevant tests verify the parsed contents byte for
byte. Git's crlf conversion can make those tests fail. Marking the files
as non-text disables that.
Jim Lin [Tue, 25 Feb 2020 06:37:36 +0000 (14:37 +0800)]
[Sparc][NFC] Remove trailing space
Jonas Devlieghere [Tue, 25 Feb 2020 05:25:55 +0000 (21:25 -0800)]
[lldb/Utility] Fix unspecified behavior.
Order of evaluation of the operands of any C++ operator [...] is
unspecified. This patch fixes the issue in Stream::Indent by calling the
function consecutively.
On my Windows setup, TestSettings.py fails because the function prints
the value first, followed by the indentation.
Expected result:
MY_FILE=this is a file name with spaces.txt
Actual result:
MY_FILE =this is a file name with spaces.txt
Hideto Ueno [Tue, 25 Feb 2020 03:32:50 +0000 (12:32 +0900)]
[Attributor] Use AssumptionCache in AANonNullFloating::initialize
Matt Arsenault [Mon, 24 Feb 2020 18:22:51 +0000 (13:22 -0500)]
GlobalISel: Remove unneeded initialiation
Removes implicit unsigned->Register conversion.
Matt Arsenault [Mon, 17 Feb 2020 16:47:45 +0000 (11:47 -0500)]
AMDGPU/GlobalISel: Introduce post-legalize combiner
The current set of custom combines are only really useful after
legalization, so move them there. There is a lot of overlap in the
boilerplate here, but I think we do want a pretty different set of
combines before and after legalize. I think we will want a lot of
overlap between the post-legalize and a post-regbankselect combiner.
Jason Molenda [Tue, 25 Feb 2020 03:01:51 +0000 (19:01 -0800)]
Revert "Unwind past an interrupt handler correctly on arm or at pc==0"
The aarcht64-ubuntu bot is showing a test failure in TestHandleAbort.py
with this patch. Adding some logging to that file, it looks like
the saved register context above the trap handler does not have
save state for $pc, but it does have it for $lr on that platform.
I need to fall back to looking for $lr if the $pc cannot be retrieved.
I'll update the patch and re-commit once that's fixed.
This reverts commit
edc4f4c9c9d90b2a4f8831ba4c873f08eaa5395a.
Jason Molenda [Tue, 25 Feb 2020 03:01:12 +0000 (19:01 -0800)]
Revert "My prevous commit to RegisterContextLLDB is causing a test fail"
This reverts commit
082f1a3b15999c803265fabcb555ad253a00d477.
Roman Tereshin [Mon, 24 Feb 2020 05:53:53 +0000 (21:53 -0800)]
[MachineVerifier] Doing ::calcRegsPassed over faster sets: ~15-20% faster MV, NFC
MachineVerifier still takes 45-50% of total compile time with
-verify-machineinstrs, with calcRegsPassed dataflow taking ~50-60% of
MachineVerifier.
The majority of that time is spent in BBInfo::addPassed, mostly within
DenseSet implementing the sets the dataflow is operating over.
In particular, 1/4 of that DenseSet time is spent just iterating over it
(operator++), 40-50% on insertions, and most of the rest in ::count.
Given that, we're implementing custom sets just for this analysis here,
focusing on cheap insertions and O(n) iteration time (as opposed to
O(U), where U is the universe).
As it's based _mostly_ on BitVector for sparse and SmallVector for
dense, it may remotely resemble SparseSet. The difference is, our
solution is a lot less clever, doesn't have constant time `clear` that
we won't use anyway as reusing these sets across analyses is cumbersome,
and thus more space efficient and safer (got a resizable Universe and a
fallback to DenseSet for sparse if it gets too big).
With this patch MachineVerifier gets ~15-20% faster, its contribution to
total compile time drops from 45-50% to ~35%, while contribution of
calcRegsPassed to MachineVerifier drops from 50-60% to ~35% as well.
calcRegsPassed itself gets another 2x faster here.
All measured on a large suite of shaders targeting a number of GPUs.
Reviewers: bogner, stoklund, rudkx, qcolombet
Reviewed By: rudkx
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75033
Bill Wendling [Tue, 25 Feb 2020 02:32:50 +0000 (18:32 -0800)]
Support output constraints on "asm goto"
Summary:
Clang's "asm goto" feature didn't initially support outputs constraints. That
was the same behavior as gcc's implementation. The decision by gcc not to
support outputs was based on a restriction in their IR regarding terminators.
LLVM doesn't restrict terminators from returning values (e.g. 'invoke'), so
it made sense to support this feature.
Output values are valid only on the 'fallthrough' path. If an output value's used
on an indirect branch, then it's 'poisoned'.
In theory, outputs *could* be valid on the 'indirect' paths, but it's very
difficult to guarantee that the original semantics would be retained. E.g.
because indirect labels could be used as data, we wouldn't be able to split
critical edges in situations where two 'callbr' instructions have the same
indirect label, because the indirect branch's destination would no longer be
the same.
Reviewers: jyknight, nickdesaulniers, hfinkel
Reviewed By: jyknight, nickdesaulniers
Subscribers: MaskRay, rsmith, hiraditya, llvm-commits, cfe-commits, craig.topper, rnk
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D69876
Bill Wendling [Tue, 25 Feb 2020 02:28:32 +0000 (18:28 -0800)]
Allow "callbr" to return non-void values
Summary:
Terminators in LLVM aren't prohibited from returning values. This means that
the "callbr" instruction, which is used for "asm goto", can support "asm goto
with outputs."
This patch removes all restrictions against "callbr" returning values. The
heavy lifting is done by the code generator. The "INLINEASM_BR" instruction's
a terminator, and the code generator doesn't allow non-terminator instructions
after a terminator. In order to correctly model the feature, we need to copy
outputs from "INLINEASM_BR" into virtual registers. Of course, those copies
aren't terminators.
To get around this issue, we split the block containing the "INLINEASM_BR"
right before the "COPY" instructions. This results in two cheats:
- Any physical registers defined by "INLINEASM_BR" need to be marked as
live-in into the block with the "COPY" instructions. This violates an
assumption that physical registers aren't marked as "live-in" until after
register allocation. But it seems as if the live-in information only
needs to be correct after register allocation. So we're able to get away
with this.
- The indirect branches from the "INLINEASM_BR" are moved to the "COPY"
block. This is to satisfy PHI nodes.
I've been told that MLIR can support this handily, but until we're able to
use it, we'll have to stick with the above.
Reviewers: jyknight, nickdesaulniers, hfinkel, MaskRay, lattner
Reviewed By: nickdesaulniers, MaskRay, lattner
Subscribers: rriddle, qcolombet, jdoerfert, MatzeB, echristo, MaskRay, xbolva00, aaron.ballman, cfe-commits, JonChesterfield, hiraditya, llvm-commits, rnk, craig.topper
Tags: #llvm, #clang
Differential Revision: https://reviews.llvm.org/D69868
Sourabh Singh Tomar [Mon, 24 Feb 2020 10:21:36 +0000 (15:51 +0530)]
[DebugInfo]: Refactored Macinfo section consumption part to allow future
macro section dumping.
Summary: Previously macinfo infrastructure was using functions
names that were ambiguous i.e `getMacro/getMacroDWO` in a sense
of conveying stated intentions. This patch refactored them into more
reasonable `getDebugMacinfo/getDebugMacinfoDWO` names thus making
room for macro implementation.
Reviewers: aprantl, probinson, jini.susan.george, dblaikie
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D75037
Matt Arsenault [Wed, 19 Feb 2020 17:35:12 +0000 (12:35 -0500)]
AMDGPU/GlobalISel: Fix incorrect VOP3P fneg folding
We use some s32 values in VOP3P operands, and won't see any
intervening casts from a 32-bit fneg. Make sure it's really a packed
fneg before folding.
Matt Arsenault [Tue, 4 Feb 2020 14:24:01 +0000 (09:24 -0500)]
GlobalISel: Reimplement fewerElementsVectorBasic
Changes the handling of odd breakdowns, and avoids using
G_EXTRACT/G_INSERT. Pad with undef to a wider size, and unmerge. Also
avoid introducing instructions for the fully undef components.
Nathan James [Tue, 25 Feb 2020 01:47:51 +0000 (01:47 +0000)]
[NFC] Cleaned up ASTMatchersInternal Code
Eli Friedman [Fri, 21 Feb 2020 23:05:41 +0000 (15:05 -0800)]
[AArch64] SVE implies fullfp16
This is explicitly guaranteed in ARMARM. And it makes reasoning about
vectors easier: we can assume that if a vector operation is legal, the
corresponding scalar operation is also legal.
Differential Revision: https://reviews.llvm.org/D74993
Jason Molenda [Tue, 25 Feb 2020 01:18:08 +0000 (17:18 -0800)]
My prevous commit to RegisterContextLLDB is causing a test fail
on aarch64-ubuntu - collect a little information about what
is happening on this target before I revert my change; I don't
have access to this target.
Eli Friedman [Mon, 24 Feb 2020 23:40:06 +0000 (15:40 -0800)]
[polly] Don't count scops in a global variable.
This can cause issues with thread safety.
Differential Revision: https://reviews.llvm.org/D75089
Frank Laub [Tue, 25 Feb 2020 00:49:52 +0000 (16:49 -0800)]
[MLIR] Add std.atomic_rmw op
Summary:
The RFC for this op is here: https://llvm.discourse.group/t/rfc-add-std-atomic-rmw-op/489
The std.atmomic_rmw op provides a way to support read-modify-write
sequences with data race freedom. It is intended to be used in the lowering
of an upcoming affine.atomic_rmw op which can be used for reductions.
A lowering to LLVM is provided with 2 paths:
- Simple patterns: llvm.atomicrmw
- Everything else: llvm.cmpxchg
Differential Revision: https://reviews.llvm.org/D74401
Joerg Sonnenberger [Tue, 25 Feb 2020 00:37:29 +0000 (01:37 +0100)]
Prefer PATH_MAX to MAXPATHLEN
The former is part of POSIX and requires less heavy headers. They are
practically functionally equivalent.
Joerg Sonnenberger [Tue, 4 Feb 2020 14:04:42 +0000 (15:04 +0100)]
Adjust max_align_t handling
Depend on the compiler to provide a correct implementation of
max_align_t. If __STDCPP_NEW_ALIGNMENT__ is missing and C++03 mode has
been explicitly enabled, provide a minimal fallback in <new> as
alignment of the largest primitive types.
Shoaib Meenai [Fri, 21 Feb 2020 23:44:08 +0000 (15:44 -0800)]
[arcconfig] Delete subproject arcconfigs
From https://secure.phabricator.com/book/phabricator/article/arcanist_new_project/:
> An .arcconfig file is a JSON file which you check into your project's root.
I've done some experimentation, and it looks like the subproject
.arcconfigs just get ignored, as the documentation says. Given that
we're fully on the monorepo now, it's safe to remove them.
Differential Revision: https://reviews.llvm.org/D74996
Shoaib Meenai [Fri, 21 Feb 2020 19:59:53 +0000 (11:59 -0800)]
[arcconfig] Default base to previous revision
When you run `arc diff`, arc defaults to uploading all the changes you
have against the upstream branch into a single patch. This is almost
never what you want for stacked commits (patch series); you only want to
submit the changes done by the current patch. It's also come up as a
point of confusion in the Phabricator vs. GitHub PRs discussion, for
example. Configure arc to only upload your current patch by default,
which I think is a much more suitable default for LLVM developers.
Differential Revision: https://reviews.llvm.org/D74990
Jason Molenda [Tue, 25 Feb 2020 00:05:01 +0000 (16:05 -0800)]
Unwind past an interrupt handler correctly on arm or at pc==0
Fix RegisterContextLLDB::InitializeNonZerothFrame so that it
will fetch a FullUnwindPlan instead of falling back to the
architectural default unwind plan -- GetFullUnwindPlan knows
how to spot a jmp 0x0 that results in a fault, which may be
the case when we see a trap handler on the stack.
Fix RegisterContextLLDB::SavedLocationForRegister so that when
the pc value is requested from a trap handler frame, where we
have a complete register context available to us, don't provide
the Return Address register (lr) instead of the pc. We have
an actual pc value here, and it's pointing to the instruction
that faulted.
Differential revision: https://reviews.llvm.org/D75007
<rdar://problem/
59416588>
Nathan James [Mon, 24 Feb 2020 23:59:45 +0000 (23:59 +0000)]
[docs] dump_ast_matchers strips internal::(Bindable)?Matcher from Result_type
Summary: Remove `internal::Matcher` and `internal::BindableMatcher` from Result Type when dumping AST Matchers
Reviewers: joerg, gribozavr2, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75046
Jonas Devlieghere [Mon, 24 Feb 2020 23:34:58 +0000 (15:34 -0800)]
[lldb] Color the line marker
Highlight the color marker similar to what we do for the column marker.
The default color matches the color of the current PC marker (->) in the
default disassembly format.
Differential revision: https://reviews.llvm.org/D75070
Craig Topper [Mon, 24 Feb 2020 22:08:05 +0000 (14:08 -0800)]
[LegalizeTypes] Scalarize non-byte sized loads in WidenRecRes_Load and SplitVecResLoad
Should fix PR42803 and PR44902
Differential Revision: https://reviews.llvm.org/D74590
Jay Foad [Fri, 24 Jan 2020 09:02:47 +0000 (09:02 +0000)]
AMDGPU/GlobalISel: Lower 64-bit uaddo/usubo
Summary: Add more test cases for signed and unsigned add/sub with overflow.
Reviewers: arsenm, rampitec, kerbowa
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75051
Alex Brachet [Mon, 24 Feb 2020 22:53:43 +0000 (17:53 -0500)]
[libc] [UnitTest] Create death tests
Summary: This patch adds `EXPECT_EXITS` and `EXPECT_DEATH` macros for testing exit codes and deadly signals. They are less convoluted than their analogs in GTEST and don't have matchers but just take an int for either the exit code or the signal respectively. Nor do they have any regex match against the stdout/stderr of the child process.
Reviewers: sivachandra, gchatelet
Reviewed By: sivachandra
Subscribers: mgorny, MaskRay, tschuett, libc-commits
Differential Revision: https://reviews.llvm.org/D74665
Med Ismail Bennani [Mon, 24 Feb 2020 15:04:16 +0000 (10:04 -0500)]
[lldb/Plugins] Move SBTarget::GetExtendedCrashInformation to SBProcess
This patch moves the SB API method GetExtendedCrashInformation from
SBTarget to SBProcess since it only makes sense to call this method on a
sane process which might not be the case on a SBTarget object.
It also addresses some feedbacks received after landing the first patch
for the 'crash-info' feature.
Differential Revision: https://reviews.llvm.org/D75049
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
zoecarver [Mon, 24 Feb 2020 22:33:39 +0000 (14:33 -0800)]
Revert "Validate argument passed to __builtin_frame_address and __builtin_return_address"
This reverts commit
c93112dc4f745b0455addb54bfe1c2f79b827c6d.
Bardia Mahjour [Mon, 24 Feb 2020 22:28:03 +0000 (17:28 -0500)]
[NFC] [DA] Refactoring getIndexExpressionsFromGEP
Summary:
This patch moves the getIndexExpressionsFromGEP function from polly
into ScalarEvolution so that both polly and DependenceAnalysis can
use it for the purpose of subscript delinearization when the array
sizes are not parametric.
Authored By: bmahjour
Reviewer: Meinersbur, sebpop, fhahn, dmgreen, grosser, etiotto, bollu
Reviewed By: Meinersbur
Subscribers: hiraditya, arphaman, Whitney, ppc-slack, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73995
zoecarver [Mon, 24 Feb 2020 21:43:22 +0000 (13:43 -0800)]
Validate argument passed to __builtin_frame_address and __builtin_return_address
Verifies that the argument passed to __builtin_frame_address and __builtin_return_address is within the range [0, 0xFFFF].
Greg Clayton [Fri, 21 Feb 2020 23:21:07 +0000 (15:21 -0800)]
Add methods to data extractor for extracting bytes and fixed length C strings.
Summary:
These modificaitons will be used in D74883.
Fixed length C strings can have trailing NULLs or sometimes spaces (BSD archive files), so the fixed length C string defaults to stripping trailing NULLs, but can have the arguments specify to remove one or more kinds of spaces if needed. This is used to extract fixed length C strings from ELF NOTEs in D74883.
Reviewers: labath, dblaikie, aprantl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74991
Jonas Devlieghere [Mon, 24 Feb 2020 22:08:04 +0000 (14:08 -0800)]
[lldb/Test] Update TestDisassemblyFormat for new format
Ikhlas Ajbar [Tue, 28 Jan 2020 20:36:05 +0000 (14:36 -0600)]
[Hexagon] Lower vector predicate store
This patch lowers store of vector predicate of type v128i1.
Eric Astor [Mon, 24 Feb 2020 21:37:30 +0000 (16:37 -0500)]
Reland "[ms] [llvm-ml] Improve data support, adding names and complex initializers."
This reverts commit
9fe769a961dc8e3ce7d967ea0e07a4f0e5fac6e9, and re-lands commit
c2e272f8cf76ec97f675e0dfdada75445bbee5c5.
Summary: Add support for ?, DUP, and string initializers, as well as MASM syntax for named data locations.
This version avoids the use of a C++17-only feature, if-statements with initializer.
Reviewers: rnk, thakis
Reviewed By: thakis
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73226
Roman Tereshin [Mon, 24 Feb 2020 05:53:19 +0000 (21:53 -0800)]
[MachineVerifier] Doing ::calcRegsPassed in RPO: ~35% faster MV, NFC
Depending on the target, test suite, pipeline config and perhaps other
factors machine verifier when forced on with -verify-machineinstrs can
increase compile time 2-2.5 times over (Release, Asserts On), taking up
~60% of the time. An invaluable tool, it significantly slows down
machine verifier-enabled testing.
Nearly 75% of its time MachineVerifier spends in the calcRegsPassed
method. It's a classic forward dataflow analysis executed over sets, but
visiting MBBs in arbitrary order. We switch that to RPO here.
This speeds up MachineVerifier by about 35%, decreasing the overall
compile time with -verify-machineinstrs by 20-25% or so.
calcRegsPassed itself gets 2x faster here.
All measured on a large suite of shaders targeting a number of GPUs.
Reviewers: bogner, stoklund, rudkx, qcolombet
Reviewed By: bogner
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75032
Ikhlas Ajbar [Thu, 9 Jan 2020 19:23:28 +0000 (13:23 -0600)]
[Hexagon] Lower bitcast of a vector predicate
This patch lowers bitcast of vector predicate of type v32i1/v64i1
to i32/i64 type.
Eric Astor [Mon, 24 Feb 2020 21:08:40 +0000 (16:08 -0500)]
Revert "[ms] [llvm-ml] Improve data support, adding names and complex initializers."
This reverts commit
c2e272f8cf76ec97f675e0dfdada75445bbee5c5, which broke builds.
Jonas Devlieghere [Mon, 24 Feb 2020 20:51:01 +0000 (12:51 -0800)]
[lldb] Color the current PC marker
Differential revision: https://reviews.llvm.org/D75073
Jonas Devlieghere [Mon, 24 Feb 2020 20:47:52 +0000 (12:47 -0800)]
[lldb/Debugger] Remove macros formerly used by property definitions
The DEFAULT_ were used in property definitions which have since been
moved to CoreProperties.td.
Eric Astor [Mon, 24 Feb 2020 17:59:59 +0000 (12:59 -0500)]
[ms] [llvm-ml] Improve data support, adding names and complex initializers.
Summary: Add support for ?, DUP, and string initializers, as well as MASM syntax for named data locations.
Reviewers: rnk, thakis
Reviewed By: thakis
Subscribers: merge_guards_bot, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73226
nmostafa [Mon, 24 Feb 2020 20:21:08 +0000 (12:21 -0800)]
[MLIR] NFC - Fix indentation in examples in LoopOps.td
Craig Topper [Mon, 24 Feb 2020 20:06:55 +0000 (12:06 -0800)]
[X86] Add back fmaddsub intrinsics to work towards fixing the strict fp implementation
Previously we emitted an fmadd and a fmadd+fneg and combined them with a shufflevector. But this doesn't follow the correct exception behavior for unselected elements so the backend can't merge them into the fmaddsub/fmsubadd instructions.
This patch restores the the fmaddsub intrinsics so we don't have two arithmetic operations. We lose out on optimization opportunity in the non-strict FP case, but I don't think this is a big loss. If someone gives us a test case we can look into adding instcombine/dagcombine improvements. I'd rather not have the frontend do completely different things for strict and non-strict.
This still has problems because target specific intrinsics don't support strict semantics yet. We also still have all of the problems with masking. But we at least generate the right instruction in constrained mode now.
Differential Revision: https://reviews.llvm.org/D74268
Stanislav Mekhanoshin [Mon, 24 Feb 2020 01:01:19 +0000 (17:01 -0800)]
[AMDGPU] use llvm_unreachable instead of default for rp set
GCC 9.2 seems to incorrectly issue warning about out of bounds
access. This situation should not happen in any way.
Differential Revision: https://reviews.llvm.org/D75071
Raphael Isemann [Mon, 24 Feb 2020 19:20:54 +0000 (20:20 +0100)]
[libc++] Give headers that require C++14 a cplusplus14 requires in the modulemap
https://reviews.llvm.org/D68480 added those headers and made the std module
only usable with C++14 or later as the submodules were not marked as requiring
C++14 or later. This just adds the missing requires directives.
Lei Zhang [Mon, 24 Feb 2020 18:35:33 +0000 (13:35 -0500)]
[mlir][spirv] NFC: Move test passes to test/lib
Previously C++ test passes for SPIR-V were put under
test/Dialect/SPIRV. Move them to test/lib/Dialect/SPIRV
to create a better structure.
Also fixed one of the test pass to use new
PassRegistration mechanism.
Differential Revision: https://reviews.llvm.org/D75066
Ayke van Laethem [Mon, 24 Feb 2020 19:13:41 +0000 (20:13 +0100)]
[LLVM-C] Add bindings for addCoroutinePassesToExtensionPoints
This patch adds bindings to C and Go for
addCoroutinePassesToExtensionPoints, which is used to add coroutine
passes to the correct locations in PassManagerBuilder.
Differential Revision: https://reviews.llvm.org/D51642
Simon Pilgrim [Mon, 24 Feb 2020 18:52:18 +0000 (18:52 +0000)]
[SelectionDAG] Merge constant SDNode arithmetic into foldConstantArithmetic
This is the second patch as part of https://bugs.llvm.org/show_bug.cgi?id=36544
Merging in the ConstantSDNode variant of FoldConstantArithmetic. After this, I will begin merging in FoldConstantVectorArithmetic
I've ensured this patch can build & pass all lit tests in Windows and Linux environments.
Patch by @justice_adams (Justice Adams)
Differential Revision: https://reviews.llvm.org/D74881
Francis Visoiu Mistrih [Mon, 24 Feb 2020 18:42:21 +0000 (10:42 -0800)]
[MachO] Add cpu(sub)type tests and improve error handling
Add checks for triples that don't use mach-o, and unit tests for
everything.
Ayke van Laethem [Mon, 24 Feb 2020 18:38:47 +0000 (19:38 +0100)]
[bindings/go] Add RemoveFromParentAsInstruction
This allows removing instructions without erasing them. They can then be
added somewhere else in the IR using Builder.Insert().
Ayke van Laethem [Wed, 5 Feb 2020 11:53:06 +0000 (12:53 +0100)]
[AVR] Disassemble register operands
Simply by implementing a few functions I was able to correctly
disassemble a much larger amount of instructions.
Differential Revision: https://reviews.llvm.org/D74045
Simon Pilgrim [Mon, 24 Feb 2020 18:24:31 +0000 (18:24 +0000)]
[X86] combineX86ShuffleChain - select X86ISD::FAND/ISD::AND based on MaskVT
Noticed by inspection, we shouldn't use FloatDomain directly, we've already bitcast both inputs to MaskVT so select the opcode using that.
Ayke van Laethem [Tue, 4 Feb 2020 13:12:43 +0000 (14:12 +0100)]
[AVR] Don't assert on an undefined operand
Not all operands are correctly disassembled at the moment. This means
that some machine instructions won't have all the necessary operands
set.
To avoid asserting, print an error instead until the necessary support
has been implemented.
Differential Revision: https://reviews.llvm.org/D73958
Ayke van Laethem [Mon, 24 Feb 2020 14:45:43 +0000 (15:45 +0100)]
[AVR] Use correct register class for mul instructions
A number of multiplication instructions (muls, mulsu, fmul, fmuls,
fmulsu) had the wrong register class for an operand. This resulted in
the wrong register being used for the instruction.
Example:
target datalayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"
target triple = "avr-atmel-none"
define i16 @sliceAppend(i16, i16, i16, i16, i16, i16) addrspace(1) {
%d = mul i16 %0, %5
ret i16 %d
}
The first instruction would be muls r24, r31 before this patch. The r31
should have been r15 if you look at the intermediate forms during
instruction selection / register allocation, but the generated
instruction uses r31. After this patch, an extra movw is inserted to get
%5 in range for muls.
To make sure this bug is fixed everywhere, I checked all instructions
and found that most multiplication instructions suffered from this bug,
which I have fixed with this patch. No other instructions appear to be
affected.
Differential Revision: https://reviews.llvm.org/D74281
jasonliu [Mon, 24 Feb 2020 15:46:11 +0000 (15:46 +0000)]
[XCOFF][AIX] Fix incorrect alignment for function descriptor csect
Summary:
Function descriptor csect on AIX should be 4 byte align instead of 1 byte align.
Reviewer: daltenty
Differential Revision: https://reviews.llvm.org/D74974
Michael Kruse [Mon, 24 Feb 2020 17:51:00 +0000 (11:51 -0600)]
[CMake] Default to static linking for subprojects.
Pass plugins introduced in D61446 do not support dynamic linking on
Windows, hence the option LLVM_${name_upper}_LINK_INTO_TOOLS can only
work being set to "ON". Currently, it defaults to "OFF" such that such
plugins are inoperable by default on Windows. Change the default for
subprojects to follow LLVM_ENABLE_PROJECTS.
Reviewed By: serge-sans-paille, MaskRay
Differential Revision: https://reviews.llvm.org/D72372
Francesco Petrogalli [Fri, 21 Feb 2020 16:15:09 +0000 (16:15 +0000)]
[ReleaseNotes] Mention the `vector-function-abi-variant` attribute.
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74969
Louis Dionne [Mon, 24 Feb 2020 17:21:07 +0000 (12:21 -0500)]
[libc++] Drop redundant check for -std=c++14
We always build all components of libc++ with -std=c++14 anyway
serge-sans-paille [Mon, 24 Feb 2020 16:20:49 +0000 (17:20 +0100)]
[NFC] Fix typo in error message
Peter Collingbourne [Mon, 24 Feb 2020 17:11:15 +0000 (09:11 -0800)]
Revert "Rework go bindings so that validation works fine"
And add llvm-go back to the test dependencies.
No longer necessary now that llvm-go has been brought back.
This reverts commit
e8f8873da5eaad187f82dad78ebdb3ab3df22b36.
Nico Weber [Mon, 24 Feb 2020 17:10:40 +0000 (12:10 -0500)]
[gn build] remove -std=c++11 in libcxx build pending discussion in 80e73f2 review thread
Louis Dionne [Mon, 24 Feb 2020 16:39:48 +0000 (11:39 -0500)]
[libc++] Fix CI and Linux failures after landing D68480
- Avoid using C++11-and-later features in <atomic>:
Historically, we've supported <atomic> in C++03, so we can't use C++11
features in that header. This is something we really need to change,
since our implementation of <atomic> is starting to accumulate technical
debt because of that.
- Mark a test as unsupported on single threaded systems
- Add missing symbols to the Linux ABI list
Nico Weber [Mon, 24 Feb 2020 16:42:32 +0000 (11:42 -0500)]
[gn build] (manually) merge
54fa9ecd308
Simon Pilgrim [Mon, 24 Feb 2020 16:25:55 +0000 (16:25 +0000)]
[X86] getTargetShuffleInputs - check that the source inputs are all the right size.
I'm hoping to begin improving shuffle combining across different vector sizes, but before that we must ensure that all existing getTargetShuffleInputs calls must bail if the inputs aren't the same size.
Sean Fertile [Mon, 24 Feb 2020 15:48:45 +0000 (10:48 -0500)]
[PowerPC][AIX] Spill/restore the callee-saved condition register bits.
Extends the existing support for spilling and restoring the condition
register to the linkage area for 32-bit targets, and enables for AIX.
Differential Revision: https://reviews.llvm.org/D74349
Pavel Labath [Mon, 24 Feb 2020 15:45:37 +0000 (16:45 +0100)]
[lldb/DWARF] Fix dwp search path in the separate-debug-file case
The convention is that the dwp file name is derived from the name of the
file holding the executable code, even if the linked portion of the
debug info is elsewhere (objcopy --only-keep-debug).
Louis Dionne [Mon, 17 Feb 2020 15:23:48 +0000 (10:23 -0500)]
[libc++] Mark the C++03 version of std::function as deprecated
Summary: We want to eventually remove it.
Reviewers: EricWF
Subscribers: christof, jkorous, dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D74719
Louis Dionne [Mon, 24 Feb 2020 15:08:41 +0000 (10:08 -0500)]
[libc++] Adapt a few things around the implementation of P1135R6
- Add the new symbols to the ABI list on Darwin
- Add XFAIL markup to the tests that require dylib support on older platforms
- Add availability markup for back-deployment
Olivier Giroux [Tue, 18 Feb 2020 14:58:34 +0000 (09:58 -0500)]
[libc++] Implementation of C++20's P1135R6 for libcxx
Differential Revision: https://reviews.llvm.org/D68480
cchen [Mon, 24 Feb 2020 15:06:17 +0000 (10:06 -0500)]
[OpenMP] Refactor the analysis in checkMapClauseBaseExpression using StmtVisitor class.
Summary: This step is the preparation of allowing lvalue in map/motion clause.
Reviewers: ABataev, jdoerfert
Reviewed By: ABataev
Subscribers: guansong, cfe-commits
Tags: #clang, #openmp
Differential Revision: https://reviews.llvm.org/D74970
Xiangling Liao [Mon, 24 Feb 2020 14:46:00 +0000 (09:46 -0500)]
[AIX][Frontend] C++ ABI customizations for AIX boilerplate
This PR enables "XL" C++ ABI in frontend AST to IR codegen. And it is driven by
static init work. The current kind in Clang by default is Generic Itanium, which
has different behavior on static init with IBM xlclang compiler on AIX.
Differential Revision: https://reviews.llvm.org/D74015
Melanie Blower [Mon, 24 Feb 2020 14:42:05 +0000 (06:42 -0800)]
add release notes for ffp-model and ffp-exception-behavior
Simon Pilgrim [Mon, 24 Feb 2020 14:22:48 +0000 (14:22 +0000)]
[CostModel][X86] We don't need a scale factor for SLM extract costs
D74976 will handle larger vector types, but since SLM doesn't support AVX+ then we will always be extracting from 128-bit vectors so don't need to scale the cost.
Sjoerd Meijer [Mon, 24 Feb 2020 14:19:21 +0000 (14:19 +0000)]
[MIR][ARM] MachineOperand comments
This adds infrastructure to print and parse MIR MachineOperand comments.
The motivation for the ARM backend is to print condition code names instead of
magic constants that are difficult to read (for human beings). For example,
instead of this:
dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14, $noreg
t2Bcc %bb.4, 0, killed $cpsr
we now print this:
dead renamable $r2, $cpsr = tEOR killed renamable $r2, renamable $r1, 14 /* CC::always */, $noreg
t2Bcc %bb.4, 0 /* CC:eq */, killed $cpsr
This shows that MachineOperand comments are enclosed between /* and */. In this
example, the EOR instruction is not conditionally executed (i.e. it is "always
executed"), which is encoded by the 14 immediate machine operand. Thus, now
this machine operand has /* CC::always */ as a comment. The 0 on the next
conditional branch instruction represents the equal condition code, thus now
this operand has /* CC:eq */ as a comment.
As it is a comment, the MI lexer/parser completely ignores it. The benefit is
that this keeps the change in the lexer extremely minimal and no target
specific parsing needs to be done. The changes on the MIPrinter side are also
minimal, as there is only one target hooks that is used to create the machine
operand comments.
Differential Revision: https://reviews.llvm.org/D74306
Kerry McLaughlin [Mon, 24 Feb 2020 11:08:52 +0000 (11:08 +0000)]
[AArch64][SVE] Add the SVE dupq_lane intrinsic
Summary:
Implements the @llvm.aarch64.sve.dupq.lane intrinsic.
As specified in the ACLE, the behaviour of:
svdupq_lane_u64(data, index)
...is identical to:
svtbl(data, svadd_x(svptrue_b64(),
svand_x(svptrue_b64(), svindex_u64(0, 1), 1),
index * 2))
If the index is in the range [0,3], the operation is equivalent
to a single DUP (.q) instruction.
Reviewers: sdesmalen, c-rhodes, cameron.mcinally, efriedma, dancgr, rengolin
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74734
Sam Parker [Mon, 24 Feb 2020 13:50:46 +0000 (13:50 +0000)]
[RDA][ARM][LowOverheadLoops] Iteration count IT blocks
Change the way that we remove the redundant iteration count code in
the presence of IT blocks. collectLocalKilledOperands has been
introduced to scan an instructions operands, collecting the killed
instructions and then visiting them too. This is used to delete the
code in the preheader which calculates the iteration count. We also
track any IT blocks within the preheader and, if we remove all the
instructions from the IT block, we also remove the IT instruction.
isSafeToRemove is used to remove any redundant uses of the iteration
count within the loop body.
Differential Revision: https://reviews.llvm.org/D74975
Michele Scandale [Mon, 24 Feb 2020 12:59:26 +0000 (07:59 -0500)]
Fix TryParsePtrOperatorSeq.
The syntax rules for ptr-operator allow attributes after *, &,
&&, therefore we should be able to parse the following:
void fn() {
void (*[[attr]] x)() = &fn;
void (&[[attr]] y)() = fn;
void (&&[[attr]] z)() = fn;
}
However the current logic in TryParsePtrOperatorSeq does not consider
the presence of attributes leading to unexpected parsing errors.
Moreover we should also consider _Atomic a possible qualifier that can
appear after the sequence of attribute specifiers.
Mikhail Maltsev [Mon, 24 Feb 2020 12:49:20 +0000 (12:49 +0000)]
[ARM,MVE] Remove 64-bit variants of vbrsrq* intrinsics
Summary:
According to the ACLE the vbrsrq* intrinsics don't accept vectors
with 64-bit elements (and neither does the corresponding VBRSR
instruction).
Reviewers: simon_tatham, dmgreen, MarkMurrayARM, ostannard
Reviewed By: simon_tatham
Subscribers: kristof.beyls, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75038
David Green [Mon, 24 Feb 2020 11:15:09 +0000 (11:15 +0000)]
[ARM] FP16 bitcast test. NFC
Simon Pilgrim [Mon, 24 Feb 2020 11:58:50 +0000 (11:58 +0000)]
[CostModel][X86] Try to check against common prefixes before using target-specific cpu checks
SLM/GLM is still a mess so not all of them have been updated yet.
Kirill Bobyrev [Mon, 24 Feb 2020 11:17:55 +0000 (12:17 +0100)]
Use temporary directory for tests in D74346
Benjamin Kramer [Mon, 24 Feb 2020 11:10:13 +0000 (12:10 +0100)]
[ORC] Remove spammy debug print
Kerry McLaughlin [Mon, 24 Feb 2020 10:38:37 +0000 (10:38 +0000)]
[AArch64][SVE] Add intrinsics for SVE2 cryptographic instructions
Summary:
Implements the following SVE2 intrinsics:
- @llvm.aarch64.sve.aesd
- @llvm.aarch64.sve.aesimc
- @llvm.aarch64.sve.aese
- @llvm.aarch64.sve.aesmc
- @llvm.aarch64.sve.rax1
- @llvm.aarch64.sve.sm4e
- @llvm.aarch64.sve.sm4ekey
Reviewers: sdesmalen, c-rhodes, dancgr, cameron.mcinally, efriedma, rengolin
Reviewed By: sdesmalen
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74833
Benjamin Kramer [Mon, 24 Feb 2020 10:45:59 +0000 (11:45 +0100)]
Silence compiler warnings
mlir/lib/Parser/Parser.cpp:4484:15: warning: 'parseAssignmentList' overrides a member function but is not marked 'override' [-Winconsistent-missing-override]
ParseResult parseAssignmentList(SmallVectorImpl<OperandType> &lhs,
^
mlir/include/mlir/IR/OpImplementation.h:662:3: note: overridden virtual function is here
parseAssignmentList(SmallVectorImpl<OperandType> &lhs,
^
mlir/lib/Parser/Parser.cpp:4488:12: warning: unused variable 'type' [-Wunused-variable]
Type type;
^
Benjamin Kramer [Fri, 21 Feb 2020 12:24:54 +0000 (13:24 +0100)]
Add a basic tiling pass for parallel loops
This exploits the fact that the iterations of parallel loops are
independent so tiling becomes just an index transformation. This pass
only tiles the innermost loop of a loop nest.
The ultimate goal is to allow vectorization of the tiled loops, but I
don't think we're there yet with the current rewriting, as the tiled
loops don't have a constant trip count.
Differential Revision: https://reviews.llvm.org/D74954
Bevin Hansson [Mon, 16 Dec 2019 14:25:52 +0000 (15:25 +0100)]
[Intrinsic] Add fixed point saturating division intrinsics.
Summary:
This patch adds intrinsics and ISelDAG nodes for signed
and unsigned fixed-point division:
```
llvm.sdiv.fix.sat.*
llvm.udiv.fix.sat.*
```
These intrinsics perform scaled, saturating division
on two integers or vectors of integers. They are
required for the implementation of the Embedded-C
fixed-point arithmetic in Clang.
Reviewers: bjope, leonardchan, craig.topper
Subscribers: hiraditya, jdoerfert, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71550
Calixte Denizet [Mon, 10 Feb 2020 17:46:37 +0000 (18:46 +0100)]
[profile] Don't dump counters when forking and don't reset when calling exec** functions
Summary:
There is no need to write out gcdas when forking because we can just reset the counters in the parent process.
Let say a counter is N before the fork, then fork and this counter is set to 0 in the child process.
In the parent process, the counter is incremented by P and in the child process it's incremented by C.
When dump is ran at exit, parent process will dump N+P for the given counter and the child process will dump 0+C, so when the gcdas are merged the resulting counter will be N+P+C.
About exec** functions, since the current process is replaced by an another one there is no need to reset the counters but just write out the gcdas since the counters are definitely lost.
To avoid to have lists in a bad state, we just lock them during the fork and the flush (if called explicitely) and lock them when an element is added.
Reviewers: marco-c
Reviewed By: marco-c
Subscribers: hiraditya, cfe-commits, #sanitizers, llvm-commits, sylvestre.ledru
Tags: #clang, #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D74953