Xiang, Haihao [Wed, 3 Aug 2011 02:36:59 +0000 (10:36 +0800)]
i965_drv_video: query video processing pipeline
Currently only support denoise and deinterlacing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 08:31:14 +0000 (16:31 +0800)]
i965_drv_video: vaQueryVideoProcReferenceFramesCap stub
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 07:33:45 +0000 (15:33 +0800)]
i965_drv_vidoe: update packed header iterface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 01:37:34 +0000 (09:37 +0800)]
i965_drv_video: handle VPP pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Fri, 29 Jul 2011 02:05:59 +0000 (10:05 +0800)]
Revert "The MV's quarlity has been improved and multi MB type is enabled."
This reverts commit
a9d641303dfda37b843b7b36e11889173110a83a.
Zhou Chang [Thu, 28 Jul 2011 06:36:46 +0000 (14:36 +0800)]
The MV's quarlity has been improved and multi MB type is enabled.
Xiang, Haihao [Thu, 28 Jul 2011 01:18:58 +0000 (09:18 +0800)]
i965_drv_video: post process depends on the internal pixel format of a surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Jul 2011 03:16:47 +0000 (11:16 +0800)]
i965_drv_video: fix the pixel format of the derived image
If the derived image doesn't satisfy the requirement, use
vaCreateImage/vaGetImage/vaPutImage instead
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Jul 2011 01:10:47 +0000 (09:10 +0800)]
i965_drv_video: implement vaPutImage by post process pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Jul 2011 06:40:42 +0000 (14:40 +0800)]
i965_drv_video: code clean up
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Jul 2011 05:07:11 +0000 (13:07 +0800)]
i965_drv_video: enable AVS for scaling
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 21 Jul 2011 03:06:47 +0000 (11:06 +0800)]
Fixed a vme search path bug, current search area is 48x40.
Xiang, Haihao [Fri, 15 Jul 2011 08:34:47 +0000 (16:34 +0800)]
i965_drv_video: handle VPP buffers
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 15 Jul 2011 08:33:41 +0000 (16:33 +0800)]
i965_drv_video: check the internal format of a surface before rendering
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 14 Jul 2011 03:33:44 +0000 (11:33 +0800)]
i965_drv_video: support for Video Proc Pipeline (VPP)
Currently only support simply scaling
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 14 Jul 2011 02:34:45 +0000 (10:34 +0800)]
Improve VME search area from 32x32 to 48x48.
Xiang, Haihao [Wed, 13 Jul 2011 06:21:49 +0000 (14:21 +0800)]
i965_drv_video: add missed break
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Sat, 9 Jul 2011 03:44:15 +0000 (11:44 +0800)]
i965_drv_video: deallocate all unused surfaces
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 30 Jun 2011 08:12:04 +0000 (16:12 +0800)]
Disabled direct mode.
Xiang, Haihao [Thu, 30 Jun 2011 07:43:50 +0000 (15:43 +0800)]
i965_drv_video: use generic ExtType name
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 30 Jun 2011 06:13:39 +0000 (14:13 +0800)]
i965_drv_video: fix a typo
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 30 Jun 2011 03:07:50 +0000 (11:07 +0800)]
i965_drv_video: insert PPS/SPS header into coded buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 30 Jun 2011 01:59:43 +0000 (09:59 +0800)]
Support direct mode in B frames.
Xiang, Haihao [Wed, 29 Jun 2011 08:23:57 +0000 (16:23 +0800)]
i965_drv_video: miss some changes in commit cd75047
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 29 Jun 2011 08:11:32 +0000 (16:11 +0800)]
i965_drv_video: bound check for coded buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 29 Jun 2011 05:32:01 +0000 (13:32 +0800)]
i965_drv_video: workaround for coded buffer size
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 28 Jun 2011 08:41:26 +0000 (16:41 +0800)]
i965_drv_video: append trail data as the indicator of slice
Xiang, Haihao [Tue, 28 Jun 2011 07:30:21 +0000 (15:30 +0800)]
i965_drv_video: generate slice header in driver
Xiang, Haihao [Mon, 27 Jun 2011 02:01:55 +0000 (10:01 +0800)]
i965_drv_video: set QP in slice state
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 07:28:05 +0000 (15:28 +0800)]
i965_drv_video: utility for encoder
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 07:15:42 +0000 (15:15 +0800)]
i965_drv_video: use new buffers for encoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 06:15:14 +0000 (14:15 +0800)]
i965_drv_video: Postpone releasing internal buffer.
Also fix memory leak in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 20 Jun 2011 02:09:15 +0000 (10:09 +0800)]
i965_drv_video: Simplify render buffer function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Wed, 15 Jun 2011 05:58:01 +0000 (13:58 +0800)]
Adjust HW bit rate contorl panic mode's threshold for P frame.
Zhou Chang [Wed, 15 Jun 2011 03:24:36 +0000 (11:24 +0800)]
improve CBR accuracy.
Zhou Chang [Wed, 15 Jun 2011 02:10:48 +0000 (10:10 +0800)]
Fixed a const qp for P frame bug.
Zhou Chang [Tue, 14 Jun 2011 03:01:04 +0000 (11:01 +0800)]
Enable HW bit rate control in MFC, MB level QP auto adjustment.
Xiang, Haihao [Fri, 10 Jun 2011 05:31:43 +0000 (13:31 +0800)]
i965_drv_video: set surface state for B frame on Ivybridge
surface state on Ivybridge is different from Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 2 Jun 2011 08:47:09 +0000 (16:47 +0800)]
Support B frame in MFC and VME.
Gwenole Beauchesne [Thu, 25 Aug 2011 09:54:20 +0000 (11:54 +0200)]
Add correct version info for vaQueryVendorString().
Gwenole Beauchesne [Thu, 25 Aug 2011 09:42:27 +0000 (11:42 +0200)]
Add debian packaging.
Gwenole Beauchesne [Wed, 24 Aug 2011 14:59:38 +0000 (16:59 +0200)]
Fix H.264 MC kernel bootstrap for Ironlake.
Gwenole Beauchesne [Mon, 22 Aug 2011 15:27:28 +0000 (17:27 +0200)]
Fix make dist.
Gwenole Beauchesne [Mon, 22 Aug 2011 14:18:45 +0000 (16:18 +0200)]
New project build rules and files.
Gwenole Beauchesne [Mon, 22 Aug 2011 09:18:04 +0000 (11:18 +0200)]
Moved files around.
Gwenole Beauchesne [Tue, 26 Jul 2011 11:48:25 +0000 (19:48 +0800)]
i965_drv_video: don't export internal driver functions.
Make sure to use our internal functions. In particular, we override
some DRM functions and they have to be used. e.g. this fixes VA/GLX.
Gwenole Beauchesne [Wed, 20 Jul 2011 11:10:08 +0000 (13:10 +0200)]
i965_drv_video: cosmetics (cleanup Makefile).
Xiang, Haihao [Tue, 12 Jul 2011 07:28:29 +0000 (15:28 +0800)]
i965_drv_video: update post processing interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 8 Jul 2011 02:54:31 +0000 (10:54 +0800)]
i965_drv_video: fixes assertion failure
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 7 Jul 2011 07:55:58 +0000 (15:55 +0800)]
i965_drv_video: fix next slice vertical position for field picture
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=38628
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Tue, 28 Jun 2011 01:30:21 +0000 (18:30 -0700)]
i965_drv_video: add support for VA_SUBPICTURE_DESTINATION_IS_SCREEN_COORD.
Gwenole Beauchesne [Tue, 28 Jun 2011 04:19:51 +0000 (21:19 -0700)]
i965_drv_video: fix subpicture scale factor for Y axis.
Gwenole Beauchesne [Tue, 28 Jun 2011 00:02:58 +0000 (17:02 -0700)]
i965_drv_video: simplify put_surface() and put_subpicture() args.
Xiang, Haihao [Wed, 15 Jun 2011 01:11:26 +0000 (09:11 +0800)]
i965_drv_video: fix assertion failure
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 14 Jun 2011 01:49:44 +0000 (09:49 +0800)]
i965_drv_video: fix GPU hang issue when decoding field coded MPEG2 picture.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Edgar Hucek [Mon, 13 Jun 2011 05:43:37 +0000 (13:43 +0800)]
i965_drv_video: fix memory leaks in i965 driver
Signed-off-by: Edgar Hucek <gimli@dark-green.com>
Xiang, Haihao [Mon, 13 Jun 2011 04:46:16 +0000 (12:46 +0800)]
i965_drv_video: track the internal format of a surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 10 Jun 2011 02:48:16 +0000 (10:48 +0800)]
i965_drv_video: encode on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 08:22:03 +0000 (16:22 +0800)]
i965_drv_video: fix VME shaders
1. The response length for inter type on Ivybridge is 6.
2. fix register region
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 05:13:24 +0000 (13:13 +0800)]
i965_drv_video: new shaders for VME on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 9 Jun 2011 01:56:16 +0000 (09:56 +0800)]
i965_drv_video: set surface base address in VME
It is easy to fill the binding table without relocation and make sure
all offsets in binding table only uses bits[15:0]
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 26 May 2011 02:33:47 +0000 (10:33 +0800)]
i965_drv_video: clean up
Don't emit PIPE_CONTROL directly, instead call intel_batchbuffer_emit_mi_flush.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Alexander Osin [Tue, 7 Jun 2011 18:35:33 +0000 (22:35 +0400)]
i965_drv_video: Added check of obj_surface->bo field inside i965_media_h264_surface_state()
Zhou Chang [Wed, 1 Jun 2011 08:01:14 +0000 (16:01 +0800)]
i965_drv_video: improved MV quality for VME
Xiang, Haihao [Wed, 25 May 2011 06:14:42 +0000 (14:14 +0800)]
i965_drv_video: clean up codes
Check and allocate surface BO in a same function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 04:55:46 +0000 (12:55 +0800)]
i965_drv_video: rendering for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:32:50 +0000 (09:32 +0800)]
i965_drv_video: new shaders for rendering on Ivybridge
SEND on Ivybridge uses GRFs instead of MRFs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:27:07 +0000 (09:27 +0800)]
i965_drv_video: VC1 decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 25 May 2011 01:24:08 +0000 (09:24 +0800)]
i965_drv_video: H.264 & MPEG2 decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 17 May 2011 09:00:22 +0000 (17:00 +0800)]
i965_drv_video: Ivybridge PCI IDs
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 16 May 2011 01:49:01 +0000 (09:49 +0800)]
i965_drv_video: thread safety for object allocation
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 13 May 2011 07:45:22 +0000 (15:45 +0800)]
i965_drv_vidoe: thread safety for rendering
Xiang, Haihao [Fri, 13 May 2011 05:17:58 +0000 (13:17 +0800)]
i965_drv_video: move batchbuffer to context
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 May 2011 08:00:30 +0000 (16:00 +0800)]
i965_drv_video: clean up batchbuffer interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 May 2011 05:06:22 +0000 (13:06 +0800)]
i965_drv_video: store post process parameters in context
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 May 2011 04:52:05 +0000 (12:52 +0800)]
i965_drv_video: store kernel info in the corresponding context
Xiang, Haihao [Tue, 10 May 2011 04:45:56 +0000 (12:45 +0800)]
i965_drv_video: use the same structure for all kernels
Xiang, Haihao [Tue, 10 May 2011 04:49:54 +0000 (12:49 +0800)]
i965_drv_video: create media_state per context
Also clean up some codes
Alexander I Osin [Thu, 28 Apr 2011 15:52:55 +0000 (18:52 +0300)]
Implemented i965_LockSurface, i965_UnlockSurface, i965_BufferInfo
Alexander I Osin [Thu, 28 Apr 2011 15:53:55 +0000 (18:53 +0300)]
Added locked_image_id in struct object_surface
Xiang, Haihao [Tue, 26 Apr 2011 08:10:22 +0000 (16:10 +0800)]
Merge branch 'snb-encoder'
Xiang, Haihao [Tue, 26 Apr 2011 05:26:38 +0000 (13:26 +0800)]
i965_drv_video/encode: offset for coded buffer
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 05:23:09 +0000 (13:23 +0800)]
i965_drv_video/encode: indentation fix
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 05:09:03 +0000 (13:09 +0800)]
i965_drv_video/encode: media read with sampler cache
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 04:15:15 +0000 (12:15 +0800)]
i965_drv_video/video: set base address for MV data
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 02:20:59 +0000 (10:20 +0800)]
i965_drv_video/encode: merge global symbols in intra/inter shader
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 02:01:02 +0000 (10:01 +0800)]
i965_drv_video/encode: remove all intra data in inter shader
Need to revert this commit if select inter-intra mixed mode for P/B frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:53:25 +0000 (09:53 +0800)]
i965_drv_video: clean up gen6_mfc_avc_pipeline_programing
don't need to map VME output for inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:43:11 +0000 (09:43 +0800)]
i965_drv_video/encode: merge the object command for intra/inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:37:20 +0000 (09:37 +0800)]
i965_drv_video/encode: also simplify the object command for inter frame
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Apr 2011 01:30:32 +0000 (09:30 +0800)]
i965_drv_video/encode: reduce inline data for inter shader
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Apr 2011 05:17:00 +0000 (13:17 +0800)]
i965_drv_video: simplify the object command for intra frame
fixes some comments in intra_frame.asm as well.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Apr 2011 04:56:28 +0000 (12:56 +0800)]
i965_drv_video/encode: fetch neighbor pixel in intra shader
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Apr 2011 04:53:39 +0000 (12:53 +0800)]
i965_drv_video/encode: fix neighbor pixel luma value in VME message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Apr 2011 05:23:56 +0000 (13:23 +0800)]
i965_drv_video/encode: fix macroblock instra struct in VME message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 14 Apr 2011 07:32:03 +0000 (15:32 +0800)]
i965_drv_video/encode: fix interface descriptor table
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 14 Apr 2011 05:37:45 +0000 (13:37 +0800)]
add inter frame support in vme.
Xiang, Haihao [Thu, 14 Apr 2011 05:29:14 +0000 (13:29 +0800)]
i965_drv_video/encode: fix CURBE usage for VME
This fixes a potential GPU hang issue
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 11 Apr 2011 02:13:17 +0000 (10:13 +0800)]
i965_drv_video: fix the format of a derived image for MPEG2 on ILK
The native format used for MPEG2 decoding on ILK is I420
Xiang, Haihao [Mon, 11 Apr 2011 01:04:37 +0000 (09:04 +0800)]
i965_drv_video: associate the derived image with the surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>