Juha-Pekka Heikkila [Fri, 25 Apr 2014 12:20:36 +0000 (15:20 +0300)]
i965: Avoid null access in intelMakeCurrent()
separate two null checks connected with && to their own if branches.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Juha-Pekka Heikkila [Tue, 25 Feb 2014 13:24:34 +0000 (15:24 +0200)]
mesa: add null checks in symbol_table.c
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Juha-Pekka Heikkila [Wed, 26 Feb 2014 14:32:14 +0000 (16:32 +0200)]
glsl: add missing null check in tfeedback_decl::init()
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Juha-Pekka Heikkila [Wed, 28 May 2014 10:28:58 +0000 (13:28 +0300)]
i965: in set_read_rb_tex_image() check _mesa_meta_bind_rb_as_tex_image() did succeed
Check if _mesa_meta_bind_rb_as_tex_image() did give the texture.
If no texture was given there is already either
GL_INVALID_VALUE or GL_OUT_OF_MEMORY error set in context.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Juha-Pekka Heikkila [Wed, 3 Sep 2014 13:38:31 +0000 (16:38 +0300)]
glsl: Fix memory leak in glsl_lexer.ll
Running fast clear glClear with SNB caused Valgrind to
complain about this.
v2: line 237 fixed glClear from leaking memory, other
strdups are also now changed to ralloc_strdups but I
don't know what effect those have. At least no changes in
my Piglit quick run.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chia-I Wu [Mon, 22 Sep 2014 15:59:53 +0000 (23:59 +0800)]
ilo: rework pipeline workarounds
Add current_pipe_control_dw1 and deferred_pipe_control_dw1 to track what have
been done since lsat 3DPRIMITIVE and what need to be done before next
3DPRIMITIVE. Based on them, we can emit WAs more smartly.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Mon, 22 Sep 2014 15:32:18 +0000 (23:32 +0800)]
ilo: remove handle_invalid_batch_bo()
It was used to set has_gen6_wa_pipe_control to false when the batch buffer
changed. When called from emit_flush() and others, it also unset
ILO_3D_PIPELINE_INVALIDATE_BATCH_BO so that the following emit_draw() will not
set has_gen6_wa_pipe_control to false again. It sounded error-prone and was
just ugly.
We should be able to achieve the same goal by reset has_gen6_wa_pipe_control
in ilo_3d_pipeline_invalidate(). With handle_invalid_batch_bo() gone, the
emit functions can also be inlined.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Mon, 22 Sep 2014 07:13:23 +0000 (15:13 +0800)]
ilo: make gen6_pipeline_update_max_svbi() static
We do not need to call it from GEN7 pipeline anymore since software
PIPE_QUERY_PRIMITIVES_EMITTED is gone.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Ilia Mirkin [Tue, 16 Sep 2014 23:56:31 +0000 (19:56 -0400)]
freedreno/ir3: add TXB2 support
Handles texture(samplerCubeShadow, bias), part of GLES3 and GL3
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Tue, 16 Sep 2014 06:09:50 +0000 (02:09 -0400)]
freedreno/ir3: add TXQ support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Tue, 16 Sep 2014 06:09:49 +0000 (02:09 -0400)]
freedreno/ir3: fix TXB/TXL to actually pull the bias/lod argument
Previously we would get a potentially computed post-swizzle coord based
on the texture target info, which would not include the bias/lod in the
last argument.
The second argument does not have to be adjacent, so adjusting the order
array did not make sense.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Ilia Mirkin [Tue, 16 Sep 2014 06:09:48 +0000 (02:09 -0400)]
freedreno/ir3: make texture instruction construction more dynamic
This will make life a lot easier as we add support for additional
instructions.
v2: shadow reference value is always .z or .w
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Andreas Pokorny [Wed, 27 Aug 2014 07:36:16 +0000 (09:36 +0200)]
i915: Fix black buffers when importing prime fds
Width and Height of the imported image was never initialized from the
imported bo.
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Andreas Pokorny [Wed, 3 Sep 2014 20:43:41 +0000 (22:43 +0200)]
egl/drm: expose KHR_image_pixmap extension
This changes enables EGL_KHR_image_pixmap in the egl drm platform, which is implemented
there but has not been advertised yet.
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andreas Pokorny <andreas.pokorny@canonical.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Brian Paul [Sat, 20 Sep 2014 14:32:39 +0000 (08:32 -0600)]
gallium: update comment for enum pipe_format
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Sat, 20 Sep 2014 14:32:39 +0000 (08:32 -0600)]
gallium: replace pipe_type enum with tgsi_return_type enum
The only place the enum pipe_type was used is for the TGSI sampler
view return type. So make it a TGSI type. Note: it appears this
part of TGSI isn't used by anyone so it may be removed in the future.
v2: the new name is tgsi_return_type, not tgsi_type. This means we
can drop the previously posted tgsi_type -> tgsi_opcode_type patch.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Mon, 22 Sep 2014 15:32:04 +0000 (09:32 -0600)]
draw: use new tgsi_transform inst/decl helpers in pstipple code
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Mon, 22 Sep 2014 15:31:26 +0000 (09:31 -0600)]
draw: use new tgsi_transform inst/decl helpers in aapoint code
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Mon, 22 Sep 2014 15:29:29 +0000 (09:29 -0600)]
draw: use new tgsi_transform inst/decl helpers in aaline code
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Mon, 22 Sep 2014 15:29:08 +0000 (09:29 -0600)]
tgsi: add inst/decl helpers for tgsi_transform utility
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 19 Sep 2014 19:24:20 +0000 (13:24 -0600)]
draw: use tgsi transform prolog callback in polygon stipple code
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 19 Sep 2014 19:19:21 +0000 (13:19 -0600)]
draw: use tgsi transform prolog/epilog callbacks in AA line code
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 19 Sep 2014 19:12:59 +0000 (13:12 -0600)]
draw: use tgsi transform prolog/epilog callbacks in AA point code
This simplifies the code and makes it a little easier to understand.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 19 Sep 2014 19:11:58 +0000 (13:11 -0600)]
tgsi: fix tgsi transform's epilog callback
We want to call the caller's epilog callback when we find the TGSI
END instruction, not after it.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 14 Mar 2014 20:49:33 +0000 (14:49 -0600)]
tgsi: add prolog() method to tgsi_transform_context
Called when the user can insert new decls, instructions.
This could be used in a few places in the 'draw' module.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Sat, 20 Sep 2014 14:32:39 +0000 (08:32 -0600)]
glsl: use ptrdiff_t cast to silence g++ sign warning
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jordan Justen [Fri, 29 Aug 2014 19:50:46 +0000 (12:50 -0700)]
i965/fs: Remove direct fs_visitor brw_wm_prog_key dependence
Instead we store a void pointer to the key, and cast it to
brw_wm_prog_key for fragment shader specific code paths.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jordan Justen [Sat, 6 Sep 2014 18:48:46 +0000 (11:48 -0700)]
i965/fs: Use brw_sampler_prog_key_data instead of brw_wm_prog_key::tex
This helps:
1. Reduce the need to have fs_visitor::key's type be brw_wm_prog_key*
2. Align the code to allow brw_sampler_prog_key_data to be pulled out of other
prog_key types for different stages.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jordan Justen [Fri, 29 Aug 2014 19:50:46 +0000 (12:50 -0700)]
i965/fs: Remove direct fs_visitor brw_wm_prog_data dependence
Instead we store a brw_stage_prog_data pointer, and cast it to
brw_wm_prog_data for fragment shader specific code paths.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tom Stellard [Mon, 22 Sep 2014 14:00:39 +0000 (10:00 -0400)]
clover: Add support to mem objects for multiple destructor callbacks v2
The spec says that mem objects should maintain a stack of callbacks
not just one.
v2:
- Remove stray printf.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
CC: "10.3" <mesa-stable@lists.freedesktop.org>
Brian Paul [Thu, 18 Sep 2014 16:22:20 +0000 (10:22 -0600)]
st/xa: silence unused variable warning
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Thu, 18 Sep 2014 16:21:00 +0000 (10:21 -0600)]
target-helpers: add inline qualifier on configuration_query()
To silence unused function warnings.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Chia-I Wu [Mon, 22 Sep 2014 05:46:13 +0000 (13:46 +0800)]
ilo: clean up fallback path for primitive restart
We should be able to draw with the index buffer mapped. That simplifies
things a lot.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Mon, 22 Sep 2014 04:34:05 +0000 (12:34 +0800)]
ilo: handle conditional rendering in the context
Conditional rendering is not limited to draw_vbo(). Move the support to
ilo_context, and replace ilo_3d_pass_render_condition() by
ilo_skip_rendering().
Chia-I Wu [Mon, 22 Sep 2014 03:41:53 +0000 (11:41 +0800)]
ilo: create the pipeline from the builder
The pipeline needs just the builder to build commands. It does not need CP.
Chia-I Wu [Mon, 22 Sep 2014 02:46:15 +0000 (10:46 +0800)]
ilo: move aperture checks out of pipeline
They can be done outside of the pipeline. Move them and let the pipeline
focus on building commands.
Chia-I Wu [Mon, 22 Sep 2014 02:35:59 +0000 (10:35 +0800)]
ilo: flush before setting SOL_RESET
SOL_RESET happens before bo execution. It should not be observed by the
commands that are already in the bo.
Move the code out of the pipeline now that it submits.
Chia-I Wu [Mon, 22 Sep 2014 02:12:06 +0000 (10:12 +0800)]
ilo: move size estimation check out of pipeline
It can be done outside of the pipeline. Let's move it.
Rob Clark [Sat, 13 Sep 2014 20:14:17 +0000 (16:14 -0400)]
freedreno/a3xx: more texture array fixes
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 16 Sep 2014 23:10:23 +0000 (19:10 -0400)]
freedreno: add DRM_CONF_SHARE_FD
And config query and DRM_CONF_SHARE_FD to both mega-driver and
traditional build configs, so that EGL_EXT_image_dma_buf_import
works.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Chia-I Wu [Sun, 21 Sep 2014 15:02:55 +0000 (23:02 +0800)]
ilo: use a single list for queries
We used different lists for different types of queries because we wanted to
update software queries quickly. Now that there is no software queries, we
are fine with a single list.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sun, 21 Sep 2014 14:39:16 +0000 (22:39 +0800)]
ilo: replace software queries by hardware ones
Read PIPE_QUERY_PRIMITIVES_GENERATED and PIPE_QUERY_PRIMITIVES_EMITTED from
hardware registers. Because all queries now have a bo, remove unnecessary
checks for q->bo.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sun, 21 Sep 2014 14:33:50 +0000 (22:33 +0800)]
ilo: support prim queries in ilo_3d_pipeline_emit_query()
Add support for PIPE_QUERY_PRIMITIVES_GENERATED and
PIPE_QUERY_PRIMITIVES_EMITTED in ilo_3d_pipeline_emit_query().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sun, 21 Sep 2014 13:15:39 +0000 (21:15 +0800)]
ilo: add ilo_3d_pipeline_emit_query()
It replaces
ilo_3d_pipeline_emit_write_timestamp(),
ilo_3d_pipeline_emit_write_depth_count(), and
ilo_3d_pipeline_emit_write_statistics().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sat, 20 Sep 2014 05:23:01 +0000 (13:23 +0800)]
ilo: rework query support
This fixes some corner cases, but more importantly, the new code should be
easier to reason about.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sun, 21 Sep 2014 03:25:26 +0000 (11:25 +0800)]
ilo: clarify cp owning/releasing
Make it own()'s responsibility to make room for release() and itself. To be
able to do that, allow ilo_cp_submit() in own().
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Sat, 20 Sep 2014 03:41:01 +0000 (11:41 +0800)]
ilo: add a pointer to builder in ilo_3d_pipeline
It saves quite some typings.
Chia-I Wu [Sat, 20 Sep 2014 03:21:20 +0000 (11:21 +0800)]
ilo: add a helper for RECTLIST blitter
Add ilo_3d_draw_rectlist() for use by RECTLIST blitter.
Chia-I Wu [Sat, 20 Sep 2014 02:55:21 +0000 (10:55 +0800)]
ilo: no direct ilo_context access in BLT blitter
We need ilo_builder for command building and ilo_cp for size check.
ilo_context is not used.
Chia-I Wu [Sat, 20 Sep 2014 03:00:58 +0000 (11:00 +0800)]
ilo: fix headers in Makefile.sources
Chia-I Wu [Fri, 19 Sep 2014 16:46:35 +0000 (00:46 +0800)]
ilo: add a new struct for context states
Move pipe states in ilo_context to the new ilo_state_vector. The motivation
is that ilo_context consists of several loosely related things. When we need
an ilo_context somewhere, we usually need only one or two of the things in it.
This change makes ilo_state_vector one such thing.
An immediate result is that we no longer need ilo_context in 3D pipelines,
something we have planned for since early days.
Chia-I Wu [Fri, 19 Sep 2014 16:34:47 +0000 (00:34 +0800)]
ilo: merge ilo_gpe.h to ilo_state*.h
Move the #define's and struct's to ilo_state.h. Move the inline functions and
function declarations to ilo_state_gen.h.
Chia-I Wu [Fri, 19 Sep 2014 16:30:52 +0000 (00:30 +0800)]
ilo: rename ilo_gpe_gen*.[ch]
Rename them to ilo_state_gen*.[ch].
Chia-I Wu [Fri, 19 Sep 2014 16:59:20 +0000 (00:59 +0800)]
ilo: make ilo_fence opaque
It is manipulated only in ilo_screen.c.
Chris Forbes [Fri, 19 Sep 2014 22:39:37 +0000 (10:39 +1200)]
i965/gen6: Enable GL 3.3 and GLSL 3.30
Tested on my snb-gt2:
4 tests skip->pass in spec/EXT_texture_array
51 tests skip->pass in spec.glsl-3.30
4 tests skip->pass in spec/!OpenGL 3.3
No regressions; no skip->fail changes.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Roland Scheidegger [Fri, 19 Sep 2014 17:11:22 +0000 (19:11 +0200)]
gallivm: add information about different sampler/view units if analyzing shader
Useful to know in some cases.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Emil Velikov [Fri, 19 Sep 2014 19:01:04 +0000 (20:01 +0100)]
docs: Add 10.3 sha256 sums, news item and link release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
18571edea8f444fc6b4ed2b38f945f0ac533f384)
Conflicts:
docs/index.html
docs/relnotes.html
Emil Velikov [Fri, 19 Sep 2014 18:42:09 +0000 (19:42 +0100)]
docs: Update 10.3 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
1b12af300dfa77c24088780e88200703653293d3)
Emil Velikov [Fri, 19 Sep 2014 18:01:42 +0000 (19:01 +0100)]
docs: Add sha256 sums for the 10.2.8 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
f95fcb17163a47674a89d2ab58cd5b2547a94720)
Emil Velikov [Fri, 19 Sep 2014 17:41:57 +0000 (18:41 +0100)]
Add release notes for the 10.2.8 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
1e2b4120f705b8258da8cbc31bdb9fbfcd118603)
Marek Olšák [Wed, 17 Sep 2014 12:08:33 +0000 (14:08 +0200)]
st/dri: remove GALLIUM_MSAA and __GL_FSAA_MODE environment variables
Some users don't understand that these variables can break OpenGL.
The general is rule is that if an app supports MSAA, you mustn't use
GALLIUM_MSAA.
For example, if an app has an 8xMSAA FBO and GALLIUM_MSAA=4
is set, resolving the FBO to the back buffer will be rejected which will look
like this on all gallium drivers:
http://www.phoronix.com/scan.php?page=article&item=amd_radeonsi_msaa
The environment variables also have no effect on modern apps like TF2, but
there is still a performance hit due to wasted bandwidth and VRAM.
In a nutshell, it does more harm than good.
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Eric Anholt [Fri, 19 Sep 2014 17:09:55 +0000 (10:09 -0700)]
vc4: Fix perspective interpolation.
Fixes the mesa reflect demo and 6 tests under interpolation/
Eric Anholt [Fri, 19 Sep 2014 17:06:49 +0000 (10:06 -0700)]
vc4: Use the same method as for FRAG_Z to handle fragcoord W.
I need to get the non-reciprocal version of W for interpolation, anyway.
Roland Scheidegger [Fri, 19 Sep 2014 14:56:04 +0000 (16:56 +0200)]
util: don't try to emit half-float intrinsics if avx isn't available
These instructions only have vex encodings, thus they can't be used without
avx. (Technically, one can still use avx-128 if avx isn't available because
the environment doesn't store the ymm registers, however I don't think llvm
can.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Samuel Iglesias Gonsalvez [Wed, 9 Jul 2014 11:19:34 +0000 (13:19 +0200)]
i965/gen6: enable GLSL 1.50, OpenGL 3.2 and GL_AMD_vertex_shader_layered
Geometry shaders was the only thing we needed to enable GLSL 1.50 and
OpenGL 3.2 in gen6.
v2: Layered clears do not work properly in gen6 with OpenGL 3.2. Kenneth
and Jordan realized that for this to work we also need
GL_AMD_vertex_shader_layered (which requires OpenGL 3.2, so it could not be
enabled before this patch), so we agreed to enable this together with
OpenGL 3.2 in this patch.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Tue, 1 Jul 2014 10:43:59 +0000 (12:43 +0200)]
i965/gen6/gs: Use a specific implementation of geometry shaders for gen6.
In gen6 we will use the geometry shader implementation from gen6_gs_visitor.cpp
and keep the implementation in brw_vec4_gs_visitor.cpp for gen7+. Notice that
gen6_gs_visitor inherits from brw_vec4_gs_visitor so it is not a completely
seprate implementation of geometry shaders.
Also, gen6 does not support multiple dispatch modes, its default operation mode
is equivalent to gen7's SINGLE mode, so select that in gen6 for consistency.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 7 Aug 2014 09:16:57 +0000 (11:16 +0200)]
i965/gen6/gs: upload ubo and pull constants surfaces.
Uniforms declared as uniform blocks are stored in ubo surfaces and need to
be pulled from the geometry shader program so make sure we upload them first
and do the same for pull constants.
This fixes all piglit tests that use uniform blocks:
bin/shader_runner tests/spec/glsl-1.50/uniform_buffer/gs-*
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Fri, 18 Jul 2014 11:04:36 +0000 (13:04 +0200)]
i965/gen6/gs: Enable transform feedback support in geometry shaders
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Fri, 1 Aug 2014 08:35:20 +0000 (10:35 +0200)]
i965/gen6/gs: Fix binding table clash between TF surfaces and textures.
For gen6 geometry shaders we use the first BRW_MAX_SOL_BINDINGS entries of the
binding table for transform feedback surfaces. However, vec4_visitor will
setup the binding table so that textures use the same space in the binding
table. This is done when calling assign_common_binding_table_offsets(0) as
part if its run() method.
To fix this clash we add a virtual method to the vec4_visitor hierarchy to
assign the binding table offsets, so that we can change this behavior
specifically for gen6 geometry shaders by mapping textures right after the
first BRW_MAX_SOL_BINDINGS entries.
Also, when there is no user-provided geometry shader, we only need to upload
the binding table if we have transform feedback, however, in the case of a
user-provided geometry shader, we can't only look into transform feedback
to make that decision.
This fixes multiple piglit tests for textureSize() and texelFetch() when these
functions are called from a geometry shader in gen6, like these:
bin/textureSize gs sampler2D -fbo -auto
bin/texelFetch gs usampler2D -fbo -auto
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 13 Aug 2014 10:14:22 +0000 (12:14 +0200)]
i965/gen6/gs: Avoid buffering transform feedback varyings twice.
Currently we buffer transform feedack varyings separately. This patch makes
it so that we reuse the values we have already buffered for all the output
varyings of the geometry shader instead.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Thu, 31 Jul 2014 11:27:30 +0000 (13:27 +0200)]
i965/gen6/gs: Buffer PSIZ/flags vertex data in gen6_gs_visitor
Since geometry shaders can alter the value of varyings packed in the first
output VUE slot (PSIZ), we need to buffer it together with all the other
vertex data so we can emit the right value for each vertex when we do the
URB writes.
This fixes the following piglit test in gen6:
tests/spec/glsl-1.50/execution/redeclare-pervertex-out-subset-gs.shader_test
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Fri, 18 Jul 2014 09:16:14 +0000 (11:16 +0200)]
i965/gen6/gs: Setup SOL surfaces for user-provided geometry shaders
Update gen6_gs_binding_table and gen6_sol_surface to use user-provided
geometry program information when present. This is necessary to implement
transform feedback support.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Fri, 18 Jul 2014 09:11:00 +0000 (11:11 +0200)]
i965/gen6/gs: implement transform feedback support in gen6_gs_visitor
This takes care of generating code required to handle transform feedback.
Notice that transform feedback isn't enabled yet, since that requires
additional setups in other parts of the code that will come in later patches.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Wed, 23 Jul 2014 08:51:35 +0000 (10:51 +0200)]
i965/gen6/gs: Add an additional parameter to the FF_SYNC opcode.
We will use this parameter in later patches to provide information relevant
to transform feedback that needs to be set as part of the FF_SYNC message.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Wed, 23 Jul 2014 10:56:53 +0000 (12:56 +0200)]
i965/gen6/gs: implement GS_OPCODE_FF_SYNC_SET_PRIMITIVES opcode
This opcode will be used when filling FF_SYNC header before
emitting vertices and their data.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Fri, 18 Jul 2014 08:47:15 +0000 (10:47 +0200)]
i965/gen6/gs: implement GS_OPCODE_SVB_SET_DST_INDEX opcode
This opcode generates code to copy the specified destination index
into subregister 5 of the MRF message header.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Fri, 18 Jul 2014 08:36:10 +0000 (10:36 +0200)]
i965/gen6/gs: implement GS_OPCODE_SVB_WRITE opcode
This opcode will be used when sending SVB WRITE messages to save
transform feedback outputs into Streamed Vertex Buffers.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 30 Jul 2014 07:08:48 +0000 (09:08 +0200)]
i965/gen6/gs: Enable texture units and upload sampler state.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Mon, 28 Jul 2014 08:05:57 +0000 (10:05 +0200)]
i965/gen6/gs: Assign geometry shader VUE map properly.
So far in gen6 we only used geometry shaders to implement transform feedback
in vertex shaders, so we assumed that the VUE map for the geometry shader
stage was always the same as for the vertex shader stage. This is no longer
true now that we support user provided geometry shaders in gen6 too.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 24 Jul 2014 10:18:47 +0000 (12:18 +0200)]
i965/gen6/gs: Implement support for gl_PrimitiveIdIn.
For this we will need to move PrimitiveID information, delivered in the thread
payload in r0.1, to a separate register (we use GS_OPCODE_SET_PRIMITIVE_ID
for this), then map the corresponding varying slot to that register in the
setup_payload() method.
Notice that we cannot use a virtual register as the destination for the
PrimitiveID because we need to map all input attributes to hardware registers
in setup_payload(), which happens before virtual registers are mapped to
hardware registers. We could work around that issue if we were able to compute
the first non-payload register in emit_prolog() and move the PrimitiveID
information to that register, but we can't because at that point we still
don't know the final number uniforms that will be included in the payload.
So, what we do is to place PrimitiveID information in r1, which is always
delivered as part of the payload but its only populated with data
relevant for transform feedback when we set GEN6_GS_SVBI_PAYLOAD_ENABLE
in the 3DSTATE_GS state packet.
When we implement transform feedback, we wil make sure to move the value of r1
to another register before we overwrite it with the PrimitiveID.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 24 Jul 2014 10:14:27 +0000 (12:14 +0200)]
i965/gen6/gs: Implement GS_OPCODE_SET_PRIMITIVE_ID.
In gen6 the geometry shader payload includes the PrimitiveID information in
r0.1. When the shader code uses glPimitiveIdIn we will have to move this to
a separate hardware register where we can map this attribute. This opcode
takes the selected destination register and moves r0.1 there.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Mon, 21 Jul 2014 09:48:42 +0000 (11:48 +0200)]
i965/gen6/gs: Handle the case where a geometry shader emits no output.
In gen6 we need to end the thread differently depending on whether we have
emitted at least one vertex or not. In case we did, the EOT message must
always include the COMPLETE flag or else the GPU hangs. If we have not
produced any output, however, we can't use the COMPLETE flag.
This would lead us to end the program with an ENDIF opcode, which we want
to avoid (and actually is not permitted since it hits an assertion), so
instead what we do is that we always request a new VUE handle every time we do
an URB WRITE, even for the last vertex we emit. With this we make sure that
whether we have emitted at least one vertex or none at all we have to finish the
thread without writing to the URB, which works for both cases by setting the
COMPLETE and UNUSED flags in the EOT message.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Mon, 21 Jul 2014 07:18:52 +0000 (09:18 +0200)]
i965/gen6/gs: Make sure we complete the last primitive.
Just in case the GS algorithm does not call EndPrimitive() for the last
primitive produced. This is relevant only for non point outputs, since for
this we are already setting the PrimEnd flag on each vertex we emit.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Fri, 18 Jul 2014 14:38:55 +0000 (16:38 +0200)]
i965/gen6/gs: Implement geometry shaders for outputs other than points.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 16 Jul 2014 07:10:35 +0000 (09:10 +0200)]
i965/gen6/gs: Add initial implementation for a gen6 geometry shader visitor.
Geometry shaders in gen6 are significantly different from gen7+ so it is better
to have them implemented in a different file rather than adding gen6 branching
paths all over brw_vec4_gs_visitor.cpp.
This commit adds an initial implementation that only handles point output, which
is the simplest case.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 17 Jul 2014 14:59:10 +0000 (16:59 +0200)]
i965: Generalize emit_urb_slot() to emit to any dst_reg.
In gen7+ we emit vertices as they come, however in gen6 geometry shaders we
have to buffer vertex data for all vertices and then emit it all in one go
at the end. To achieve this we need to generalize emit_urb_slot() to store
vertex data in general purpose registers and not only MRF registers.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 16 Jul 2014 08:00:34 +0000 (10:00 +0200)]
i965: Provide means to create registers of a given size.
Implemented by Ilia Mirkin <imirkin@alum.mit.edu>.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 17 Jul 2014 06:54:03 +0000 (08:54 +0200)]
i965/gen6/gs: Implement GS_OPCODE_SET_DWORD_2.
We had GS_OPCODE_SET_DWORD_2_IMMED but this required its source argument to be
an immediate. In gen6 we need to set dword 2 of the URB write message header
from values stored in separate register, so we need something more flexible.
This change replaces GS_OPCODE_SET_DWORD_2_IMMED with GS_OPCODE_SET_DWORD_2.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Tue, 15 Jul 2014 09:26:45 +0000 (11:26 +0200)]
i965/gen6/gs: Upload binding table for user-provided geometry shaders.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Thu, 10 Jul 2014 15:00:21 +0000 (17:00 +0200)]
i965/gen6/gs: Enable URB space for user-provided geometry shaders.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Tue, 1 Jul 2014 11:08:25 +0000 (13:08 +0200)]
i965/gen6/gs: Compute URB entry size for user-provided geometry shaders.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 9 Jul 2014 13:32:57 +0000 (15:32 +0200)]
i965/gen6/gs: Add instruction URB flags to geometry shaders EOT message.
Gen6 seems to require that EOT messages include the complete flag too or else
the GPU hangs. We add will this flag to the instruction when we emit the
thread end opcode.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 9 Jul 2014 14:28:30 +0000 (16:28 +0200)]
i965/gen6/gs: Implement GS_OPCODE_URB_WRITE_ALLOCATE.
Gen6 geometry shaders need to allocate URB handles for each new vertex they
emit after the first (the URB handle for the first vertex is obtained via the
FF_SYNC message).
This opcode adds the URB allocation mechanism to regular URB writes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Wed, 9 Jul 2014 06:46:17 +0000 (08:46 +0200)]
i965/gen6/gs: Implement GS_OPCODE_FF_SYNC.
This implements the FF_SYNC message required in gen6 geometry shaders to
get the initial URB handle.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Samuel Iglesias Gonsalvez [Wed, 2 Jul 2014 12:52:40 +0000 (14:52 +0200)]
i965/gs: Reuse gen6 constant push buffers setup code in gen7+.
The code required for gen6 and gen7+ is almost the same, so reuse it.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Thu, 3 Jul 2014 14:33:32 +0000 (16:33 +0200)]
i965/gen6/gs: Setup constant push buffers for gen6 geometry shaders.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Iglesias Gonsalvez [Wed, 30 Jul 2014 13:17:15 +0000 (15:17 +0200)]
i965/gen6/gs: Set brw->gs.enabled to FALSE in gen6_blorp_emit_gs_disable()
See
7dfb4b2d00ddb8e5ee24d4c58eb9415dc4ccc21c for more details.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Iglesias Gonsalvez [Tue, 1 Jul 2014 06:52:47 +0000 (08:52 +0200)]
i965/gen6/gs: use brw_gs_prog atom instead of brw_ff_gs_prog
This is needed to support user-provided geometry shaders, since the
brw_ff_gs_prog atom in gen6 only takes care of implementing transform feedback
for vertex shaders.
If there is no user-provided geometry shader the implementation falls back to
the original code.
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Iglesias Gonsalvez [Tue, 1 Jul 2014 06:43:57 +0000 (08:43 +0200)]
i965/gen6/gs: Skeleton for user GS program support
Currently, gen6 only uses geometry shaders for transform feedback so the state
we emit is not suitable to accomodate general purpose, user-provided geometry
shaders. This patch paves the way to add these support and the needed
3DSTATE_GS packet modifications for it.
Previous code that emitted state to implement transform feedback in gen6 goes
to upload_gs_state_adhoc_tf().
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Tue, 1 Jul 2014 06:52:31 +0000 (08:52 +0200)]
i965/gs: Use single dispatch mode as fallback to dual object mode when possible.
Currently, when a geometry shader can't use dual object mode we fall back to
dual instance mode, however, when invocations == 1, single dispatch mode is
more performant and equally efficient in terms of register pressure.
Single dispatch mode requires that the driver can handle interleaving of
input registers, but this is already supported (dual instance mode has
the same requirement). However, to take full advantage of single dispatch mode
to reduce register pressure we would also need the ability to store two
separate vec4 output values into vec8 registers, which would approximately
double our capacity to store temporary values, but currently the vec4 visitor
and generator classes do not support this, so at the moment register pressure
in single and dual instance modes is the same.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>