Steven Wan [Wed, 8 Sep 2021 20:21:39 +0000 (16:21 -0400)]
[AIX] Check for typedef properly when getting preferred type align
The current check for typedef is naive and doesn't deal with any convoluted cases. This patch makes use of the new 'AlignRequirement' enum field from 'TypeInfo' to determine whether or not this is an 'aligned' attribute on a typedef.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D109387
Arthur Eubanks [Tue, 31 Aug 2021 19:24:50 +0000 (12:24 -0700)]
[MemorySSA] Support invariant.group metadata
The implementation is mostly copied from MemDepAnalysis. We want to look
at all loads and stores to the same pointer operand. Bitcasts and zero
GEPs of a pointer are considered the same pointer value. We choose the
most dominating instruction.
Since updating MemorySSA with invariant.group is non-trivial, for now
handling of invariant.group is not cached in any way, so it's part of
the walker. The number of loads/stores with invariant.group is small for
now anyway. We can revisit if this actually noticeably affects compile
times.
To avoid invariant.group affecting optimized uses, we need to have
optimizeUsesInBlock() not use invariant.group in any way.
Co-authored-by: Piotr Padlewski <prazek@google.com>
Reviewed By: asbirlea, nikic, Prazek
Differential Revision: https://reviews.llvm.org/D109134
Louis Dionne [Tue, 7 Sep 2021 16:55:48 +0000 (12:55 -0400)]
[libc++] Revert OpenBSD-related changes to the documentation
This commit partially reverts
0954e2b2d038 and
3fa4cff97480, which
make changes to the libc++ documentation implifying that OpenBSD is
supported. Neither of these changes have been reviewed AFAICT, so
I'm reverting as a matter of enforcing:
1. That changes get reviewed before being committed
2. That we have a discussion and a support plan for supporting
OpenBSD officially in libc++
Please note that I would be thrilled to support OpenBSD officially in
libc++, however doing so requires more than adding a note in the docs.
In particular, please make sure you read the note in [1] about setting
up CI testing for OpenBSD.
[1]: https://libcxx.llvm.org/#platform-and-compiler-support
Differential Revision: https://reviews.llvm.org/D109373
Philip Reames [Wed, 8 Sep 2021 19:01:19 +0000 (12:01 -0700)]
Move delinearization logic out of SCEV [NFC]
None of this logic has anything to do with SCEV's internals, it just uses the existing public APIs. As a result, we can move the code from ScalarEvolution.cpp/hpp to Delinearization.cpp/hpp with only minor changes.
This was discussed in advance on today's loop opt call. It turned out to be easy as hoped.
Nikita Popov [Wed, 8 Sep 2021 19:22:28 +0000 (21:22 +0200)]
[ConstantHoisting] Support opaque pointers
Directly use i8 for GEP, rather than fetching element type of i8*.
Louis Dionne [Wed, 8 Sep 2021 13:14:43 +0000 (09:14 -0400)]
[libc++][NFC] Rename _EnableIf to __enable_if_t for consistency
In other places in the code, we use lowercase spelling for things that
are not available in prior standards.
Differential Revision: https://reviews.llvm.org/D109435
Akira Hatanaka [Wed, 8 Sep 2021 18:58:03 +0000 (11:58 -0700)]
[ObjC][ARC] Use the addresses of the ARC runtime functions instead of
integer 0/1 for the operand of bundle "clang.arc.attachedcall"
https://reviews.llvm.org/D102996 changes the operand of bundle
"clang.arc.attachedcall". This patch makes changes to llvm that are
needed to handle the new IR.
This should make it easier to understand what the IR is doing and also
simplify some of the passes as they no longer have to translate the
integer values to the runtime functions.
Differential Revision: https://reviews.llvm.org/D103000
Akira Hatanaka [Wed, 8 Sep 2021 18:56:22 +0000 (11:56 -0700)]
[ObjC][ARC] Use the addresses of the ARC runtime functions instead of
integer 0/1 for the operand of bundle "clang.arc.attachedcall"
This should make it easier to understand what the IR is doing and also
simplify some of the passes as they no longer have to translate the
integer values to the runtime functions.
Differential Revision: https://reviews.llvm.org/D102996
Matt Morehouse [Wed, 8 Sep 2021 18:46:37 +0000 (11:46 -0700)]
[libFuzzer] Add missing argument to CrashResistantMerge.
Fixes a build error caused by a bad merge conflict resolution for
https://reviews.llvm.org/D105084.
Leonard Chan [Wed, 8 Sep 2021 18:45:52 +0000 (11:45 -0700)]
[compiler-rt][fuzzer] Do not link in libc++ in tests and disable exceptions
Differential Revision: https://reviews.llvm.org/D109208
Leonard Chan [Wed, 8 Sep 2021 18:44:00 +0000 (11:44 -0700)]
[compiler-rt] Use COMPILER_RT_TEST_CXX_COMPILER for linking compiler-rt tests
Before, COMPILER_RT_TEST_COMPILER was used which pointed to a C compiler. While
it is incorrect to assume either of these is the default compiler, using the
C++ one allows for linking cpp tests.
Differential Revision: https://reviews.llvm.org/D109207
Andrew Litteken [Mon, 23 Aug 2021 18:56:10 +0000 (11:56 -0700)]
[IROutliner] Using canonical values to find corresponding values. (NFC)
D104143 introduced canonical value numbering between regions, which allows for the easy identification of items across a region, eliminating the need in the outliner to create parallel lists of instructions for each region, and replace output values in a less convoluted way.
Additionally, in a future commit, the output values will not necessarily be recorded values from the region itself, it could be a combination value where the actual value being output is a PHINode instead. This new method allows us to handle the replacement of the output value to the stored value with the corresponding item in the same place for both normal output values, and PHINode outputs instead of handling the different types of outputs in different locations.
Reviewers: paquette, roelofs
Differential Revision: https://reviews.llvm.org/D108656
Joseph Huber [Wed, 8 Sep 2021 13:52:28 +0000 (09:52 -0400)]
[OpenMP] Do not SPMDize generic regions with no parallel
This patch changes SPMDization to not trigger for regions with no
parallelism. Otherwise, this will introduce unnecessary barriers that
will slow the single-threaded region down.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D109438
Leonard Chan [Wed, 8 Sep 2021 18:32:11 +0000 (11:32 -0700)]
[compiler-rt][Fuchsia] Support building + running compiler-rt tests on fuchsia's host toolchain
Differential Revision: https://reviews.llvm.org/D109199
Alex Langford [Tue, 7 Sep 2021 18:42:34 +0000 (11:42 -0700)]
[lldb] Delete IRExecutionUnit::SearchSpec
IRExecutionUnit::SearchSpec is a struct that encapsulates information
needed to look for a symbol. Specifically, it is comprised of a name
represented with a ConstString and a FunctionNameType mask.
Because the mask is unused (effectively always set to
eFunctionNameTypeFull), we can remove the mask and replace all uses with
eFunctionNameTypeFull. After doing that, SearchSpec is effectively a
wrapper around a ConstString.
As an aside, SearchSpec is similar in purpose to Module::LookupInfo. I
briefly considered replacing uses of SearchSpec with LookupInfo, but
the current code only cares about symbol names (treating them as
eFunctionNameTypeFull). This code does care about language type, so
LookupInfo may be appropriate for IRExecutionUnit in the future.
Differential Revision: https://reviews.llvm.org/D109384
Amara Emerson [Wed, 8 Sep 2021 18:24:44 +0000 (11:24 -0700)]
[GlobalISel] Use a typedef for builder function matchinfos for brevity. NFC.
Nick Desaulniers [Wed, 8 Sep 2021 17:44:16 +0000 (10:44 -0700)]
[ISEL][BitTestBlock] omit additional bit test when default destination is unreachable
Otherwise we end up with an extra conditional jump, following by an
unconditional jump off the end of a function. ie.
bb.0:
BT32rr ..
JCC_1 %bb.4 ...
bb.1:
BT32rr ..
JCC_1 %bb.2 ...
JMP_1 %bb.3
bb.2:
...
bb.3.unreachable:
bb.4:
...
Should be equivalent to:
bb.0:
BT32rr ..
JCC_1 %bb.4 ...
JMP_1 %bb.2
bb.1:
bb.2:
...
bb.3.unreachable:
bb.4:
...
This can occur since at the higher level IR (Instruction) SwitchInsts
are required to have BBs for default destinations, even when it can be
deduced that such BBs are unreachable.
For most programs, this isn't an issue, just wasted instructions since the
unreachable has been statically proven.
The x86_64 Linux kernel when built with CONFIG_LTO_CLANG_THIN=y fails to
boot though once D106056 is re-applied. D106056 makes it more likely
that correlation-propagation (CVP) can deduce that the default case of
SwitchInsts are unreachable. The x86_64 kernel uses a binary post
processor called objtool, which emits this warning:
vmlinux.o: warning: objtool: cfg80211_edmg_chandef_valid()+0x169: can't
find jump dest instruction at .text.cfg80211_edmg_chandef_valid+0x17b
I haven't debugged precisely why this causes a failure at boot time, but
fixing this very obvious jump off the end of the function fixes the
warning and boot problem.
Link: https://bugs.llvm.org/show_bug.cgi?id=50080
Fixes: https://github.com/ClangBuiltLinux/linux/issues/679
Fixes: https://github.com/ClangBuiltLinux/linux/issues/1440
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D109103
Kirill Stoimenov [Wed, 8 Sep 2021 17:04:43 +0000 (17:04 +0000)]
[asan] Fixed the jump to use the 4 byte offset version.
This should have been the 4 byte version in the first place. Unfortunatelly there is no easy way to add a test as both the 1 byte and 4 byte version are printed as 'jmp' in the assembly code.
Reviewed By: kda
Differential Revision: https://reviews.llvm.org/D109453
Wouter van Oortmerssen [Thu, 2 Sep 2021 22:18:58 +0000 (15:18 -0700)]
[WebAssembly] Change WebAssemblyMCLowerPrePass to ModulePass
It was a FunctionPass before, which subverted its purpose to collect ALL symbols before MCLowering, depending on how LLVM schedules function passes.
Fixes https://bugs.llvm.org/show_bug.cgi?id=51555
Differential Revision: https://reviews.llvm.org/D109202
Yaxun (Sam) Liu [Fri, 20 Aug 2021 22:03:56 +0000 (18:03 -0400)]
[HIP] Warn capture this pointer in device lambda
HIP currently diagnose capture of this pointer in device lambda in
host member functions. If this pointer points to managed memory,
it can be used in both device and host functions. Under this
situation, capturing this pointer in device lambda functions
in host member functions is valid usage. Change the diagnostic
about capturing this pointer to warning.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D108493
Arthur O'Dwyer [Wed, 8 Sep 2021 01:35:37 +0000 (21:35 -0400)]
[libc++] Comma-operator-proof a lot of algorithm/container code.
Detected by evil-izing the widely used `MoveOnly` testing type.
I had to patch some tests that were themselves using its comma operator,
but I think that's a worthwhile cost in order to catch more places
in our headers that needed comma-proofing.
The trick here is that even `++ptr, SomeClass()` can find a comma operator
by ADL, if `ptr` is of type `Evil*`. (A comma between two operands
of non-class-or-enum type is always treated as the built-in
comma, without ADL. But if either operand is class-or-enum, then
ADL happens for _both_ operands' types.)
Differential Revision: https://reviews.llvm.org/D109414
Craig Topper [Wed, 8 Sep 2021 17:25:32 +0000 (10:25 -0700)]
[RISCV] Pre-commit tests for D109394. NFC
Chris Lattner [Wed, 8 Sep 2021 17:09:42 +0000 (10:09 -0700)]
[tests] Make testsuite more resilient to "order of constant" changes. NFC.
Saleem Abdulrasool [Wed, 8 Sep 2021 16:20:43 +0000 (09:20 -0700)]
Support: hoist `extern template` declarations
Precede the `extern template` declaration prior to use. This is helpful
as it prevents the compiler from having to worry about instantiating the
template as it will be provided for. This is particularly important for
Windows where `__declspec(dllexport)` will traverses inheritance clauses
resulting in an incorrect application of dll interface to declarations.
Jessica Paquette [Sat, 4 Sep 2021 00:55:13 +0000 (17:55 -0700)]
[GlobalISel] Add G_ROTL and G_ROTR to right_identity_zero
Similar to `DAGCombiner::visitRotate`.
This makes `rotl_bitwidth_cst` in postlegalizercombiner-rotate.mir reduce down
to a COPY. Modify the checkline to make sure that only rotate_out_of_range
runs there.
Differential Revision: https://reviews.llvm.org/D109264
Craig Topper [Wed, 8 Sep 2021 17:01:29 +0000 (10:01 -0700)]
[RISCV] Remove unused tablegen template parameters. NFC
Identified in D109359
Mehdi Amini [Wed, 8 Sep 2021 16:50:27 +0000 (16:50 +0000)]
Add sanity check in MLIR ODS to catch case where two operands have the same name
This is making a tablegen crash into a more friendly error.
Differential Revision: https://reviews.llvm.org/D109449
Dan Liew [Wed, 8 Sep 2021 01:09:38 +0000 (18:09 -0700)]
Fix `asan/TestCases/Darwin/scrible.cpp` to work on platforms where `long` is not 64-bits.
Previously the test was failing on platforms where `long` was less than
64-bits wide (e.g. older WatchOS simulators and arm64_32) because the
`padding` field was too small.
The test currently relies on the `my_object->isa` being scribbled or
left unmodified after `my_object` is freed. However, this was not the
case because the `isa` pointer intersected with
`ChunkHeader::free_context_id`. `free_context_id` starts at the
beginning of user memory but it only initialized once the memory is
freed. This caused the `isa` pointer to change after it was freed
leading to the test crashing.
To fix this the `padding` field has been made explicitly 64-bits wide
(same size as `ChunkHeader::free_context_id`).
rdar://
75806757
Differential Revision: https://reviews.llvm.org/D109409
Nick Desaulniers [Wed, 8 Sep 2021 16:44:17 +0000 (09:44 -0700)]
[ISEL][BitTestBlock] pre-commit test for D109103
Upload a test that shows ISEL taking a SwitchInst that has an
unreachable BB for a default target being lowered to an unconditional
jump off the end of a function.
Link: https://bugs.llvm.org/show_bug.cgi?id=50080
Link: https://github.com/ClangBuiltLinux/linux/issues/679
Link: https://github.com/ClangBuiltLinux/linux/issues/1440
Reviewed By: craig.topper, hans
Differential Revision: https://reviews.llvm.org/D109106
Craig Topper [Wed, 8 Sep 2021 16:35:02 +0000 (09:35 -0700)]
[RISCV] Use V0 instead of VMV0: for mask vectors in isel patterns.
This is consistent with the RVV intrinsic patterns. This has been
shown to prevent some "ran out of registers" errors in our internal
testing.
Unfortunately, there are some regressions on LMUL=8 tests in here.
I think the lack of registers with LMUL=8 just makes it very hard
to schedule correctly.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D109245
Benjamin Kramer [Wed, 8 Sep 2021 16:33:21 +0000 (18:33 +0200)]
[IROutliner] Remove unused variable. NFC.
Roman Lebedev [Wed, 8 Sep 2021 16:16:55 +0000 (19:16 +0300)]
[X86] X86DAGToDAGISel::matchBitExtract(): support 'num high bits to clear' pattern
Currently, we only deal with the case where we can match
the number of low bits to be kept, i.e.:
```
x & ((1 << y) - 1)
```
will extract low `y` bits of `x`.
But what will
```
x & (-1 >> y)
```
do?
Logically, it will extract `bitwidth(x) - y` low bits, i.e.:
```
x & ~(-1 << (bitwidth(x)-y))
```
... except we can't do such a transformation in IR in general,
because if we wanted to extract all the bits `(-1 >> 0)` is fine,
but `-1 << bitwidth(x)` would be `poison`: https://alive2.llvm.org/ce/z/BKJZfw,
Yet, here with BMI's BEXTR and BMI2's BZHI we don't have any such problems with edge-cases.
So what we can do is: https://alive2.llvm.org/ce/z/gm5M2B
As briefly discussed with @craig.topper, this appears to be not worse than what we'd end up with currently (a pair of shifts):
* https://godbolt.org/z/nsPb8bejs (direct data dependency, sequential execution)
* https://godbolt.org/z/7bj3zeh1d (no direct data dependency, parallel execution)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D107923
Craig Topper [Wed, 8 Sep 2021 16:14:56 +0000 (09:14 -0700)]
[RISCV] Add an GPR def to the Zvlseg SPILL/RELOAD pseudos
The expansion of these pseudos creates ADD instructions. Those
ADDs modify a GPR so that it is no longer contains the same value
as the input base pointer. Therefore, I believe we should have a
GPR as a Def on these instructions and expansion should get the
destination register for the ADDs from that operand.
At least in our tests here this works out so that register
scavenging picks the same register as the base pointer.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D109405
gtt1995 [Wed, 8 Sep 2021 13:18:19 +0000 (06:18 -0700)]
Redistribute energy for Corpus
I found that the initial corpus allocation of fork mode has certain defects.
I designed a new initial corpus allocation strategy based on size grouping.
This method can give more energy to the small seeds in the corpus and
increase the throughput of the test.
Fuzzbench data (glibfuzzer is -fork_corpus_groups=1):
https://www.fuzzbench.com/reports/experimental/2021-08-05-parallel/index.html
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D105084
Saleem Abdulrasool [Tue, 7 Sep 2021 21:37:53 +0000 (14:37 -0700)]
Analysis: move declaration of variables to a more suitable location
This moves 2 variable declarations from `llvm/Support/Debug.h` to a more
appropriate home in the headers for `LLVMAnalysis`. These variables are
defined in `LLVMAnalysis` rather than in `LLVMSupport` and although they
control debugging behavior, the declarations being colocated in the same
library's headers is both easier to locate and aids correctly describing
the library's interfaces.
Reviewed By: rnk, mehdi_amini, aeubanks
Differential Revision: https://reviews.llvm.org/D109396
Alexey Lapshin [Tue, 7 Sep 2021 18:13:28 +0000 (21:13 +0300)]
[llvm-objcopy][NFC] Refactor CopyConfig structure - categorize options.
This patch continues refactoring done by D99055. It puts format specific
options into the correponding CopyConfig structures.
Differential Revision: https://reviews.llvm.org/D102277
Andrew Litteken [Wed, 28 Jul 2021 16:22:35 +0000 (09:22 -0700)]
[IROutliner] Adding supports for multiple exits
When we start outlining across branches, there is the possibility that we will have two different blocks with different output locations, or a single branch that goes to two blocks outside of the region that is being outlined. While the CodeExtractor provides most of the mechanisms by using the return value of the extracted function as the input to a switch statement to correctly branch to the correct location, we need special handling for different output schemas to each location.
This is done by repeating the existing storing scheme for each different exit block. We have a map from the return values used, to the basic block that is used to store the outputs for that particular exit block within the outlined function. Then if needed, we create a switch statement for each return block to branch to the correct set of stored outputs.
Reviewers: paquette
Differential Revision: https://reviews.llvm.org/D106993
Kazu Hirata [Wed, 8 Sep 2021 15:54:15 +0000 (08:54 -0700)]
[IR] Construct SmallVector with iterator ranges (NFC)
Note that arg_operands has been deprecated in favor of args.
Saleem Abdulrasool [Tue, 7 Sep 2021 21:28:05 +0000 (14:28 -0700)]
IR: move the declaration of `VerifyDomInfo` (NFC)
This moves the declaration of `VerifyDomInfo` into
`llvm/IR/Dominators.h` from `llvm/Support/Debug.h`. Although this is a
debugging utility, the definition of the symbol is in LLVMIR, not in
LLVMSupport. This moves the declaration to the containing modules'
header.
Reviewed By: rnk, mehdhi_amini
Differential Revision: https://reviews.llvm.org/D109395
David Spickett [Wed, 8 Sep 2021 08:55:56 +0000 (08:55 +0000)]
[lldb] Remove unused GDBRemoteCommunicationClient::SendAttach function
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D109427
AndreyChurbanov [Wed, 8 Sep 2021 15:12:31 +0000 (18:12 +0300)]
[OpenMP][NFC] Added comment on OpenMP 5.0 task affinity pilot implementation
Kunwar Shaanjeet Singh Grover [Wed, 8 Sep 2021 14:52:01 +0000 (20:22 +0530)]
[MLIR] FlatAffineConstraints: Refactored computation of explicit representation for identifiers
This patch refactors the existing implementation of computing an explicit
representation of an identifier as a floordiv in terms of other identifiers and
exposes this computation as a public function.
The computation of this representation is required to support local identifiers
in PresburgerSet subtract, complement and isEqual.
Reviewed By: bondhugula, arjunp
Differential Revision: https://reviews.llvm.org/D106662
Guillaume Chatelet [Wed, 8 Sep 2021 14:43:48 +0000 (14:43 +0000)]
[libc] Fix running benchmarks under msan/asan
asan/msan intercepts `aligned_malloc` and misbehave when the requested
alignment is greater than 512.
https://github.com/llvm/llvm-project/blob/
b041b613e6fff713fc9ad6dbc73024286fb2fc93/compiler-rt/lib/asan/asan_allocator.cpp#L430-L431
Sanjay Patel [Wed, 8 Sep 2021 13:40:25 +0000 (09:40 -0400)]
[InstCombine] add test for zext with 'or' op; NFC
Sanjay Patel [Wed, 8 Sep 2021 13:33:30 +0000 (09:33 -0400)]
[InstCombine] remove unnecessary instructions from test; NFC
AndreyChurbanov [Wed, 8 Sep 2021 13:55:32 +0000 (16:55 +0300)]
[OpenMP] libomp: runtime part of omp_all_memory task dependence implementation.
New omp_all_memory task dependence type is implemented.
Library recognizes the new type via either
(dependence_address == NULL && dependence_flag == 0x80)
or
(dependence_address == SIZE_MAX).
A task with new dependence type depends on each preceding task
with any dependence type (kind of a dependence barrier).
Differential Revision: https://reviews.llvm.org/D108574
Michał Górny [Fri, 6 Aug 2021 19:32:41 +0000 (21:32 +0200)]
[lldb] [Commands] Remove 'append' from 'platform file open' mode
Remove File::eOpenOptionAppend from the mode used by 'platform file
open' command. According to POSIX, O_APPEND causes all successive
writes to be done at the end of the file. This effectively makes
the offset argument to 'platform file write' meaningless.
Furthermore, apparently O_APPEND is not implemented reliably everywhere.
The Linux manpage for pwrite(2) suggests that Linux does respect
O_APPEND there while according to POSIX it should not, so the actual
behavior would be dependent on how the vFile:pwrite packet is
implemented on the server.
Ideally, the mode used for opening flags would be provided via options.
However, changing the default mode seems to be a reasonable intermediate
solution.
Differential Revision: https://reviews.llvm.org/D107664
Louis Dionne [Tue, 17 Aug 2021 16:26:09 +0000 (12:26 -0400)]
[libc++] Use enable_if_t instead of _EnableIf
I just ran into a compiler error involving __bind_back and some overloads
that were being disabled with _EnableIf. I noticed that the error message
was quite bad and did not mention the reason for the overload being
excluded. Specifically, the error looked like this:
candidate template ignored: substitution failure [with _Args =
<ContiguousView>]: no member named '_EnableIfImpl' in 'std::_MetaBase<false>'
Instead, when using enable_if or enable_if_t, the compiler is clever and
can produce better diagnostics, like so:
candidate template ignored: requirement 'is_invocable_v<
std::__bind_back_op<1, std::integer_sequence<unsigned long, 0>>,
std::ranges::views::__transform::__fn &, std::tuple<PlusOne> &,
ContiguousView>' was not satisfied [with _Args = <ContiguousView>]
Basically, it tries to do a poor man's implementation of concepts, which
is already a lot better than simply complaining about substitution failure.
Hence, this commit uses enable_if_t instead of _EnableIf whenever
possible. That is both more straightforward than using the internal
helper, and also leads to better error messages in those cases.
I understand the motivation for _EnableIf's implementation was to improve
compile-time performance, however I believe striving to improve error
messages is even more important for our QOI, hence this patch. Furthermore,
it is unclear that _EnableIf actually improved compile-time performance
in any noticeable way (see discussion in the review for details).
Differential Revision: https://reviews.llvm.org/D108216
Arnab Dutta [Wed, 8 Sep 2021 12:19:48 +0000 (17:49 +0530)]
[MLIR] Add loop coalesce utility for affine.for
Add loop coalesce utility for affine.for. This expects loops to have
been normalized a-priori. This works for both constant as well non
constant upper bounds having single/multiple result upper bound affine
map.
With contributions from Arnab Dutta and Uday Bondhugula.
Reviewed By: bondhugula, ayzhuang
Differential Revision: https://reviews.llvm.org/D108126
Peter Smith [Wed, 8 Sep 2021 09:33:52 +0000 (10:33 +0100)]
[MC] Add Subtarget for MAsmParser call to emitCodeAlignment
The call to emitCodeAlignment was missing a STI which is required
after D45962.
emitCodeAlignment has a default parameter of 0 for MaxBytesToEmit.
Explicitly passing 0 here was interpreted as as nullptr for the STI.
This could possibly be avoided by taking STI as a const reference in
emitCodeAlignment.
Differential Revision: https://reviews.llvm.org/D109425
Simon Pilgrim [Wed, 8 Sep 2021 12:26:08 +0000 (13:26 +0100)]
[X86] Add AVX2 test coverage to combine-concatvectors.ll
This will be useful as part of D109348
Sjoerd Meijer [Wed, 8 Sep 2021 11:53:05 +0000 (12:53 +0100)]
[FuncSpec] Fix typo in option description. NFC.
David Green [Wed, 8 Sep 2021 11:41:51 +0000 (12:41 +0100)]
[DAG] Fix GT -> GE condition when creating SetCC
79845ed6dfc6511f99 folded some setcc(ashr) conditions to setcc, but got
the condition for NE incorrect, using GT where it should be using GE.
Sjoerd Meijer [Wed, 8 Sep 2021 10:24:58 +0000 (11:24 +0100)]
[FuncSpec] Fix test case: only run funcspec and not any other passes. NFC.
Evgeny Leviant [Wed, 8 Sep 2021 11:06:08 +0000 (14:06 +0300)]
[LiveDebugValues] Handle spills of indirect debug values correctly
When handling register spill for indirect debug value LiveDebugValues pass doesn't add
DW_OP_deref operator which may in some cases cause debugger to return value address, instead
of value while machine register holding that address is spilled.
Differential revision: https://reviews.llvm.org/D109142
Saiyedul Islam [Mon, 26 Jul 2021 16:39:41 +0000 (22:09 +0530)]
[clang-offload-bundler] Make Bundle Entry ID backward compatible
Earlier BundleEntryID used to be <OffloadKind>-<Triple>-<GPUArch>.
This used to work because the clang-offload-bundler didn't need
GPUArch explicitly for any bundling/unbundling action. With
unbundleArchive it needs GPUArch to ensure compatibility between
device specific code objects. D93525 enforced triples to have
separators for all 4 components irrespective of number of
components, like "amdgcn-amd-amdhsa--". It was required to
to correctly parse a possible 4th environment component or a GPU.
But, this condition is breaking backward compatibility with
archive libraries compiled with compilers older than D93525.
This patch allows triples to have any number of components with
and without extra separator for empty environment field. Thus,
both the following bundle entry IDs are same:
openmp-amdgcn-amd-amdhsa--gfx906
openmp-amdgcn-amd-amdhsa-gfx906
Reviewed By: yaxunl, grokos
Differential Revision: https://reviews.llvm.org/D106809
Fraser Cormack [Mon, 6 Sep 2021 15:56:12 +0000 (16:56 +0100)]
[MemCpyOpt] Fix a variety of scalable-type crashes
This patch fixes a variety of crashes resulting from the `MemCpyOptPass`
casting `TypeSize` to a constant integer, whether implicitly or
explicitly.
Since the `MemsetRanges` requires a constant size to work, all but one
of the fixes in this patch simply involve skipping the various
optimizations for scalable types as cleanly as possible.
The optimization of `byval` parameters, however, has been updated to
work on scalable types in theory. In practice, this optimization is only
valid when the length of the `memcpy` is known to be larger than the
scalable type size, which is currently never the case. This could
perhaps be done in the future using the `vscale_range` attribute.
Some implicit casts have been left as they were, under the knowledge
they are only called on aggregate types. These should never be
scalably-sized.
Reviewed By: nikic, tra
Differential Revision: https://reviews.llvm.org/D109329
David Green [Wed, 8 Sep 2021 10:08:32 +0000 (11:08 +0100)]
[AArch64] Regenerate some test checks. NFC
This patch just reruns the update_llc_test_checks script on the AArch64
tests claiming to be updated by the script, cleaning up the output.
Michał Górny [Mon, 23 Aug 2021 12:19:24 +0000 (14:19 +0200)]
[lldb] Support "eflags" register name in generic reg fallback
Enhance the generic register fallback code to support "eflags" register
name in addition to "rflags", as the former is used by gdbserver. This
permits lldb-server to recognize the generic flags register when
interfacing with gdbserver-style target.xml (i.e. without generic=""
attributes), and therefore aligns ABI plugins' AugmentRegisterInfo()
between lldb-server and gdbserver.
Differential Revision: https://reviews.llvm.org/D108548
Fraser Cormack [Wed, 18 Aug 2021 10:50:55 +0000 (11:50 +0100)]
[LegalizeTypes][VP] Add promotion support for binary VP ops
This patch extends the preliminary support for vector-predicated (VP)
operation legalization to include promotion of illegal integer vector
types.
Integer promotion of binary VP operations is relatively simple and
piggy-backs on the non-VP logic, but passing the two extra mask and VP
operands through to the promoted operation.
Tests have been added to the RISC-V target to cover the basic scenarios
for integer promotion for both fixed- and scalable-vector types.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D108288
Michał Górny [Tue, 10 Aug 2021 12:48:45 +0000 (14:48 +0200)]
[lldb] [gdb-server] Add tests for more vFile packets
Differential Revision: https://reviews.llvm.org/D107821
Michał Górny [Fri, 6 Aug 2021 19:56:15 +0000 (21:56 +0200)]
[lldb] [Commands] Fix reporting errors in 'platform file read/write'
Fix 'platform file read' and 'platform file write' commands to correctly
detect erraneous return and report it as such. Currently, errors were
implicitly printed as a return value of -1, and the commands were
assumed to be successful.
Differential Revision: https://reviews.llvm.org/D107665
Michał Górny [Tue, 4 May 2021 19:11:20 +0000 (21:11 +0200)]
[lldb] [Process/FreeBSD] Support SaveCore() using PT_COREDUMP
Differential Revision: https://reviews.llvm.org/D109326
David Green [Wed, 8 Sep 2021 08:14:01 +0000 (09:14 +0100)]
[AArch64] Regenerate some test checks. NFC
Cullen Rhodes [Tue, 7 Sep 2021 14:36:10 +0000 (14:36 +0000)]
[AArch64][SME] Fix imm bug in mov vector to tile aliases
Also fixes a warning mentioned in D109359.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D109363
Martin Storsjö [Fri, 12 Mar 2021 15:58:30 +0000 (17:58 +0200)]
[libcxx] [test] Simplify get_temp_file_name() for mingw
Use the same codepaths as for MSVC. Mingw-w64 does have the _mktemp_s
function; on Vista and newer, msvcrt.dll does contain the function,
which ends up called. (Same thing in the UCRT.) In older versions of
msvcrt.dll (older than what libc++ supports), mingw-w64 provides a
fallback implementation.
This effectively reverts
23323e25f896cf44e6d4519ef38f066e45fe408f (and
d07e5c23b40078dcae13f76b091c9e18763ae44a). That commit tried to fix
unspecified MinGW build breakage.
This reduces the risk of temp name collisions between processes (when
running multiple tests in parallel); the path returned by
GetTempFileName can easily collide with other similar paths.
(_mktemp_s on the other hand tries to avoid such clashes by using
the process id as part of the uniqueness seed.)
This avoids stray random failures in fstreams tests in mingw configurations.
Differential Revision: https://reviews.llvm.org/D98526
Fangrui Song [Wed, 8 Sep 2021 07:21:30 +0000 (00:21 -0700)]
[WebAssembly][test] Fix lower-em-sjlj-indirect-setjmp.ll after D109375
Sander de Smalen [Tue, 7 Sep 2021 16:07:37 +0000 (17:07 +0100)]
[AArch64] Implement extract_subvector for predicates.
This patch implements extract_subvector for predicate types when
the input type is more than twice the size of the subvector that
is being extracted.
Reviewed By: CarolineConcatto
Differential Revision: https://reviews.llvm.org/D109314
Fangrui Song [Wed, 8 Sep 2021 07:15:54 +0000 (00:15 -0700)]
[ProfileData] Actually fix Clang -Wcovered-switch-default after D109398
The Clang attribute `enum_extensibility(open)` (2017) is too new.
Just use a cast.
Max Kazantsev [Wed, 8 Sep 2021 06:17:23 +0000 (13:17 +0700)]
[SimplifyCFG] Preserve knowledge about guarding condition by adding assume
This improvement adds "assume" after removal of branch basing on UB in successor block.
Consider the following example:
```
pred:
x = ...
cond = x > 10
br cond, bb, other.succ
bb:
phi [nullptr, pred], ... // other possible preds
load(phi) // UB if we came from pred
other.succ:
// here we know that x <= 10, but this knowledge is lost
// after the branch is turned to unconditional unless we
// preserve it with assume.
```
If we remove the branch basing on knowledge about UB in a successor block,
then the fact that x <= 10 is other.succ might be lost if this condition is
not inferrable from any dominating condition. To preserve this knowledge, we
can add assume intrinsic with (possibly inverted) branch condition.
Patch by Dmitry Bakunevich!
Differential Revision: https://reviews.llvm.org/D109054
Reviewed By: lebedev.ri
Fangrui Song [Wed, 8 Sep 2021 07:00:33 +0000 (00:00 -0700)]
Revert GCC -Wnon-virtual-dtor workarounds "[SCEV] Fix GCC -Wnon-virtual-dtor" & "[SampleFDO] Fix -Wnon-virtual-dtor"
This reverts commits
4852c770fe8703145dd2a35395985646ce57a454 and
6df09d6ccbc0cb72d3278cafb592e9bc0e6b84a1.
After D109404, -Wnon-virtual-dtor will not be added when the host compiler is GCC.
Fangrui Song [Wed, 8 Sep 2021 06:36:47 +0000 (23:36 -0700)]
[CMake] Don't add -Wnon-virtual-dtor if affected by GCC PR102168
See the discussion on
https://reviews.llvm.org/rG4852c770fe8703145dd2a35395985646ce57a454
The GCC behavior (https://gcc.gnu.org/PR102168) seems unhelpful.
Unconditional -Wnon-virtual-dtor led to other unnecessary workarounds like
6df09d6ccbc0cb72d3278cafb592e9bc0e6b84a1
This patches uses a variant of the
4bb5f44c701402462cb93ef00d46d52382f39f11
check to detect GCC PR102168.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D109404
Fangrui Song [Wed, 8 Sep 2021 03:58:51 +0000 (20:58 -0700)]
[ProfileData] Fix Clang -Wcovered-switch-default after D109398
Fangrui Song [Wed, 8 Sep 2021 03:46:37 +0000 (20:46 -0700)]
[ELF] Infer EM_HEXAGON in getBitcodeMachineKind
Wei Mi [Wed, 8 Sep 2021 02:33:36 +0000 (19:33 -0700)]
[SampleFDO] Allow forward compatibility when adding a new section for extbinary
format.
Currently when we add a new section in the profile format and generate a profile
containing the new section, older compiler which reads the new profile will
issue an error. The forward incompatibility can cause unnecessary churn when
extending the profile. This patch removes the incompatibility when adding a new
section for extbinary format.
Differential Revision: https://reviews.llvm.org/D109398
Justin Latimer [Wed, 8 Sep 2021 02:35:13 +0000 (02:35 +0000)]
[AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series
Reviewed By: Dylan McKay, Ben Shi
Differential Revision: https://reviews.llvm.org/D103136
Ben Shi [Sat, 4 Sep 2021 02:09:22 +0000 (02:09 +0000)]
[AArch64] Improve target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding if it leads to worse code.
Reviewed By: dmgreen, kda
Differential Revision: https://reviews.llvm.org/D108871
Wang, Pengfei [Wed, 8 Sep 2021 00:22:46 +0000 (08:22 +0800)]
[X86][MS] Fix the aligement mismatch of vector variable arguments on Win32
The alignment of vector variable arguments in callee side is 4, which is
aligned with MSVC. But the caller aligns them to the size of vector
arguments. It results in run fails. This patch fixes this problem by
trimming it to 4 bytes for variable arguments on Win32.
Fixed vector arguments are passed by pointer on Win32. So they don't have
the problem.
I don't find a doc in MSDN for this calling conversion, so I did several
experiments here: https://godbolt.org/z/n1zn1Gx1z
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D108887
Matheus Izvekov [Wed, 8 Sep 2021 00:21:17 +0000 (02:21 +0200)]
[clang] fix transformation of template arguments of 'auto' type constraints
See PR48617.
When assigning the new template arguments to the new TypeLoc, we were looping
on the argument count of the original TypeLoc instead of the new one,
which can be different when packs are present.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D109406
Usman Nadeem [Wed, 8 Sep 2021 00:09:42 +0000 (17:09 -0700)]
[NFC] Recommit "Regenerate SVE ACLE intrinsics tests"" 2nd try
This reverts
61ddc3d3db9b6c6b163774c7ce9f4d611cbd7c80 to reapply
91eda9c30f33da6ec6da70b59a5f5da6c6397039 after fixing the " |& "
causing failures on windows.
Change-Id: Ib646c803b2274f0f24f9a8932de7aa97003529c5
Yuanfang Chen [Tue, 7 Sep 2021 22:28:19 +0000 (15:28 -0700)]
PR45881: Properly use CXXThisOverride for templated lambda
- `this` used in lambda expression parameter declarations needs no capture.
- Set up CXXThisOverride for default template arguments of a lambda.
A similar fix to this is
c3d2ebb60f604.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D102531
Yuanfang Chen [Tue, 7 Sep 2021 18:58:05 +0000 (11:58 -0700)]
[NPM] Make AddDiscriminators pass required
This is to make sure the pass is not skipped at O0 where optnone is
applied to functions by default.
Philip Reames [Tue, 7 Sep 2021 23:58:18 +0000 (16:58 -0700)]
[SCEV] Use no-self-wrap flags infered from exit structure to compute trip count
The basic problem being solved is that we largely give up when encountering a trip count involving an IV which is not an addrec. We will fall back to the brute force constant eval, but that doesn't have the information about the fact that we can't cycle back through the same set of values.
There's a high level design question of whether this is the right place to handle this, and if not, where that place is. The major alternative here would be to return a conservative upper bound, and then rely on two invocations of indvars to add the facts to the narrow IV, and then reconstruct SCEV. (I have not implemented the alternative and am not 100% sure this would work out.) That's arguably more in line with existing code, but I find this substantially easier to reason about. During review, no one expressed a strong opinion, so we went with this one.
Differential Revision: D108651
David Green [Tue, 7 Sep 2021 23:00:56 +0000 (00:00 +0100)]
[AArch64] Regenerate some test checks. NFC
Heejin Ahn [Sat, 4 Sep 2021 06:31:52 +0000 (23:31 -0700)]
[WebAssembly] Error out on indirect uses of setjmp
Both Wasm & Emscripten SjLj handling has a restriction that `setjmp`
cannot be called indirectly. I thought we have been erroring out on
indirect uses of `setjmp`, but some recent CL disrupted the logic and
we are not erroring out anymore.
We currently
1. Collect functions that contain `setjmp` calls in `SetjmpUsers`. This
only counts direct calls:
https://github.com/llvm/llvm-project/blob/
8f77dc459e31aad6daab89a124fa92067916274c/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L869-L878
2. Run `runSjLjOnFunction` only on those `SetjmpUsers`. Within
`runSjLjOnFunction`, if we see an indirect use of `setjmp`, we error
out:
https://github.com/llvm/llvm-project/blob/
8f77dc459e31aad6daab89a124fa92067916274c/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L1218-L1221
So if there are only indirect setjmp calls within the module,
`SetjmpUsers` will be empty, and `runSjLjOnFunction` is not even entered
once. And the indirect `setjmp` call will error out at link time. So in
this CL we check for the indirect uses of `setjmp` upfront before we
enter `runSjLjOnFunction`.
Also this currently errors out on `invoke @setjmp`, which can only occur
when using Wasm EH + Wasm SjLj within a function. We recently added Wasm
SjLj support but we don't support using Wasm EH + Wasm SjLj in the same
function yet. We plan to add this support very soon, so I don't think
it's worth creating another test file just for this. (This is an error
test so it needs its own file)
Reviewed By: dschuff
Differential Revision: https://reviews.llvm.org/D109375
Arthur Eubanks [Tue, 7 Sep 2021 22:11:44 +0000 (15:11 -0700)]
[NFC][C API] Make LLVMSetInstrParamAlignment's index param type LLVMAttributeIndex
It's the same as unsigned, but clearer in intent.
Artem Dergachev [Tue, 7 Sep 2021 21:58:13 +0000 (14:58 -0700)]
[clang-tidy] bugprone-infinite-loop: Fix false positives with volatile addresses.
Low-level code may occasionally deal with direct access by concrete addresses
such as 0x1234. Values at these addresses act like globals: they can change
at any time. They typically wear volatile qualifiers.
Suppress all warnings on loops with conditions that involve casting anything to
a pointer-to-...-pointer-to-volatile type.
The closely related bugprone-redundant-branch-condition check
doesn't seem to be affected. Add a test just in case.
Differential Revision: https://reviews.llvm.org/D108808
Arthur Eubanks [Tue, 7 Sep 2021 20:21:28 +0000 (13:21 -0700)]
[NFC] Cleanup off by one indexes in CallBase::dataOperandHasImpliedAttr()
Verified that previously nothing was calling dataOperandHasImpliedAttr()
with AttributeList::ReturnIndex even though we had a code path for it.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D109390
peter klausler [Fri, 3 Sep 2021 22:03:43 +0000 (15:03 -0700)]
[flang] Implement semantic checks for ELEMENTAL subprograms
Adds missing semantic checks for ELEMENTAL functions and subroutines,
their dummy arguments, and their results from F'2018 15.8.1 C15100-15102.
Differential Revision: https://reviews.llvm.org/D109380
Aart Bik [Tue, 7 Sep 2021 20:41:14 +0000 (13:41 -0700)]
[mlir][sparse] fix typos
Perhaps one of these days I will actually learn how to spell opaque....
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D109391
Siva Chandra Reddy [Tue, 7 Sep 2021 20:55:08 +0000 (20:55 +0000)]
[libc][NFC] Add fenv and string headers to x86_64 headers list.
Nico Weber [Tue, 7 Sep 2021 21:01:48 +0000 (17:01 -0400)]
Revert "[gn build] Add a file that should have been in
cfe02847496b856aa"
This reverts commit
6be7f5c354557b661494f94be616d2a8c91a6a1d.
We'll need this file eventually, but it in fact shouldn't have been in
cfe02847496b856aa. It's currently unreferenced.
Nico Weber [Tue, 7 Sep 2021 20:58:57 +0000 (16:58 -0400)]
[gn build] Try to fix win build after
cfe02847496b856aa
Rainer Orth [Tue, 7 Sep 2021 20:56:10 +0000 (22:56 +0200)]
[Support] Implement getMainExecutable on Solaris
Many `flang` tests currently `FAIL` on Solaris because the module files
aren't found. I could trace this to `sys::fs::getMainExecutable` not being
implemented.
This patch does this and fixes all affected `flang` tests.
Tested on `amd64-pc-solaris2.11`.
Differential Revision: https://reviews.llvm.org/D109374
Philip Reames [Tue, 7 Sep 2021 20:53:56 +0000 (13:53 -0700)]
[SCEV] Further clarify comments regarding UB and zero stride
Follow on to D109029. I realized we had no mention of mustprogrress in the comment (as it prexisted mustprogress in the codebase). In the process of adding it, I tweaked the preconditions into something I think is more clear. Note that mustprogress is checked in the code.
Differential Revision: https://reviews.llvm.org/D109091
Mehdi Amini [Tue, 7 Sep 2021 17:30:25 +0000 (17:30 +0000)]
Improve error message when creating an op that isn't registered in the context
This prints a more helpful error for folks who aren't intrinsically
familiar with the system.
Differential Revision: https://reviews.llvm.org/D109378
Geoffrey Martin-Noble [Tue, 7 Sep 2021 20:18:57 +0000 (13:18 -0700)]
[MLIR][docs] Clarify language in pass restrictions
Right now all but the last bullet are relying on applied "must not" that
isn't there and the last bullet is a "must".
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D109389
Sanjay Patel [Tue, 7 Sep 2021 20:24:21 +0000 (16:24 -0400)]
[InstCombine] fold icmp equality with 'or' mask ops
This could go either direction since the instruction
count is the same either way, but there are a few
reasons to prefer this:
1. We already do the related transform with 'and'
(see just above the new code).
2. We try (too hard) to compensate for not having this
and possibly other folds in transformZExtICmp(),
and that leads to bugs like https://llvm.org/PR51762 .
3. Codegen looks better across a variety of targets.
https://alive2.llvm.org/ce/z/uEgn4P
Sanjay Patel [Tue, 7 Sep 2021 20:06:26 +0000 (16:06 -0400)]
[InstCombine] add tests for icmp with 'or' ops; NFC
Roman Lebedev [Tue, 7 Sep 2021 20:14:48 +0000 (23:14 +0300)]
[X86] Move newly-added tests into the right file