Guo Zhengkui [Fri, 1 Oct 2021 10:13:46 +0000 (18:13 +0800)]
drm/amdgpu: remove some repeated includings
Remove two repeated includings in line 46 and 47.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lijo Lazar [Fri, 1 Oct 2021 08:49:07 +0000 (16:49 +0800)]
drm/amdgpu: During s0ix don't wait to signal GFXOFF
In the rare event when GFX IP suspend coincides with a s0ix entry, don't
schedule a delayed work, instead signal PMFW immediately to allow GFXOFF
entry. GFXOFF is a prerequisite for s0ix entry. PMFW needs to be
signaled about GFXOFF status before amd-pmc module passes OS HINT
to PMFW telling that everything is ready for a safe s0ix entry.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1712
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 29 Sep 2021 17:42:08 +0000 (13:42 -0400)]
Documentation/gpu: remove spurious "+" in amdgpu.rst
Not sure why that was there. Remove it.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 29 Sep 2021 16:06:03 +0000 (12:06 -0400)]
drm/amdgpu: consolidate case statements
IP_VERSION(11, 0, 13) does the exact same thing as
IP_VERSION(11, 0, 12) so squash them together.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 29 Sep 2021 19:42:34 +0000 (15:42 -0400)]
drm/amdgpu/jpeg: add jpeg2.6 start/end
Add jpeg2.6 start/end with updated PCTL0_MMHUB_DEEPSLEEP_IB address.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.lilu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Wed, 29 Sep 2021 19:33:25 +0000 (15:33 -0400)]
drm/amdgpu/jpeg2: move jpeg2 shared macro to header file
Move jpeg2 shared macro to header file
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.lilu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Lang Yu [Wed, 29 Sep 2021 06:54:39 +0000 (14:54 +0800)]
drm/amdkfd: fix a potential ttm->sg memory leak
Memory is allocated for ttm->sg by kmalloc in kfd_mem_dmamap_userptr,
but isn't freed by kfree in kfd_mem_dmaunmap_userptr. Free it!
Fixes:
264fb4d332f5 ("drm/amdgpu: Add multi-GPU DMA mapping helpers")
Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 17 Sep 2021 15:23:45 +0000 (11:23 -0400)]
drm/amdgpu: add an option to override IP discovery table from a file
If you set amdgpu.discovery=2 you can force the the driver to
fetch the IP discovery table from a file rather than from the
table shipped on the device. This is useful for debugging and
for device bring up and emulation when the tables may be in flux.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 12 Aug 2021 19:56:51 +0000 (15:56 -0400)]
drm/amdkfd: convert kfd_device.c to use GC IP version
rather than asic type.
v2: fix up CZ case
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 12 Aug 2021 19:06:24 +0000 (15:06 -0400)]
drm/amdkfd: clean up parameters in kgd2kfd_probe
We can get the pdev and asic type from the adev. No need
to pass them explicitly.
v2: squash in build fix for !CONFIG_HSA_AMD from Anson
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 10 Aug 2021 21:06:02 +0000 (17:06 -0400)]
drm/amdgpu: add support for SRIOV in IP discovery path
Handle SRIOV requirements when adding IP blocks.
v2: add comment about UVD/VCE support on vega20 SR-IOV
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 10 Aug 2021 19:21:10 +0000 (15:21 -0400)]
drm/amdgpu: clean up set IP function
Split into several smaller per IP functions to make it
easier to handle ordering issues for things like
SR-IOV in a follow up patch.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 4 Oct 2021 19:19:10 +0000 (15:19 -0400)]
drm/amdgpu: convert IP version array to include instances
Allow us to query instances versions more cleanly.
Instancing support is not consistent unfortunately. SDMA is a
good example. Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC
is another example. On most chips there are multiple
instances with the same HWID. This allows us to support both
forms.
v2: rebase
v3: clarify instancing support
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 21:28:34 +0000 (17:28 -0400)]
drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default
For new chips with no explicit entry in the PCI ID list.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 21:26:21 +0000 (17:26 -0400)]
drm/amdgpu: add new asic_type for IP discovery
Add a new asic type for asics where we don't have an
explicit entry in the PCI ID list. We don't need
an asic type for these asics, other than something higher
than the existing ones, so just use this for all new
asics.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 20:47:54 +0000 (16:47 -0400)]
drm/amdgpu/ucode: add default behavior
Default to PSP ucode loading unless the user specifies
direct.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 17:17:10 +0000 (13:17 -0400)]
drm/amdgpu: get VCN harvest information from IP discovery table
Use the table rather than asic specific harvest registers.
v2: remove harvesting register checking
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 16:41:29 +0000 (12:41 -0400)]
drm/amdgpu/vcn: remove manual instance setting
Handled by IP discovery now.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 16:29:56 +0000 (12:29 -0400)]
drm/amdgpu/sdma: remove manual instance setting
Handled by IP discovery now.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 15:50:23 +0000 (11:50 -0400)]
drm/amdgpu: get VCN and SDMA instances from IP discovery table
Rather than hardcoding it. We already have the number of VCN
instances from a previous patch, so just update the VCN
instances for chips with static tables.
v2: squash in checks for SDMA3,4 (Guchun)
v3: clarify VCN changes
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Guchun Chen [Fri, 3 Sep 2021 10:03:40 +0000 (18:03 +0800)]
drm/amdgpu: add HWID of SDMA instance 2 and 3
They are missed.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 16:18:08 +0000 (12:18 -0400)]
drm/amdgpu: add VCN1 hardware IP
So we can store the VCN IP revision for each instance of VCN.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Guchun Chen [Mon, 9 Aug 2021 07:44:29 +0000 (15:44 +0800)]
drm/amd/display: fix error case handling
Otherwise, we will run into error case path.
v2: fix build when CONFIG_DRM_AMD_DC_DCN is not set
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 21:44:15 +0000 (17:44 -0400)]
drm/amdgpu/soc15: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 21:10:52 +0000 (17:10 -0400)]
drm/amdgpu/vcn2.5: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 21:03:30 +0000 (17:03 -0400)]
drm/amdgpu/amdgpu_vcn: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: squash in fix for navy flounder and sienna cichlid
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 19:26:53 +0000 (15:26 -0400)]
drm/amdgpu/pm/amdgpu_smu: convert more IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: switch if statement to a switch statement
Acked-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 20 Aug 2021 17:51:10 +0000 (13:51 -0400)]
drm/amdgpu/pm/smu_v13.0: convert IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 19:11:18 +0000 (15:11 -0400)]
drm/amdgpu/pm/smu_v11.0: update IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 19:01:33 +0000 (15:01 -0400)]
drm/amdgpu/psp_v13.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 4 Aug 2021 18:55:32 +0000 (14:55 -0400)]
drm/amdgpu/psp_v11.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 16 Sep 2021 20:36:52 +0000 (16:36 -0400)]
drm/amdgpu/amdgpu_psp: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 22:28:35 +0000 (18:28 -0400)]
drm/amdgpu/gfx9.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 22:17:01 +0000 (18:17 -0400)]
drm/amdgpu/hdp4.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 22:09:43 +0000 (18:09 -0400)]
drm/amdgpu/sdma4.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 21:47:14 +0000 (17:47 -0400)]
drm/amdgpu/display/dm: convert RAVEN to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 21:39:01 +0000 (17:39 -0400)]
drm/amdgpu: default to true in amdgpu_device_asic_has_dc_support
We are not going to support any new chips with the old
non-DC code so make it the default.
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 30 Jul 2021 19:50:38 +0000 (15:50 -0400)]
drm/amdgpu: drive all vega asics from the IP discovery table
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 30 Jul 2021 19:30:58 +0000 (15:30 -0400)]
drm/amdgpu/soc15: get rev_id in soc15_common_early_init
for consistency with other SoCs.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 30 Jul 2021 18:51:54 +0000 (14:51 -0400)]
drm/amdgpu: add initial IP discovery support for vega based parts
Hardcode the IP versions for asics without IP discovery tables
and then enumerate the asics based on the IP versions.
TODO: fix SR-IOV support
v2: Squash in HDP fix for Renoir
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 30 Jul 2021 18:50:07 +0000 (14:50 -0400)]
drm/amdgpu/soc15: export common IP functions
So they can be driven by IP discovery table.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 30 Jul 2021 16:44:07 +0000 (12:44 -0400)]
drm/amdgpu: add DCI HWIP
So we can track grab the appropriate DCE info out of the
IP discovery table. This is a separare IP from DCN.
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 29 Sep 2021 18:04:42 +0000 (14:04 -0400)]
drm/amdgpu/display/dm: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: drop unrelated change
Acked-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 28 Jul 2021 15:16:12 +0000 (11:16 -0400)]
drm/amdgpu: drive all navi asics from the IP discovery table
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
v2: rebase
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 28 Jul 2021 16:10:20 +0000 (12:10 -0400)]
drm/amdgpu/nv: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 21:40:58 +0000 (17:40 -0400)]
drm/amdgpu/sienna_cichlid_ppt: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 21:32:55 +0000 (17:32 -0400)]
drm/amdgpu/navi10_ppt: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 21:28:00 +0000 (17:28 -0400)]
drm/amdgpu/smu11.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 16 Sep 2021 20:26:31 +0000 (16:26 -0400)]
drm/amdgpu/amdgpu_smu: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
v3: switch some if statements to switch statements
v4: add yellow carp fix (Yifan)
v5: squash in fixes for YC and GS (Alex)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:45:41 +0000 (16:45 -0400)]
drm/amdgpu/navi10_ih: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:39:42 +0000 (16:39 -0400)]
drm/amdgpu/athub2.1: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:37:18 +0000 (16:37 -0400)]
drm/amdgpu/athub2.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 15:40:48 +0000 (11:40 -0400)]
drm/amdgpu/vcn3.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:23:45 +0000 (16:23 -0400)]
drm/amdgpu/mmhub2.1: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:21:18 +0000 (16:21 -0400)]
drm/amdgpu/mmhub2.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 27 Jul 2021 20:05:41 +0000 (16:05 -0400)]
drm/amdgpu/gfxhub2.1: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 26 Jul 2021 20:49:21 +0000 (16:49 -0400)]
drm/amdgpu: drive nav10 from the IP discovery table
Rather than hardcoding based on asic_type, use the IP
discovery table to configure the driver.
Only tested on Navi10 so far.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 26 Jul 2021 20:46:56 +0000 (16:46 -0400)]
drm/amdgpu: Use IP discovery to drive setting IP blocks by default
Drive the asic setup from the IP discovery table rather than
hardcoded settings based on asic type.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 28 Jul 2021 15:15:01 +0000 (11:15 -0400)]
drm/amdgpu/gmc10.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: squash in gmc fixes
v3: rebase
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 21:18:53 +0000 (17:18 -0400)]
drm/amdgpu: bind to any 0x1002 PCI diplay class device
Bind to all 0x1002 GPU devices.
For now we explicitly return -ENODEV for generic bindings.
Remove this check once IP discovery based checking is in place.
v2: rebase (Alex)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 3 Aug 2021 21:17:10 +0000 (17:17 -0400)]
drm/amdgpu: filter out radeon PCI device IDs
Once we claim all 0x1002 PCI display class devices, we will
need to filter out devices owned by radeon.
v2: rename radeon id array to make it more clear that
the devices are not supported by amdgpu.
add r128, mach64 pci ids as well
Acked-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 28 Jul 2021 15:10:04 +0000 (11:10 -0400)]
drm/amdgpu/gfx10: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase, squash in navi10 fixes (Alex)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 28 Jul 2021 15:06:44 +0000 (11:06 -0400)]
drm/amdgpu/sdma5.2: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 23 Jul 2021 15:56:14 +0000 (11:56 -0400)]
drm/amdgpu/sdma5.0: convert to IP version checking
Use IP versions rather than asic_type to differentiate
IP version specific features.
v2: rebase
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 20 Jul 2021 22:27:19 +0000 (18:27 -0400)]
drm/amdgpu: add initial IP enumeration via IP discovery table
Add initial support for all navi based parts.
v2: rebase
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 26 Jul 2021 19:11:44 +0000 (15:11 -0400)]
drm/amdgpu/nv: export common IP functions
So they can be driven by IP dicovery table.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 26 Jul 2021 19:27:26 +0000 (15:27 -0400)]
drm/amdgpu: add XGMI HWIP
So we can track grab the appropriate XGMI info out of the
IP discovery table.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 20 Jul 2021 20:57:40 +0000 (16:57 -0400)]
drm/amdgpu: fill in IP versions from IP discovery table
Prerequisite for using IP versions in the driver rather
than asic type.
v2: Use IP_VERSION() macro instead of new function
Reviewed-by: Christian König <christian.koenig@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 20 Jul 2021 20:01:41 +0000 (16:01 -0400)]
drm/amdgpu: store HW IP versions in the driver structure
So we can check the IP versions directly rather than using
asic type.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 20 Jul 2021 18:53:37 +0000 (14:53 -0400)]
drm/amdgpu: add debugfs access to the IP discovery table
Useful for debugging and new asic validation.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Mon, 9 Aug 2021 15:37:55 +0000 (11:37 -0400)]
drm/amdgpu: move headless sku check into harvest function
Consolidate harvesting information.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Clements [Wed, 29 Sep 2021 07:06:21 +0000 (15:06 +0800)]
drm/amdgpu: resolve RAS query bug
clear error count when persistant harvesting is not enabled
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 22 Sep 2021 17:17:28 +0000 (13:17 -0400)]
drm/amd/display: Only define DP 2.0 symbols if not already defined
[Why]
For some reason we're defining DP 2.0 definitions inside our
driver. Now that patches to introduce relevant definitions
are slated to be merged into drm-next this is causing conflicts.
In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70:
In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36:
./include/drm/drm_dp_helper.h:1322:9: error: 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-Werror,-Wmacro-redefined]
^
./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note: previous definition is here
^
1 error generated.
[How]
Guard all display driver defines with #ifndef for now. Once we pull
in the new definitions into amd-staging-drm-next we will follow
up and drop definitions from our driver and provide follow-up
header updates for any addition DP 2.0 definitions required
by our driver.
We also ensure drm_dp_helper.h is included before dc_dp_types.h.
v3: Ensure drm_dp_helper.h is included before dc_dp_types.h
v2: Add one missing endif
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tao Zhou [Thu, 23 Sep 2021 06:11:22 +0000 (14:11 +0800)]
amd/amdkfd: add ras page retirement handling for sq/sdma (v3)
In ras poison mode, page retirement will be handled by the irq handler of the
module which consumes corrupted data.
v2: rename ras_process_cb to ras_poison_consumption_handler.
move the handler's implementation from ASIC specific file to common
file.
v3: call gpu reset for xGMI connected mode.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Prike Liang [Wed, 25 Aug 2021 05:36:38 +0000 (13:36 +0800)]
drm/amdgpu: force exit gfxoff on sdma resume for rmb s0ix
In the s2idle stress test sdma resume fail occasionally,in the
failed case GPU is in the gfxoff state.This issue may introduce
by firmware miss handle doorbell S/R and now temporary fix the issue
by forcing exit gfxoff for sdma resume.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zhan Liu [Sat, 25 Sep 2021 07:01:48 +0000 (00:01 -0700)]
drm/amd/display: add cyan_skillfish display support
[Why]
add display related cyan_skillfish files in.
makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag.
v2: squash in clang fixes from Harry, Nathan
v3: squash in missing CONFIG_DRM_AMD_DC check (Alex)
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zhan Liu [Sat, 25 Sep 2021 07:51:08 +0000 (00:51 -0700)]
drm/amdgpu: add cyan_skillfish asic header files
This patch is to add cyan_skillfish asic header files.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Jun Lei <jun.lei@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 24 Aug 2021 20:38:20 +0000 (16:38 -0400)]
drm/amdgpu: Add a UAPI flag for hot plug/unplug
To support libdrm tests.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 24 Aug 2021 20:15:48 +0000 (16:15 -0400)]
drm/amdgpu: drm/amdgpu: Handle IOMMU enabled case
Handle all DMA IOMMU group related dependencies before the
group is removed and we try to access it after free.
v2:
Move the actul handling function to TTM
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ernst Sjöstrand [Sun, 26 Sep 2021 21:27:19 +0000 (23:27 +0200)]
drm/amd/amdgpu: Validate ip discovery blob
We use the number_instance index that we get from the fw discovery blob
to index into an array for example.
Update error messages (Alex)
Signed-off-by: Ernst Sjöstrand <ernstp@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Mon, 27 Sep 2021 12:20:41 +0000 (14:20 +0200)]
gpu: amd: replace open-coded offsetof() with builtin
The two AMD drivers have their own custom offsetof() implementation
that now triggers a warning with recent versions of clang:
drivers/gpu/drm/radeon/radeon_atombios.c:133:14: error: performing pointer subtraction with a null pointer has undefined behavior [-Werror,-Wnull-pointer-subtraction]
Change all the instances to use the normal offsetof() provided
by the kernel that does not have this problem.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yang Li [Sun, 26 Sep 2021 07:16:20 +0000 (15:16 +0800)]
drm/amdkfd: fix resource_size.cocci warnings
Use resource_size function on resource object
instead of explicit computation.
Clean up coccicheck warning:
./drivers/gpu/drm/amd/amdkfd/kfd_migrate.c:905:10-13: ERROR: Missing
resource_size with res
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Reviewed-by: Amos Kong <kongjianjun@gmail.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Arnd Bergmann [Mon, 27 Sep 2021 12:58:10 +0000 (14:58 +0200)]
drm/amdgpu: fix warning for overflow check
The overflow check in amdgpu_bo_list_create() causes a warning with
clang-14 on 64-bit architectures, since the limit can never be
exceeded.
drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:74:18: error: result of comparison of constant
256204778801521549 with expression of type 'unsigned int' is always false [-Werror,-Wtautological-constant-out-of-range-compare]
if (num_entries > (SIZE_MAX - sizeof(struct amdgpu_bo_list))
~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
The check remains useful for 32-bit architectures, so just avoid the
warning by using size_t as the type for the count.
Fixes:
920990cb080a ("drm/amdgpu: allocate the bo_list array after the list")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Simon Ser [Mon, 27 Sep 2021 15:08:44 +0000 (15:08 +0000)]
drm/amdgpu: check tiling flags when creating FB on GFX8-
On GFX9+, format modifiers are always enabled and ensure the
frame-buffers can be scanned out at ADDFB2 time.
On GFX8-, format modifiers are not supported and no other check
is performed. This means ADDFB2 IOCTLs will succeed even if the
tiling isn't supported for scan-out, and will result in garbage
displayed on screen [1].
Fix this by adding a check for tiling flags for GFX8 and older.
The check is taken from radeonsi in Mesa (see how is_displayable
is populated in gfx6_compute_surface).
Changes in v2: use drm_WARN_ONCE instead of drm_WARN (Michel)
[1]: https://github.com/swaywm/wlroots/issues/3185
Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 24 Sep 2021 14:28:31 +0000 (10:28 -0400)]
drm/amd/amdgpu: Add missing mp_11_0_8_sh_mask.h header
The commit
2766534b766e1b12e0fa0a4e2e26929e808fde71 added the offset
header but didn't add the masks. This adds the masks based on what
was selected for the offsets.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Mon, 20 Sep 2021 18:30:02 +0000 (14:30 -0400)]
drm/amd/display: Pass PCI deviceid into DC
[why]
pci deviceid not passed to dal dc, without proper break,
dcn2.x falls into dcn3.x code path
[how]
pass in pci deviceid, and break once dal_version initialized.
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
George Shen [Thu, 16 Sep 2021 23:59:34 +0000 (19:59 -0400)]
drm/amd/display: Update VCP X.Y logging to improve usefulness
[Why]
Recently debugging efforts have involved setting/checking the
X.Y value used during payload allocation. Current output for
Y was calculated with incorrect bitshift. Y value is also not
human readable.
[How]
Refactor logging into separate function. Fix Y calculation error
and format output to be human readable.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
George Shen [Thu, 16 Sep 2021 23:55:39 +0000 (19:55 -0400)]
drm/amd/display: Handle Y carry-over in VCP X.Y calculation
[Why/How]
Theoretically rare corner case where ceil(Y) results in rounding
up to an integer. If this happens, the 1 should be carried over to
the X value.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Fri, 17 Sep 2021 21:03:02 +0000 (17:03 -0400)]
drm/amd/display: make verified link cap not exceeding max link cap
[why]
There is a chance verified link cap can be greater than max link cap.
This causes software hang because we cannot power up PHY with link rate
that cannot handle.
The change is to guard verfieid link cap from becoming larger than max link cap
our PHy can support.
Reviewed-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Josip Pavic [Fri, 17 Sep 2021 15:01:47 +0000 (11:01 -0400)]
drm/amd/display: initialize backlight_ramping_override to false
[Why]
Stack variable params.backlight_ramping_override is uninitialized, so it
contains junk data
[How]
Initialize the variable to false
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Michael Strauss [Thu, 9 Sep 2021 20:33:52 +0000 (16:33 -0400)]
drm/amd/display: Defer LUT memory powerdown until LUT bypass latches
[WHY]
Blnd, 3dlut, and shaper LUT select registers are double buffered, however
their accompanying LUT memory shutdown registers are not. As a result,
shutting down LUT memory immediately after setting a block to bypass causes
corruption as bypass only happens at next Vupdate.
[HOW]
Re-enable mem low power for CM block
Force optimization on next flip and disable LUT memory during optimization
sequence if LUT select field is then set to bypass
v2: squash in CONFIG_DRM_AMD_DC_DCN fix (Alex)
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Qingqing Zhuo [Fri, 17 Sep 2021 06:36:24 +0000 (14:36 +0800)]
drm/amd/display: Replace referral of dal with dc
[Why]
DC should be used in place of DAL in
upstream.
[How]
Replace dal with dc in function names.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Mon, 20 Sep 2021 02:28:17 +0000 (22:28 -0400)]
drm/amd/display: 3.2.155
This version brings along following fixes:
- Fixes to backlight, LUT, PPS, MST
- Use correct vpg for 128b/132b encoding
- Improved logging for VCP
- Replace referral of dal with dc
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Sun, 19 Sep 2021 15:37:16 +0000 (11:37 -0400)]
drm/amd/display: [FW Promotion] Release 0.0.86
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oliver Logush [Tue, 14 Sep 2021 14:05:00 +0000 (10:05 -0400)]
drm/amd/display: Add an extra check for dcn10 OPTC data format
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Oliver Logush <oliver.logush@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Ilya [Wed, 15 Sep 2021 21:37:59 +0000 (17:37 -0400)]
drm/amd/display: Add PPS immediate update flag for DCN2
[Why]
This change is needed for DCN2 to make use of the immediate_update
flag. With this flag, update to PPS will be immediate, rather than
always taking place on dig_update signal.
[How]
Set AFMT_GENERIC7_FRAME/IMMEDIATE_UPDATE bits depending on flag
value.
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Ilya <Ilya.Bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jimmy Kizito [Wed, 15 Sep 2021 19:24:45 +0000 (15:24 -0400)]
drm/amd/display: Fix MST link encoder availability check.
[Why]
MST streams share the same link and should share the same encoder.
The current availability check may erroneously determine that an
encoder is unavailable for MST streams.
[How]
When checking for link encoder availability, check if an encoder
in use shares a link with the stream for which the availability
check is being conducted. If the link is shared, then the link
encoder should be shared too and will be deemed available.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Meenakshikumar Somasundaram [Thu, 2 Sep 2021 18:09:30 +0000 (14:09 -0400)]
drm/amd/display: Fix for link encoder access for MST.
[Why]
Link encoder in the link could be null for certain links.
[How]
If link encoder in the link is null then get the link encoder
from the stream.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Fri, 10 Sep 2021 23:18:29 +0000 (19:18 -0400)]
drm/amd/display: add function to convert hw to dpcd lane settings
[why]
Unify the code which handles the conversion between hw lane setting
and dpcd lane setting.
v2: squash in unused variable fixes (Alex)
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Fri, 10 Sep 2021 22:00:52 +0000 (18:00 -0400)]
drm/amd/display: update cur_lane_setting to an array one for each lane
[why]
To support per lane lane setting adjustment, we need to change cur_lane_setting
to an array one for each lane as the first step.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>