Tom Stellard [Wed, 7 Jul 2021 01:46:21 +0000 (18:46 -0700)]
tests/CodeGen: Use %python lit substitution when invoking python
This will use the python that LLVM was configured to use rather than
python from PATH.
Reviewed By: serge-sans-paille
Differential Revision: https://reviews.llvm.org/D105224
Nemanja Ivanovic [Wed, 7 Jul 2021 00:15:45 +0000 (19:15 -0500)]
[PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX
The combine was disabled in
4e22c7265d86 as it caused failures in
the ppc64be-multistage (bootstrap) bot.
It turns out that the combine did not correctly update the MMO for
the high load which caused aliased stores to be reported as unaliased.
This patch fixes that problem and re-enables the combine.
Matheus Izvekov [Fri, 2 Jul 2021 22:56:16 +0000 (00:56 +0200)]
[clang] fixes named return of variables with dependent alignment
Named return of a variable with aligned attribute would
trip an assert in case alignment was dependent.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D105380
Eli Friedman [Wed, 7 Jul 2021 00:01:40 +0000 (17:01 -0700)]
[AArch64] Add more tests related to vselect with constant condition.
Not a complete set of tests, but a starting point if anyone wants to
look at improving this.
Eli Friedman [Wed, 7 Jul 2021 00:00:07 +0000 (17:00 -0700)]
[AArch64] Sync isDef32 to the current x86 version.
We should probably come up with some better way to do this, but let's
make sure to catch known issues for now.
David Blaikie [Tue, 6 Jul 2021 23:25:45 +0000 (16:25 -0700)]
DebugInfo: Mangle K&R declarations for debug info linkage names
This fixes a gap in the `overloadable` attribute support (K&R declared
functions would get mangled symbol names, but that name wouldn't be
represented in the debug info linkage name field for the function) and
in -funique-internal-linkage-names (this came up in review discussion on
D98799) where K&R static declarations would not get the uniqued linkage
names.
Stanislav Mekhanoshin [Tue, 6 Jul 2021 21:34:28 +0000 (14:34 -0700)]
[AMDGPU] Move atomic expand past infer address spaces
There are cases where infer address spaces pass cannot yet
infer an address space in the opt pipeline and then in the
llc pipeline it runs too late for atomic expand pass to
benefit from a specific address space.
Move atomic expand pass past the infer address spaces.
Fixes: SWDEV-293410
Differential Revision: https://reviews.llvm.org/D105511
Stanislav Mekhanoshin [Tue, 6 Jul 2021 22:10:58 +0000 (15:10 -0700)]
[AMDGPU] Do not run IR optimizations at -O0
Differential Revision: https://reviews.llvm.org/D105515
Stanislav Mekhanoshin [Tue, 6 Jul 2021 21:58:42 +0000 (14:58 -0700)]
[AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.
This was obviously copy-pasted.
Tony Tye [Fri, 2 Jul 2021 22:10:17 +0000 (22:10 +0000)]
[NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture
Reviewed By: kzhuravl
Differential Revision: https://reviews.llvm.org/D105377
Krzysztof Parzyszek [Fri, 25 Jun 2021 14:30:59 +0000 (09:30 -0500)]
[Hexagon] Generate trap/undef if misaligned access is detected
This applies to memory accesses to (compile-time) constant addresses
(such as memory-mapped registers). Currently when a misaligned access
to such an address is detected, a fatal error is reported. This change
will emit a remark, and the compilation will continue with a trap,
and "undef" (for loads) emitted.
This fixes https://llvm.org/PR50838.
Differential Revision: https://reviews.llvm.org/D50524
Nico Weber [Tue, 6 Jul 2021 13:30:20 +0000 (09:30 -0400)]
[lld/mac] Give several LTO tests an "lto-" prefix
Differential Revision: https://reviews.llvm.org/D105476
Eli Friedman [Tue, 6 Jul 2021 18:25:49 +0000 (11:25 -0700)]
Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.
There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.
The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.
As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base. This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.
This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes). The resulting changes
seem okay to me, but suggestions welcome. As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.
I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.
Recommitting with fix to MemoryDepChecker::isDependent.
Differential Revision: https://reviews.llvm.org/D104806
Louis Dionne [Tue, 6 Jul 2021 16:33:28 +0000 (12:33 -0400)]
[libc++] Do not set CMAKE_BUILD_WITH_INSTALL_NAME_DIR
I'm not sure what that gains us, and it creates a problem when
trying to run the tests against libc++ with a custom install name
dir (e.g. /usr/lib), since the library that we link against (in
the build tree) will advertise itself as /usr/lib/libc++.dylib,
so we end up linking against the system dylib at runtime.
Differential Revision: https://reviews.llvm.org/D105499
Louis Dionne [Tue, 6 Jul 2021 18:45:41 +0000 (14:45 -0400)]
[libc++] NFC: Sort header lists and remove outdated comments in modulemap
Craig Topper [Tue, 6 Jul 2021 17:25:37 +0000 (10:25 -0700)]
[RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno
These are fp->int conversions using either RMM or dynamic rounding modes.
The lround and lrint opcodes have a return type of either i32 or
i64 depending on sizeof(long) in the frontend which should follow
xlen. llround/llrint should always return i64 so we'll need a libcall
for those on rv32.
The frontend will only emit the intrinsics if -fno-math-errno is in
effect otherwise a libcall will be emitted which will not use
these ISD opcodes.
gcc also does this optimization.
Reviewed By: arcbbb
Differential Revision: https://reviews.llvm.org/D105206
Michał Górny [Tue, 6 Jul 2021 16:10:50 +0000 (18:10 +0200)]
[compiler-rt] [test] Fix asan symbolize tests on py3.10
Update the asan_symbolize_script for changes in argparse output
in Python 3.10. The parser output 'options' instead of 'optional
arguments'.
Differential Revision: https://reviews.llvm.org/D105489
Michał Górny [Tue, 6 Jul 2021 11:58:26 +0000 (13:58 +0200)]
[openmp] [test] Add missing <limits> include to capacity_nthreads
Differential Revision: https://reviews.llvm.org/D105474
David Green [Tue, 6 Jul 2021 18:23:52 +0000 (19:23 +0100)]
[Tests] Update some tests for D104765. NFC
LLVM GN Syncbot [Tue, 6 Jul 2021 18:17:43 +0000 (18:17 +0000)]
[gn build] Port
8517a26d442f
Eli Friedman [Tue, 6 Jul 2021 18:16:01 +0000 (11:16 -0700)]
Revert "[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers."
This reverts commit
74d6ce5d5f169e9cf3fac0eb1042602e286dd2b9.
Seeing crashes on buildbots in MemoryDepChecker::isDependent.
Jake Egan [Tue, 6 Jul 2021 18:15:10 +0000 (14:15 -0400)]
[AIX] Define __TOS_AIX__ predefined macro
%%%
Transfer the predefined macro, __TOS_AIX__, from the AIX XL C/C++ compilers.
__TOS_AIX__ indicates that the target operating system is AIX.
%%%
Reviewed By: cebowleratibm
Differential Revision: https://reviews.llvm.org/D103587
Louis Dionne [Tue, 6 Jul 2021 14:39:01 +0000 (10:39 -0400)]
[libc++][docs] Overhaul the documentation for building and using libc++
This patch overhauls the documentation around building libc++
for vendors, and using libc++ for end-users. It also:
- Removes mention of the standalone build, which we've been trying to
get rid of for a long time.
- Removes mention of using a local ABI installation, which we don't do
and is documented as "not recommended".
- Removes mention of the separate libc++filesystem.a library, which isn't
relevant anymore since filesystem support is in the main library.
- Adds mention of the GDB pretty printers and how to use them.
Fangrui Song [Tue, 6 Jul 2021 18:08:47 +0000 (11:08 -0700)]
[profile][test] Improve coverage-linkage.cpp with ld.lld --gc-sections
The __llvm_prf_names section uses SHF_GNU_RETAIN. However, GNU ld before 2015-10
(https://sourceware.org/bugzilla/show_bug.cgi?id=19161) neither supports it nor
retains __llvm_prf_names according to __start___llvm_prf_names. So --gc-sections
does not work on such old GNU ld.
This is not a problem for gold and sufficiently new lld.
Sanjay Patel [Tue, 6 Jul 2021 17:23:43 +0000 (13:23 -0400)]
[InstSimplify] fix bug in poison propagation for FP ops
If any operand of a math op is poison, that takes
precedence over general undef/NaN.
This should not be visible with binary ops because
it requires 2 constant operands to trigger (and if
both operands of a binop are constant, that should
get handled first in ConstantFolding).
Sanjay Patel [Tue, 6 Jul 2021 16:28:21 +0000 (12:28 -0400)]
[InstSimplify][test] add tests for poison propagation through FP calls; NFC
Christopher Di Bella [Tue, 29 Jun 2021 02:32:59 +0000 (02:32 +0000)]
[libcxx][modularisation] splices `<iterator>` into individual headers
Differential Revision: https://reviews.llvm.org/D105076
Philip Reames [Tue, 6 Jul 2021 17:49:13 +0000 (10:49 -0700)]
[LV] Disable epilogue vectorization for non-latch exits
When skimming through old review discussion, I noticed a post commit comment on an earlier patch which had gone unaddressed. Better late (4 months), than never right?
I'm not aware of an active problem with the combination of non-latch exits and epilogue vectorization, but the interaction was not considered and I'm not modivated to make epilogue vectorization work with early exits. If there were a bug in the interaction, it would be pretty hard to hit right now (as we canonicalize towards bottom tested loops), but an upcoming change to allow multiple exit loops will greatly increase the chance for error. Thus, let's play it safe for now.
Philip Reames [Tue, 6 Jul 2021 15:11:11 +0000 (08:11 -0700)]
[LoopVersion] Move an assert [nfc-ish]
Eli Friedman [Tue, 6 Jul 2021 17:54:41 +0000 (10:54 -0700)]
[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.
There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.
The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.
As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base. This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.
This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes). The resulting changes
seem okay to me, but suggestions welcome. As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.
I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.
Differential Revision: https://reviews.llvm.org/D104806
Jonas Paulsson [Tue, 6 Jul 2021 17:14:47 +0000 (19:14 +0200)]
[SystemZ] Support the 'N' code for the odd register in inline-asm.
The odd register of a (128 bit) register pair is accessed with the 'N' code
with an inline assembly operand.
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D105502
Jeremy Morse [Wed, 2 Jun 2021 14:14:37 +0000 (15:14 +0100)]
[DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations
This patch emits DBG_INSTR_REFs for two remaining flavours of variable
locations that weren't supported: copies, and inter-block VRegs. There are
still some locations that must be represented by DBG_VALUE such as
constants, but they're mostly independent of optimisations.
For variable locations that refer to values defined in different blocks,
vregs are allocated before isel begins, but the defining instruction
might not exist until late in isel. To get around this, emit
DBG_INSTR_REFs in a "half done" state, where the first operand refers to a
VReg. Then at the end of isel, patch these back up to refer to
instructions, using the finalizeDebugInstrRefs method.
Copies are something that I complained about the original RFC, and I
really don't want to have to put instruction numbers on copies. They don't
define a value: they move them. To address this isel, salvageCopySSA
interprets:
* COPYs,
* SUBREG_TO_REG,
* Anything that isCopyInstr thinks is a copy.
And follows chains of copies back to the defining instruction that they
read from. This relies on any physical registers that COPYs read being
defined in the same block, or being entry-block arguments. For the former
we can put an instruction number on the defining instruction; for the
latter we can drop a DBG_PHI that reads the incoming value.
Differential Revision: https://reviews.llvm.org/D88896
Craig Topper [Tue, 6 Jul 2021 16:55:57 +0000 (09:55 -0700)]
[RISCV] Add support for matching vwmul(u) and vwmacc(u) from fixed vectors.
This adds a DAG combine to detect sext/zext inputs and emit a
new ISD opcode. The extends will either be removed or replaced
with narrower extends.
Isel patterns are used to match add and widening mul to vwmacc
similar to the recently added vmacc patterns.
There's still some work to be to match vmulsu.
We should also rewrite splats that were extended as scalars and
then splatted.
Reviewed By: arcbbb
Differential Revision: https://reviews.llvm.org/D104802
Arnold Schwaighofer [Thu, 1 Apr 2021 22:51:56 +0000 (15:51 -0700)]
Fix coro lowering of single predecessor phis
Code assumes that uses of single predecessor phis are not live accross
suspend points. Cleanup any single predecessor phis preceeding the code
making this assumption.
rdar://
76020301
Differential Revision: https://reviews.llvm.org/D105488
Simon Pilgrim [Tue, 6 Jul 2021 16:27:46 +0000 (17:27 +0100)]
[CostModel][X86] fptosi/fptoui to i8/i16 are truncated from fptosi to i32
Provide a generic fallback that performs the fptosi to i32 types, then truncates to sub-i32 scalars.
These numbers can be tweaked for specific sse levels, but we should get the default handling in place first.
ShihPo Hung [Sat, 3 Jul 2021 18:17:40 +0000 (02:17 +0800)]
[RISCV] Remove Zvamo implication for v1.0-rc change
As v1.0-rc specs say Zvamo is removed from standard extension,
Zvamo has to be specified explicitly.
Reviewed By: evandro
Differential Revision: https://reviews.llvm.org/D105396
Jonas Paulsson [Sat, 5 Jun 2021 00:32:03 +0000 (19:32 -0500)]
[SystemZ] Generate XC loop for memset 0 of variable length.
Benchmarking has shown that it is worthwhile to implement a variable length
memset of 0 with XC (exclusive or) like gcc does, instead of using a libcall.
This requires the use of the EXecute Relative Long (EXRL) instruction which
can now be done in a framework that can also be used with other target
instructions (not just XC).
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D103865
Jon Chesterfield [Tue, 6 Jul 2021 16:06:36 +0000 (17:06 +0100)]
[libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global
[libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global
Folds some duplicates logic into a helper function, passes the new environment
struct into getLaunchVals which no longer reads the DeviceInfo global.
Implemented on top of D105237
Reviewed By: dhruvachak
Differential Revision: https://reviews.llvm.org/D105239
Alexey Bataev [Mon, 28 Jun 2021 14:22:27 +0000 (07:22 -0700)]
[SLP]Fix non-determinism in PHI sorting.
Compare type IDs and DFS numbering for basic block instead of addresses
to fix non-determinism.
Differential Revision: https://reviews.llvm.org/D105031
Arnold Schwaighofer [Tue, 6 Jul 2021 14:55:58 +0000 (07:55 -0700)]
Use swift mangling for resume functions
The resume partial functions generated for swift suspend points will now
use a Swift mangling suffix.
Await resume partial functions will use the suffix 'TQ'[0-9]+'_' (e.g "...TQ0_")
and suspend resume partial functions will use the suffix 'TY'[0-9]+'_'
(e.g "...TY1_").
Reviewed By: nate_chandler
Differential Revision: https://reviews.llvm.org/D104144
Nico Weber [Tue, 6 Jul 2021 04:25:01 +0000 (00:25 -0400)]
[lld/mac] Partially implement -export_dynamic
This implements the part of -export_dynamic that adds external
symbols as dead strip roots even for executables.
It does not yet implement the effect -export_dynamic has for LTO.
I tried just replacing `config->outputType != MH_EXECUTE` with
`(config->outputType != MH_EXECUTE || config->exportDynamic)` in
LTO.cpp, but then local symbols make it into the symbol table too,
which is too much (and also doesn't match ld64). So punt on this
for now until I understand it better.
(D91583 may or may not be related too).
Differential Revision: https://reviews.llvm.org/D105482
Bradley Smith [Thu, 1 Jul 2021 16:48:24 +0000 (16:48 +0000)]
[AArch64][SVE] Fix selection failures for scalable MLOAD nodes with passthru
Differential Revision: https://reviews.llvm.org/D105348
Louis Dionne [Tue, 6 Jul 2021 14:04:54 +0000 (10:04 -0400)]
[libc++] NFC: Remove outdated link to TS status
Louis Dionne [Tue, 6 Jul 2021 13:46:29 +0000 (09:46 -0400)]
[libc++] NFC: Move the status docs to their own subdirectory
This cleans up the libcxx/doc directory quite a bit and will avoid the
proliferation of status files in that directory as new standards are voted.
Florian Hahn [Tue, 6 Jul 2021 12:08:28 +0000 (13:08 +0100)]
Recommit "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups.
This reverts commit
706bbfb35bd31051e46ac77aab3e9b2dbc3abe78.
The committed version moves the definition of VPReductionPHIRecipe out
of an ifdef only intended for ::print helpers. This should resolve the
build failures that caused the revert
Simon Pilgrim [Tue, 6 Jul 2021 12:58:38 +0000 (13:58 +0100)]
[CostModel][X86] i8/i16 sitofp/uitofp are sext/zext to i32 for sitofp
Provide a generic fallback that extends sub-i32 scalars before using the existing sitofp instructions.
These numbers can be tweaked for specific sse levels, but we should get the default handling in place first.
We get the extension for free for non-vector loads.
Nico Weber [Tue, 6 Jul 2021 12:49:43 +0000 (08:49 -0400)]
Revert "[profile][test] Improve coverage-linkage.cpp"
This reverts commit
36ba86fe8a29cdf3251b786db7f342efde666cb2.
Fails on some bots, see comments on
https://reviews.llvm.org/rG36ba86fe8a29cdf3251b786db7f342efde666cb2
Louis Dionne [Mon, 5 Jul 2021 16:27:14 +0000 (12:27 -0400)]
[runtimes] Move enable_32bit to the DSL
This is necessary for from-scratch configurations to support the 32-bit
mode of the test suite.
Differential Revision: https://reviews.llvm.org/D105435
Kerry McLaughlin [Tue, 6 Jul 2021 09:49:43 +0000 (10:49 +0100)]
[LV] Prevent vectorization with unsupported element types.
This patch adds a TTI function, isElementTypeLegalForScalableVector, to query
whether it is possible to vectorize a given element type. This is called by
isLegalToVectorizeInstTypesForScalable to reject scalable vectorization if
any of the instruction types in the loop are unsupported, e.g:
int foo(__int128_t* ptr, int N)
#pragma clang loop vectorize_width(4, scalable)
for (int i=0; i<N; ++i)
ptr[i] = ptr[i] + 42;
This example currently crashes if we attempt to vectorize since i128 is not a
supported type for scalable vectorization.
Reviewed By: sdesmalen, david-arm
Differential Revision: https://reviews.llvm.org/D102253
Peter Waller [Wed, 26 May 2021 14:18:27 +0000 (14:18 +0000)]
[CodeGen][AArch64][SVE] Use ld1r[bhsd] for vector splat from memory
This avoids the use of the vector unit for copying from scalar to
vector. There is an extra ptrue instruction, but a predicate register
with the ptrue pattern populated is likely to be free in the context of
real code.
Tests were generated from a template to cover the axes mentioned at the
top of the test file.
Co-authored-by: Francesco Petrogalli <francesco.petrogalli@arm.com>
Differential Revision: https://reviews.llvm.org/D103170
Florian Mayer [Wed, 30 Jun 2021 14:47:53 +0000 (15:47 +0100)]
[hwasan] Fix incorrect candidate matching for stack OOB.
We would find an address with matching tag, only to discover in
ShowCandidate that it's very far away from [stack].
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D105197
Florian Hahn [Tue, 6 Jul 2021 11:06:54 +0000 (12:06 +0100)]
Revert "[VPlan] Add VPReductionPHIRecipe (NFC)." and follow-ups
This reverts commit
3fed6d443f802c43aade1b5b1b09f5e2f8b3edb1,
bbcbf21ae60c928e07dde6a1c468763b3209d1e6 and
6c3451cd76cbd0cd973d9c2b08b168dcd0bce3c2.
The changes causing build failures with certain configurations, e.g.
https://lab.llvm.org/buildbot/#/builders/67/builds/3365/steps/6/logs/stdio
lib/libLLVMVectorize.a(LoopVectorize.cpp.o): In function `llvm::VPRecipeBuilder::tryToCreateWidenRecipe(llvm::Instruction*, llvm::ArrayRef<llvm::VPValue*>, llvm::VFRange&, std::unique_ptr<llvm::VPlan, std::default_delete<llvm::VPlan> >&) [clone .localalias.8]':
LoopVectorize.cpp:(.text._ZN4llvm15VPRecipeBuilder22tryToCreateWidenRecipeEPNS_11InstructionENS_8ArrayRefIPNS_7VPValueEEERNS_7VFRangeERSt10unique_ptrINS_5VPlanESt14default_deleteISA_EE+0x63b): undefined reference to `vtable for llvm::VPReductionPHIRecipe'
collect2: error: ld returned 1 exit status
Florian Hahn [Tue, 6 Jul 2021 10:59:33 +0000 (11:59 +0100)]
[VPlan] Mark overriden function in VPWidenPHIRecipe as virtual.
VPReductionRecipe overrides those implementations. Mark them as virtual
in the VPWidenPHIRecipe to unbreak build in certain configurations.
Florian Hahn [Tue, 6 Jul 2021 10:39:44 +0000 (11:39 +0100)]
[VPlan] Add destructor to VPReductionRecipe to unbreak build.
Attempt to unbreak
https://lab.llvm.org/buildbot/#/builders/67/builds/3363/steps/6/logs/stdio
Jay Foad [Tue, 6 Jul 2021 10:24:06 +0000 (11:24 +0100)]
[AMDGPU] Remove outdated comment and tidy up. NFC.
This was left over from D94746.
Florian Hahn [Tue, 6 Jul 2021 06:09:54 +0000 (07:09 +0100)]
[VPlan] Add VPReductionPHIRecipe (NFC).
This patch is a first step towards splitting up VPWidenPHIRecipe into
separate recipes for the 3 distinct cases they model:
1. reduction phis,
2. first-order recurrence phis,
3. pointer induction phis.
This allows untangling the code generation and allows us to reduce the
reliance on LoopVectorizationCostModel during VPlan code generation.
Discussed/suggested in D100102, D100113, D104197.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D104989
Florian Mayer [Mon, 28 Jun 2021 13:49:19 +0000 (14:49 +0100)]
[hwasan] Check for overflow when searching candidates.
If the fault address is at the boundary of memory regions, this could
cause us to segfault otherwise.
Ran test with old compiler_rt to make sure it fails.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D105032
Sebastian Neubauer [Tue, 29 Jun 2021 09:22:25 +0000 (11:22 +0200)]
[AMDGPU] Set optional PAL metadata
Set informational fields in the .shader_functions table.
Also correct the documentation, .scratch_memory_size and .lds_size are
integers.
Differential Revision: https://reviews.llvm.org/D105116
Uday Bondhugula [Sat, 3 Jul 2021 16:07:00 +0000 (21:37 +0530)]
[MLIR] Fix dialect conversion cancelRootUpdate
Fix dialect conversion ConversionPatternRewriter::cancelRootUpdate: the
erasure of operations here from the list of root update was off by one.
Should have been:
```
rootUpdates.erase(rootUpdates.begin() + (rootUpdates.rend() - it - 1));
```
instead of
```
rootUpdates.erase(rootUpdates.begin() + (rootUpdates.rend() - it));
```
or more directly:
```
rootUpdates.erase(it.base() - 1)
```
While on this, add an assertion to improve dev experience when a cancel is
called on an op on which a root update hasn't been started.
Differential Revision: https://reviews.llvm.org/D105397
Kerry McLaughlin [Tue, 6 Jul 2021 08:48:21 +0000 (09:48 +0100)]
[LV] Collect a list of all element types found in the loop (NFC)
Splits `getSmallestAndWidestTypes` into two functions, one of which now collects
a list of all element types found in the loop (`ElementTypesInLoop`). This ensures we do not
have to iterate over all instructions in the loop again in other places, such as in D102253
which disables scalable vectorization of a loop if any of the instructions use invalid types.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D105437
patacca [Tue, 6 Jul 2021 09:20:18 +0000 (11:20 +0200)]
[Polly][Isl] Use isl::set::tuple_dim, isl::map::domain_tuple_dim and isl::map::range_tuple_dim. NFC
This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.
Changes made:
- Use `isl::set::tuple_dim` instead of `isl::set::dim` and `isl::set::n_dim`
- Use `isl::map::domain_tuple_dim` instead of `isl::map::dim`
- Use `isl::map::range_tuple_dim` instead of `isl::map::dim`
- isl-noexceptions.h has been generated by this https://github.com/patacca/isl/commit/
45576e1b4260f91946e4cf819485f57bd2ed5490
Note that not all the usage of `isl::{set,map}::dim` where replaced
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D104994
Adrian Kuegel [Tue, 6 Jul 2021 08:31:39 +0000 (10:31 +0200)]
Revert "[clang] fixes named return of variables with dependent alignment"
This reverts commit
21106388eb96c87b3f580c42a322c76a61605261.
It causes a segfault in certain cases.
Raphael Isemann [Tue, 6 Jul 2021 08:14:32 +0000 (10:14 +0200)]
[lldb][docs] Fix reference warnings in python-reference.rst
References with a single '`' around them are interpreted as references instead
of text with monospaced font since the introduction of the new Python API
generator. This meant that all the single-quoted code in this document that
doesn't reference any Python class was throwing sphinx errors. This just adds
the neede extra ` around this code and fixed up the legitimate typos
(e.g. `SBframe` -> `SBFrame`).
Valeriy Savchenko [Thu, 1 Jul 2021 09:51:52 +0000 (12:51 +0300)]
[analyzer][solver] Use all sources of constraints
Prior to this patch, we always gave priority to constraints that we
actually know about symbols in question. However, these can get
outdated and we can get better results if we look at all possible
sources of knowledge, including sub-expressions.
Differential Revision: https://reviews.llvm.org/D105436
Nico Weber [Tue, 6 Jul 2021 00:52:09 +0000 (20:52 -0400)]
[lld/mac] Implement -arch_multiple
This is the other flag clang passes when calling clang with two -arch
flags (which means with this, `clang -arch x86_64 -arch arm64 -fuse-ld=lld ...`
now no longer prints any warnings \o/). Since clang calls the linker several
times in that setup, it's not clear to the user from which invocation the
errors are. The flag's help text is
Specifies that the linker should augment error and warning messages
with the architecture name.
In ld64, the only effect of the flag is that undefined symbols are prefaced
with
Undefined symbols for architecture x86_64:
instead of the usual "Undefined symbols:". So for now, let's add this
only to undefined symbol errors too. That's probably the most common
linker diagnostic.
Another idea would be to prefix errors and warnings with "ld64.lld(x86_64):"
instead of the usual "ld64.lld:", but I'm not sure if people would
misunderstand that as a comment about the arch of ld itself.
But open to suggestions on what effect this flag should have :) And we
don't have to get it perfect now, we can iterate on it.
Differential Revision: https://reviews.llvm.org/D105450
Albion Fung [Tue, 6 Jul 2021 03:20:14 +0000 (22:20 -0500)]
[PowerPC] Removed a test case meant for a later patch
A test case meant for a later patch was accidentally
included.
Original Patch: https://reviews.llvm.org/D105236
Differential revision: https://reviews.llvm.org/D105454
Albion Fung [Tue, 6 Jul 2021 02:34:37 +0000 (21:34 -0500)]
[PowerPC] Implament Load and Reserve and Store Conditional Builtins
This patch implaments the load and reserve and store conditional
builtins for the PowerPC target, in order to have feature parody with
xlC on AIX.
Differential revision: https://reviews.llvm.org/D105236
Matheus Izvekov [Fri, 2 Jul 2021 22:56:16 +0000 (00:56 +0200)]
[clang] fixes named return of variables with dependent alignment
Named return of a variable with aligned attribute would
trip an assert in case alignment was dependent.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D105380
Nico Weber [Mon, 5 Jul 2021 23:46:09 +0000 (19:46 -0400)]
[lld/mac] Implement -final_output
This is one of two flags clang passes to the linker when giving calling
clang with multiple -arch flags.
I think it'd make sense to also use finalOutput instead of outputFile
in CodeSignatureSection() and when replacing @executable_path, but
ld64 doesn't do that, so I'll at least put those in separate commits.
Differential Revision: https://reviews.llvm.org/D105449
Nico Weber [Mon, 5 Jul 2021 18:40:52 +0000 (14:40 -0400)]
[lld/mac] Implement -umbrella
I think this is an old way for doing what is done with
-reexport_library these days, but it's e.g. still used in libunwind's
build (the opensource.apple.com one, not the llvm one).
Differential Revision: https://reviews.llvm.org/D105448
Jez Ng [Tue, 6 Jul 2021 00:00:09 +0000 (20:00 -0400)]
[lld-macho] Only emit one BIND_OPCODE_SET_SYMBOL per symbol
Size-wise, BIND_OPCODE_SET_SYMBOL_TRAILING_FLAGS_IMM is the most
expensive opcode, since it comes with an associated symbol string. We
were previously emitting it once per binding, instead of once per
symbol. This diff groups all bindings for a given symbol together and
ensures we only emit one such opcode per symbol. This matches ld64's
behavior.
While this is a relatively small win on chromium_framework (-72KiB), for
programs that have more dynamic bindings, the difference can be quite
large.
This change is perf-neutral when linking chromium_framework.
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D105075
Steven Wan [Mon, 5 Jul 2021 23:51:00 +0000 (19:51 -0400)]
[clang] unbreak Index/preamble-reparse-changed-module.m with LLVM_APPEND_VC_REV=NO after 9964b0e
See revision b8b7a9d for prior art.
Christopher Di Bella [Sun, 4 Jul 2021 02:20:10 +0000 (02:20 +0000)]
[compiler-rt][iwyu] explicitly includes `<new>` in xray_utils.cpp
Compiling compiler-rt with Clang modules and libc++ revealed that the
global `operator new` is being called without including `<new>`.
Differential Revision: https://reviews.llvm.org/D105401
David Tenty [Mon, 5 Jul 2021 21:35:23 +0000 (17:35 -0400)]
[clang] Add -fdump-record-layouts-canonical option
This option implies -fdump-record-layouts but dumps record layout information with canonical field types, which can be more useful in certain cases when comparing structure layouts.
Reviewed By: stevewan
Differential Revision: https://reviews.llvm.org/D105112
Benjamin Kramer [Mon, 5 Jul 2021 20:39:42 +0000 (22:39 +0200)]
Benjamin Kramer [Mon, 5 Jul 2021 20:39:10 +0000 (22:39 +0200)]
Jake Egan [Mon, 5 Jul 2021 20:27:23 +0000 (16:27 -0400)]
[AIX] Add _AIX73 version macro
This patch defines _AIX73 version macro for AIX 7.3.
It extends the following patch https://reviews.llvm.org/D61530.
Reviewed By: xgupta
Differential Revision: https://reviews.llvm.org/D105185
David Green [Mon, 5 Jul 2021 20:06:30 +0000 (21:06 +0100)]
[ARM] Fix arm.mve.pred.v2i range upper limit
The range metadata specifies a half open range, so our top limit was one
off.
Fangrui Song [Mon, 5 Jul 2021 19:46:06 +0000 (12:46 -0700)]
[profile][test] Improve coverage-linkage.cpp
Akira Hatanaka [Mon, 5 Jul 2021 19:16:15 +0000 (12:16 -0700)]
[ObjC][ARC] Prevent moving objc_retain calls past objc_release calls
that release the retained object
This patch fixes what looks like a longstanding bug in ARC optimizer
where it reverses the order of objc_retain calls and objc_release calls
that retain and release the same object.
The code in ARC optimizer that is responsible for code motion takes the
following steps:
1. Traverse the CFG bottom-up and determine how far up objc_release
calls can be moved. Determine the insertion points for the
objc_release calls, but don't actually move them.
2. Traverse the CFG top-down and determine how far down objc_retain
calls can be moved. Determine the insertion points for the
objc_retain calls, but don't actually move them.
3. Try to move the objc_retain and objc_release calls if they can't be
removed.
The problem is that the insertion points for the objc_retain calls are
determined in step 2 without taking into consideration the insertion
points for objc_release calls determined in step 1, so the order of an
objc_retain call and an objc_release call can be reversed, which is
incorrect, even though each step is correct in isolation.
To fix this bug, this patch teaches the top-down traversal step to take
into consideration the insertion points for objc_release calls
determined in the bottom-up traversal step. Code motion for an
objc_retain call is disabled if there is a possibility that it can be
moved past an objc_release call that releases the retained object.
rdar://
79292791
Differential Revision: https://reviews.llvm.org/D104953
Louis Dionne [Mon, 5 Jul 2021 18:58:26 +0000 (14:58 -0400)]
[libc++] NFC: Sort header lists in test scripts
Nico Weber [Mon, 5 Jul 2021 18:43:05 +0000 (14:43 -0400)]
[gn build] (manually) port
98f078324fc5 (llvm-strings Opts.td)
Sushma Unnibhavi [Mon, 5 Jul 2021 18:39:09 +0000 (11:39 -0700)]
[M68k][GloballSel] Lower outgoing return values in IRTranslator
Implementation of lowerReturn in the IRTranslator for the M68k backend.
Differential Revision: https://reviews.llvm.org/D105332
Fangrui Song [Mon, 5 Jul 2021 17:46:17 +0000 (10:46 -0700)]
[llvm-strings] Switch command line parsing from llvm::cl to OptTable
Some behavior changes:
* `-t=d` is removed. Use `-t d` instead.
* one-dash long options like `-all` are supported. Use `--all` instead.
* `--all=0` or `--all=false` cannot be used. (Note: `--all` is silently ignored anyway)
* `--help-list` is removed. This is a `cl::` specific option.
Nobody is likely leveraging any of the above.
Advantages:
* `-t` diagnostic gets improved.
* in the absence of `HideUnrelatedOptions`, `--help` will not list unrelated options if linking against libLLVM-13git.so or linker GC is not used.
* Decrease the probability of cl::opt collision if we do decide to support multiplexing
Note: because the tool is so simple, used more for forensics instead of a building
tool, and its long options are unlikely used in one-dash form, I just drop the
one-dash form in this patch.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D104889
Uday Bondhugula [Mon, 28 Jun 2021 19:39:51 +0000 (01:09 +0530)]
[MLIR] Fix memref get constant bound size and shape method
Fix FlatAffineConstraints::getConstantBoundOnDimSize to ensure that
returned bounds on dim size are always non-negative regardless of the
constraints on that dimension. Add an assertion at the user.
Differential Revision: https://reviews.llvm.org/D105171
Akira Hatanaka [Mon, 5 Jul 2021 17:12:16 +0000 (10:12 -0700)]
Precommit another test for https://reviews.llvm.org/D104953
Tiehu Zhang [Mon, 5 Jul 2021 16:12:37 +0000 (00:12 +0800)]
[AArch64ISelDAGToDAG] Fix ORRWrs/ORRXrs usefulbits calculation bug
For the following case:
t8: i32 = or t7, t4
t10: i32 = ORRWrs t8, t8, TargetConstant:i32<73>
Current code wrongly returns (t8 >> shiftConstant) as the
UsefulBits of t8, which in fact is (t8 | (t8 >> shiftConstant)).
Reviewed by: sdesmalen, mdchen
Differential Revision: https://reviews.llvm.org/D102759
Paul Walker [Mon, 5 Jul 2021 15:02:25 +0000 (16:02 +0100)]
Fix typo in help text for -aarch64-enable-branch-targets.
Marius Brehler [Mon, 5 Jul 2021 15:01:12 +0000 (15:01 +0000)]
[mlir] Unbreak building mlir-reduce
Unbreaks building mlir-reduce when `DLLVM_INCLUDE_TESTS` is set to OFF.
The dependency MLIRTestDialect is only available if building with tests.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D105434
Anirudh Prasad [Mon, 5 Jul 2021 15:06:38 +0000 (11:06 -0400)]
[MCParser][z/OS] Mark a few tests as unsupported for the z/OS Target
- Background here is that that these sets of tests are "invalid" to be run on z/OS
- The reason is because these test constructs that HLASM never supports (HLASM doesn't support GNU style directives)
- Usually tests are geared towards a particular target via the use of a triple that targets just that platform, but these tests require the use of a "default triple"
- Thus, we mark these tests as "UNSUPPORTED" for z/OS since we don't want to run these for z/OS
Reviewed By: yusra.syeda, abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D105204
Florian Hahn [Mon, 5 Jul 2021 14:56:03 +0000 (15:56 +0100)]
[LV] Extend FIXME in test add in
91ee1e379901af3.
Florian Hahn [Thu, 1 Jul 2021 16:39:31 +0000 (17:39 +0100)]
[LV] Add initial test cases with small clamped indices.
Simon Camphausen [Mon, 5 Jul 2021 14:39:28 +0000 (16:39 +0200)]
[mlir] Change custom syntax of emitc.include op to resemble C
This changes the custom syntax of the emitc.include operation for standard includes.
Reviewed By: marbre
Differential Revision: https://reviews.llvm.org/D105281
Louis Dionne [Mon, 5 Jul 2021 14:25:26 +0000 (10:25 -0400)]
[libc++] NFC: Add note about how the libcxx website gets updated
Sanjay Patel [Mon, 5 Jul 2021 13:57:39 +0000 (09:57 -0400)]
[InstCombine] fold icmp slt/sgt of offset value with constant
This follows up patches for the unsigned siblings:
0c400e895306
c7b658aeb526
We are translating an offset signed compare to its
unsigned equivalent when one end of the range is
at the limit (zero or unsigned max).
(X + C2) >s C --> X <u (SMAX - C) (if C == C2 - 1)
(X + C2) <s C --> X >u (C ^ SMAX) (if C == C2)
This probably does not show up much in IR derived
from C/C++ source because that would likely have
'nsw', and we have folds for that already.
As with the previous unsigned transforms, the folds
could be generalized to handle non-constant patterns:
https://alive2.llvm.org/ce/z/Y8Xrrm
; sgt
define i1 @src(i8 %a, i8 %c) {
%c2 = add i8 %c, 1
%t = add i8 %a, %c2
%ov = icmp sgt i8 %t, %c
ret i1 %ov
}
define i1 @tgt(i8 %a, i8 %c) {
%c_off = sub i8 127, %c ; SMAX
%ov = icmp ult i8 %a, %c_off
ret i1 %ov
}
https://alive2.llvm.org/ce/z/c8uhnk
; slt
define i1 @src(i8 %a, i8 %c) {
%t = add i8 %a, %c
%ov = icmp slt i8 %t, %c
ret i1 %ov
}
define i1 @tgt(i8 %a, i8 %c) {
%c_offnot = xor i8 %c, 127 ; SMAX
%ov = icmp ugt i8 %a, %c_offnot
ret i1 %ov
}
Sanjay Patel [Mon, 5 Jul 2021 13:13:38 +0000 (09:13 -0400)]
[InstCombine][tests] add tests for signed icmp with constant and offset; NFC
Caroline Concatto [Fri, 18 Jun 2021 14:39:03 +0000 (15:39 +0100)]
[AArch64][CostModel] Add cost model for experimental.vector.splice
This patch adds a new ShuffleKind SK_Splice and then handle the cost in
getShuffleCost, as in experimental.vector.reverse.
Differential Revision: https://reviews.llvm.org/D104630
Wang, Pengfei [Mon, 5 Jul 2021 13:08:49 +0000 (21:08 +0800)]
[X86] Twist shuffle mask when fold HOP(SHUFFLE(X,Y),SHUFFLE(X,Y)) -> SHUFFLE(HOP(X,Y))
This patch fixes PR50823.
The shuffle mask should be twisted twice before gotten the correct one due to the difference between inner HOP and outer.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D104903
Louis Dionne [Mon, 5 Jul 2021 13:25:15 +0000 (09:25 -0400)]
[libc++] NFC: Sort headers in CMakeLists.txt
Simon Pilgrim [Mon, 5 Jul 2021 12:19:47 +0000 (13:19 +0100)]
[CostModel][X86] Handle costs for insert/extractelement with non-immediate indices via stack
Determine the insert/extractelement costs when performing this as a sequence of aliased loads+stores via the stack.