Alexandre Ganea [Mon, 2 Mar 2020 20:41:47 +0000 (15:41 -0500)]
[Clang] Fix Hurd toolchain test on a two-stage build with ThinLTO
A two-stage ThinLTO build previously failed the clang/test/Driver/hurd.c test because of a static_cast in "tools::gnutools::Linker::ConstructJob()" which wrongly converted an instance of "clang::driver::toolchains::Hurd" into that of "clang::driver::toolchains::Linux". ThinLTO would later devirtualize the "ToolChain.getDynamicLinker(Args)" call and use "Linux::getDynamicLinker()" instead, causing the test to generate a wrong "-dynamic-linker" linker flag (/lib/ld-linux.so.2 instead of /lib/ld.so)
Fixes PR45061.
Differential Revision: https://reviews.llvm.org/D75373
Alexey Bataev [Mon, 2 Mar 2020 15:25:58 +0000 (10:25 -0500)]
[LIBOMPTARGET]Lower priority of global constructor/destructor to silence the warning from gcc.
Summary: fixed the warning from gcc since prios 0-100 are reserved for the internal use.
Reviewers: grokos
Subscribers: kkwli0, caomhin, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D75458
Stanislav Mekhanoshin [Fri, 28 Feb 2020 20:28:45 +0000 (12:28 -0800)]
Extend LaneBitmask to 64 bit
This is needed for D74873, AMDGPU going to have 16 bit subregs
and the largest tuple is 32 VGPRs, which results in 64 lanes.
Differential Revision: https://reviews.llvm.org/D75378
Sid Manning [Mon, 2 Mar 2020 20:08:57 +0000 (14:08 -0600)]
Revert "Add default paths to support musl target"
This reverts commit
637767665141ae48c7a0558903bb29e03bf5ad6f.
Need to fix the testcase.
Vedant Kumar [Mon, 2 Mar 2020 19:45:02 +0000 (11:45 -0800)]
[test/compiler-rt] Disable ubsan/TestCases/Misc/nullability.c on Android
It looks like the suppression file isn't being copied over to the
device.
Vedant Kumar [Mon, 2 Mar 2020 19:37:19 +0000 (11:37 -0800)]
[Coverage] Collect all function records in an object (D69471 followup)
After the format change from D69471, there can be more than one section
in an object that contains coverage function records. Look up each of
these sections and concatenate all the records together.
This re-enables the instrprof-merging.cpp test, which previously was
failing on OSes which use comdats.
Thanks to Jeremy Morse, who very kindly provided object files from the
bot I broke to help me debug.
Alexey Bataev [Mon, 2 Mar 2020 19:21:20 +0000 (14:21 -0500)]
[OPENMP50]Support 'destroy' clause on 'depobj' directives.
Added basic support (parsing/sema/serialization) for 'destroy' clause in
depobj directives.
Sid Manning [Fri, 21 Feb 2020 19:36:41 +0000 (13:36 -0600)]
Add default paths to support musl target
Pickup the default crt and libs when the target is musl.
Differential Revision: https://reviews.llvm.org/D75139
Erik Pilkington [Mon, 2 Mar 2020 18:27:41 +0000 (10:27 -0800)]
[Sema] Look through OpaqueValueExpr when checking implicit conversions
Specifically, this fixes a false-positive in -Wobjc-signed-char-bool.
rdar://
57372317
Differential revision: https://reviews.llvm.org/D75387
Petr Hosek [Thu, 6 Feb 2020 03:42:18 +0000 (19:42 -0800)]
[libcxx] When merging archives, build index even on Darwin
We always want to build the table of contents. Additionally, we also
set the flag to make the output deterministic which is already the
default for llvm-ar.
Differential Revision: https://reviews.llvm.org/D74108
Raphael Isemann [Mon, 2 Mar 2020 18:24:59 +0000 (10:24 -0800)]
[lldb] Remove checks behind LLDB_CONFIGURATION_DEBUG from TypeSystemClang
Summary:
This function is (supposed) to be a list of asserts that just do a generic sanity check
on declarations we return. Right now this function is hidden behind the
LLDB_CONFIGURATION_DEBUG macro which means it will *only* be run in
debug builds (but not Release+assert builds and so on).
As we have not a single CI running in Debug build, failures in VerifyDecl are hidden
from us until someone by accident executes the tests in Debug mode on their own machine.
This patch removes the `ifdef`'s for LLDB_CONFIGURATION_DEBUG and puts
the `getAccess()` call in `VerifyDecl` behind a `#ifndef NDEBUG` to make sure
that this function is just an empty function with internal linkage when NDEBUG
is defined (so compilers should just optimize away the calls to it).
Reviewers: aprantl
Reviewed By: aprantl
Subscribers: shafik, abidh, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D75330
Jessica Paquette [Mon, 2 Mar 2020 18:49:18 +0000 (10:49 -0800)]
[AArch64][MachineOutliner] Don't outline CFI instructions
CFI instructions can only safely be outlined when the outlined call is a tail
call, or when the outlined frame is fixed up.
For the sake of correctness, disable outlining from CFI instructions.
Add machine-outliner-cfi.mir to test this.
Simon Pilgrim [Mon, 2 Mar 2020 18:22:58 +0000 (18:22 +0000)]
Fix shadow variable warning. NFC.
Simon Pilgrim [Mon, 2 Mar 2020 18:10:15 +0000 (18:10 +0000)]
Fix 'unsigned variable can never be negative' cppcheck warning. NFCI.
Alexey Bataev [Fri, 28 Feb 2020 14:52:15 +0000 (09:52 -0500)]
[OPENMP50]Add basic support for depobj construct.
Added basic parsing/sema/serialization support for depobj directive.
Adrian Prantl [Mon, 2 Mar 2020 17:39:27 +0000 (09:39 -0800)]
More principled implementation of DISubprogram::describes()
Previously we would also accept DISubprograms that matched in name
only, but this doesn't appear to be necessary any more.
I did a Full and Thin LTO build of Clang and it completed without a warning.
Differential Revision: https://reviews.llvm.org/D75213
Brian Cain [Mon, 24 Feb 2020 17:58:50 +0000 (11:58 -0600)]
Fix unused-variable warning
Sam McCall [Mon, 2 Mar 2020 17:45:05 +0000 (18:45 +0100)]
[clangd] Split locateSymbolAt into several component functions, to allow later reuse. NFC
Nick Desaulniers [Mon, 2 Mar 2020 17:33:14 +0000 (09:33 -0800)]
clang: Switch C compilations to C17 by default.
Summary:
Matches GCC 8.1 (2018).
Updates documentation+release notes as well.
See also https://reviews.llvm.org/rL220244.
Reviewers: rsmith, aaron.ballman
Reviewed By: rsmith, aaron.ballman
Subscribers: aaron.ballman, dschuff, aheejin, simoncook, s.egerton, cfe-commits, hans, srhines
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75383
LLVM GN Syncbot [Mon, 2 Mar 2020 17:35:47 +0000 (17:35 +0000)]
[gn build] Port
49684f9db5c
Mitch Phillips [Mon, 2 Mar 2020 17:29:29 +0000 (09:29 -0800)]
Revert "Syndicate, test and fix base64 implementation"
This reverts commit
5a1958f2673f8c771e406a7e309e160b432c9a79.
This change broke the UBSan build bots. See
https://reviews.llvm.org/D75057 for more information.
Mitch Phillips [Mon, 2 Mar 2020 17:28:59 +0000 (09:28 -0800)]
Revert "Fix Base64Test - for StringRef size"
This reverts commit
b52355f8a196b5040dc2e42870bf8c459306cfaa.
The change this patch depends on
(
5a1958f2673f8c771e406a7e309e160b432c9a79) broke the UBSan buildbots.
See https://reviews.llvm.org/D75057 for more information.
Teresa Johnson [Wed, 26 Feb 2020 18:54:56 +0000 (10:54 -0800)]
[ThinLTO/LowerTypeTests] Handle unpromoted local type ids
Summary:
Fixes an issue that cropped up after the changes in D73242 to delay
the lowering of type tests. LTT couldn't handle any type tests with
non-string type id (which happens for local vtables, which we try to
promote during the compile step but cannot always when there are no
exported symbols).
We can simply treat the same as having an Unknown resolution, which
delays their lowering, still allowing such type tests to be used in
subsequent optimization (e.g. planned usage during ICP). The final
lowering which simply removes these handles them fine.
Beefed up an existing ThinLTO test for such unpromoted type ids so that
the internal vtable isn't removed before lower type tests, which hides
the problem.
Reviewers: evgeny777, pcc
Subscribers: inglorion, hiraditya, steven_wu, dexonsmith, aganea, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75201
Matthias Kramm [Mon, 2 Mar 2020 17:23:28 +0000 (09:23 -0800)]
[mlir][DialectConversion] Abort early if a subregion has a disconnected CFG.
Summary:
Make computeConversionSet bubble up errors from nested regions. Note
that this doesn't change top-level behavior - since the nested region
calls emitError, the error was visible before, just not surfaced as
quickly.
Differential Revision: https://reviews.llvm.org/D75369
Vedant Kumar [Mon, 2 Mar 2020 17:25:22 +0000 (09:25 -0800)]
Second attempt to disable instrprof-merging.cpp
The first attempt in
f82ae3ad was not handled correctly, as
'UNSUPPORTED: *' is not accepted by lit.
River Riddle [Mon, 2 Mar 2020 17:18:45 +0000 (09:18 -0800)]
[mlir] Update several usages of IntegerType to properly handled unsignedness.
Summary: For example, DenseElementsAttr currently does not properly round-trip unsigned integer values.
Differential Revision: https://reviews.llvm.org/D75374
Volkan Keles [Mon, 2 Mar 2020 17:15:40 +0000 (09:15 -0800)]
GlobalISel: Move Localizer::shouldLocalize(..) to TargetLowering
Add a new target hook for shouldLocalize so that
targets can customize the logic.
https://reviews.llvm.org/D75207
Arkady Shlykov [Fri, 17 Jan 2020 13:35:19 +0000 (05:35 -0800)]
[Loop Peeling] Add possibility to enable peeling on loop nests.
Summary:
Current peeling implementation bails out in case of loop nests.
The patch introduces a field in TargetTransformInfo structure that
certain targets can use to relax the constraints if it's
profitable (disabled by default).
Also additional option is added to enable peeling manually for
experimenting and testing purposes.
Reviewers: fhahn, lebedev.ri, xbolva00
Reviewed By: xbolva00
Subscribers: RKSimon, xbolva00, hiraditya, zzheng, llvm-commits
Differential Revision: https://reviews.llvm.org/D70304
Nicolas Vasilache [Mon, 2 Mar 2020 14:59:01 +0000 (09:59 -0500)]
[mlir] Add padding to 1-D Vector in CRunnerUtils.h
Summary:
This revision adds padding for 1-D Vector in the common case of x86
execution with a stadard data layout. This supports properly interfacing
codegen with arrays of e.g. `vector<9xf32>`.
Such vectors are already assumed padded to the next power of 2 by LLVM
codegen with the default x86 data layout:
```
define void @test_vector_add_1d_2_3(<3 x float>* nocapture readnone %0,
<3 x float>* nocapture readonly %1, i64 %2, i64 %3, i64 %4, <3 x float>*
nocapture readnone %5, <3 x float>* nocapture readonly %6, i64 %7, i64
%8, i64 %9, <3 x float>* nocapture readnone %10, <3 x float>* nocapture
%11, i64 %12, i64 %13, i64 %14) local_unnamed_addr {
%16 = getelementptr <3 x float>, <3 x float>* %6, i64 1
%17 = load <3 x float>, <3 x float>* %16, align 16
%18 = getelementptr <3 x float>, <3 x float>* %1, i64 1
%19 = load <3 x float>, <3 x float>* %18, align 16
%20 = fadd <3 x float> %17, %19
%21 = getelementptr <3 x float>, <3 x float>* %11, i64 1
```
The pointer addressing a `vector<3xf32>` is assumed aligned `@16`.
Similarly, the pointer addressing a `vector<65xf32>` is assumed aligned
`@512`.
This revision allows using objects such as `vector<3xf32>` properly with
the standard x86 data layout used in the JitRunner. Integration testing
is done out of tree, at the moment such testing fails without this
change.
Reviewers: ftynse
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75459
Sven van Haastregt [Mon, 2 Mar 2020 15:56:48 +0000 (15:56 +0000)]
[OpenCL] Remove spurious atomic_fetch_min/max builtins
These declarations use a mix of unsigned and signed argument and
return types. This is not in accordance with OpenCL v2.0 s6.13.11.
Differential Revision: https://reviews.llvm.org/D74910
Vedant Kumar [Mon, 2 Mar 2020 15:51:06 +0000 (07:51 -0800)]
Disable instrprof-merging.cpp to unblock bots while I investigate
After D69471, this test started failing on powerpc64, s390x and on a
sanitizer bot. Disable the test while I investigate.
Krzysztof Parzyszek [Mon, 2 Mar 2020 15:49:53 +0000 (09:49 -0600)]
[Hexagon] Use BUILD_PAIR to expand i128 instead of doing arithmetic
Jonathan Coe [Mon, 2 Mar 2020 15:46:33 +0000 (15:46 +0000)]
[clang-format] Rename CSharpNullConditionalSq and add missing test
Summary:
Rename CSharpNullConditionalSq to CSharpNullConditionalLSquare.
Add test for spaces inside [] with C# Null conditionals.
Address comments missed from https://reviews.llvm.org/D75368.
Reviewers: krasimir
Reviewed By: krasimir
Subscribers: cfe-commits
Tags: #clang-format, #clang
Differential Revision: https://reviews.llvm.org/D75456
Martijn Vels [Mon, 2 Mar 2020 15:11:35 +0000 (10:11 -0500)]
Add flag _LIBCPP_ABI_STRING_OPTIMIZED_EXTERNAL_INSTANTIATIONS for basic_string ABI
Summary: This review is a mostly trivial change to use an explicit ABI flag for the unstable external template list. This follows the practice for an ABI flag per feature, and provides a spot for the rational / motivation for the flag.
Reviewers: EricWF, ldionne
Subscribers: dexonsmith, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D75457
Nicolai Hähnle [Wed, 26 Feb 2020 18:47:14 +0000 (19:47 +0100)]
Build fix: Turn off _GLIBCXX_DEBUG based on a compile check
Summary:
Enabling _GLIBCXX_DEBUG (implied by LLVM_ENABLE_EXPENSIVE_CHECKS) causes
std::min_element (and presumably others) to no longer be constexpr, which
in turn causes the build to fail.
This seems like a bug in the GCC STL. This change works around it.
Change-Id: I5fc471caa9c4de3ef4e87aeeac8df1b960e8e72c
Reviewers: tstellar, hans, serge-sans-paille
Differential Revision: https://reviews.llvm.org/D75199
Simon Pilgrim [Mon, 2 Mar 2020 14:59:06 +0000 (14:59 +0000)]
[X86] Cleanup ShuffleDecode implementations. NFCI.
- Remove unnecessary includes from the headers
- Fix cppcheck definition/declaration arg mismatch warnings
- Tidyup old comments (MVT usage was removed a long time ago)
- Use SmallVector::append for repeated mask entries
Simon Pilgrim [Mon, 2 Mar 2020 13:58:21 +0000 (13:58 +0000)]
[CodeGenPGO] Fix shadow variable warning. NFC.
Simon Pilgrim [Mon, 2 Mar 2020 13:26:39 +0000 (13:26 +0000)]
EHScopeStack::Cleanup has virtual functions so the destructor should be too.
Fixes cppcheck warning.
David Green [Mon, 2 Mar 2020 14:26:32 +0000 (14:26 +0000)]
[LoopVectorizer] Change types of lists from pointers to references. NFC
getReductionVars, getInductionVars and getFirstOrderRecurrences were all
being returned from LoopVectorizationLegality as pointers to lists. This
just changes them to be references, cleaning up the interface slightly.
Differential Revision: https://reviews.llvm.org/D75448
Martijn Vels [Wed, 26 Feb 2020 20:55:49 +0000 (15:55 -0500)]
Partially inline basic_string::operator=(const basic_string&)
Summary:
This change partially inlines operator=(const basic_string&) where both the input and current instance are short strings, making the assignment a fixed length inlined memcpy.
Assignments where either of the strings are long are delegate to __assign_no_alias<__is_short>(), which is templated for the long / short branch already observed in the caller.
Stable:
```
--------------------------------------------------------------------------------
Benchmark Time CPU Iterations
--------------------------------------------------------------------------------
BM_StringAssignStr_Empty_Opaque 2.65 ns 2.66 ns
263745536
BM_StringAssignStr_Empty_Transparent 2.95 ns 2.96 ns
236494848
BM_StringAssignStr_Small_Opaque 2.93 ns 2.94 ns
237301760
BM_StringAssignStr_Small_Transparent 2.69 ns 2.69 ns
265809920
BM_StringAssignStr_Large_Opaque 19.6 ns 19.6 ns
35573760
BM_StringAssignStr_Large_Transparent 19.1 ns 19.1 ns
36716544
BM_StringAssignStr_Huge_Opaque 1901 ns 1901 ns 364544
BM_StringAssignStr_Huge_Transparent 1889 ns 1889 ns 360448
```
Unstable
```
--------------------------------------------------------------------------------
Benchmark Time CPU Iterations
--------------------------------------------------------------------------------
BM_StringAssignStr_Empty_Opaque 1.29 ns 1.29 ns
540454912
BM_StringAssignStr_Empty_Transparent 1.11 ns 1.12 ns
628482048
BM_StringAssignStr_Small_Opaque 1.29 ns 1.29 ns
541216768
BM_StringAssignStr_Small_Transparent 1.11 ns 1.11 ns
629469184
BM_StringAssignStr_Large_Opaque 15.6 ns 15.6 ns
44945408
BM_StringAssignStr_Large_Transparent 14.9 ns 14.9 ns
46764032
BM_StringAssignStr_Huge_Opaque 1713 ns 1713 ns 401408
BM_StringAssignStr_Huge_Transparent 1704 ns 1704 ns 397312
```
Subscribers: libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D75211
Graham Hunter [Fri, 28 Feb 2020 13:53:40 +0000 (13:53 +0000)]
[OpenMP] Allow const parameters in declare simd linear clause
Reviewers: ABataev, kkwli0, jdoerfert, fpetrogalli
Reviewed By: ABataev, fpetrogalli
Differential Revision: https://reviews.llvm.org/D75350
Stephan Herhut [Mon, 2 Mar 2020 14:47:48 +0000 (15:47 +0100)]
[MLIR][GPU] fix loop trip count computation in LoopsToGPU
Summary: Added brackets to fix the loop trip count computation.
The brackets ensure the bounds are subtracted before we divide
the result by the step of the loop.
Differential Revision: https://reviews.llvm.org/D75449
Sanjay Patel [Mon, 2 Mar 2020 14:33:11 +0000 (09:33 -0500)]
[CodeGen] avoid running the entire optimizer pipeline in clang test file; NFC
I'm making the CHECK lines vague enough that they pass at -O0.
If that is too vague (we really want to check the data flow
to verify that the variables are not mismatched, etc), then
we can adjust those lines again to more closely match the output
at -O0 rather than -O1.
This change is based on the post-commit comments for:
https://github.com/llvm/llvm-project/commit/
83f4372f3a708ceaa800feff8b1bd92ae2c3be5f
http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-
20200224/307888.html
Nicolas Vasilache [Sat, 29 Feb 2020 18:40:59 +0000 (13:40 -0500)]
[mlir] NFC - Move Vector structure from RunnerUtils.h to CRunnerUtils.h
Summary: The Vector struct does not require a C++ runtime.
Differential Revision: https://reviews.llvm.org/D75409
Haojian Wu [Mon, 2 Mar 2020 08:58:14 +0000 (09:58 +0100)]
[clangd] No need to query ctor refs in cross-file rename.
Summary:
This patch reverts https://github.com/llvm/llvm-project/commit/
2c5ee78de113484978450b834498e1b0e2aab5c4,
now kythe (https://github.com/kythe/kythe/issues/4381) supports returning ctors refs as part of class references, so
there is no need to query the ctor refs in the index (this would also
make the results worse, lots of duplications)
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75439
Sanjay Patel [Mon, 2 Mar 2020 14:09:39 +0000 (09:09 -0500)]
[CodeGen] avoid running the entire optimizer pipeline in clang test file; NFC
There are no failures from the first set of RUN lines here,
so the CHECKs were already vague enough to not be affected
by optimizations. The final RUN line does induce some kind
of failure, so I'll try to fix that separately in a
follow-up.
Jonathan Coe [Mon, 2 Mar 2020 13:55:54 +0000 (13:55 +0000)]
[clang-format] Handle NullCoalescing and NullConditional operators in C#
Summary:
Disable merging of Type? into a single token.
Merge ?? ?. and ?[ into a single token.
Reviewers: krasimir, MyDeveloperDay
Reviewed By: krasimir
Subscribers: cfe-commits
Tags: #clang-format, #clang
Differential Revision: https://reviews.llvm.org/D75368
Stephan Herhut [Mon, 2 Mar 2020 10:34:25 +0000 (11:34 +0100)]
[MLIR] Add includes to PointerLikeTypeTraits where needed.
Summary:
This is to ensure that the template declaration is seen before
any template specialization.
Reviewers: mravishankar, antiagainst, rriddle!
Differential Revision: https://reviews.llvm.org/D75442
Kadir Cetinkaya [Fri, 28 Feb 2020 08:25:40 +0000 (09:25 +0100)]
[clangd] Get rid of lexer usage in locateMacroAt
Reviewers: sammccall, hokein
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75331
Kadir Cetinkaya [Thu, 27 Feb 2020 15:02:44 +0000 (16:02 +0100)]
[clangd] Get rid of unnecessary source transformations in locateMacroAt
Summary:
All callers are already passing spelling locations to locateMacroAt.
Also there's no point at looking at macro expansion for figuring out undefs as
it is forbidden to have PP directives inside macro bodies.
Also fixes a bug when the previous sourcelocation is unavailable.
Reviewers: sammccall, hokein
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75259
Luke Geeson [Fri, 14 Feb 2020 13:33:32 +0000 (13:33 +0000)]
[ARM] Add Cortex-M55 Support for clang and llvm
This patch upstreams support for the ARM Armv8.1m cpu Cortex-M55.
In detail adding support for:
- mcpu option in clang
- Arm Target Features in clang
- llvm Arm TargetParser definitions
details of the CPU can be found here:
https://developer.arm.com/ip-products/processors/cortex-m/cortex-m55
Reviewers: chill
Reviewed By: chill
Subscribers: dmgreen, kristof.beyls, hiraditya, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74966
Simon Pilgrim [Mon, 2 Mar 2020 11:30:42 +0000 (11:30 +0000)]
Fix shadow variable warning. NFC.
Simon Pilgrim [Mon, 2 Mar 2020 11:19:48 +0000 (11:19 +0000)]
Fix shadow variable warning. NFC.
Simon Pilgrim [Mon, 2 Mar 2020 11:18:41 +0000 (11:18 +0000)]
[CostModel][X86] Add vXi1 extract/insert cost tests
Joe Turner [Thu, 27 Feb 2020 19:18:38 +0000 (20:18 +0100)]
[clang-tidy] Copy the Ranges field from the Diagnostic when creating the ClangTidyError
Differential Revision: https://reviews.llvm.org/D68887
Balázs Kéri [Mon, 2 Mar 2020 10:48:19 +0000 (11:48 +0100)]
[analyzer][StreamChecker] Using function description objects - NFC.
Summary:
Have a description object for the stream functions
that can store different aspects of a single stream operation.
I plan to extend the structure with other members,
for example pre-callback and index of the stream argument.
Reviewers: Szelethus, baloghadamsoftware, NoQ, martong, Charusso, xazax.hun
Reviewed By: Szelethus
Subscribers: rnkovacs, xazax.hun, baloghadamsoftware, szepet, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, gamesh411, Charusso, martong, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75158
Awanish Pandey [Mon, 2 Mar 2020 05:22:12 +0000 (10:52 +0530)]
Reland "[DebugInfo][clang][DWARF5]: Added support for debuginfo generation for defaulted parameters
in C++ templates."
This was reverted in
802b22b5c8c30bebc1695a217478be02653c6b53 due to
missing .bc file and a chromium bot failure.
https://bugs.chromium.org/p/chromium/issues/detail?id=1057559#c1
This revision address both of them.
Summary:
This patch adds support for debuginfo generation for defaulted
parameters in clang and also extends corresponding DebugMetadata/IR to support this feature.
Reviewers: probinson, aprantl, dblaikie
Reviewed By: aprantl, dblaikie
Differential Revision: https://reviews.llvm.org/D73462
Simon Pilgrim [Mon, 2 Mar 2020 10:56:29 +0000 (10:56 +0000)]
Fix operator precedence warning. NFCI.
Alex Zinenko [Mon, 2 Mar 2020 10:40:50 +0000 (11:40 +0100)]
[mlir] mlir-opt: print a newline after the top-level module
A printer refactoring removed automatic newline printing in the printer
of a ModuleOp. As a consequence, mlir-opt no longer printed a newline
after the closing brace of a module, which made it hard to distinguish
when used from command line. Print the newline character explicitly in
mlir-opt.
Andrzej Warzynski [Wed, 19 Feb 2020 12:25:30 +0000 (12:25 +0000)]
[AArch64][SVE] Add intrinsics for non-temporal gather-loads/scatter-stores
Summary:
This patch adds the following LLVM IR intrinsics for SVE:
1. non-temporal gather loads
* @llvm.aarch64.sve.ldnt1.gather
* @llvm.aarch64.sve.ldnt1.gather.uxtw
* @llvm.aarch64.sve.ldnt1.gather.scalar.offset
2. non-temporal scatter stores
* @llvm.aarch64.sve.stnt1.scatter
* @llvm.aarch64.sve.ldnt1.gather.uxtw
* @llvm.aarch64.sve.ldnt1.gather.scalar.offset
These intrinsic are mapped to the corresponding SVE instructions
(example for half-words, zero-extending):
* ldnt1h { z0.s }, p0/z, [z0.s, x0]
* stnt1h { z0.s }, p0/z, [z0.s, x0]
Note that for non-temporal gathers/scatters, the SVE spec defines only
one instruction type: "vector + scalar". For this reason, we swap the
arguments when processing intrinsics that implement the "scalar +
vector" addressing mode:
* @llvm.aarch64.sve.ldnt1.gather
* @llvm.aarch64.sve.ldnt1.gather.uxtw
* @llvm.aarch64.sve.stnt1.scatter
* @llvm.aarch64.sve.ldnt1.gather.uxtw
In other words, all intrinsics for gather-loads and scatter-stores
implemented in this patch are mapped to the same load and store
instruction, respectively.
The sve2_mem_gldnt_vs multiclass (and it's counterpart for scatter
stores) from SVEInstrFormats.td was split into:
* sve2_mem_gldnt_vec_vs_32_ptrs (32bit wide base addresses)
* sve2_mem_gldnt_vec_vs_62_ptrs (64bit wide base addresses)
This is consistent with what we did for
@llvm.aarch64.sve.ld1.scalar.offset and highlights the actual split in
the spec and the implementation.
Reviewed by: sdesmalen
Differential Revision: https://reviews.llvm.org/D74858
Simon Tatham [Mon, 2 Mar 2020 09:06:09 +0000 (09:06 +0000)]
[ARM,MVE] Add ACLE intrinsics for VCVT[ANPM] family.
Summary:
These instructions convert a vector of floats to a vector of integers
of the same size, with assorted non-default rounding modes.
Implemented in IR as target-specific intrinsics, because as far as I
can see there are no matches for that functionality in the standard IR
intrinsics list.
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D75255
Simon Tatham [Mon, 2 Mar 2020 09:06:00 +0000 (09:06 +0000)]
[ARM,MVE] Add ACLE intrinsics for VCVT.F32.F16 family.
Summary:
These instructions make a vector of `<4 x float>` by widening every
other lane of a vector of `<8 x half>`.
I wondered about representing these using standard IR, along the lines
of a shufflevector to extract elements of the input into a `<4 x half>`
followed by an `fpext` to turn that into `<4 x float>`. But it looks as
if that would take a lot of work in isel lowering to make it match any
pattern I could sensibly write in Tablegen, and also I haven't been
able to think of any other case where that pattern might be generated
in IR, so there wouldn't be any extra code generation win from doing
it that way.
Therefore, I've just used another target-specific intrinsic. We can
always change it to the other way later if anyone thinks of a good
reason.
(In order to put the intrinsic definition near similar things in
`IntrinsicsARM.td`, I've also lifted the definition of the
`MVEMXPredicated` multiclass higher up the file, without changing it.)
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: miyuki
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D75254
Simon Tatham [Mon, 2 Mar 2020 09:05:48 +0000 (09:05 +0000)]
[ARM,MVE] Correct MC operands in VCVT.F32.F16. (NFC)
Summary:
The two MVE instructions that convert between v4f32 and v8f16 were
implemented as instances of the same class, with the same MC operand
list.
But that's not really appropriate, because the narrowing conversion
only partially overwrites its output register (it only has 4 f16
values to write into a vector of 8), so even when unpredicated, it
needs a $Qd_src input, a constraint tying that to the $Qd output, and
a vpred_n.
The widening conversion is better represented like any other
instruction that completely replaces its output when unpredicated: it
should have no $Qd_src operand, and instead, a vpred_r containing a
$inactive parameter. That's a better match to other similar
instructions, such as its integer analogue, the VMOVL instruction that
makes a v4i32 by sign- or zero-extending every other lane of a v8i16.
This commit brings the widening VCVT.F32.F16 into line with the other
instructions that behave like it. That means you can write isel
patterns that use it unpredicated, without having to add a pointless
undefined $QdSrc operand.
No existing code generation uses that instruction yet, so there should
be no functional change from this fix.
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75253
Simon Tatham [Mon, 2 Mar 2020 09:05:35 +0000 (09:05 +0000)]
[ARM,MVE] Add ACLE intrinsics for VQMOV[U]N family.
Summary:
These instructions work like VMOVN (narrowing a vector of wide values
to half size, and overwriting every other lane of an output register
with the result), except that the narrowing conversion is saturating.
They come in three signedness flavours: signed to signed, unsigned to
unsigned, and signed to unsigned. All are represented in IR by a
target-specific intrinsic that takes two separate 'unsigned' flags.
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D75252
Pavel Labath [Mon, 2 Mar 2020 10:28:48 +0000 (11:28 +0100)]
[lld] Fix test failure from
d978656fd06
Tweak the test to account for the slightly different wording of the
error message.
Pavel Labath [Tue, 25 Feb 2020 14:40:49 +0000 (15:40 +0100)]
[DWARF] Use DWARFDataExtractor::getInitialLength to parse debug_names
Summary:
In this patch I've done a slightly bigger rewrite to also remove the
hardcoded header lengths.
Reviewers: jhenderson, dblaikie, ikudrin
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75119
Pavel Labath [Tue, 25 Feb 2020 14:17:57 +0000 (15:17 +0100)]
[DWARF] Use getInitialLength in range list parsing
Summary:
This could be considered obvious, but I am putting it up to illustrate
the usefulness/impact of the getInitialLength change.
Reviewers: dblaikie, jhenderson, ikudrin
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75117
Pavel Labath [Fri, 14 Feb 2020 14:41:38 +0000 (15:41 +0100)]
[DWARFDebugLine] Use new DWARFDataExtractor::getInitialLength
Summary:
The error messages change somewhat, but I believe the overall
informational value remains unchanged.
Reviewers: jhenderson, dblaikie, ikudrin
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75116
serge-sans-paille [Mon, 2 Mar 2020 10:06:07 +0000 (11:06 +0100)]
Fix Base64Test - for StringRef size
Original failures: http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/15975/steps/test-stage1-compiler/logs/stdio
Jim Lin [Mon, 2 Mar 2020 09:11:08 +0000 (17:11 +0800)]
[git-clang-format] Fix typo in help message
Anna Welker [Mon, 2 Mar 2020 09:14:37 +0000 (09:14 +0000)]
[ARM][MVE] Restrict allowed types of gather/scatter offsets
The MVE gather instructions smaller than 32bits zext extend the values
in the offset register, as opposed to sign extending them. We need to
make sure that the code that we select from is suitably extended, which
this patch attempts to fix by tightening up the offset checks.
Differential Revision: https://reviews.llvm.org/D75361
Kang Zhang [Mon, 2 Mar 2020 09:50:01 +0000 (09:50 +0000)]
[NFC][PowerPC] Move some alias definition from PPCInstrInfo.td to PPCInstr64Bit.td
Summary:
Some 64-bit instructions alias definition is in PPCInstrInfo.td, it should be
moved to PPCInstr64Bit.td.
Sagar Jain [Mon, 2 Mar 2020 09:19:57 +0000 (10:19 +0100)]
[MLIR] Added llvm.freeze
This patch adds llvm.freeze & processes undef constants from LLVM IR.
Syntax:
LLVM IR
`<result> = freeze ty <val>`
MLIR LLVM Dialect:
`llvm.freeze val attr-dict : type`
Example:
LLVM IR: `%3 = freeze i32 5`
MLIR: `%6 = llvm.freeze %5 : !llvm.i32`
Differential Revision: https://reviews.llvm.org/D75329
LLVM GN Syncbot [Mon, 2 Mar 2020 09:02:51 +0000 (09:02 +0000)]
[gn build] Port
5a1958f2673
serge-sans-paille [Mon, 24 Feb 2020 16:21:32 +0000 (17:21 +0100)]
Syndicate, test and fix base64 implementation
Move Base64 implementation from clangd/SemanticHighlighting to
llvm/Support/Base64, fix its implementation and provide a decent test suite.
Previous implementation code was using + operator instead of | to combine some
results, which is a problem when shifting signed values. (0xFF << 16) is
implicitly converted to a (signed) int, and thus results in 0xffff0000, which is
negative. Combining negative numbers with a + in that context is not what we
want to do.
This fixes https://github.com/llvm/llvm-project/issues/149.
Differential Revision: https://reviews.llvm.org/D75057
Haojian Wu [Mon, 2 Mar 2020 08:46:47 +0000 (09:46 +0100)]
[clangd] Remove the deprecated clangdServer::rename API, NFC.
There is no actual user of it now.
Alex Brachet [Mon, 2 Mar 2020 08:47:21 +0000 (03:47 -0500)]
[libc] Add sigprocmask
Summary: This patch adds `sigprocmask`, `sigemptyset` and `sigaddset`
Reviewers: sivachandra, MaskRay, gchatelet
Reviewed By: sivachandra
Subscribers: mgorny, tschuett, libc-commits
Differential Revision: https://reviews.llvm.org/D75026
Hans Wennborg [Mon, 2 Mar 2020 08:26:00 +0000 (09:26 +0100)]
Revert "[DebugInfo][clang][DWARF5]: Added support for debuginfo generation for defaulted parameters"
The Bitcode/DITemplateParameter-5.0.ll test is failing:
FAIL: LLVM :: Bitcode/DITemplateParameter-5.0.ll (5894 of 36324)
******************** TEST 'LLVM :: Bitcode/DITemplateParameter-5.0.ll' FAILED ********************
Script:
--
: 'RUN: at line 1'; /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/llvm-dis -o - /usr/local/google/home/thakis/src/llvm-project/llvm/test/Bitcode/DITemplateParameter-5.0.ll.bc | /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/FileCheck /usr/local/google/home/thakis/src/llvm-project/llvm/test/Bitcode/DITemplateParameter-5.0.ll
--
Exit Code: 2
Command Output (stderr):
--
It looks like the Bitcode/DITemplateParameter-5.0.ll.bc file was never checked in.
This reverts commit
c2b437d53d40b6dc5603c97f527398f477d9c5f1.
Awanish Pandey [Mon, 2 Mar 2020 05:22:12 +0000 (10:52 +0530)]
[DebugInfo][clang][DWARF5]: Added support for debuginfo generation for defaulted parameters
in C++ templates.
Summary:
This patch adds support for debuginfo generation for defaulted
parameters in clang and also extends corresponding DebugMetadata/IR to support this feature.
Reviewers: probinson, aprantl, dblaikie
Reviewed By: aprantl, dblaikie
Differential Revision: https://reviews.llvm.org/D73462
Fangrui Song [Mon, 2 Mar 2020 06:36:55 +0000 (22:36 -0800)]
[PowerPC][test] Improve .got2 and .toc tests
There is no .got2 test for powerpc32.
There is no comdat variable test for powerpc{32,64}.
Serguei Katkov [Fri, 28 Feb 2020 10:34:33 +0000 (17:34 +0700)]
[InlineSpiller] Relax re-materialization restriction for statepoint
We should be careful to allow count of re-materialization of operands to be less
then number of physical registers.
STATEPOINT instruction has a variable number of operands and potentially very big.
So re-materialization for all operands is disabled at the moment if restrict-statepoint-remat is true.
The patch relaxes the re-materialization restriction for STATEPOINT instruction allowing it for
fixed operands. Specifically it is about call target.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits, qcolombet, hiraditya
Differential Revision: https://reviews.llvm.org/D75335
Fangrui Song [Sun, 1 Mar 2020 02:40:58 +0000 (18:40 -0800)]
[ELF][PPC32] Don't report "relocation refers to a discarded section" for .got2
Similar to D63182 [ELF][PPC64] Don't report "relocation refers to a discarded section" for .toc
Reviewed By: Bdragon28
Differential Revision: https://reviews.llvm.org/D75419
Jim Lin [Mon, 2 Mar 2020 02:04:21 +0000 (10:04 +0800)]
[Sparc] Fix incorrect operand for matching CMPri pattern
Summary:
It should be normal constant instead of target constant.
Pattern CMPri can be matched if the constant can be fitted into immediate field.
Otherwise, pattern CMPrr will be matched.
This fixed bug https://bugs.llvm.org/show_bug.cgi?id=44091.
Reviewers: dcederman, jyknight
Reviewed By: jyknight
Subscribers: jonpa, hiraditya, fedor.sergeev, jrtc27, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75227
Craig Topper [Mon, 2 Mar 2020 00:42:04 +0000 (16:42 -0800)]
[DAGCombiner][X86] Disable narrowExtractedVectorLoad if the element type size isn't byte sized
The address calculation for the offset assumes that you can calculate the offset by multiplying the index by the store size of the element. But that only works if the element's store size is exactly its real size since we store vectors tightly packed in memory. There are improvements we could make to this like special casing extracting element 0. I think we could also handle cases where the extracted VT is byte sized and the index is aligned with the extract element count.
Differential Revision: https://reviews.llvm.org/D75377
Shengchen Kan [Sun, 1 Mar 2020 07:43:53 +0000 (15:43 +0800)]
[X86] Not track size of the boudaryalign fragment during the layout
Summary:
Currently the boundaryalign fragment caches its size during the process
of layout and then it is relaxed and update the size in each iteration. This
behaviour is unnecessary and ugly.
Reviewers: annita.zhang, reames, MaskRay, craig.topper, LuoYuanke, jyknight
Reviewed By: MaskRay
Subscribers: hiraditya, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75404
Craig Topper [Fri, 28 Feb 2020 04:53:17 +0000 (20:53 -0800)]
[X86][TwoAddressInstructionPass] Teach tryInstructionCommute to continue checking for commutable FMA operands in more cases.
Previously we would only check for another commutable operand if the first commute was an aggressive commute.
But if we have two kill operands and neither is tied to the def at the start, we should consider both operands as the one to use as the new def.
This improves the loop in the fma-commute-loop.ll test. This test is derived from a post from discourse here https://llvm.discourse.group/t/unnecessary-vmovapd-instructions-generated-can-you-hint-in-favor-of-vfmadd231pd/582
Differential Revision: https://reviews.llvm.org/D75016
Craig Topper [Sun, 1 Mar 2020 18:41:20 +0000 (10:41 -0800)]
[DAGCombiner] Don't emit select_cc from visitSINT_TO_FP/visitUINT_TO_FP. Use plain select instead.
Select_cc isn't used by all targets. X86 doesn't have optimizations
for it.
Since we already know the input to the sint_to_fp/uint_to_fp is
a setcc we can just emit a plain select using that setcc as the
condition. Other DAG combines can turn that into a select_cc on
targets that support it.
Differential Revision: https://reviews.llvm.org/D75415
Lang Hames [Sun, 1 Mar 2020 17:34:31 +0000 (09:34 -0800)]
[JITLink] Update DEBUG_TYPE string for llvm-jitlink.
Apparently LLVM_DEBUG doesn't like dashes in strings.
Stefanos Baziotis [Sun, 1 Mar 2020 17:35:58 +0000 (19:35 +0200)]
Fix [ADT][NFC] SCCIterator: Change hasLoop() to hasCycle()
Stefanos Baziotis [Sun, 1 Mar 2020 17:17:21 +0000 (19:17 +0200)]
[ADT][NFC] SCCIterator: Change hasLoop() to hasCycle()
Reid Kleckner [Sun, 1 Mar 2020 16:45:22 +0000 (08:45 -0800)]
Attempt to fix ZLIB CMake logic on Windows
CMake doesn't seem to like it when you regex search for "^".
Reid Kleckner [Sun, 1 Mar 2020 15:47:55 +0000 (07:47 -0800)]
[WinEH] Fix inttoptr+phi optimization in presence of catchswitch
getFirstInsertionPt's return value must be checked for validity before
casting it to Instruction*. Don't attempt to insert casts after a phi in
a catchswitch block.
Fixes PR45033, introduced in D37832.
Reviewed By: davidxl, hfinkel
Differential Revision: https://reviews.llvm.org/D75381
Sanjay Patel [Sun, 1 Mar 2020 14:09:22 +0000 (09:09 -0500)]
[DAGCombiner] recognize shuffle (shuffle X, Mask0), Mask --> splat X
We get the simple cases of this via demanded elements and other folds,
but that doesn't work if the values have >1 use, so add a dedicated
match for the pattern.
We already have this transform in IR, but it doesn't help the
motivating x86 tests (based on PR42024) because the shuffles don't
exist until after legalization and other combines have happened.
The AArch64 test shows a minimal IR example of the problem.
Differential Revision: https://reviews.llvm.org/D75348
Jun Ma [Sun, 1 Mar 2020 12:55:06 +0000 (20:55 +0800)]
[Coroutines][New pass manager] Move CoroElide pass to right position
Differential Revision: https://reviews.llvm.org/D75345
Jun Ma [Sun, 1 Mar 2020 13:37:41 +0000 (21:37 +0800)]
Revert "[Coroutines][new pass manager] Move CoroElide pass to right position"
This reverts commit
4c0a133a412cd85381469e20f88ee7bf5d2ded8e.
Jun Ma [Sun, 1 Mar 2020 12:55:06 +0000 (20:55 +0800)]
[Coroutines][new pass manager] Move CoroElide pass to right position
Differential Revision: https://reviews.llvm.org/D75345
Craig Topper [Sun, 1 Mar 2020 08:01:38 +0000 (00:01 -0800)]
[X86] Don't add DELETED_NODES to DAG combine worklist after calling SimplifyDemandedBits/SimplifyDemandedVectorElts.
These AddToWorklist calls were added in
84cd968f75bbd6e0fbabecc29d2c1090263adec7.
It's possible the SimplifyDemandedBits/SimplifyDemandedVectorElts
triggered CSE that deleted N. Detect that and avoid adding N
to the worklist.
Fixes PR45067.
Fangrui Song [Sat, 29 Feb 2020 20:08:08 +0000 (12:08 -0800)]
[PowerPC] Move .got2/.toc logic from PPCLinuxAsmPrinter::doFinalization() to emitEndOfAsmFile()
Delete redundant .p2align 2 and improve tests.
Mehdi Amini [Sun, 1 Mar 2020 01:11:12 +0000 (01:11 +0000)]
Fix MLIR build by adding missing header after cleanup in
af450eab
Juneyoung Lee [Sat, 29 Feb 2020 22:22:03 +0000 (07:22 +0900)]
[ValueTracking] Let getGuaranteedNonFullPoisonOp consider assume, remove mentioning about br
Summary:
This patch helps getGuaranteedNonFullPoisonOp handle llvm.assume call.
Also, a comment about the semantics of branch is removed to prevent confusion.
As llvm.assume does, branching on poison directly raises UB (as LangRef says), and this allows transformations such as introduction of llvm.assume on branch condition at each successor, or freely replacing values after conditional branch (such as at loop exit).
Handling br is not addressed in this patch. It makes SCEV more accurate, causing existing LoopVectorize/IndVar/etc tests to fail.
Reviewers: spatel, lebedev.ri, nlopes
Reviewed By: nlopes
Subscribers: hiraditya, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D75397