Simon Glass [Sun, 26 Apr 2020 15:19:51 +0000 (09:19 -0600)]
acpi: Put table-setup code in its own function
We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 26 Apr 2020 15:19:50 +0000 (09:19 -0600)]
acpi: Move acpi_add_table() to generic code
Move this code to a generic location so that we can test it with sandbox.
This requires adding a few new fields to acpi_ctx, so drop the local
variables used in the original code.
Also use mapmem to avoid pointer-to-address casts which don't work on
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:49 +0000 (09:19 -0600)]
acpi: Drop code for missing XSDT from acpi_write_rsdp()
We don't actually support tables without an XSDT so we can drop this dead
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:48 +0000 (09:19 -0600)]
x86: Allow devices to write ACPI tables
Call the new core function to permit devices to write their own ACPI
tables. These tables will appear after all other tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:47 +0000 (09:19 -0600)]
acpi: Convert part of acpi_table to use acpi_ctx
The current code uses an address but a pointer would result in fewer
casts. Also it repeats the alignment code in a lot of places so this would
be better done in a helper function.
Update write_acpi_tables() to make use of the new acpi_ctx structure,
adding a few helpers to clean things up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:46 +0000 (09:19 -0600)]
acpi: Add a method to write tables for a device
A device may want to write out ACPI tables to describe itself to Linux.
Add a method to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Simon Glass [Sun, 26 Apr 2020 15:19:45 +0000 (09:19 -0600)]
acpi: Add a binding for ACPI settings in the device tree
Devices need to report various identifiers in the ACPI tables. Rather than
hard-coding these in drivers it is typically better to put them in the
device tree.
Add a binding file to describe this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 5 Apr 2020 23:22:38 +0000 (17:22 -0600)]
x86: cbfs: Drop unwanted declaration
The intention here is add a forward declaration, not actually declare a
variable. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Wed, 29 Apr 2020 14:39:18 +0000 (10:39 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- rmobile gen2/gen3 DTS sync and defconfig consolidation
Marek Vasut [Sun, 5 Apr 2020 16:08:58 +0000 (18:08 +0200)]
ARM: dts: rmobile: Scrub unused DT nodes
Remove DT nodes which are not used by U-Boot, like audio and video in/out
nodes. This saves about 35 kiB on the resulting U-Boot binary without any
impact on functionality.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Tue, 28 Apr 2020 20:41:00 +0000 (16:41 -0400)]
Merge branch 'migrate-various-PHY-options'
- Finish migration of CONFIG_PHYLIB and a number of related symbols to
defconfig files.
Tom Rini [Tue, 28 Apr 2020 20:15:47 +0000 (16:15 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 24 Apr 2020 19:35:53 +0000 (15:35 -0400)]
Convert CONFIG_PHYLIB et al to Kconfig
This converts the following to Kconfig:
CONFIG_PHYLIB
CONFIG_BITBANGMII
CONFIG_MV88E6352_SWITCH
CONFIG_MV88E61XX_SWITCH
CONFIG_PHYLIB_10G
CONFIG_PHY_AQUANTIA
CONFIG_PHY_ATHEROS
CONFIG_PHY_BROADCOM
CONFIG_PHY_CORTINA
CONFIG_PHY_DAVICOM
CONFIG_PHY_ET1011C
CONFIG_PHY_LXT
CONFIG_PHY_MARVELL
CONFIG_PHY_MICREL
CONFIG_PHY_NATSEMI
CONFIG_PHY_REALTEK
CONFIG_RTL8211X_PHY_FORCE_MASTER
CONFIG_PHY_SMSC
CONFIG_PHY_TERANETICS
CONFIG_PHY_TI
CONFIG_PHY_VITESSE
CONFIG_PHY_XILINX
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 24 Apr 2020 16:30:45 +0000 (12:30 -0400)]
sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB
When moving the PHYLIB PHY drivers around in Kconfig we did not at the
same time perform a careful migration of the related drivers and
sub-options. This lead to the case where previously Kconfig-enabled
driver choices were now disabled on some platforms. Correct this by
enabling both the PHY driver and sub-option on the above referenced
platforms.
Fixes:
af2cbfd6b982 ("drivers: net: Provide Kconfig menu for PHYLIB")
Fixes:
8728c97eff5b ("configs: Re-sync")
Reported-by: Dario <dario86@tutamail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 28 Apr 2020 19:55:57 +0000 (15:55 -0400)]
Prepare v2020.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Fri, 17 Apr 2020 07:21:37 +0000 (16:21 +0900)]
kbuild: SPL/TPL: generate separate asm-offsets.h for SPL and TPL
Currently generic-asm-offsets.h and asm-offsets.h are generated based
on U-Boot proper config options. The same asm-offsets headers are used
for building U-Boot SPL/TPL, which causes potential offset mismatch if
U-Boot proper has different config options from U-Boot SPL/TPL.
This commit adds:
spl/include/generated/(generic-)asm-offsets.h
tpl/include/generated/(generic-)asm-offsets.h
spl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_SPL=y, and included when building SPL.
tpl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_TPL=y, and included when building TPL.
They are created before Kbuild descends into SPL/TPL object directories
and builds $(obj)/dts/dt-platdata.o because $(obj)/dts/dt-platdata.c
includes a bunch of headers.
Prepend -I$(obj)/include to $(UBOOTINCLUDE) so (generic-)asm-offsets.h
is searched in {spl,tpl}/include/generated/.
Requested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Sat, 4 Apr 2020 14:12:48 +0000 (16:12 +0200)]
ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2
Synchronize R-Car Gen3 device trees with Linux 5.6.2,
commit
9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 4 Apr 2020 13:21:26 +0000 (15:21 +0200)]
ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2
Synchronize R-Car Gen2 device trees with Linux 5.6.2,
commit
9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 5 Apr 2020 16:17:42 +0000 (18:17 +0200)]
ARM: rmobile: Unify Gen3 Salvator-X(S) and ULCB defconfigs
The r8a779{5,6,65}_salvator-x and r8a779{5,6,65}_ulcb_defconfig were
building the same target, except for the default DT. The default DT is
however only a detail, as the actual DT to be used to configure U-Boot
is detected automatically based on the CPU ID, hence the default DT is
not meaningful. Unify each three defconfigs per board to reduce the
duplication.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Tue, 28 Apr 2020 14:09:16 +0000 (10:09 -0400)]
Merge tag 'u-boot-amlogic-
20200428' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix sd-emmc controller A init on G12A/G12B/SM1 SoCs
- add GXBB USB PHY driver
- enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards
- fix USB PHYs Power-Up on on VIM3/VIM3L boards
Tom Rini [Tue, 28 Apr 2020 14:08:47 +0000 (10:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC2/DWC3 improvements
- Assorted bugfixes
Tom Rini [Tue, 28 Apr 2020 14:08:20 +0000 (10:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Tue, 28 Apr 2020 13:52:01 +0000 (09:52 -0400)]
Merge tag 'dm-pull-27apr20' of git://git.denx.de/u-boot-dm
Move Python tools to use absolute paths
Minor buildman fixes for new features
Make libfdt code more similar to upsteam
Patrice Chotard [Tue, 28 Apr 2020 11:49:50 +0000 (13:49 +0200)]
usb: host: dwc3-sti-glue: Use UCLASS_NOP instead of UCLASS_MISC
dwc3-sti-glue has been broken since MISC uclass has been
modified to scan DT sub-nodes after bind.
Fixing it by a using the no-op uclass.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Mon, 27 Apr 2020 13:30:01 +0000 (15:30 +0200)]
usb: host: dwc2: add trace to have clean usb start
Solve issue for the display of "usb start" command on stm32mp1
because one carriage return is missing in DWC2 probe.
Before the patch:
STM32MP> usb start
starting USB...
Bus usb-otg@
49000000: Bus usbh-ehci@
5800d000: USB EHCI 1.00
after the patch:
STM32MP> usb start
starting USB...
Bus usb-otg@
49000000: USB DWC2
Bus usbh-ehci@
5800d000: USB EHCI 1.00
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 27 Apr 2020 13:30:00 +0000 (15:30 +0200)]
usb: host: dwc2: force reset assert
Assert reset before deassert in dwc2_reset;
this patch solve issues when the DWC2 registers are already
initialized with value incompatible with host mode.
Force a hardware reset of the IP reset all the DWC2 registers at
default value, the host driver start with a clean state
(Core Soft reset doen in dwc_otg_core_reset is not enought
to reset all register).
The error can occurs in U-Boot when DWC2 device gadget driver
force device mode (called by ums or dfu command, before to execute
the usb start command).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 27 Apr 2020 13:29:59 +0000 (15:29 +0200)]
usb: host: dwc2: add clk support
Add support for clock with driver model.
This patch don't added dependency because when CONFIG_CLK
is not activated the clk function are stubbed.
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 27 Apr 2020 13:29:58 +0000 (15:29 +0200)]
usb: host: dwc2: add phy support
Use generic phy to initialize the PHY associated to the
DWC2 device and available in the device tree.
This patch don't added dependency because when CONFIG_PHY
is not activated, the generic PHY function are stubbed.
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 27 Apr 2020 13:29:57 +0000 (15:29 +0200)]
dm: clk: add stub when CONFIG_CLK is deactivated
Add stub for functions clk_...() when CONFIG_CLK is deactivated.
This patch avoids compilation issues for driver using these API
without protection (#if CONFIG_IS_ENABLED(CLK))
For example, before this patch we have undefined reference to
`clk_disable_bulk') for code:
clk_disable_bulk(&priv->clks);
clk_release_bulk(&priv->clks);
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Heinrich Schuchardt [Sun, 19 Apr 2020 10:11:12 +0000 (12:11 +0200)]
usb: ether: avoid NULL check before free()
free() checks if its argument is NULL. Do not duplicate this check.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 19 Apr 2020 10:02:28 +0000 (12:02 +0200)]
usb: avoid NULL check before free
The free() function checks if the argument is NULL.
Do not duplicate this check.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Neil Armstrong [Tue, 21 Apr 2020 08:17:42 +0000 (10:17 +0200)]
usb: dwc3-meson-g12a: add power-on/off of the PHYs
Power on/off the PHYs to enable power to the USB ports, fixing USB support
on Khadas VIM3/VIM3L boards.
The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the
DWC2 and DWC3 controller and the other one directly connected to the DWC3
controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller
and a DW-PCIE controller.
All PHYs are optional, but it's type (usb2/usb3) and position are important
to determine it's capabilities, thus they are stored in a fixed size
array and the phy-name determines it's position, it's position determining
it's type and functionnalities.
This is why we need to loop over the array to power on all the DT provided
PHYs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Neil Armstrong [Mon, 20 Apr 2020 13:44:45 +0000 (15:44 +0200)]
configs: khadas-vim3: enable support for SPI NOR flash
Enable the necessary configs to make usage of the SPI NOR Flash.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 20 Apr 2020 13:44:44 +0000 (15:44 +0200)]
arm: dts: meson-khadas-vim3: enable SPI NOR flash
Enable the SPI flash controller and reduce the usable eMMC data pins to 4
to permit using the on-board SPI NOR Flash.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 20 Apr 2020 13:44:43 +0000 (15:44 +0200)]
configs: khadas-vim2: enable support for SPI NOR flash
Add the necessary configs to use the SPI NOR flash.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 20 Apr 2020 13:44:42 +0000 (15:44 +0200)]
arm: dts: meson-gxm-khadas-vim2-u-boot: enable SPI NOR flash
Activate the on-board SPI NOR Flash by enabling the SPI controller and
disabling the DS eMMC pin in the VIM2 u-boot.dtsi file.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 20 Apr 2020 13:44:41 +0000 (15:44 +0200)]
arm64: dts: meson: sync dt and bindings from v5.7-rc1
Sync the device tree and dt-bindings from Linux v5.7-rc1
8f3d9f354286
("Linux 5.7-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Beniamino Galvani [Sun, 18 Aug 2019 13:42:54 +0000 (15:42 +0200)]
phy: meson: add GXBB PHY driver
This adds support for the USB PHY found on Amlogic GXBB SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 20 Apr 2020 13:46:30 +0000 (15:46 +0200)]
clk: meson: g12a: add missing SD_EMMC_A controller gates
Add missing SD_EMMC_A controller gates needed for probe of the A
controller, otherwise leading to a freeze of the SoC after
b3d69aa596.
Fixes:
b3d69aa596 ("clk: meson: reset mmc clock on probe")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Mon, 27 Apr 2020 21:50:43 +0000 (17:50 -0400)]
Merge branch '2020-04-27-master-imports'
- Assorted bugfixes.
- Documentation improvements including support for https://u-boot.readthedocs.io/
Tom Rini [Mon, 27 Apr 2020 21:50:35 +0000 (17:50 -0400)]
Merge tag 'mips-pull-2020-04-27' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- brcmnand: fix missing code path from Linux driver
- bmips: fix build error when disabling USB
- mips: add option to restore original exception vector base
- mips: fix off-by-one error when clearing gd_data
- mips: minor fixes for compatibility with generic SPL framework
- spl: refactor legacy image loading
- spl: add LZMA decompression support for legacy images
- Makefile: add target to build LZMA compressed U-Boot images
- mtmips: refactor and rewrite low-level init code
- mtmips: add and enable SPL support with LZMA
- mtmips: add support for MT7628 reference board
- mtmips: add support for VoCore/VoCore2 board
Tom Rini [Mon, 27 Apr 2020 21:50:11 +0000 (17:50 -0400)]
Merge tag 'arc-more-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
Here we introduce new development platfrom for ARC: HSDK 4xD.
That's pretty much the same base-board as in HSDK but with
very recent quad-core ARC HS47D in the ASIC.
Thus we try to re-use existing code as much as possible while
inevitably add some pieces needed for the new ASIC.
Also we drop selection of bounce buffers on AXS10x
as there's no use of them any longer.
Tom Rini [Fri, 10 Apr 2020 22:28:04 +0000 (18:28 -0400)]
Azure/GitLab: Switch over to using LLVM-10
At this point LLVM-7 is rather old. Switch over to LLVM-10 to enable
some amount of CI coverage with newer compilers.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 12 Feb 2020 22:14:57 +0000 (17:14 -0500)]
travis: Switch over to using LLVM-10
At this point LLVM-7 is rather old. Switch over to LLVM-10 to enable
some amount of CI coverage with newer compilers.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Apr 2020 21:18:32 +0000 (17:18 -0400)]
Azure/GitLab: Update to latest Docker image
This provides a newer ARC toolchain along with being based on a newer
Ubuntu bionic tag.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Apr 2020 20:41:11 +0000 (16:41 -0400)]
travis: Update ARC toolchain to 2019.09
Per Alexey Brodkin, this is the current toolchain we should use when
building for ARC, update.
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Thu, 23 Apr 2020 07:39:08 +0000 (09:39 +0200)]
Makefile: copy SPL_FIT_SOURCE in build directory
Copy the .its source file selected by CONFIG_SPL_FIT_SOURCE
in builddir and in a file named "u-boot.its".
This patch avoid compilation issue when CONFIG_SPL_FIT_SOURCE is used
and KBUILD_OUTPUT is defined, in buildman for example.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Patrick Delaunay [Wed, 22 Apr 2020 12:18:26 +0000 (14:18 +0200)]
net: tftp: remove TFTP_MTU_BLOCKSIZE
Remove the unneeded define TFTP_MTU_BLOCKSIZE.
Since the KConfig migration done by commit
b618b3707633 ("net:
Convert CONFIG_TFTP_BLOCKSIZE to Kconfig"), CONFIG_TFTP_BLOCKSIZE
is always defined and can be used directly to avoid confusion
(fallback to 1468 in code is never used).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 22 Apr 2020 12:18:25 +0000 (14:18 +0200)]
net: tftp: Add help for CONFIG_TFTP_BLOCKSIZE
Add help message for the CONFIG_TFTP_BLOCKSIZE default value,
as explain in tftp.c before migration in commit
b618b3707633
("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Arnaud Ferraris [Wed, 22 Apr 2020 10:43:44 +0000 (12:43 +0200)]
fs: ext4: skip journal state if fs has metadata_csum
As u-boot doesn't support the metadata_csum feature, writing to a
filesystem with this feature enabled will fail, as expected. However,
during the process, a journal state check is performed, which could
result in:
- a fs recovery if the fs wasn't umounted properly
- the fs being marked dirty
Both these cases result in a superblock change, leading to a mismatch
between the superblock checksum and its contents. Therefore, Linux will
consider the filesystem heavily corrupted and will require e2fsck to be
run manually to boot.
By bypassing the journal state check, this patch ensures the superblock
won't be corrupted if the filesystem has metadata_csum feature enabled.
Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
Heinrich Schuchardt [Mon, 20 Apr 2020 18:48:40 +0000 (20:48 +0200)]
test: test_fs error message
For non-root users mkfs.vfat is not in the search path at least on Debian.
Hence when running 'make tests' a message indicates that file system tests
have been skipped:
SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16
This message is not really helpful as the executed program is not
indicated. Provide a more complete message like
SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16.
Command 'mkfs.vfat -F 16 build-sandbox/persistent-data/3GB.fat16.img'
returned non-zero exit status 127.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 20 Apr 2020 15:40:57 +0000 (17:40 +0200)]
lib: zlib: fix formatting, reference
Provide a valid reference for the deflate format.
Reformat the ALGORITHM and REFERENCES comments.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 20 Apr 2020 15:38:31 +0000 (17:38 +0200)]
doc: sphinx: refresh parse-headers.pl from Linux
Copy parse-headers.pl from Linux kernel tree:
* fix the parameter description %s/--man/--usage/
* fix a documentation reference
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 21 Apr 2020 10:11:59 +0000 (12:11 +0200)]
Add .readthedocs.yml
readthedocs.org allows to automatically generate and publish the HTML
documentation for the U-Boot project.
Add a file controlling building https://u-boot.readthedocs.io/.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 21 Apr 2020 10:11:58 +0000 (12:11 +0200)]
doc: specify that xelatex is used as Latex engine
Building the pdf documentation on readthedocs.org fails with pdflatex.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Rasmus Villemoes [Tue, 24 Mar 2020 12:57:40 +0000 (13:57 +0100)]
tools: fw_env: use erasesize from MEMGETINFO ioctl
We have a board with several revisions. The older ones use a nor flash
with 64k erase size, while the newer have a flash with 4k sectors. The
environment size is 8k.
Currently, we have to put a column containing 0x10000 (64k) in
fw_env.config in order for it to work on the older boards. But that
ends up wasting quite a lot of time on the newer boards that could
just erase the 8k occupied by the environment - strace says the 64k
erase takes 0.405 seconds. With this patch, as expected, that's about
an 8-fold better, at 0.043 seconds.
Having different fw_env.config files for the different revisions is
highly impractical, and the correct information is already available
right at our fingertips. So use the erasesize returned by the
MEMGETINFO ioctl when the fourth and fifth columns (sector size and
#sectors, respectively) are absent or contain 0, a case where the
logic previously used to use the environment size as erase size (and
consequently computed ENVSECTORS(dev) as 1).
As I'm only testing this on a NOR flash, I'm only changing the logic
for that case, though I think it should be possible for the other
types as well.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Eugeniy Paltsev [Fri, 20 Mar 2020 16:38:17 +0000 (19:38 +0300)]
CMD: random: fix return code
As of today 'random' command return 1 (CMD_RET_FAILURE) in case
of successful execution and 0 (CMD_RET_SUCCESS) in case of bad
arguments. Fix that.
NOTE: we remove printing usage information from command body
so it won't print twice.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mauro Condarelli [Tue, 18 Feb 2020 08:34:48 +0000 (09:34 +0100)]
mips: Add support for SoM "VoCore2".
Small patch to add support for VoCore/VoCore2 board.
VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.
Details about this SoM can be found at "https://vocore.io/v2.html".
Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 6 Mar 2020 14:14:05 +0000 (15:14 +0100)]
mips: mt76x8: ddr_cal: Correct dqs_find_min/max implementations
The current implementations have some issues detecting the correct
values:
dqs_find_max() will return "last passing fieldval + 1" instead of
"last passing fieldval". Also it will return "maxval + 1" in the
case that all fieldvals are tested valid (without error).
dqs_find_min() will not test the "lowest" value because of using ">"
instead of ">=".
This patch now rewrites these functions to fix those issues. Also,
this patch uses the same approach of a for loop in both functions making
it easier to read and maintain.
Since the variables are integers now, we can use min()/max(), which
handles the wrap around case for fieldval=0: return (0 - 1).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Fri, 6 Mar 2020 14:14:04 +0000 (15:14 +0100)]
mips: mt76x8: ddr_cal: Change types from u32 to int in dqs_find_min/max
This change is made to enable comparison of integer variables, which
might be negative in the next patch. No functional change is intended
in this patch.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Fri, 6 Mar 2020 14:14:03 +0000 (15:14 +0100)]
mips: mt76x8: ddr_cal: Rename dqs_test_valid() to dqs_test_error()
This function returns "-1" (true) upon error. So the function name does
not match its implementation which is confusing. This patch renames the
function to dqs_test_error() which makes the code easier to read.
Also change the return type to bool and return "true" or "false".
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:50 +0000 (09:28 +0200)]
mips: mtmips: Increase CONFIG_SPL_SYS_MALLOC_F_LEN
Since SPL now uses malloc to allocate the buffer for the compressed
image before decompression to the destination address, we need to
configure a big enough malloc space in SPL. 256k seems to be big
enough even for the GARDENA board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:49 +0000 (09:28 +0200)]
mips: mtmips: add support for mt7628-rfb
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:48 +0000 (09:28 +0200)]
mips: mtmips: enable SPL for all boards
This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.
SPL_DM and OF_CONTROL are enabled for both boards.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:47 +0000 (09:28 +0200)]
mips: mtmips: add SPL support
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.
The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.
A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.
A spl loader is added to support uncompress the payload.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:34 +0000 (09:28 +0200)]
mips: mtmips: rewrite lowlevel codes of mt7628
This patch rewrites the mtmips architecture with the following changes:
1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
and delay functions.
Note:
print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:33 +0000 (09:28 +0200)]
mips: add a option to support not reserving malloc space on initial stack
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:27 +0000 (09:28 +0200)]
mips: add an option to support initialize SRAM for initial stack
Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the
initial stack can be used directly. However on some platform the SRAM needs
initialization, e.g. lock cache.
This patch adds an option to allow a new function mips_sram_init() being
called before setup_stack_gd.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:45 +0000 (09:28 +0200)]
spl: spl_legacy: Add lzma decompression support for legacy image
This patch adds support for decompressing LZMA compressed u-boot payload
in legacy uImage format.
Using this patch together with u-boot-lzma.img may be useful for some
platforms as they can reduce the size and load time of u-boot payload.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:44 +0000 (09:28 +0200)]
spl: spl_nor: Remove unused variable 'ret' warning
With the if statement now for the legacy image handling, the compiler
now generates this compile time warning:
common/spl/spl_nor.c:27:6: warning: unused variable 'ret' [-Wunused-variable]
This patch removes this warning by changing the 'ret' variable handling.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:43 +0000 (09:28 +0200)]
spl: spl_nor: Move legacy image loading into spl_legacy.c
Move the legacy image loading into spl_legacy.c. This makes it easier
to extend the legacy image handling with new features that other
SPL loaders might use (e.g. spl_spi.c etc).
No functional change intended.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:42 +0000 (09:28 +0200)]
spl: spl_legacy: Use IS_ENABLED() to remove #ifdef
Use IS_ENABLED() instead of #ifdef CONFIG_ to remove one #ifdef.
No functional change intended.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:41 +0000 (09:28 +0200)]
spl: Extract legacy image handling into separate file
This patch moves the legacy image handling into a separate file, which
will be extended with other legacy image features later.
No function change intended.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:39 +0000 (09:28 +0200)]
Makefile: add support to generate LZMA compressed u-boot image
This patch adds support for generating LZMA compressed u-boot image.
The compressed image can be used for SPL to reduce the size of the u-boot
binary.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:38 +0000 (09:28 +0200)]
lib: enable lzma decompression support for SPL build
This patch enables LZMA decompression support for SPL build
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:35 +0000 (09:28 +0200)]
dts: mtmips: add alternative pinmux node for uart2
This patch adds a new pinmux for UART2, which shares the pins with SPIS.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:32 +0000 (09:28 +0200)]
mips: add a mtmips-specific field to architecture-specific global data
SoCs of mtmips can use different CPU frequencies depending on the HW/SW
configurations. For example mt7628 uses 580MHz clock if the input xtal
frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
the CPU uses the xtal frequency directly.
So hardcoding the timer frequency (half of the CPU frequency) in
CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.
This patch adds a mtmips-specific field timer_freq to arch_global_data.
This field will be used later in mtmips-specific get_tbclk() to provide
accurate timer frequency in different boot stage.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:30 +0000 (09:28 +0200)]
mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:29 +0000 (09:28 +0200)]
sysreset: add reset controller based reboot driver
Some chips provide their sysreset function in reset controller, which is
normally a bit written to 1 to perform the sysreset.
This patch adds a new sysreset driver to take advantage of it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Stefan Roese [Tue, 21 Apr 2020 07:28:46 +0000 (09:28 +0200)]
mips: spl: Flush cache before jumping to U-Boot proper
This patch adds a MIPS specific jump_to_image_no_args() implementation,
which flushes the U-Boot proper image loaded from the boot device in
SPL before jumping to it.
It has been noticed on MT76x8, that this cache flush is needed. Other
MIPS platforms might need it as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:37 +0000 (09:28 +0200)]
mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds
u_boot_list is not only used by DM, but also by some SPL image load methods
such as spl_nor.c.
This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with
CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image
loaders can be correctly built into u-boot SPL without DM enabled.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:36 +0000 (09:28 +0200)]
mips: enable support for appending dtb to spl binary
If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also
enabled, the dtb will be appended to the u-boot-spl.bin.
When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate
dtb at the end of u-boot-spl.bin, by referencing to _image_binary_end.
However _image_binary_end is currently missing in u-boot-spl.lds.
This patch adds _image_binary_end to u-boot-spl.lds to make sure linking
u-boot-spl will not fail.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:28 +0000 (09:28 +0200)]
mips: start.S: avoid overwriting outside gd when clearing global data in stack
When setting up initial stack, global data will also be put in the stack,
and being cleared.
The assembler instructions for clearing gd is as follows:
move t0, k0
1:
PTR_S zero, 0(t0)
blt t0, t1, 1b
PTR_ADDIU t0, PTRSIZE
t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE).
[PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it
will be executed before the branch operation.
However the comparison for the BLT instruction is done before executing the
delay slot. This means when the last word just before k1 is cleared, the
loop will continue to run once. This will clear an extra word at k1, which
is outside the global data.
Global data is placed at the top of the stack. If the initial stack is a
SRAM or locked cache, the area outside them may be inaccessible. A write
operation performed in this area may cause an exception.
To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT
instruction.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:26 +0000 (09:28 +0200)]
mips: mtmips: add predefined i-cache/d-cache size and linesize
Both mt7620 and mt7628 has the same cache configuration. There is no need
to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime.
Add them into Kconfig to reduce some code size.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:31 +0000 (09:28 +0200)]
configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards
This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips
boards.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 21 Apr 2020 07:28:25 +0000 (09:28 +0200)]
mips: add support to restore exception vector base before booting linux
In U-Boot the exception vector base will be moved to top of memory, to be
used to display register dump when exception occurs.
But some old linux kernel does not honor the base set in CP0_EBASE. A
modified exception vector base will cause kernel crash.
This patch adds an option to enable reset exception vector base to its
previous value, or a user configured value before booting linux kernel.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Álvaro Fernández Rojas [Sat, 4 Apr 2020 14:01:12 +0000 (16:01 +0200)]
bmips: allow disabling usb support
Currently, if usb is disabled the following error is produced:
CC drivers/usb/host/ohci-hcd.o
drivers/usb/host/ohci-hcd.c: In function ‘usb_lowlevel_init’:
drivers/usb/host/ohci-hcd.c:2057:35: error: ‘CONFIG_SYS_USB_OHCI_REGS_BASE’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_MONITOR_BASE’?
gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CONFIG_SYS_MONITOR_BASE
drivers/usb/host/ohci-hcd.c:2057:35: note: each undeclared identifier is reported only once for each function it appears in
drivers/usb/host/ohci-hcd.c:2061:20: error: ‘CONFIG_SYS_USB_OHCI_SLOT_NAME’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS’?
gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Thu, 2 Apr 2020 08:37:52 +0000 (10:37 +0200)]
nand: brcmnand: return without disabling clock
Linux Broadcom NAND driver only disabled clock if no childs are initialized.
This section of the code seems to have been accidentally dropped when it was
imported in U-Boot.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tom Rini [Mon, 27 Apr 2020 13:41:51 +0000 (09:41 -0400)]
Merge tag 'video-for-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- simple panel 'nv140fhmn49' compatible
- rockchip eDP and LVDS drivers build fix
Eugeniy Paltsev [Thu, 23 Apr 2020 19:45:20 +0000 (22:45 +0300)]
ARC: AXS10x: cleanup kconfig
As we've dropped NAND support for AXS101 and AXS103
see commit
4f5e552d95bb ("ARC: AXS10x: drop NAND support")
we don't need bounce buffer anymore.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Fri, 24 Apr 2020 20:11:10 +0000 (23:11 +0300)]
ARC: HSDK-4xD: make init status resistant to U-boot reloading
Use register intstead of static variable to store HSDK init status as
we want to avoid the situation when we reload U-boot via MDB after
previous init is done but HW reset (board reset) isn't done. So
let's store the init status in unused register - CREG_CPU_0_ENTRY
so status will survive after U-boot is reloaded via MDB.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 21 Apr 2020 23:59:31 +0000 (02:59 +0300)]
ARC: HSDK-4xD: use separate config file
HSDK-4xD has quite different environment so let's split
HSDK and HSDK-4xD configs file.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Wed, 25 Mar 2020 09:35:49 +0000 (12:35 +0300)]
ARC: HSDK-4xD: tweak memory map
For HSDK-4xD we do additional AXI bridge tweaking while doing
hsdk_init command:
- we shrink IOC region.
- we configure ARC HS CORE SLV1 aperture depending on
haps_apb_location environment variable.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 23 Mar 2020 18:50:03 +0000 (21:50 +0300)]
ARC: HSDK-4xD: add CSM configuration support
Add support for CSM enable/disable and CSM relocation via
hsdk_init command. We allow to relocate CSM to the beginning of
any aperture even if HW support finer granularity.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 23 Mar 2020 17:46:35 +0000 (20:46 +0300)]
ARC: HSDK-4xD: add support for SLC enable/disable
Add support for SLC enable/disable via hsdk_init command.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Thu, 23 Apr 2020 11:52:43 +0000 (14:52 +0300)]
ARC: HSDK-4xD: print timer clock value
Print timer clock value in hsdk_clock print_all command.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Wed, 22 Apr 2020 19:44:24 +0000 (22:44 +0300)]
ARC: HSDK-4xD: drop additional GPU clock info
HSDK-4xD has other GPU type so it consumes only GPU core clock.
Even we have additional GPU clock dividers they are not routed
to anything. So drop information about those additional clocks
in hsdk_clock print_all command.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 21 Apr 2020 23:08:06 +0000 (02:08 +0300)]
ARC: HSDK-4xD: print info about HDMI clocks
HSDK-4xD has HDMI working so let's print info about HDMI clocks.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 21 Apr 2020 22:57:41 +0000 (01:57 +0300)]
ARC: HSDK-4xD: fix headerize script for HSDK-4xD compatibility
ARC HS CPU in HSDK-4xD has ARC ID = 0x54, so fix headerize script
accordingly.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Thu, 16 Jan 2020 16:22:32 +0000 (19:22 +0300)]
ARC: HSDK-4xD: use active low polarity of cpu_start pulse
Add quirk for HSDK-4xD - due to HW issues HSDK can use any pulse
polarity but HSDK-4xD require active low polarity of cpu_start pulse.
So use low polarity of cpu_start pulse for both board.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>