Matt Arsenault [Thu, 11 Jun 2020 23:19:13 +0000 (19:19 -0400)]
AMDGPU/GlobalISel: Fix select of private <2 x s16> load
Sanjay Patel [Thu, 11 Jun 2020 20:50:03 +0000 (16:50 -0400)]
[VectorCombine] remove unused parameters; NFC
Vitaly Buka [Thu, 11 Jun 2020 20:47:50 +0000 (13:47 -0700)]
[StackSafety,NFC] Fix use of CallBase API
Code does not need iterate arguments and can get ArgNo from
CallBase::getArgOperandNo.
Matt Arsenault [Thu, 11 Jun 2020 12:54:00 +0000 (08:54 -0400)]
AMDGPU/GlobalISel: Fix select of <8 x s64> scalar load
Akira Hatanaka [Wed, 3 Jun 2020 23:41:50 +0000 (16:41 -0700)]
[CodeGen] Simplify the way lifetime of block captures is extended
Rather than pushing inactive cleanups for the block captures at the
entry of a full expression and activating them during the creation of
the block literal, just call pushLifetimeExtendedDestroy to ensure the
cleanups are popped at the end of the scope enclosing the block
expression.
rdar://problem/
63996471
Differential Revision: https://reviews.llvm.org/D81624
Jonas Devlieghere [Thu, 11 Jun 2020 22:39:49 +0000 (15:39 -0700)]
[lldb/Test] Unify DYLD_INSERT_LIBRARIES solution for ASan and TSan
Add the same fix for loading the sanitizer runtime for TSan as we
currently have for ASan and unify the code with a helper function.
Matt Arsenault [Thu, 11 Jun 2020 22:28:31 +0000 (18:28 -0400)]
AMDGPU/GlobalISel: Set insert point when emitting control flow pseudos
This was implicitly assuming the branch instruction was the next after
the pseudo. It's possible for another non-terminator instruction to be
inserted between the intrinsic and the branch, so adjust the insertion
point. Fixes a non-terminator after terminator verifier error (which
without the verifier, manifested itself as an infinite loop in
analyzeBranch much later on).
George Mitenkov [Thu, 11 Jun 2020 22:46:09 +0000 (18:46 -0400)]
[MLIR][SPIRVToLLVM] Added conversion for SPIR-V comparison ops
Implemented `FComparePattern` and `IComparePattern` classes
that provide conversion of SPIR-V comparison ops (such as
`spv.FOrdGreaterThanEqual` and others) to LLVM dialect.
Also added tests in `comparison-ops-to-llvm.mlir`.
Differential Revision: https://reviews.llvm.org/D81487
Kirill Naumov [Thu, 11 Jun 2020 20:24:14 +0000 (20:24 +0000)]
[InlineCost] Preparational patch for creation of Printer pass.
- Renaming the printer class, flag
- Refactoring
- Changing some tests
This patch is a preparational stage for introducing a new printing pass and new
functionality to the existing Annotation Writer. I plan to extend
this functionality for this tool to be more useful when looking at the inline
process.
Fangrui Song [Thu, 11 Jun 2020 22:19:05 +0000 (15:19 -0700)]
[Support] Don't tie errs() to outs() by default
This reverts part of D81156.
Accessing errs() concurrently was safe before and racy after D81156.
(`errs() << 'a'` is always racy)
Accessing outs() and errs() concurrently was safe before and racy after D81156.
Don't tie errs() to outs() by default to fix the fallout.
llvm-dwarfdump is single-threaded and opting in the tie behavior is safe.
John McCall [Thu, 11 Jun 2020 22:09:36 +0000 (18:09 -0400)]
Set the LLVM FP optimization flags conservatively.
Functions can have local pragmas that override the global settings.
We set the flags eagerly based on global settings, but if we emit
an expression under the influence of a pragma, we clear the
appropriate flags from the function.
In order to avoid doing a ton of redundant work whenever we emit
an FP expression, configure the IRBuilder to default to global
settings, and only reconfigure it when we see an FP expression
that's not using the global settings.
Patch by Michele Scandale!
https://reviews.llvm.org/D80462
Stanislav Mekhanoshin [Thu, 11 Jun 2020 17:45:42 +0000 (10:45 -0700)]
Fixed assertion in SROA if block has ho successors
BasicBlock::isLegalToHoistInto() asserts if block does not
have successors. The case is degenarate but assertion still
needs to be avoided.
https://bugs.llvm.org/show_bug.cgi?id=46280
Differential Revision: https://reviews.llvm.org/D81674
Craig Topper [Thu, 11 Jun 2020 21:54:41 +0000 (14:54 -0700)]
[X86] Remove unnecessary #if around call to isCpuIdSupported in getHostCPUName.
The exact same #if is already inside isCpuIdSupported and causes
it to return true. The definition of isCpuIdSupported isn't
conditional so we should be able just rely on its body doing
the right thing.
Thomas Lively [Thu, 11 Jun 2020 22:11:45 +0000 (15:11 -0700)]
[WebAssembly] Make BR_TABLE non-duplicable
Summary:
After their range checks were removed in
7f50c15be5c0, br_tables
started being duplicated into their predecessors by tail
folding. Unfortunately, when the br_tables were in loops this
transformation introduced bad irreducible control flow which was later
expanded into even more br_tables. This commit abuses the
`isNotDuplicable` property to prevent this irreducible control flow
from being introduced. This change saves a few dozen bytes of code
size and has a negligible affect on performance for most of the large
Emscripten benchmarks, but can improve performance significantly on
microbenchmarks of switches in loops.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81628
Ilya Bukonkin [Thu, 11 Jun 2020 21:59:19 +0000 (14:59 -0700)]
[lldb] Check if thread was suspended during previous stop added.
Encountered the following situation: Let we started thread T1 and it hit
breakpoint on B1 location. We suspended T1 and continued the process.
Then we started thread T2 which hit for example the same location B1.
This time in a breakpoint callback we decided not to stop returning
false.
Expected result: process continues (as if T2 did not hit breakpoint) its
workflow with T1 still suspended. Actual result: process do stops (as if
T2 callback returned true).
Solution: We need invalidate StopInfo for threads that was previously
suspended just because something that is already inactive can not be the
reason of stop. Thread::GetPrivateStopInfo() may be appropriate place to
do it, because it gets called (through Thread::GetStopInfo()) every time
before process reports stop and user gets chance to change
m_resume_state again i.e if we see m_resume_state == eStateSuspended
it definitely means it was set during previous stop and it also means
this thread can not be stopped again (cos' it was frozen during
previous stop).
Differential revision: https://reviews.llvm.org/D80112
Diego Caballero [Thu, 11 Jun 2020 21:39:44 +0000 (14:39 -0700)]
[mlir][Affine] Revisit fusion candidates after successful fusion
This patch changes the fusion algorithm so that after fusing two loop nests
we revisit previously visited nodes so that they are considered again for
fusion in the context of the new fused loop nest.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D81609
Reid Kleckner [Thu, 11 Jun 2020 20:00:54 +0000 (13:00 -0700)]
Re-land "Migrate the rest of COFFObjectFile to Error"
This reverts commit
101fbc01382edd89ea7b671104c68b30b2446cc0.
Remove leftover debugging attribute.
Update LLDB as well, which was missed before.
Kadir Cetinkaya [Thu, 11 Jun 2020 20:49:52 +0000 (22:49 +0200)]
[clangd] Set CWD in semaCodeComplete
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81691
Alex Richardson [Thu, 11 Jun 2020 21:23:27 +0000 (22:23 +0100)]
Fix incorrect call to ExprResult::get()
Res is already a ExprResult, so if we call .get(), we will convert an
ExprError() result into an unset result. I discovered this in our downstream
CHERI target where this resulted in a crash due to a NULL-dereference.
It appears that this was introduced in SVN revision 201788 (
8690a6860a45ba36e39b4ff0dbe434195e125d11)
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D81608
Fangrui Song [Thu, 11 Jun 2020 20:50:56 +0000 (13:50 -0700)]
[GlobalISel][test] Add REQUIRES: asserts after D76934
Jacques Pienaar [Thu, 11 Jun 2020 20:45:09 +0000 (13:45 -0700)]
[mlir] Remove Broadcastable ODS trait
Alias to ResultsBroadcastableShape ODS trait which matches C++ class.
Louis Dionne [Thu, 11 Jun 2020 19:41:38 +0000 (15:41 -0400)]
[libc++] Allow specifying arbitrary custom executors with the new format
The integration between CMake and executor selection in the new format
wasn't very flexible -- only the default executor and SSH executors were
supported.
This patch makes it possible to specify arbitrary executors with the new
format. With the new testing format, a custom executor is just a script
that gets called with a command-line to execute, and some arguments like
--env, --codesign_identity and --execdir. As such, the default executor
is just run.py.
Remote execution with the SSH executor can be achived by specifying
LIBCXX_EXECUTOR="<path-to-ssh.py> --host <host>". Similarly, arbitrary
scripts can be provided.
Alexander Belyaev [Thu, 11 Jun 2020 17:22:48 +0000 (19:22 +0200)]
[mlir] Fix some of the warnings in MLIR code.
Summary:
* extra ';' in the following files:
mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
mlir/lib/Dialect/Shape/IR/Shape.cpp
* base class ‘mlir::ConvertVectorToSCFBase<ConvertVectorToSCFPass>’
should be explicitly initialized in the copy constructor [-Wextra] in
mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
* warning: ‘bool Expression::operator==(const Expression&) const’
defined but not used [-Wunused-function] in
mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
Differential Revision: https://reviews.llvm.org/D81673
Craig Topper [Thu, 11 Jun 2020 19:45:54 +0000 (12:45 -0700)]
[X86] Force VIA PadLock crypto instructions to emit a 0xF3 prefix when they encode to match what GNU as does.
The spec for these says they need 0xf3 but also mentions REP
before the mnemonic. But I don't think its fair to users to make
them write REP first. And gas doesn't make them. objdump seems to
disassemble with or without the prefix and just prints any 0xf3
as REP.
Aditya Nandakumar [Thu, 11 Jun 2020 19:29:12 +0000 (12:29 -0700)]
[GISel][NFC]: Add unit test for clarifying CSE behavior
Add a unit test that shows how CSE works if we install an observer
at the machine function level and not use the CSEMIRBuilder to build
instructions.
https://reviews.llvm.org/D81625
Erich Keane [Mon, 1 Jun 2020 19:14:34 +0000 (12:14 -0700)]
Add to the Coding Standard our that single-line bodies omit braces
This is a rule that seems to have been enforced for the better part of
the decade, so we should document it for new contributors.
Differential Revision: https://reviews.llvm.org/D80947
Bruno Ricci [Thu, 11 Jun 2020 16:36:28 +0000 (17:36 +0100)]
[clang] TextNodeDumper: Dump the trait spelling of {Type,ArrayType,Expression}TraitExpr
nodes using the new helper functions introduced
in
78e636b3f2f0b0487130b31fade4f95ab179a18c.
Bruno Ricci [Thu, 11 Jun 2020 16:29:15 +0000 (17:29 +0100)]
[clang][NFC] Assert that the enumerator value of {Type,ArrayType,UnaryExprOrType,Expression}Traits
is valid and does not overflow in the bit-field for its storage in more places.
This is a follow-up to
78e636b3f2f0b0487130b31fade4f95ab179a18c. NFC.
Bruno Ricci [Thu, 11 Jun 2020 16:24:04 +0000 (17:24 +0100)]
[clang][NFC] Remove two hard-coded lists of ArrayTypeTrait and ExpressionTrait
These two were missed in
78e636b3f2f0b0487130b31fade4f95ab179a18c.
Siva Chandra Reddy [Tue, 2 Jun 2020 21:04:57 +0000 (14:04 -0700)]
[libc] Add implementation of few floating point manipulation functions.
Implementations of copysign[f], frexp[f], logb[f], and modf[f] are added.
Reviewers: asteinhauser
Differential Revision: https://reviews.llvm.org/D81134
Craig Topper [Thu, 11 Jun 2020 19:18:52 +0000 (12:18 -0700)]
[X86] Replace TB with PS on instructions that are documented in the SDM with 'NP'
'NP' means that the instruction is not recognized with a 66, F2 or F3
prefix. It will either #UD or decode to a different instruction.
All of the cases are here should fall into the #UD variety since
we should be detecting the collision with other instructions when
we build the disassembler tables.
Eli Friedman [Thu, 11 Jun 2020 19:13:18 +0000 (12:13 -0700)]
[AArch64] Regenerate SVE test llvm-ir-to-intrinsic.ll.
Louis Dionne [Thu, 11 Jun 2020 17:50:40 +0000 (13:50 -0400)]
[libc++abi] Simplify the logic for finding libc++ from libc++abi
Since we have the monorepo, libc++abi's build requires a sibling checkout
of the libc++ sources. Hence, the logic for finding libc++ can be greatly
simplified.
Alexey Bataev [Thu, 11 Jun 2020 15:28:59 +0000 (11:28 -0400)]
[OPENMP50]Codegen for scan directive in simd loops.
Added codegen for scan directives in simd loop. The codegen transforms
original code:
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan inclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<first part>
x = x_priv + x;
x_priv = x;
<second part>
}
```
and
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan exclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<second part>
int temp = x;
x = x_priv + x;
x_priv = temp;
<first part>
}
```
Differential revision: https://reviews.llvm.org/D78232
sameeran joshi [Sun, 19 Apr 2020 11:10:37 +0000 (16:40 +0530)]
[flang] Semantics for SELECT TYPE
Summary:
Added support for all semantic checks except C1157
was previously implemented.
Address review comments.
Reviewers: PeteSteinfeld, tskeith, klausler, DavidTruby, kiranktp, anchu-rajendran, sscalpone
Subscribers: kiranchandramohan, llvm-commits, flang-commits
Tags: #llvm, #flang
Differential Revision: https://reviews.llvm.org/D79851
Leonard Chan [Thu, 11 Jun 2020 18:17:08 +0000 (11:17 -0700)]
[clang] Frontend components for the relative vtables ABI (round 2)
This patch contains all of the clang changes from D72959.
- Generalize the relative vtables ABI such that it can be used by other targets.
- Add an enum VTableComponentLayout which controls whether components in the
vtable should be pointers to other structs or relative offsets to those structs.
Other ABIs can change this enum to restructure how components in the vtable
are laid out/accessed.
- Add methods to ConstantInitBuilder for inserting relative offsets to a
specified position in the aggregate being constructed.
- Fix failing tests under new PM and ASan and MSan issues.
See D72959 for background info.
Differential Revision: https://reviews.llvm.org/D77592
Stanislav Mekhanoshin [Thu, 11 Jun 2020 17:50:12 +0000 (10:50 -0700)]
Regenerated SROA phi-gep.ll test. NFC.
hyd-dev [Thu, 11 Jun 2020 16:30:16 +0000 (12:30 -0400)]
[PCH] Support writing BuiltinBitCastExprs to PCHs
eee944e7f adds the new BuiltinBitCastExpr, but does not set the Code member of
ASTStmtWriter. This is not correct and causes an assertion failue in
ASTStmtWriter::emit() when building PCHs that contain __builtin_bit_cast. This
commit adds serialization::EXPR_BUILTIN_BIT_CAST and handles
ASTStmtWriter::Code properly.
Differential revision: https://reviews.llvm.org/D80360
jerryyin [Thu, 11 Jun 2020 15:10:21 +0000 (15:10 +0000)]
[mlir][rocdl] Fixing breakage of dim operator from
904f91db
Summary:
* Update the unit test dimOp index to be an operand
* Refactored the constant naming
Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, msifontes
Tags: #mlir
Differential Revision: https://reviews.llvm.org/D81663
diggerlin [Thu, 11 Jun 2020 17:33:51 +0000 (13:33 -0400)]
[NFC] clean up the AsmPrinter::emitLinkage for AIX part
SUMMARY:
Since we deal with aix emitLinkage in the PPCAIXAsmPrinter::emitLinkage() in the patch https://reviews.llvm.org/D75866. It do not go to AsmPrinter::emitLinkage() any more, we clean up some aix related code in the AsmPrinter::emitLinkage()
Reviewers: Jason liu
Differential Revision: https://reviews.llvm.org/D81613
Jonas Devlieghere [Thu, 11 Jun 2020 16:35:19 +0000 (09:35 -0700)]
[lldb/Test] Ensure inline tests have a unique build directory
Inline tests have one method named 'test' which means that multiple
inline tests in the same file end up sharing the same build directory
per variant.
This patch overrides the getBuildDirBasename method for the InlineTest
class to include the test name.
Differential revision: https://reviews.llvm.org/D81516
Alexander Belyaev [Thu, 11 Jun 2020 10:40:18 +0000 (12:40 +0200)]
[mlir][shape] Add assemblyFormat for `shape.add`.
Differential Revision: https://reviews.llvm.org/D81644
Sanjay Patel [Wed, 10 Jun 2020 18:05:21 +0000 (14:05 -0400)]
[VectorCombine] add tests for compare scalarization; NFC
Petar Avramovic [Thu, 11 Jun 2020 15:55:59 +0000 (17:55 +0200)]
AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC
Put AND before ADD in LegalizerHelper::lowerFPTRUNC_F64_TO_F16
in order to match algorithm from AMDGPUTargetLowering::LowerFP_TO_FP16.
Differential Revision: https://reviews.llvm.org/D81666
Fangrui Song [Thu, 11 Jun 2020 16:05:59 +0000 (09:05 -0700)]
[llvm-objdump] Decrease instruction indentation for non-x86
Place the instruction at the 24th column (0-based indexing), matching
GNU objdump ARM/AArch64/powerpc/etc when the address is low.
This is beneficial for non-x86 targets which have short instruction
lengths.
```
// GNU objdump AArch64
0:
91001062 add x2, x3, #0x4
400078:
91001062 add x2, x3, #0x4
// llvm-objdump, with this patch
0: 62 10 00 91 add x2, x3, #4
400078: 62 10 00 91 add x2, x3, #4
// llvm-objdump, if we change to print a word instead of bytes in the future
0:
91001062 add x2, x3, #4
400078:
91001062 add x2, x3, #4
// GNU objdump Thumb
0: bf00 nop
// GNU objdump Power ISA 3.1 64-bit instruction
// 0: 00 00 10 04 plwa r3,0
// 4: 00 00 60 a4
```
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81590
Alexey Bataev [Thu, 11 Jun 2020 15:22:14 +0000 (11:22 -0400)]
Revert "[OPENMP50]Codegen for scan directive in simd loops."
This reverts commit
fb80e67f10eea7177b0ff9c618c8231363b6f2fc to resolve
the issue with asan buildbots.
Mircea Trofin [Tue, 9 Jun 2020 21:33:46 +0000 (14:33 -0700)]
[llvm][NFC] Factor some common data in InlineAdvice
Summary:
Other derivations will all want to emit optimization remarks and, as
part of that, use debug info.
Additionally, drive-by const-ing.
Reviewers: davidxl, dblaikie
Subscribers: aprantl, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81507
Simon Pilgrim [Thu, 11 Jun 2020 14:38:39 +0000 (15:38 +0100)]
[X86] Fold vXi1 OR(KSHIFTL(X,NumElts/2),Y) -> KUNPCK
Convert shift+or bool vector patterns into CONCAT_VECTORS if we know this will be lowered to KUNPCK (which requires 16+ vector elements).
Fixes PR32547
jerryyin [Fri, 5 Jun 2020 16:53:41 +0000 (16:53 +0000)]
[mlir][rocdl] Adding vector to ROCDL dialect lowering
* Created the vector to ROCDL lowering pass
* The lowering pass lowers vector transferOps to rocdl mubufOps
* Added unit test and functional test
serge-sans-paille [Thu, 4 Jun 2020 07:13:39 +0000 (09:13 +0200)]
Fix return status of DataFlowSanitizer pass
Take into account added functions, global values and attribute change.
Differential Revision: https://reviews.llvm.org/D81239
Alexey Bataev [Mon, 25 May 2020 20:06:31 +0000 (16:06 -0400)]
[OPENMP50]Codegen for use_device_addr clauses.
Summary:
Added codegen for use_device_addr clause. The components of the list
items are mapped as a kind of RETURN components and then the returned
base address is used instead of the real address of the base declaration
used in the use_device_addr expressions.
Reviewers: jdoerfert
Subscribers: yaxunl, guansong, sstefan1, cfe-commits, caomhin
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80730
Jay Foad [Mon, 18 May 2020 18:12:29 +0000 (19:12 +0100)]
[IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.
Reapply with a bug fix: don't drop the "!KeepOneInputPHIs" argument when
removePredecessor calls PHINode::removeIncomingValue.
Differential Revision: https://reviews.llvm.org/D80206
Sam Parker [Thu, 11 Jun 2020 13:52:17 +0000 (14:52 +0100)]
[IR] Remove assert from ShuffleVectorInst
Which triggers on valid, but not useful, IR such as a undef mask.
Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46276
Differential Revision: https://reviews.llvm.org/D81634
LLVM GN Syncbot [Thu, 11 Jun 2020 13:36:59 +0000 (13:36 +0000)]
[gn build] Port
78e636b3f2f
Bruno Ricci [Thu, 11 Jun 2020 13:08:27 +0000 (14:08 +0100)]
[clang][NFC] Generate the {Type,ArrayType,UnaryExprOrType,Expression}Traits...
...enumerations from TokenKinds.def and use the new macros from TokenKinds.def
to remove the hard-coded lists of traits.
All the information needed to generate these enumerations is already present
in TokenKinds.def. The motivation here is to be able to dump the trait spelling
without hard-coding the list in yet another place.
Note that this change the order of the enumerators in the enumerations (except
that in the TypeTrait enumeration all unary type traits are before all binary
type traits, and all binary type traits are before all n-ary type traits).
Apart from the aforementioned ordering which is relied upon, after this patch
no code in clang or in the various clang tools depend on the specific ordering
of the enumerators.
No functional changes intended.
Differential Revision: https://reviews.llvm.org/D81455
Reviewed By: aaron.ballman
Jay Foad [Thu, 11 Jun 2020 13:22:16 +0000 (14:22 +0100)]
Revert "[IR] Clean up dead instructions after simplifying a conditional branch"
This reverts commit
4494e45316a0bfaabb6bb1450fb0f49a0e6832af.
It caused problems for sanitizer buildbots.
Daniel Grumberg [Wed, 13 May 2020 16:07:47 +0000 (17:07 +0100)]
Add AST_SIGNATURE record to unhashed control block of PCM files
Summary:
This record is constructed by hashing the bytes of the AST block in a similiar
fashion to the SIGNATURE record. This new signature only means anything if the
AST block is fully relocatable, i.e. it does not embed absolute offsets within
the PCM file. This change ensure this does not happen by replacing these offsets
with offsets relative to the nearest relevant subblock of the AST block.
Reviewers: Bigcheese, dexonsmith
Subscribers: dexonsmith, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80383
Alexey Bataev [Fri, 5 Jun 2020 19:17:14 +0000 (15:17 -0400)]
[OPENMP50]Codegen for scan directive in simd loops.
Added codegen for scandirectives in simd loop. The codegen transforms
original code:
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan inclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<first part>
x = x_priv + x;
x_priv = x;
<second part>
}
```
and
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan exclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<second part>
int temp = x;
x = x_priv + x;
x_priv = temp;
<first part>
}
```
Differential revision: https://reviews.llvm.org/D78232
Simon Pilgrim [Thu, 11 Jun 2020 12:57:39 +0000 (13:57 +0100)]
Add missing lambda capture from rGf529c0a8a149.
Simon Pilgrim [Thu, 11 Jun 2020 12:48:42 +0000 (13:48 +0100)]
Fix unused variable warning. NFCI.
We're only using the D2 iteration value inside the assert (the only component of the loop) - move the entire loop inside the assert by using llvm::all_of.
Simon Pilgrim [Thu, 11 Jun 2020 12:32:48 +0000 (13:32 +0100)]
[X86][AVX512] Add second test case for PR32547
Demonstrate missing support for OR(X,KSHIFTL(Y,8)) -> KUNPCKBW as well as the existing OR(KSHIFTL(X,8),Y) -> KUNPCKBW test.
Bruno Ricci [Thu, 11 Jun 2020 12:29:44 +0000 (13:29 +0100)]
[clang][NFC] Fix a Wdocumentation warning in Basic/TargetInfo.h
Jay Foad [Mon, 18 May 2020 18:12:29 +0000 (19:12 +0100)]
[IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.
Differential Revision: https://reviews.llvm.org/D80206
Bruno Ricci [Thu, 11 Jun 2020 12:13:05 +0000 (13:13 +0100)]
[clang] Convert a default argument expression to the parameter type...
...before checking that the default argument is valid with
CheckDefaultArgumentVisitor.
Currently the restrictions on a default argument are checked with the visitor
CheckDefaultArgumentVisitor in ActOnParamDefaultArgument before
performing the conversion to the parameter type in SetParamDefaultArgument.
This was fine before the previous patch but now some valid code post-CWG 2346
is rejected:
void test() {
const int i2 = 0;
extern void h2a(int x = i2); // FIXME: ok, not odr-use
extern void h2b(int x = i2 + 0); // ok, not odr-use
}
This is because the reference to i2 in h2a has not been marked yet with
NOUR_Constant. i2 is marked NOUR_Constant when the conversion to the parameter
type is done, which is done just after.
The solution is to do the conversion to the parameter type before checking
the restrictions on default arguments with CheckDefaultArgumentVisitor.
This has the side-benefit of improving some diagnostics.
Differential Revision: https://reviews.llvm.org/D81616
Reviewed By: rsmith
Pavel Labath [Wed, 10 Jun 2020 13:26:50 +0000 (15:26 +0200)]
[lldb] Remove Scalar operator= overloads
The are not needed as Scalar is implicitly constructible from all of
these types (so the compiler will use a combination of a constructor +
move assignment instead), and they make it very easy for implementations
of assignment and construction operations to diverge.
Jay Foad [Wed, 10 Jun 2020 08:18:56 +0000 (09:18 +0100)]
[MemCpyOptimizer] Simplify API of processStore and processMem* functions
Previously these functions either returned a "changed" flag or a "repeat
instruction" flag, and could also modify an iterator to control which
instruction would be processed next.
Simplify this by always returning a "changed" flag, and handling all of
the "repeat instruction" functionality by modifying the iterator.
No functional change intended except in this case:
// If the source and destination of the memcpy are the same, then zap it.
... where the previous code failed to process the instruction after the
zapped memcpy.
Differential Revision: https://reviews.llvm.org/D81540
Bruno Ricci [Thu, 11 Jun 2020 11:41:08 +0000 (12:41 +0100)]
[clang] CWG 2082 and 2346: loosen the restrictions on parameters and local variables in default arguments.
This patch implements the resolution of CWG 2082 and CWG 2346.
The resolution of CWG 2082 changed [dcl.fct.default]p7 and p9 to allow
a parameter or local variable to appear in a default argument if not
in a potentially-evaluated expression.
The resolution of CWG 2346 changed [dcl.fct.default]p7 to allow a local
variable to appear in a default argument if not odr-used.
An issue remains after this patch
(see the FIXME in test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/p7.cpp).
This is addressed by the next patch.
Differential Revision: https://reviews.llvm.org/D81615
Reviewed By: rsmith, erichkeane
Bruno Ricci [Thu, 11 Jun 2020 10:53:47 +0000 (11:53 +0100)]
[clang][NFC] Various NFCs in CheckDefaultArgumentVisitor
Before the next patches do the following NFCs:
- Make it a const visitor; CheckDefaultArgumentVisitor should
really not modify the visited nodes.
- clang-format
- Take a reference to Sema instead of a pointer and pass it
as the first argument to the constructor. This is for
consistency with the other similar visitors.
- Use range for loops when appropriate as per the style guide.
- Use `const auto *" when appropriate as per the style guide.
Pavel Labath [Thu, 11 Jun 2020 11:13:31 +0000 (13:13 +0200)]
[llvm/DWARFDebugLine] Remove spurious full stop from warning messages
Other warnings messages don't have a trailing full stop.
Alexander Belyaev [Thu, 11 Jun 2020 11:08:24 +0000 (13:08 +0200)]
[mlir][linalg] Fix the type (indicies->indices).
Pavel Labath [Thu, 11 Jun 2020 11:04:26 +0000 (13:04 +0200)]
[llvm/DWARFDebugLine] Fix a typo in one warning message
Alexander Belyaev [Thu, 11 Jun 2020 09:49:30 +0000 (11:49 +0200)]
[mlir] Add new builders to linalg.reshape.
Differential Revision: https://reviews.llvm.org/D81640
Chris Jackson [Thu, 11 Jun 2020 09:28:39 +0000 (10:28 +0100)]
[DebugInfo] Refactor SalvageDebugInfo and SalvageDebugInfoForDbgValues
- Simplify the salvaging interface and the algorithm in InstCombine
Reviewers: vsk, aprantl, Orlando, jmorse, TWeaver
Reviewed by: Orlando
Differential Revision: https://reviews.llvm.org/D79863
Georgii Rymar [Wed, 10 Jun 2020 12:28:57 +0000 (15:28 +0300)]
[yaml2obj] - Allocate the file space for SHT_NOBITS sections in some cases.
This teaches yaml2obj to allocate file space for a no-bits section
when there is a non-nobits section in the same segment that follows it.
It was discussed in D78005 thread and matches GNU linkers and LLD behavior.
Differential revision: https://reviews.llvm.org/D80629
Daniel Grumberg [Thu, 11 Jun 2020 09:22:14 +0000 (10:22 +0100)]
[NFC] Make formatting changes to ASTBitCodes.h ahead of a functional change
Simon Pilgrim [Thu, 11 Jun 2020 09:22:35 +0000 (10:22 +0100)]
[X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors
AVX512 mask types are often bitcasted to scalar integers for various ops before being bitcast back to be used as a predicate. In many cases we can avoid these KMASK<->GPR transfers and perform equivalent operations on the mask unit.
If the destination mask type is legal, and we can confirm that the scalar op originally came from a mask/vector/float/double type then we should try to avoid the scalar entirely.
This avoids some codegen issues noticed while working on PTEST/MOVMSK improvements.
Partially fixes PR32547 - we don't create a KUNPCK yet, but OR(X,KSHIFTL(Y)) can be handled in a separate patch.
Differential Revision: https://reviews.llvm.org/D81548
Simon Pilgrim [Thu, 11 Jun 2020 09:08:13 +0000 (10:08 +0100)]
[X86][AVX512] Add test case for PR32547
Show current codegen baseline before D81548
Endre Fülöp [Wed, 10 Jun 2020 06:59:04 +0000 (08:59 +0200)]
[analyzer] On-demand parsing capability for CTU
Summary:
Introduce on-demand parsing of needed ASTs during CTU analysis.
The index-file format is extended, and analyzer-option CTUInvocationList
is added to specify the exact invocations needed to parse the needed
source-files.
Reviewers: martong, balazske, Szelethus, xazax.hun, whisperity
Reviewed By: martong, xazax.hun
Subscribers: gribozavr2, thakis, ASDenysPetrov, ormris, mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, Charusso, steakhal, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75665
Jakub Lichman [Thu, 11 Jun 2020 08:50:13 +0000 (10:50 +0200)]
[mlir][Linalg][Doc] Fix of misleading example in Property 2
Code example in MLIR Linalg doc fixed because it referenced non-existing variables and some parameters were of wrong types.
Differential Revision: https://reviews.llvm.org/D81633
Dominik Montada [Fri, 27 Mar 2020 15:47:37 +0000 (16:47 +0100)]
[GlobalISel] fix crash in IRTranslator, MachineIRBuilder when translating @llvm.dbg.value intrinsic and using -debug
Summary:
Fix crash when using -debug caused by the GlobalISel observer trying to print
an incomplete DBG_VALUE instruction. This was caused by the MachineIRBuilder
using buildInstr, which immediately inserts the instruction causing print,
instead of using BuildMI to first build up the instruction and using
insertInstr when finished.
Add RUN-line to existing debug-insts.ll test with -debug flag set to make sure
no crash is happening.
Also fixed a missing %s in the 2nd RUN-line of the same test.
Reviewers: t.p.northover, aditya_nandakumar, aemerson, dsanders, arsenm
Reviewed By: arsenm
Subscribers: wdng, arsenm, rovka, hiraditya, volkan, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76934
Daniel Grumberg [Sun, 7 Jun 2020 19:05:25 +0000 (20:05 +0100)]
Make ASTFileSignature an array of 20 uint8_t instead of 5 uint32_t
Reviewers: aprantl, dexonsmith, Bigcheese
Subscribers: arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81347
Raphael Isemann [Wed, 10 Jun 2020 14:37:23 +0000 (16:37 +0200)]
[lldb] Fix a crash in PlatformAppleSimulator::GetCoreSimulatorPath when Xcode developer directory can't be found
Summary:
`PlatformAppleSimulator::GetCoreSimulatorPath` currently checks if
`m_core_simulator_framework_path` wasn't set yet and then tries to calculate its
actual value. However, if `GetXcodeDeveloperDirectory` returns an invalid
FileSpec, `m_core_simulator_framework_path` is never assigned a value which
causes that the `return m_core_simulator_framework_path.getValue();` at the end
of the function will trigger an assert.
This patch just assigns an invalid FileSpec to `m_core_simulator_framework_path`
which seems what the calling code in `PlatformAppleSimulator::LoadCoreSimulator`
expects as an error value.
I assume this can be reproduces on machines that don't have an Xcode
installation, but this patch is mostly based on this backtrace I received from
someone else that tried to run the test suite:
```
Assertion failed: (hasVal), function getValue, file llvm/include/llvm/ADT/Optional.h, line 73.
[...]
3 libsystem_c.dylib 0x00007fff682a1ac6 __assert_rtn + 314
4 liblldb.11.0.0git.dylib 0x000000010b835931 PlatformAppleSimulator::GetCoreSimulatorPath() (.cold.1) + 33
5 liblldb.11.0.0git.dylib 0x0000000107e92f11 PlatformAppleSimulator::GetCoreSimulatorPath() + 369
6 liblldb.11.0.0git.dylib 0x0000000107e9383e void std::__1::__call_once_proxy<std::__1::tuple<PlatformAppleSimulator::LoadCoreSimulator()::$_1&&> >(void*) + 30
7 libc++.1.dylib 0x00007fff654d5bea std::__1::__call_once(unsigned long volatile&, void*, void (*)(void*)) + 139
8 liblldb.11.0.0git.dylib 0x0000000107e92019 PlatformAppleSimulator::LaunchProcess(lldb_private::ProcessLaunchInfo&) + 89
9 liblldb.11.0.0git.dylib 0x0000000107e92be5 PlatformAppleSimulator::DebugProcess(lldb_private::ProcessLaunchInfo&, lldb_private::Debugger&, lldb_private::Target*, lldb_private::Status&) + 101
10 liblldb.11.0.0git.dylib 0x0000000107cb044d lldb_private::Target::Launch(lldb_private::ProcessLaunchInfo&, lldb_private::Stream*) + 669
11 liblldb.11.0.0git.dylib 0x000000010792c9c5 lldb::SBTarget::Launch(lldb::SBLaunchInfo&, lldb::SBError&) + 1109
12 liblldb.11.0.0git.dylib 0x0000000107a92acd _wrap_SBTarget_Launch(_object*, _object*) + 477
13 org.python.python 0x000000010681076f PyCFunction_Call + 321
14 org.python.python 0x000000010689ee12 _PyEval_EvalFrameDefault + 7738
```
Reviewers: JDevlieghere, jasonmolenda
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D80997
Esme-Yi [Thu, 11 Jun 2020 07:45:31 +0000 (07:45 +0000)]
[PowerPC][NFC] Testing ROTL of v1i128.
Summary: Add RUN lines for pwr8.
Kristof Beyls [Thu, 11 Jun 2020 07:31:23 +0000 (08:31 +0100)]
[NFC] Refactor ThunkInserter to make it available for all targets.
By moving target-independent code from
llvm/lib/Target/X86/X86IndirectThunks.cpp
to
llvm/include/llvm/CodeGen/IndirectThunks.h
Differential Revision: https://reviews.llvm.org/D81401
Craig Topper [Thu, 11 Jun 2020 07:31:28 +0000 (00:31 -0700)]
[X86] Remove unnecessary In64BitMode predicate from TEST64ri32. NFC
This appears to have been added when In64BitMode was added to a
bunch of instructions that don't have register operands. When an
instruction uses a register the parser will prevent a 64-bit
register from being parsed on a 32-bit target. But with only
memory and immediate operands this doesn't happen.
TEST64ri32 does have a register operand so the issue the predicate
was supposed to fix doesn't apply.
Vitaly Buka [Thu, 11 Jun 2020 07:16:09 +0000 (00:16 -0700)]
[sanitizer] Avoid unneeded deferefence
David Sherwood [Fri, 22 May 2020 12:39:03 +0000 (13:39 +0100)]
[CodeGen] Let computeKnownBits do something sensible for scalable vectors
Until we have a real need for computing known bits for scalable
vectors I have simply changed the code to bail out for now and
pretend we know nothing. I've also fixed up some simple callers of
computeKnownBits too.
Differential Revision: https://reviews.llvm.org/D80437
LLVM GN Syncbot [Thu, 11 Jun 2020 06:53:42 +0000 (06:53 +0000)]
[gn build] Port
0ee176edc8b
Kristof Beyls [Thu, 11 Jun 2020 06:42:16 +0000 (07:42 +0100)]
[AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions.
Some processors may speculatively execute the instructions immediately
following RET (returns) and BR (indirect jumps), even though
control flow should change unconditionally at these instructions.
To avoid a potential miss-speculatively executed gadget after these
instructions leaking secrets through side channels, this pass places a
speculation barrier immediately after every RET and BR instruction.
Since these barriers are never on the correct, architectural execution
path, performance overhead of this is expected to be low.
On targets that implement that Armv8.0-SB Speculation Barrier extension,
a single SB instruction is emitted that acts as a speculation barrier.
On other targets, a DSB SYS followed by a ISB is emitted to act as a
speculation barrier.
These speculation barriers are implemented as pseudo instructions to
avoid later passes to analyze them and potentially remove them.
Even though currently LLVM does not produce BRAA/BRAB/BRAAZ/BRABZ
instructions, these are also mitigated by the pass and tested through a
MIR test.
The mitigation is off by default and can be enabled by the
harden-sls-retbr subtarget feature.
Differential Revision: https://reviews.llvm.org/D81400
Yvan Roux [Thu, 11 Jun 2020 06:45:46 +0000 (08:45 +0200)]
[ARM][MachineOutliner] Add NoLRSave mode.
Outline chunks of code which don't need a save/restore mechanism of the
link register.
Differential Revision: https://reviews.llvm.org/D80125
Fangrui Song [Thu, 11 Jun 2020 05:32:43 +0000 (22:32 -0700)]
Restore part of D80450 [CUDA][HIP] Fix implicit HD function resolution
The "if (S.getLangOpts().CUDA && Cand1.Function && Cand2.Function) {"
part is known to be problematic but the root cause isn't clear yet.
Craig Topper [Thu, 11 Jun 2020 05:31:21 +0000 (22:31 -0700)]
[X86] Use X86AS enum constants to replace hardcoded numbers in more places. NFC
Craig Topper [Thu, 11 Jun 2020 04:25:15 +0000 (21:25 -0700)]
[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC
Paula Toth [Thu, 11 Jun 2020 04:33:56 +0000 (21:33 -0700)]
[libc] Fix integration test header dependency.
Craig Topper [Thu, 11 Jun 2020 04:24:44 +0000 (21:24 -0700)]
Revert "[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC"
This reverts commit
874800b4f7e4312a283b0638e832ec92a88540f4.
Forgot to update the clang includes
Craig Topper [Thu, 11 Jun 2020 00:57:47 +0000 (17:57 -0700)]
[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC
Vitaly Buka [Tue, 2 Jun 2020 08:19:57 +0000 (01:19 -0700)]
[StackSafety] Pass summary into codegen
Summary:
The patch wraps ThinLTO index into immutable
pass which can be used by StackSafety analysis.
Reviewers: eugenis, pcc
Reviewed By: eugenis
Subscribers: hiraditya, steven_wu, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80985
Kai Luo [Thu, 11 Jun 2020 03:45:33 +0000 (11:45 +0800)]
Revert "[PowerPC][NFC] Testing ROTL of v1i128."
This reverts commit
c79ab63e839b2621405f4472c46f88bfc7a30257 which is
committed by accident.
Yaxun (Sam) Liu [Thu, 11 Jun 2020 03:41:51 +0000 (23:41 -0400)]
Fix __clang_cuda_math_forward_declares.h
Recent change from `#if !defined(__CUDA__)` to `#if !__CUDA__` caused
regression on ROCm 3.5 since there is `#define __CUDA__`
before inclusion of the header file, which causes `#if !__CUDA__`
to be invalid.
Change `#if !__CUDA__` back to `#if !defined(__CUDA__)` for backward
compatibility.
Esme-Yi [Thu, 11 Jun 2020 02:40:58 +0000 (02:40 +0000)]
[PowerPC][NFC] Testing ROTL of v1i128.
Summary: Add RUN lines for pwr8.