Peter Robinson [Sun, 14 Feb 2021 19:43:28 +0000 (19:43 +0000)]
rockchip: rk3399: rock960: explicitly disable SPI flash
The Rock960 doesn't have SPI flash on-board, but the bits
get enabled by default which means when booting we get
some errors. Explicitly disable it to stop the errors.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Sun, 14 Feb 2021 19:40:15 +0000 (19:40 +0000)]
include: configs: rk3399: drop a dangling comment
Drop a irrelevent comment now the related configs have moved
to the various config files.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:10 +0000 (14:47 +0100)]
rockchip: lion: update board defconfig
Adds the needed target option and drivers needed for correct
bringup.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:09 +0000 (14:47 +0100)]
rockchip: rk3368: sync down rk3368-lion board devicetree from Linux
This brings the actual rk3368-lion devicetree files from Linux 5.10
instead of using something separate.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:08 +0000 (14:47 +0100)]
rockchip: rk3368: sync main rk3368 dtsi from Linux
This is the state as of v5.10 + the recently added timer0 phandle
targetted at the 5.12 merge window.
With this the non-mainline nodes like the dmc move to a separate
rk3368-u-boot.dtsi that is included from the board-specific
-u-boot.dtsi files, similar to how rk3399 does this.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:07 +0000 (14:47 +0100)]
rockchip: rk3368: sync clock dt-binding header from Linux
This is the state as of v5.10 in Linux.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:06 +0000 (14:47 +0100)]
rockchip: rk3368: move STACK_R_ADDR address and into Kconfig
With the STACK_R_ADDR at 0x600000 (6MB) we're competing with
with the loading address of either u-boot or atf parts, so move
that away to 0x4000000 (64MB) similar to rk3399.
Only lion currently sets that at all but not sheep the second
rk3368 board, so just move that to the Kconfig for rk3368 similar
to rk3399 as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:05 +0000 (14:47 +0100)]
rockchip: rk3368: increase SYS_MALLOC_F_LEN to 0x4000
To prevent running out of memory, increase SYS_MALLOC_F_LEN to 0x4000
similar to what rk3399 uses.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:04 +0000 (14:47 +0100)]
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB
Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so
that regular kernel images can get loaded without problems.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Tue, 9 Feb 2021 13:47:03 +0000 (14:47 +0100)]
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR
CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB
behind the area where we load u-boot to, which depending on u-boot size
may overlap at some point.
So for safety just pick the same value rk3399 has and set
CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Roger Pau Monné [Sat, 13 Feb 2021 15:59:01 +0000 (16:59 +0100)]
odroid-go2: remove setting SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
Using a non-default SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR setting makes the
resulting u-boot-rockchip.bin unbootable, as it gets stuck after SPL.
Removing the setting from the defconfig allows U-Boot to load
successfully.
Signed-off-by: Roger Pau Monné <royger@FreeBSD.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Robert Hancock [Thu, 11 Mar 2021 22:55:50 +0000 (16:55 -0600)]
net: gem: Fix setting PCS auto-negotiation state
The code was trying to disable PCS auto-negotiation when a fixed-link node
is present and enable it otherwise. However, the PCS registers were being
written before the PCSSEL bit was set in the network configuration
register, and it appears that in this state, PCS register writes are
ignored. The result is that the intended change only took effect on the
second network operation that was performed, since at that time PCSSEL is
already enabled.
Fix the order of register writes so that PCS registers are only written to
after the PCS is enabled.
Fixes:
26e62cc971 ("net: gem: Disable PCS autonegotiation in case of fixed-link")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Mon, 29 Mar 2021 21:53:19 +0000 (17:53 -0400)]
Merge tag 'v2021.04-rc5' into next
Prepare v2021.04-rc5
Tom Rini [Mon, 29 Mar 2021 21:20:13 +0000 (17:20 -0400)]
Prepare v2021.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 29 Mar 2021 00:29:39 +0000 (20:29 -0400)]
Merge tag 'dm-pull-28mar21' of git://git.denx.de/u-boot-dm into next
binman support for expanding entries, connections
misc fixes and improvements to sandbox, etc.
x86 CBFS improvements
x86 coreboot improvements
Tom Rini [Mon, 29 Mar 2021 00:28:51 +0000 (20:28 -0400)]
Merge branch '2021-03-28-assorted-bugfixes'
Jessica Clarke [Sat, 20 Mar 2021 20:43:05 +0000 (20:43 +0000)]
Support building on macOS/arm64
On Arm-based Macs, -no_pie is ignored and gives a linker warning.
Moreover, the build falls over with:
ld: Absolute addressing not allowed in arm64 code but used in '_image_type_ptr_aisimage' referencing '_image_type_aisimage'
for dumpimage and mkimage, since we put data structs in text sections
not data sections and so cannot have dynamic relocations. Instead, move
the sections to __DATA and drop disabling PIE.
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sean Anderson [Fri, 26 Mar 2021 02:02:28 +0000 (22:02 -0400)]
dm: test: Always include command.h for print_ut
We need this header for U_BOOT_CMD, which is always present even without
EFI.
Fixes:
82c468a049 ("dm: test: Update Makefile conditions")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 27 Mar 2021 17:53:08 +0000 (06:53 +1300)]
test: Add udevice declaration to avoid build error
When including this file on a board other than sandbox (e.g by enabling
UNIT_TEST and CMD_SETEXPR) an results. Fix it by declaring struct udevice
first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Sat, 27 Mar 2021 15:58:37 +0000 (11:58 -0400)]
Merge branch '2021-03-27-master-imports'
- Rework the deprecation warnings to be consistently phrased.
- Add in a warning for DM_I2C, for a year from next release.
- Fix Azure builds of Windows host tools.
Tom Rini [Fri, 26 Mar 2021 19:14:14 +0000 (15:14 -0400)]
Azure: Use "pacman -Sy" to install the toolchain
We now see an error such as:
warning: database file for 'ucrt64' does not exist (use '-Sy' to download)
error: failed to prepare transaction (could not find database)
So use -Sy as suggested.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Thu, 25 Mar 2021 08:24:44 +0000 (21:24 +1300)]
dm: i2c: Add a migration method for I2C
This probably should have been done a while back since it is a core
system. Add a migration deadline of later this year, to catch the
stragglers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:43 +0000 (21:24 +1300)]
Makefile: Drop the old SPI flash migration message
This message does not seem to make sense. It may be out of date. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:42 +0000 (21:24 +1300)]
Makefile: Use common code for DM_ETH deprecation warning
Update the CONFIG_DM_ETH check to use the 'deprecated' function.
Tested with snow
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:41 +0000 (21:24 +1300)]
Makefile: Use common code for WDT deprecation warning
Update the CONFIG_WDT check to use the 'deprecated' function.
Tested with kmcent2
Old message:
===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_WDT (Driver Model
for DM watchdog). Please update the board to use
CONFIG_WDT before the v2019.10 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:40 +0000 (21:24 +1300)]
Makefile: Use common code for SPI_FLASH deprecation warning
Update the CONFIG_DM_SPI_FLASH check to use the 'deprecated' function.
Tested with vinco
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH (Driver Model
for SPI flash). Please update the board to use
CONFIG_DM_SPI_FLASH before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:39 +0000 (21:24 +1300)]
Makefile: Use common code for DM_VIDEO deprecation warning
Update the CONFIG_DM_VIDEO check to use the 'deprecated' function.
Tested with pxm2
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO (Driver Model
for video). Please update the board to use
CONFIG_DM_VIDEO before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
==================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:38 +0000 (21:24 +1300)]
Makefile: Use common code for PCI deprecation warning
Update the CONFIG_DM_PCI check to use the 'deprecated' function.
Tested with MPC8349ITX
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI Please update
the board to use CONFIG_DM_PCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_PCI (Driver Model
for PCI). Please update the board to use
CONFIG_DM_PCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:37 +0000 (21:24 +1300)]
Makefile: Use common code for LIBATA deprecation warning
Update the CONFIG_LIBATA check to use the 'deprecated' function.
Tested with MPC8349ITX
Old message:
===================== WARNING ======================
This board does use CONFIG_LIBATA but has CONFIG_AHCI not
enabled. Please update the storage controller driver to use
CONFIG_AHCI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:36 +0000 (21:24 +1300)]
Makefile: Use common code for MVSATA_IDE deprecation warning
Update the CONFIG_MVSATA_IDE check to use the 'deprecated' function.
Tested with nas220
Old message:
===================== WARNING ======================
This board does use CONFIG_MVSATA_IDE which is not
ported to driver-model (DM) yet. Please update the storage
controller driver to use CONFIG_AHCI before the v2019.07
release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_AHCI (Driver Model
for AHCI instead of CONFIG_MVSATA_IDE). Please update the board to use
CONFIG_AHCI before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:35 +0000 (21:24 +1300)]
Makefile: Use common code for USB deprecation warning
Update the USB check to use the 'deprecated' function.
Tested with xpress
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB (Driver Model
for USB). Please update the board to use
CONFIG_DM_USB before the v2019.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:34 +0000 (21:24 +1300)]
Makefile: Use common code for MMC deprecation warning
Update the MMC check to use the 'deprecated' function.
Tested with zc5202
Old message:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
New message:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC (Driver Model
for MMC). Please update the board to use
CONFIG_DM_MMC before the v2019.04 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:33 +0000 (21:24 +1300)]
Makefile: Add common code to report deprecation
Add a function which can be called to report a migration problem. This
will make it easier to add new migration checks, since the logic and
strings are not spread out over 8 lines of code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 25 Mar 2021 08:24:32 +0000 (21:24 +1300)]
Makefile: Move non-DM migration messages to the top
At present the driver model migration messages are mixed with the others.
Collect them together before starting to refactor them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Tue, 23 Mar 2021 11:37:47 +0000 (12:37 +0100)]
sandbox: define __dyn_sym_start, dyn_sym_end
On RISC-V the symbols __dyn_sym_start, dyn_sym_end are referenced in
efi_runtime_relocate().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
T Karthik Reddy [Wed, 17 Mar 2021 11:31:30 +0000 (12:31 +0100)]
spi: spi-uclass: Add support to manually relocate spi memory ops
Add spi memory operations to relocate manually when
CONFIG_NEEDS_MANUAL_RELOC is enabled.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Simon Glass [Sun, 21 Mar 2021 05:24:39 +0000 (18:24 +1300)]
dtoc: Add new check that offsets are correct
Add a few more internal checks to make sure offsets are correct, before
updating the dtb.
To make this easier, update the functions which add a property to return
that property,.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:38 +0000 (18:24 +1300)]
dtoc: Support adding subnodes alongside existing ones
So far we have only needed to add subnodes to empty notds, so have not
had to deal with ordering. However this feature is needed for binman's
expanded nodes, since there may be another node in the same section.
While libfdt adds new properties after existing properties, it adds new
subnodes before existing subnodes. This means that we must reorder the
nodes in the cached version, so that the ordering remains consistent.
Update the sync implementation to sync existing subnodes first, then
add new ones, then tidy up the ordering in the cached version. Update the
test to cover this behaviour.
Also improve the comment about property syncing while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:37 +0000 (18:24 +1300)]
dtoc: Add a subnode test for multiple nodes
Add a new test that adds a subnode alongside an existing one, as well as
adding properties to a subnode. This will expand to adding multiple
subnodes in future patches. Put a node after the one we are adding to so
we can check that things sync correctly.
The testAddNode() test should be in the TestNode class since it is a node
test, so move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:36 +0000 (18:24 +1300)]
dtoc: Tweak ordering of fdt-offsets refreshing
Once the tree has been synced, thus potentially moving things around in the
fdt, we set _cached_offsets to False so that a refresh will happen next
time a property is accessed.
This 'lazy' refresh doesn't really save much time, since refresh is a very
fast operation, just a single walk of the tree. Also, having the refresh
happen in the bowels of property access it makes it harder to figure out
what is going on.
Simplify the code by always doing a refresh before and after a sync. Set
_cached_offsets to True immediately after this, in the Refresh() function,
since this makes more sense than doing it in the caller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:35 +0000 (18:24 +1300)]
dtoc: Tidy up property-offset handling
If a property does not yet have an offset, then that means it exists in
the cache'd fdt but has not yet been synced back to the flat tree. Use
the dirty flag for this so we don't need to check the offset too. Improve
the comments for Prop and Node to make it clear what an offset of None
means.
Also clear the dirty flag after the property is synced.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:34 +0000 (18:24 +1300)]
dtoc: Improve internal error for Refresh()
Add the node name too so it is easy to see which node failed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:33 +0000 (18:24 +1300)]
binman: Support default alignment for sections
Sometimes it is useful to specify the default alignment for all entries
in a section, such as when word-alignment is necessary, for example. It
is tedious and error-prone to specify this individually for each section.
Add a property to control this for a section.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:32 +0000 (18:24 +1300)]
binman: Support obtaining section contents immediately
Generally the content of sections is not built until the final assembly
of the image. This is partly to avoid wasting time, since the entries
within sections may change multiple times as binman works through its
various stages. This works quite well since sections exist in a strict
hierarchy, so they can be processed in a depth-first manner.
However the 'collection' entry type does not have this luxury. If it
contains a section within its 'content' list, then it must produce the
section contents, if available. That section is typically a sibling
node, i.e. not part oc the collection's hierarchy.
Add a new 'required' argument to section.GetData() to support this. When
required is True, any referenced sections are immediately built. If this
is not possible (because one of the subentries does not have its data yet)
then an error is produced.
The test for this uses a 'collection' entry type, referencing a section as
its first member. This forces a call to _BuildSectionData() with required
set to False, at first, then True later, when the image is assembled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:31 +0000 (18:24 +1300)]
binman: Add support for a collection of entries
The vblock entry type includes code to collect the data from a number of
other entries (not necessarily subentries) and concatenating it. This is
a useful feature for other entry types.
Make it a base class, so that vblock can use it, along with other entry
types.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:30 +0000 (18:24 +1300)]
binman: Allow disabling expanding an entry
At present there is a command-line flag to disable substitution of expanded
entries. Add an option to the entry node as well, so it can be controlled
at the node level.
Add a test to cover this. Fix up the comment to the checkSymbols() function
it uses, while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 05:24:29 +0000 (18:24 +1300)]
binman: Use a unique number for the symbols test file
Two test devicetree files currently have 192 as their unique number. Fix
this by separating them out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 21 Mar 2021 03:50:07 +0000 (16:50 +1300)]
x86: coral: Show memory config and SKU ID on startup
Provide the model information through sysinfo so that it shows up on
boot. For memconfig 4 pins are provided, for 16 combinations. For SKU
ID there are two options:
- two pins provided in a ternary arrangement, for 9 combinations.
- reading from the EC
Add a binding doc and drop the unused #defines as well.
Example:
U-Boot 2021.01-rc5
CPU: Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
DRAM: 3.9 GiB
MMC: sdmmc@1b,0: 1, emmc@1c,0: 2
Video: 1024x768x32 @
b0000000
Model: Google Coral (memconfig 5, SKU 3)
This depends on the GPIO series:
http://patchwork.ozlabs.org/project/uboot/list/?series=228126
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 21 Mar 2021 03:50:06 +0000 (16:50 +1300)]
sysinfo: Allow showing model info from sysinfo
Some boards may want to show the SKU ID or other information obtained at
runtime. Allow this to come from sysinfo. The board can then provide a
sysinfo driver to provide it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 15 Mar 2021 05:11:24 +0000 (18:11 +1300)]
sandbox: Correct uninit conflict
It is not possible to remove the state before driver model is uninited,
since the devices are allocated in the memory buffer. Also it is not
possible to uninit driver model afterwards, since the RAM has been
freed.
Drop the uninit altogether, since it is not actually necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:23 +0000 (18:11 +1300)]
bootm: Skip command-line substitution if !CONFIG_CMDLINE
When there is no command line, we cannot enable this feature. Add a check
to avoid a build error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:22 +0000 (18:11 +1300)]
bloblist: Make BLOBLIST_TABLES depend on BLOBLIST
Add an extra condition here since we cannot put x86 tables in a bloblist
when bloblists are not supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:21 +0000 (18:11 +1300)]
command: Fix operation of !CONFIG_CMDLINE
The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE
is not enabled. Fix this by updating the macro to provide the 'repeatable'
arugment in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:20 +0000 (18:11 +1300)]
doc: Convert Chromium OS docs to rst
Move this documentation over to reST. Move the example files into a files/
directory so they are still separate.
Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:19 +0000 (18:11 +1300)]
malloc: Export malloc_simple_info()
Export this function always so it can be used behind IS_ENABLED() instead
of requiring an #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:18 +0000 (18:11 +1300)]
cpu: Rename SPL_CPU_SUPPORT to SPL_CPU
The _SUPPORT suffix is from an earlier time and interferes with use of
the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.
Tidy up the TODO that prompted this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:17 +0000 (18:11 +1300)]
sf: Support querying write-protect
This feature was dropped from U-Boot some time ago:
f12f96cfaf5 (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected,
since if it is, it may not be possible to write to do (i.e. failing to
write is expected).
I am not sure of the correct layer to implement this, so this patch is a
stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to
use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than
the actual mechanism.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort
of API for it to be accessible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:16 +0000 (18:11 +1300)]
bootstage: Warning if space is exhausted
At present bootstage silently ignores new records if it runs out of
space. It is sometimes obvious by looking at the report, but the IDs are
not contiguous, so it is easy to miss.
Aad a message so that action can be taken.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:15 +0000 (18:11 +1300)]
spl: Split out bootstage ID into a function
We have two separate places that need to figure out the bootstage ID to
use. Put this code in a function so that the logic is in one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:14 +0000 (18:11 +1300)]
binman: Show a message when changing subnodes
This change seems important enough to warrant a visible message. Change
the log_debug() to log_info().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:13 +0000 (18:11 +1300)]
test: Silenece the echo and print tests
These tests current produce unwanted output on sandbox. Use the correct
functions to controller console output, to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:12 +0000 (18:11 +1300)]
sandbox: image: Allow sandbox to load any image
Sandbox is special in that it is used for testing and it does not match
any particular target architecture. Allow it to load an image from any
architecture, so that 'bootm' can be used as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:11 +0000 (18:11 +1300)]
sandbox: Provide a way to bind fixed/removeable devices
At present when a file is bound to a host device it is always marked as
removeable. Arguably the device is removeable, since it can be unbound at
will. However while it is bound, it is not considered removable by the
user. Also it is useful to be able to model both fixed and removeable
devices for code that distinguishes them.
Add a -r flag to the 'host bind' command and plumb it through to provide
this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:10 +0000 (18:11 +1300)]
sandbox: Update do_host_bind() argument counting
Remove the 'bind' subcommand before processing the arguments. This will
make it easier to add an optional flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:09 +0000 (18:11 +1300)]
sandbox: Disintangle declarations in do_host_bind()
This function has a strange mix of declarations and argument parsing
which is a bit hard to follow and harder to modify. Separate out the
declarations at the start of the function and adjust the ordering of
the code slightly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:08 +0000 (18:11 +1300)]
sandbox: cros_ec: Only write EC state when the EC is probed
This can crash if the EC has not yet been probed. Add a check to prevent
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:07 +0000 (18:11 +1300)]
sandbox: Only delete the executable if requested
At present sandbox removes its executable after failing to run it,
since there is no other way that it would get cleaned up.
However, this is actually only wanted if the image was created within
sandbox. For the case where the image was generated by the build system,
such as u-boot-spl, we don't want to delete it.
Handle the two code paths accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:11:06 +0000 (18:11 +1300)]
sandbox: Only call timer_timebase_fallback() if present
This function only exists if CPU is enabled. Update the code to take
account of this, so that it does not have to be enabled on all sandbox
builds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Simon Glass [Mon, 15 Mar 2021 05:00:34 +0000 (18:00 +1300)]
x86: coreboot: Don't setup MTRR when booting from coreboot
This currently hangs and it is not necessary in any case. Drop the code
when booting from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:33 +0000 (18:00 +1300)]
x86: fsp: Don't notify if booted from coreboot
When booting from coreboot there is no need to notify the FSP of anything,
since coreboot has already done it. Nor it is possible, since the FSP
details are not provided by coreboot.
Skip it in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:32 +0000 (18:00 +1300)]
x86: coral: Fall back to coreboot video when FSP missing
When booting from coreboot the FSP video information is no-longer
available. Enable the coreboot driver so that we can get some sort of
display in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:31 +0000 (18:00 +1300)]
x86: coral: Allow init of debug UART in U-Boot proper
At present the debug UART is only set up in SPL, on the assumption that
the boot flow will always pass through there. When booting from coreboot,
SPL is not used, so the debug UART is not available.
Move the code into a common place so that it can be used in U-Boot proper
also. Add the required init to start_from_spl.S as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:30 +0000 (18:00 +1300)]
x86: coral: Avoid build error with !CONFIG_ACPIGEN
When CONFIG_ACPIGEN is not enabled the CPU code does not build. Fix this
by moving things around.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:29 +0000 (18:00 +1300)]
dm: core: Add CBFS support to flashmap
Allow referencing a CBFS file in the flashmap, so that it is possible to
boot from coreboot, where files are not available from binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:28 +0000 (18:00 +1300)]
x86: fsp: Don't enable FSP graphics if booted from coreboot
This driver cannot work when booted from coreboot, since the FSP
information is not available. Disable it in that case, so that the
coreboot video driver can be used instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:27 +0000 (18:00 +1300)]
x86: video: Allow coreboot video to be used on any x86 board
When booting from coreboot we need this driver for the video to work.
Update the driver to be usable on any board.
The driver disables itself if it sees that is not booted from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:26 +0000 (18:00 +1300)]
video: Fix video on coreboot with the copy buffer
The copy buffer, if enabled, prevents booting from coreboot correctly,
since no memory is allocated for it. Allow it to fall back to disabled
in this situation. This ensures that a console is displayed, even if
it is slow.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:25 +0000 (18:00 +1300)]
cmd: Add missing check for CONFIG_SYS_LONGHELP
Two commands are missing this check, so compilation fails when building
without CONFIG_CMDLINE. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:24 +0000 (18:00 +1300)]
x86: Add a command to display coreboot sysinfo
This information is interesting to look at and can be important for
debugging and inspection. Add a command to display it in a helpful
format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:23 +0000 (18:00 +1300)]
x86: Allow installing an e820 when booting from coreboot
Move this code into a generic location so that it can be used by other x86
boards which want to boot from coreboot. Also ensure that this is called
if booting from coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:22 +0000 (18:00 +1300)]
x86: coreboot: Update parsing of the latest sysinfo
Quite a few new tag types have been added over the years. Bring these into
U-Boot so that all required tags can be parsed.
Add a proper comment to struct sysinfo_t while we are here, since many of
the meanings are not obvious.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:21 +0000 (18:00 +1300)]
x86: Move coreboot sysinfo parsing into generic x86 code
It is useful to be able to parse coreboot tables on any x86 build which is
booted from coreboot. Add a new Kconfig option to enable this feature and
move the code so it can be used on any board, if enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:20 +0000 (18:00 +1300)]
x86: coreboot: Sync up timestamp codes
Add new timestamp codes that are present in coreboot, so that we can decode
these in U-Boot.
At present TS_U_BOOT_START_KERNEL is used twice. It should only be used
just before jumping to Linux, so update the other call site to use
TS_START_KERNEL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:19 +0000 (18:00 +1300)]
x86: Move coreboot timestamp info into coreboot_tables.h
This all relates to the sysinfo structure provided by coreboot. Put the
timestamp definitions into the same file as the others. Tidy up a few
comments at the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:18 +0000 (18:00 +1300)]
x86: Make coreboot sysinfo available to any x86 board
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or
from coreboot. In the latter case we want to provide access to the coreboot
sysinfo tables. Move the definitions into a file available to any x86
board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:17 +0000 (18:00 +1300)]
cbfs: Drop unnecessary cast in file_cbfs_fill_cache()
The results of malloc() are a void * and so this cast is unnecessary. Drop
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:16 +0000 (18:00 +1300)]
cbfs: Support reading compression information
CBFS now supports compressed filed. Add support for reading this
information so that the correct decompression can be applied. The
decompression itself is not implemented in CBFS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:15 +0000 (18:00 +1300)]
cbfs: Simplify file iteration
In file_cbfs_next_file() there is a lot of complicated code to move to
the next file. Use the ALIGN() macros to simplify this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:14 +0000 (18:00 +1300)]
cbfs: Factor out filling a cache node into a new function
The file_cbfs_next_file() function is already fairly long. Before
expanding it further, move the core part into a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:13 +0000 (18:00 +1300)]
cbfs: Allow file traversal with any CBFS
The file traversal functions currently use a single global CBFS. In some
cases we need to access multiple CBFSs to obtain different files. Add new
functions to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:12 +0000 (18:00 +1300)]
cbfs: Allow access to CBFS without a header
In some cases CBFS does not start with a header but is just a collection
of files. It is possible to support this so long as the size of the CBFS
is provided.
Update the cbfs_init_mem() function to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:11 +0000 (18:00 +1300)]
smbios: Allow writing to the coreboot version string
When U-Boot is booted from coreboot the SMBIOS tables are written by
coreboot, not U-Boot. The existing method of updating the BIOS version
string does not work in that case, since gd->smbios_version is only set
when U-Boot writes the tables.
Add a new function which allows the version to be updated by parsing the
tables and writing the string in the correct place. Since coreboot
provides a pointer to the SMBIOS tables in its sysinfo structure, this
makes it easy to do the update.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:10 +0000 (18:00 +1300)]
cbfs: Rename new_node to node
Rename this variable since there is no need to distinguish it from an old
node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:09 +0000 (18:00 +1300)]
cbfs: Add support for attributes
CBFS now supports attributes for things that cannot fit in the header as
originally conceived. Add the structures for these.
Also rename attributes_offset to something shorter, to ease code
readability.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:08 +0000 (18:00 +1300)]
mmc: pci_mmc: Set up the card detect
The driver currently reads the card-detect but does not register it with
the MMC stack. Update this so that card-detect works as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:07 +0000 (18:00 +1300)]
tegra: i2c: Drop LOG_DEBUG
We should not enable debugging by default. Drop this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:06 +0000 (18:00 +1300)]
x86: coral: Update the SD card-detect GPIO
Since the recent bug fix, it doesn't matter which GPIO phandle is used so
long as the GPIO number is right. Still, we may as well use the correct
one to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Mon, 15 Mar 2021 05:00:05 +0000 (18:00 +1300)]
x86: coral: Put the eMMC first
At present the eMMC device does not have an alias so it appears after
the SD card which is device 1. There is no device 0 which is odd.
Make the eMMC device be the first one. Update the boot script to use the
new device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Mon, 15 Mar 2021 05:00:04 +0000 (18:00 +1300)]
x86: Probe device if needed in intel_gpio_xlate()
The Intel GPIO binding allows GPIOs to be globally numbered, so that it
does not matter which GPIO bank is specified in the device tree. This is
convenient and avoid confusion since the banks do not have the same number
of GPIOs and the numbering is not sequential.
The GPIO uclass ensures that the device mentioned in the devicetree
binding is probed. It is fine for the driver to update gpio_desc to point
to a different driver, but this may not have been probed. If it has not
been, then it cannot be claimed since there is no uclass data.
We could handle this in the GPIO uclass but so far it is an unusual
situation so it is probably not worth the extra code. Handle this case in
the GPIO driver by probing the selected device if necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Mar 2021 05:00:03 +0000 (18:00 +1300)]
x86: p2sb: Drop LOG_DEBUG
We should not enable debugging by default. Drop this.
Signed-off-by: Simon Glass <sjg@chromium.org>