platform/upstream/llvm.git
6 years ago[X86] Regenerate popcnt tests
Simon Pilgrim [Tue, 19 Dec 2017 18:05:13 +0000 (18:05 +0000)]
[X86] Regenerate popcnt tests

llvm-svn: 321093

6 years ago[clangd] Build dynamic index and use it for code completion.
Eric Liu [Tue, 19 Dec 2017 18:00:37 +0000 (18:00 +0000)]
[clangd] Build dynamic index and use it for code completion.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: klimek, ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D41289

llvm-svn: 321092

6 years ago[GlobalISel][Legalizer] Fix crash when trying to lower G_FNEG of fp128 types.
Amara Emerson [Tue, 19 Dec 2017 17:21:35 +0000 (17:21 +0000)]
[GlobalISel][Legalizer] Fix crash when trying to lower G_FNEG of fp128 types.

This doesn't add legalizer support, just prevents crashing so that we
can gracefully fall back to SDAG.

Fixes PR35690.

llvm-svn: 321091

6 years ago[clang] -foptimization-record-file= should imply -fsave-optimization-record
Jonas Devlieghere [Tue, 19 Dec 2017 17:16:45 +0000 (17:16 +0000)]
[clang] -foptimization-record-file= should imply -fsave-optimization-record

The Clang option -foptimization-record-file= controls which file an
optimization record is output to. Optimization records are output if you
use the Clang option -fsave-optimization-record. If you specify the
first option without the second, you get a warning that the command line
argument was unused. Passing -foptimization-record-file= should imply
-fsave-optimization-record.

This fixes PR33670

Patch by: Dmitry Venikov <venikov@phystech.edu>

Differential revision: https://reviews.llvm.org/D39834

llvm-svn: 321090

6 years ago[DAG] Elide overlapping store
Nirav Dave [Tue, 19 Dec 2017 17:10:56 +0000 (17:10 +0000)]
[DAG] Elide overlapping store

Summary:
Extend overlapping store elision to handle overwrites of stores by
larger stores.

Nontemporal tests have been modified to add memory dependencies to
prevent store elision.

Reviewers: craig.topper, rnk, t.p.northover

Subscribers: javed.absar, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D40969

llvm-svn: 321089

6 years ago[WebAssembly] Add support for writing out init functions in linking section
Sam Clegg [Tue, 19 Dec 2017 17:09:45 +0000 (17:09 +0000)]
[WebAssembly] Add support for writing out init functions in linking section

This change add support for init functions in the linking
section, but only in -r/--relocatable mode.

Differential Revision: https://reviews.llvm.org/D41375

llvm-svn: 321088

6 years ago[clangd] Split findDefs/highlights into XRefs, from ClangdUnit. NFC
Sam McCall [Tue, 19 Dec 2017 17:06:07 +0000 (17:06 +0000)]
[clangd] Split findDefs/highlights into XRefs, from ClangdUnit. NFC

Going to add unit tests in the next patch. (Haha!) But seriously there's
some work to do first - need to extract the markers-in-source-code
parser from CodeComplete test and make it more flexible, to allow
annotated ranges etc.

llvm-svn: 321087

6 years ago[clangd] Fix warnings/compiler pickiness after r321083
Sam McCall [Tue, 19 Dec 2017 17:05:00 +0000 (17:05 +0000)]
[clangd] Fix warnings/compiler pickiness after r321083

llvm-svn: 321086

6 years ago[X86][AVX512] Attempt target shuffle combining to different types instead of early-out
Simon Pilgrim [Tue, 19 Dec 2017 16:54:07 +0000 (16:54 +0000)]
[X86][AVX512] Attempt target shuffle combining to different types instead of early-out

We try to prevent shuffle combining to value types that would stop the folding of masked operations, but by just returning early, we were failing to try different shuffle types.

The TODOs are all still relevant here to improve codegen but we're lacking test examples.

llvm-svn: 321085

6 years ago[CodeGen] Move printing MO_CFIIndex operands to MachineOperand::print
Francis Visoiu Mistrih [Tue, 19 Dec 2017 16:51:52 +0000 (16:51 +0000)]
[CodeGen] Move printing MO_CFIIndex operands to MachineOperand::print

Work towards the unification of MIR and debug output by refactoring the
interfaces.

Before this patch we printed "<call frame instruction>" in the debug
output.

llvm-svn: 321084

6 years ago[clangd] Index-based code completion.
Eric Liu [Tue, 19 Dec 2017 16:50:37 +0000 (16:50 +0000)]
[clangd] Index-based code completion.

Summary: Use symbol index to populate completion results for qualfified IDs e.g. "nx::A^".

Reviewers: ilya-biryukov, sammccall

Reviewed By: ilya-biryukov, sammccall

Subscribers: rwols, klimek, mgorny, cfe-commits, sammccall

Differential Revision: https://reviews.llvm.org/D41281

llvm-svn: 321083

6 years agoAdd renamed .o files that were omitted by "git llvm push" command
Walter Lee [Tue, 19 Dec 2017 16:34:13 +0000 (16:34 +0000)]
Add renamed .o files that were omitted by "git llvm push" command

Original commit is at: https://reviews.llvm.org/D41295.

llvm-svn: 321082

6 years agoRemove unnecessary this->. NFC.
Rafael Espindola [Tue, 19 Dec 2017 16:29:02 +0000 (16:29 +0000)]
Remove unnecessary this->. NFC.

llvm-svn: 321081

6 years agoRename sparc-myriad-elf triplet to sparc-myriad-rtems
Walter Lee [Tue, 19 Dec 2017 16:19:11 +0000 (16:19 +0000)]
Rename sparc-myriad-elf triplet to sparc-myriad-rtems

Summary: This is to be consistent with latest Movidius MDK releases.
Also, don't inherit any gcc paths for shave triple.

Reviewers: jyknight

Subscribers: emaste, fedor.sergeev

Differential Revision: https://reviews.llvm.org/D41295

llvm-svn: 321080

6 years ago[CFGVPrinter] Fix -dot-cfg-only
Francis Visoiu Mistrih [Tue, 19 Dec 2017 15:20:18 +0000 (15:20 +0000)]
[CFGVPrinter] Fix -dot-cfg-only

The refactoring in r281640 made -dot-cfg-only ignore the "-only" part.

llvm-svn: 321079

6 years ago[ThinLTO][C-API] Correct api comments
Ben Dunbobbin [Tue, 19 Dec 2017 14:49:33 +0000 (14:49 +0000)]
[ThinLTO][C-API] Correct api comments

Negative values never disabled the pruning - they simply set high values for the pruning interval.

The behaviour now is that negative values set the maximum pruning interval (which appears to have been the intention from the start) see https://reviews.llvm.org/D41231.

I have adjusted the comments to reflect this, removed any inaccurate statements, and corrected any typos I spotted in the English.

Differential Revision: https://reviews.llvm.org/D41279

llvm-svn: 321078

6 years ago[Support][CachePruning] Disable cache pruning regression fix
Ben Dunbobbin [Tue, 19 Dec 2017 14:42:38 +0000 (14:42 +0000)]
[Support][CachePruning] Disable cache pruning regression fix

borked by: rL284966 (see: https://reviews.llvm.org/D25730).

Previously, Interval was unsigned (see: CachePruning.h), replacing the type with std::chrono::seconds (which is signed) causes a regression in behaviour because the c-api intends negative values to translate to large positive intervals to *effectively* disable the pruning (see comments on: setCachePruningInterval()).

Differential Revision: https://reviews.llvm.org/D41231

llvm-svn: 321077

6 years ago[X86] Fix uninitialized variable sanitizer warning from rL321074
Simon Pilgrim [Tue, 19 Dec 2017 14:34:35 +0000 (14:34 +0000)]
[X86] Fix uninitialized variable sanitizer warning from rL321074

llvm-svn: 321076

6 years ago[InlineCost] Skip volatile loads when looking for repeated loads
Haicheng Wu [Tue, 19 Dec 2017 13:42:58 +0000 (13:42 +0000)]
[InlineCost] Skip volatile loads when looking for repeated loads

This is a follow-up fix of r320814.  A test case is also added.

llvm-svn: 321075

6 years ago[X86][SSE] Add cpu feature for aggressive combining to variable shuffles
Simon Pilgrim [Tue, 19 Dec 2017 13:16:43 +0000 (13:16 +0000)]
[X86][SSE] Add cpu feature for aggressive combining to variable shuffles

As mentioned in D38318 and D40865, modern Intel processors prefer to combine multiple shuffles to a variable shuffle mask (PSHUFB/VPERMPS etc.) instead of having multiple stage 'fixed' shuffles which put more pressure on Port 5 (at the expense of extra shuffle mask loads).

This patch provides a FeatureFastVariableShuffle target flag for Haswell+ CPUs that prefers combining 2 or more fixed shuffles to a single variable shuffle (default is 3 shuffles).

The long term aim is to drive more of this from schedule data (probably via the MC) but we're not close to being ready for that yet.

Differential Revision: https://reviews.llvm.org/D41323

llvm-svn: 321074

6 years ago[clangd] Expose offset <-> LSP position functions, and fix bugs
Sam McCall [Tue, 19 Dec 2017 12:23:48 +0000 (12:23 +0000)]
[clangd] Expose offset <-> LSP position functions, and fix bugs

Summary:
- Moved these functions to SourceCode.h
- added unit tests
- fix off by one in positionToOffset: Offset - 1 in final calculation was wrong
- fixed formatOnType which had an equal and opposite off-by-one
- positionToOffset and offsetToPosition both consistently clamp to beginning/end
  of file when input is out of range
- gave variables more descriptive names
- removed windows line ending fixmes where there is nothing to fix
- elaborated on UTF-8 fixmes

This will conflict with Eric's D41281, but in a pretty easy-to-resolve way.

Reviewers: ioeric

Subscribers: klimek, mgorny, ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D41351

llvm-svn: 321073

6 years ago[ARM] Register the Thumb2SizeReducePass. NFC
David Green [Tue, 19 Dec 2017 12:19:08 +0000 (12:19 +0000)]
[ARM] Register the Thumb2SizeReducePass. NFC

Also adds a simple test case.

llvm-svn: 321072

6 years ago[Support] Add WritableMemoryBuffer class
Pavel Labath [Tue, 19 Dec 2017 12:15:50 +0000 (12:15 +0000)]
[Support] Add WritableMemoryBuffer class

Summary:
The motivation here is LLDB, where we need to fixup relocations in
mmapped files before their contents can be read correctly.  The
MemoryBuffer class does exactly what we need, *except* that it maps the
file in read-only mode.

WritableMemoryBuffer reuses the existing machinery for opening and
mmapping a file. The only difference is in the argument to the
mapped_file_region constructor -- we create a private copy-on-write
mapping, so that we can make changes to the mapped data, but the changes
aren't carried over to the underlying file.

This patch is based on an initial version by Zachary Turner.

Reviewers: mehdi_amini, rnk, rafael, dblaikie, zturner

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40291

llvm-svn: 321071

6 years ago[X86][SSE] Use (V)PHMINPOSUW for vXi8 SMAX/SMIN/UMAX/UMIN horizontal reductions ...
Simon Pilgrim [Tue, 19 Dec 2017 12:02:40 +0000 (12:02 +0000)]
[X86][SSE] Use (V)PHMINPOSUW for vXi8 SMAX/SMIN/UMAX/UMIN horizontal reductions (PR32841)

Extension to D39729 which performed this for vXi16, with the same bit flipping to handle SMAX/SMIN/UMAX cases, vXi8 UMIN horizontal reductions can be performed.

This makes use of the fact that by performing a pair-wise i8 SHUFFLE/UMIN before PHMINPOSUW, we both get the UMIN of each pair but also zero-extend the upper bits ready for v8i16.

Differential Revision: https://reviews.llvm.org/D41294

llvm-svn: 321070

6 years agoFix: [YAML] Always double quote UTF-8 characters
Francis Visoiu Mistrih [Tue, 19 Dec 2017 11:59:28 +0000 (11:59 +0000)]
Fix: [YAML] Always double quote UTF-8 characters

llvm-svn: 321069

6 years ago[YAML] Always double quote UTF-8 characters
Francis Visoiu Mistrih [Tue, 19 Dec 2017 11:51:05 +0000 (11:51 +0000)]
[YAML] Always double quote UTF-8 characters

llvm-svn: 321068

6 years ago[clangd] Support filtering by fixing scopes in fuzzyFind.
Eric Liu [Tue, 19 Dec 2017 11:37:40 +0000 (11:37 +0000)]
[clangd] Support filtering by fixing scopes in fuzzyFind.

Summary: When scopes are specified, only match symbols from scopes.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: klimek, ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D41367

llvm-svn: 321067

6 years ago[mips] Handle the emission of microMIPSr6 sll instruction when used as a nop.
Simon Dardis [Tue, 19 Dec 2017 11:16:22 +0000 (11:16 +0000)]
[mips] Handle the emission of microMIPSr6 sll instruction when used as a nop.

This instruction is encoded as zero, so we have handle that case when checking
for unimplemented opcodes when producing the encoding for an instruction.

llvm-svn: 321066

6 years ago[clangd] Add unit tests for signature help. SigHelp/CodeComplete lit tests are smoke...
Sam McCall [Tue, 19 Dec 2017 10:29:27 +0000 (10:29 +0000)]
[clangd] Add unit tests for signature help. SigHelp/CodeComplete lit tests are smoke only.

llvm-svn: 321065

6 years ago[dwarfdump] Lookup needs to be an unsigned long long parameter.
Jonas Devlieghere [Tue, 19 Dec 2017 09:45:26 +0000 (09:45 +0000)]
[dwarfdump] Lookup needs to be an unsigned long long parameter.

Before this patch, dwarfdump's lookup parameter only accepts unsigned.
Given that for many current platforms the load address already exceeds
unsigned (e.g. arm64 w/ 0x100000000), dwarfdump needs an unsigned long
long parameter.

Patch by: Dr. Michael 'Mickey' Lauer <mickey@vanille-media.de>

llvm-svn: 321064

6 years ago[JumpThreading] Restrict PRE across instructions that don't pass control to successors
Max Kazantsev [Tue, 19 Dec 2017 09:10:21 +0000 (09:10 +0000)]
[JumpThreading] Restrict PRE across instructions that don't pass control to successors

PRE in JumpThreading should not be able to hoist copy of non-speculable loads across
instructions that don't always transfer execution to their successors, otherwise they may
introduce an unsafe load which otherwise would not be executed.

The same problem for GVN was fixed as rL316975.

Differential Revision: https://reviews.llvm.org/D40347

llvm-svn: 321063

6 years ago[FuzzMutate] Don't crash when mutator is unable to find operation
Igor Laevsky [Tue, 19 Dec 2017 08:52:51 +0000 (08:52 +0000)]
[FuzzMutate] Don't crash when mutator is unable to find operation

Differential Revision: https://reviews.llvm.org/D41009

llvm-svn: 321062

6 years agoTreat sret arguments as being dereferenceable in getPointerDereferenceableBytes()
Bjorn Steinbrink [Tue, 19 Dec 2017 08:46:46 +0000 (08:46 +0000)]
Treat sret arguments as being dereferenceable in getPointerDereferenceableBytes()

Reviewers: rnk, hfinkel, efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41355

llvm-svn: 321061

6 years agoTeach clang/NetBSD about additional dependencies for sanitizers
Kamil Rytarowski [Tue, 19 Dec 2017 07:10:33 +0000 (07:10 +0000)]
Teach clang/NetBSD about additional dependencies for sanitizers

Summary:
Sanitizers on NetBSD require additional linkage:

 - libutil for forkpty(3)
 - libexecinfo for backtrace(3)

Sponsored by <The NetBSD Foundation>

Reviewers: joerg, eugenis, vitalybuka, kcc

Reviewed By: eugenis

Subscribers: #sanitizers, cfe-commits

Tags: #sanitizers

Differential Revision: https://reviews.llvm.org/D41054

llvm-svn: 321060

6 years ago[X86] Don't extend v16i8 non-uniform shifts to v16i32 if we have BWI. Use v16i16...
Craig Topper [Tue, 19 Dec 2017 06:59:10 +0000 (06:59 +0000)]
[X86] Don't extend v16i8 non-uniform shifts to v16i32 if we have BWI. Use v16i16 instead.

BWI supports shifting by word amounts. Even if VLX isn't support we can still widen to v32i16 and extract the lower half. For SKX its preferrable to not use 512-bit vector if we can.

llvm-svn: 321059

6 years ago[X86] Use a specific list of MVTs in combineShiftRightArithmetic instead of iterating...
Craig Topper [Tue, 19 Dec 2017 06:29:00 +0000 (06:29 +0000)]
[X86] Use a specific list of MVTs in combineShiftRightArithmetic instead of iterating over every integer VT and checking their size.

Previously, we were checking for MVTs with sizes betwen 8 and 64 which only includes i8, i16, i32, and i64 today. But I don't think we should assume that and should list the types that are legal for x86. I also don't think we need i64 since type legalization is guaranteed to split those up.

llvm-svn: 321058

6 years ago[X86] Remove unnecessary check for integer VT from combineShiftRightArithmetic.
Craig Topper [Tue, 19 Dec 2017 06:28:58 +0000 (06:28 +0000)]
[X86] Remove unnecessary check for integer VT from combineShiftRightArithmetic.

I doubt there's any way to create a ashr for an FP type.

llvm-svn: 321057

6 years ago[X86] Remove dead code for turning vector shifts by large amounts into a zero vector.
Craig Topper [Tue, 19 Dec 2017 05:21:50 +0000 (05:21 +0000)]
[X86] Remove dead code for turning vector shifts by large amounts into a zero vector.

Pretty sure these are handled by a target independent DAG combine that turns them into undef these days.

llvm-svn: 321056

6 years ago[X86] Use ZERO_EXTEND instead of ANY_EXTEND when extending the shift amount for a...
Craig Topper [Tue, 19 Dec 2017 04:52:04 +0000 (04:52 +0000)]
[X86] Use ZERO_EXTEND instead of ANY_EXTEND when extending the shift amount for a non-uniform shift.

My reading of the SDM says that all bits of the shift amount are used. If the value of the element is larger than the number of bits the result the shift result is zero. So I think we need to zero_extend here to avoid garbage in the upper bits.

In reality we lower any_extend as zero_extend so in most cases it would be hard to hit this.

llvm-svn: 321055

6 years agoFix APFloat from string conversion for Inf
Serguei Katkov [Tue, 19 Dec 2017 04:27:39 +0000 (04:27 +0000)]
Fix APFloat from string conversion for Inf

The method IEEEFloat::convertFromStringSpecials() does not recognize
the "+Inf" and "-Inf" strings but these strings are printed for
the double Infinities by the IEEEFloat::toString().

This patch adds the "+Inf" and "-Inf" strings to the list of recognized
patterns in IEEEFloat::convertFromStringSpecials().

Re-landing after fix.

Reviewers: sberg, bogner, majnemer, timshen, rnk, skatkov, gottesmm, bkramer, scanon, anna
Reviewed By: anna
Subscribers: mkazantsev, FlameTop, llvm-commits, reames, apilipenko
Differential Revision: https://reviews.llvm.org/D38030

llvm-svn: 321054

6 years ago[TableGen][GlobalISel] Reset the internal map of RuleMatchers just before the emission
Quentin Colombet [Tue, 19 Dec 2017 02:57:23 +0000 (02:57 +0000)]
[TableGen][GlobalISel] Reset the internal map of RuleMatchers just before the emission

Between the creation of the last InstructionMatcher and the first
emission of the related Rule, we need to clear the internal map of IDs.
We used to do that right after the creation of the main
InstructionMatcher when building the rule and although that worked, this
is fragile because if for some reason some later code decides to create
more InstructionMatcher before the final call to emit, then the IDs
would be completely messed up.

Move that to the beginning of "emit" so that the IDs are guarantee to be
consistent.

NFC.

llvm-svn: 321053

6 years ago[Coverage] Fix use-after free in coverage emission
Eli Friedman [Tue, 19 Dec 2017 01:54:09 +0000 (01:54 +0000)]
[Coverage] Fix use-after free in coverage emission

Fixes regression from r320533.

This fixes the undefined behavior, but I'm not sure it's really right...
I think we end up with missing coverage for code in modules.

Differential Revision: https://reviews.llvm.org/D41374

llvm-svn: 321052

6 years agoTweak to the debugserver entitlements setup in the xcode project
Jason Molenda [Tue, 19 Dec 2017 01:41:47 +0000 (01:41 +0000)]
Tweak to the debugserver entitlements setup in the xcode project
file.  For macos builds specifically, use the macosx entitlements
files; for all other builds, use the ios etc entitlements.

llvm-svn: 321051

6 years agoFix Wasm as a follow up to r321035 and the other one
Reid Kleckner [Tue, 19 Dec 2017 01:08:53 +0000 (01:08 +0000)]
Fix Wasm as a follow up to r321035 and the other one

This array is tightly coupled with the .def file. Someone should look
into fixing that.

llvm-svn: 321050

6 years agoUse # instead of // for comments in a test.
Rafael Espindola [Tue, 19 Dec 2017 00:53:06 +0000 (00:53 +0000)]
Use # instead of // for comments in a test.

The test was using both // and # before.

llvm-svn: 321049

6 years agoupdate_mir_test_checks: Accept IR as input as well as MIR
Justin Bogner [Tue, 19 Dec 2017 00:49:04 +0000 (00:49 +0000)]
update_mir_test_checks: Accept IR as input as well as MIR

We need to handle IR for tests that want to do lowering (or just
-stop-after with IR as input). I've run this on one AArch64 test to
demonstrate what it looks like.

llvm-svn: 321048

6 years ago[llvm-objcopy] Add option to add a progbits section from a file
Jake Ehrlich [Tue, 19 Dec 2017 00:47:30 +0000 (00:47 +0000)]
[llvm-objcopy] Add option to add a progbits section from a file

This change adds support for adding progbits sections with contents from a file

Differential Revision: https://reviews.llvm.org/D41212

llvm-svn: 321047

6 years agoTargetLoweringBase: Followup to r321035
Matthias Braun [Tue, 19 Dec 2017 00:43:00 +0000 (00:43 +0000)]
TargetLoweringBase: Followup to r321035

I missed some prefixes and the fact that on AArch64 we use "bzero"
instead of "__bzero" as on X86 when doing my refactoring in r321035.

Improve tests for bzero.

llvm-svn: 321046

6 years agoTargetLowering: Fix InitLibcallCallingConvs() overriding things set in InitLibcalls()
Matthias Braun [Tue, 19 Dec 2017 00:20:33 +0000 (00:20 +0000)]
TargetLowering: Fix InitLibcallCallingConvs() overriding things set in InitLibcalls()

I missed the fact that the later called InitLibcallCallingConvs()
overrides some things set in InitLibcalls() when I did the refactoring
in r321036.

Fix by merging InitLibcallCallingConvs() into InitLibcalls() and doing
the initialization earlier.

llvm-svn: 321045

6 years ago[WebAssemlby] Fix typo in target triple used in tests
Sam Clegg [Tue, 19 Dec 2017 00:18:16 +0000 (00:18 +0000)]
[WebAssemlby] Fix typo in target triple used in tests

llvm-svn: 321044

6 years agoTargetLowering: Fix off-by-one error
Matthias Braun [Tue, 19 Dec 2017 00:05:10 +0000 (00:05 +0000)]
TargetLowering: Fix off-by-one error

This problem was present for a while, but somehow asan didn't catch
it before the refactoring in r321036.

llvm-svn: 321043

6 years ago[llvm-readobj] Dump wasm init functions
Sam Clegg [Tue, 19 Dec 2017 00:04:41 +0000 (00:04 +0000)]
[llvm-readobj] Dump wasm init functions

llvm-svn: 321042

6 years agoTargetLoweringBase: Remove unnecessary watchos exception; NFC
Matthias Braun [Mon, 18 Dec 2017 23:33:28 +0000 (23:33 +0000)]
TargetLoweringBase: Remove unnecessary watchos exception; NFC

WatchOS isn't report as iOS (as opposed to tvos) so the exception I
added in my last commit wasn't necessary after all.

llvm-svn: 321041

6 years agoAdjust test to account for llvm change where an empty CPU string will no longer gener...
Craig Topper [Mon, 18 Dec 2017 23:32:18 +0000 (23:32 +0000)]
Adjust test to account for llvm change where an empty CPU string will no longer generate a long nop on x86.

Long nops aren't supported by all x86 CPUs. So if no CPU is specified we have to use a single byte nop.

llvm-svn: 321040

6 years agoupdate_mir_test_checks: Add "mir" to some states and regex names
Justin Bogner [Mon, 18 Dec 2017 23:31:55 +0000 (23:31 +0000)]
update_mir_test_checks: Add "mir" to some states and regex names

For tests that do lowering we need to support IR as input, so here we
clarify some names to avoid ambiguity in upcoming commits.

llvm-svn: 321039

6 years ago[X86] Don't use NOPL when the assembler is passed an empty CPU string.
Craig Topper [Mon, 18 Dec 2017 23:31:43 +0000 (23:31 +0000)]
[X86] Don't use NOPL when the assembler is passed an empty CPU string.

This recommits the change from r321026. I have a fix for the lld test now.

llvm-svn: 321038

6 years agoLiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFC
Matthias Braun [Mon, 18 Dec 2017 23:19:44 +0000 (23:19 +0000)]
LiveStacks: Rename LiveStack.{h|cpp} to LiveStacks.{h|cpp}; NFC

Filenames should match the name of the class they contain.

llvm-svn: 321037

6 years agoX86/AArch64/ARM: Factor out common sincos_stret logic; NFCI
Matthias Braun [Mon, 18 Dec 2017 23:19:42 +0000 (23:19 +0000)]
X86/AArch64/ARM: Factor out common sincos_stret logic; NFCI

Note:
- X86ISelLowering: setLibcallName(SINCOS) was superfluous as
  InitLibcalls() already does it.
- ARMISelLowering: Setting libcallnames for sincos/sincosf seemed
  superfluous as in the darwin case it wouldn't be used while for all
  other cases InitLibcalls already does it.

llvm-svn: 321036

6 years agoAArch64/X86: Factor out common bzero logic; NFC
Matthias Braun [Mon, 18 Dec 2017 23:14:28 +0000 (23:14 +0000)]
AArch64/X86: Factor out common bzero logic; NFC

llvm-svn: 321035

6 years ago[Hexagon] Cache loads to select to avoid traversing mutating DAG
Krzysztof Parzyszek [Mon, 18 Dec 2017 23:13:27 +0000 (23:13 +0000)]
[Hexagon] Cache loads to select to avoid traversing mutating DAG

llvm-svn: 321034

6 years agoRevert part of r321026 "[X86] Don't use NOPL when the assembler is passed an empty...
Craig Topper [Mon, 18 Dec 2017 22:20:10 +0000 (22:20 +0000)]
Revert part of r321026 "[X86] Don't use NOPL when the assembler is passed an empty CPU string." while I investigate how to fix an lld test failure.

Looks like lld also needs to pass a -mcpu in some of its tests

llvm-svn: 321033

6 years ago[AArch64] Expand test coverage of vector element shuffling to Exynos
Evandro Menezes [Mon, 18 Dec 2017 22:17:39 +0000 (22:17 +0000)]
[AArch64] Expand test coverage of vector element shuffling to Exynos

Make sure that all test cases are run for Exynos as well.  Otherwise, NFC.

llvm-svn: 321032

6 years ago[TableGen][GlobalISel] Make the arguments of the Instruction and Operand Matchers...
Quentin Colombet [Mon, 18 Dec 2017 22:12:13 +0000 (22:12 +0000)]
[TableGen][GlobalISel] Make the arguments of the Instruction and Operand Matchers consistent

Move InsnVarID and OpIdx at the beginning of the list of arguments
for all the constructors of the OperandMatcher subclasses.
This matches what we do for the InstructionMatcher.

NFC.

llvm-svn: 321031

6 years agoFix buffer overrun in WindowsResourceCOFFWriter::writeSymbolTable()
Bob Haarman [Mon, 18 Dec 2017 22:10:14 +0000 (22:10 +0000)]
Fix buffer overrun in WindowsResourceCOFFWriter::writeSymbolTable()

Summary:
We were using sprintf(..., "$R06X", <some uint32_t>) to create strings
that are expected to be exactly length 8, but this results in longer
strings if the uint32_t is greater than 0xffffff. This change modifies
the behavior as follows:

 - Uses the loop counter instead of the data offset. This gives us
   sequential symbol names, avoiding collisions as much as possible.

 - Masks the value to 0xffffff to avoid generating names longer than 8
   bytes.

 - Uses formatv instead of sprintf.

Fixes PR35581.

Reviewers: ruiu, zturner

Reviewed By: ruiu

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D41270

llvm-svn: 321030

6 years agoAdd test for .req directive starting with 'p'
Reid Kleckner [Mon, 18 Dec 2017 22:01:18 +0000 (22:01 +0000)]
Add test for .req directive starting with 'p'

Reduced test case from libjpeg_turbo.

llvm-svn: 321029

6 years ago[MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loop
Jessica Paquette [Mon, 18 Dec 2017 21:44:52 +0000 (21:44 +0000)]
[MachineOutliner][NFC] Gardening: use std::any_of instead of bool + loop

River Riddle suggested to use std::any_of instead of the bool + loop thing on
r320229. This commit does that.

llvm-svn: 321028

6 years ago[hwasan] update the design doc
Kostya Serebryany [Mon, 18 Dec 2017 21:40:07 +0000 (21:40 +0000)]
[hwasan] update the design doc

llvm-svn: 321027

6 years ago[X86] Don't use NOPL when the assembler is passed an empty CPU string. Update tests...
Craig Topper [Mon, 18 Dec 2017 21:37:27 +0000 (21:37 +0000)]
[X86] Don't use NOPL when the assembler is passed an empty CPU string. Update tests to force a CPU with NOPL

Empty string should be equivalent to "generic" which doesn't allow NOPL. Force tests to use specificy 'pentiumpro' to guarantee NOPL.

Fixes PR35686

llvm-svn: 321026

6 years ago[TableGen][GlobalISel] Refactor optimizeRules related bit to allow code reuse
Quentin Colombet [Mon, 18 Dec 2017 21:25:53 +0000 (21:25 +0000)]
[TableGen][GlobalISel] Refactor optimizeRules related bit to allow code reuse

In theory, reapplying optimizeRules on each group matchers should give
us a second nesting level on the matching table. In practice, we need
more work to make that happen because all the predicates are actually
not directly available through the predicate matchers list.

NFC.

llvm-svn: 321025

6 years agoRevert "[AArch64][SVE] Asm" changes, they broke libjpeg_turbo
Reid Kleckner [Mon, 18 Dec 2017 20:58:25 +0000 (20:58 +0000)]
Revert "[AArch64][SVE] Asm" changes, they broke libjpeg_turbo

This reverts changes r320992, r320986, r320973, and r320970.

r320970 by itself breaks the test case, and the rest depend on it.

Test case will land soon.

llvm-svn: 321024

6 years agoDon't write preemptible symbol values to the .got.
Rafael Espindola [Mon, 18 Dec 2017 20:35:15 +0000 (20:35 +0000)]
Don't write preemptible symbol values to the .got.

It is not necessary and matches what bfd and gold do.

This was a regression from r315658.

llvm-svn: 321023

6 years ago[ELF] Fix typo in comment. NFC
Shoaib Meenai [Mon, 18 Dec 2017 20:33:27 +0000 (20:33 +0000)]
[ELF] Fix typo in comment. NFC

llvm-svn: 321022

6 years agoAdd another test.
Rafael Espindola [Mon, 18 Dec 2017 20:29:00 +0000 (20:29 +0000)]
Add another test.

This also changed in r315658. The new result is the correct one.

llvm-svn: 321021

6 years ago[WebAssebmly] Fix the single clang-format issue in `wasm` directory
Sam Clegg [Mon, 18 Dec 2017 20:20:24 +0000 (20:20 +0000)]
[WebAssebmly] Fix the single clang-format issue in `wasm` directory

llvm-svn: 321020

6 years ago[Analysis] Generate more precise TBAA tags when one access encloses the other
Ivan A. Kosarev [Mon, 18 Dec 2017 20:05:20 +0000 (20:05 +0000)]
[Analysis] Generate more precise TBAA tags when one access encloses the other

There are cases when two tags with different base types denote
accesses to the same direct or indirect member of a structure
type. Currently, merging of such tags results in a tag that
represents an access to an object that has the type of that
member. This patch changes this so that if one of the accesses
encloses the other, then the generic tag is the one of the
enclosed access.

Differential Revision: https://reviews.llvm.org/D39557

llvm-svn: 321019

6 years ago[PGO] Fix handling of cold entry count for instrumented PGO
Teresa Johnson [Mon, 18 Dec 2017 20:02:43 +0000 (20:02 +0000)]
[PGO] Fix handling of cold entry count for instrumented PGO

Summary:
In r277849, getEntryCount was changed to return None when the entry
count was 0, specifically for SamplePGO where it means no samples were
recorded. However, for instrumentation PGO a 0 entry count should be
returned directly, since it does mean that the function was completely
cold. Otherwise we end up treating these functions conservatively
in isFunctionEntryCold() and isColdBB().

Instead, for SamplePGO use -1 when there are no samples, and change
getEntryCount to return None when the value is -1.

Reviewers: danielcdh, davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D41307

llvm-svn: 321018

6 years ago[TableGen][GlobalISel] Optimize MatchTable for faster instruction selection
Quentin Colombet [Mon, 18 Dec 2017 19:47:41 +0000 (19:47 +0000)]
[TableGen][GlobalISel] Optimize MatchTable for faster instruction selection

*** Context ***

Prior to this patchw, the table generated for matching instruction was
straight forward but highly inefficient.

Basically, each pattern generates its own set of self contained checks
and actions.
E.g., TableGen generated:
// First pattern
CheckNumOperand 3
CheckOpcode G_ADD
...
Build ADDrr
// Second pattern
CheckNumOperand 3
CheckOpcode G_ADD
...
Build ADDri
// Third pattern
CheckNumOperand 3
CheckOpcode G_SUB
...
Build SUBrr

*** Problem ***

Because of that generation, a *lot* of check were redundant between each
pattern and were checked every single time until we reach the pattern
that matches.
E.g., Taking the previous table, let say we are matching a G_SUB, that
means we were going to check all the rules for G_ADD before looking at
the G_SUB rule. In particular we are going to do:
check 3 operands; PASS
check G_ADD; FAIL
; Next rule
check 3 operands; PASS (but we already knew that!)
check G_ADD; FAIL (well it is still not true)
; Next rule
check 3 operands; PASS (really!!)
check G_SUB; PASS (at last :P)

*** Proposed Solution ***

This patch introduces a concept of group of rules (GroupMatcher) that
share some predicates and only get checked once for the whole group.

This patch only creates groups with one nesting level. Conceptually
there is nothing preventing us for having deeper nest level. However,
the current implementation is not smart enough to share the recording
(aka capturing) of values. That limits its ability to do more sharing.

For the given example the current patch will generate:
// First group
CheckOpcode G_ADD

 // First pattern
 CheckNumOperand 3
 ...
 Build ADDrr
 // Second pattern
 CheckNumOperand 3
 ...
 Build ADDri

// Second group
CheckOpcode G_SUB

 // Third pattern
 CheckNumOperand 3
 ...
 Build SUBrr

But if we allowed several nesting level, it could create a sub group
for the checknumoperand 3.
(We would need to call optimizeRules on the rules within a group.)

*** Result ***

With only one level of nesting, the instruction selection pass is up
to 4x faster. For instance, one instruction now takes 500 checks,
instead of 24k! With more nesting we could get in the tens I believe.

Differential Revision: https://reviews.llvm.org/D39034

rdar://problem/34670699

llvm-svn: 321017

6 years agoFix more inconsistent line endings. NFC.
Dimitry Andric [Mon, 18 Dec 2017 19:46:56 +0000 (19:46 +0000)]
Fix more inconsistent line endings. NFC.

llvm-svn: 321016

6 years ago[X86] Minor formatting fix to getHostCPUFeatures. NFC
Craig Topper [Mon, 18 Dec 2017 19:40:11 +0000 (19:40 +0000)]
[X86] Minor formatting fix to getHostCPUFeatures. NFC

llvm-svn: 321015

6 years ago[MachineOutliner] Recommit r320229
Jessica Paquette [Mon, 18 Dec 2017 19:33:21 +0000 (19:33 +0000)]
[MachineOutliner] Recommit r320229

LR was undefined entering outlined functions that contain calls. This made the
machine verifier unhappy when expensive checks were enabled. This fixes that.

llvm-svn: 321014

6 years ago[PPC] Also disable the pre-emit version of reg+reg to reg+imm transformation.
Benjamin Kramer [Mon, 18 Dec 2017 19:21:56 +0000 (19:21 +0000)]
[PPC] Also disable the pre-emit version of reg+reg to reg+imm transformation.

This has the same issue as the early pass disabled in r321010.

llvm-svn: 321013

6 years ago[cmake] Update experimental target error message
Don Hinton [Mon, 18 Dec 2017 19:15:15 +0000 (19:15 +0000)]
[cmake] Update experimental target error message

Summary:
Update this error message indicate this test only ensures experimental
targets were passed via LLVM_EXPERIMENTAL_TARGETS_TO_BUILD.

Originally, this test validated all targets, but in r184923, it was moved
after the LLVMBUILDTOOL test, which also validates all targets, making
that part of the test redundant.

Differential Revision: https://reviews.llvm.org/D41273

llvm-svn: 321012

6 years agoRecommit "[DWARFv5] Dump an MD5 checksum in the line-table header."
Paul Robinson [Mon, 18 Dec 2017 19:08:35 +0000 (19:08 +0000)]
Recommit "[DWARFv5] Dump an MD5 checksum in the line-table header."
Adds missing support for DW_FORM_data16.

Update of r320852/r320886, fixing the unittest again, this time use a
raw char string for the test data.

Differential Revision: https://reviews.llvm.org/D41090

llvm-svn: 321011

6 years ago[PPC] Disable reg+reg to reg+imm transformation.
Benjamin Kramer [Mon, 18 Dec 2017 18:56:57 +0000 (18:56 +0000)]
[PPC] Disable reg+reg to reg+imm transformation.

It creates invalid instructions. PR35688.

llvm-svn: 321010

6 years agoFix inconsistent line endings in HexagonVectorLoopCarriedReuse.cpp. NFC.
Dimitry Andric [Mon, 18 Dec 2017 18:56:00 +0000 (18:56 +0000)]
Fix inconsistent line endings in HexagonVectorLoopCarriedReuse.cpp. NFC.

llvm-svn: 321009

6 years ago[Hexagon] Higher versions of HVX imply presence of lower versions
Krzysztof Parzyszek [Mon, 18 Dec 2017 18:51:57 +0000 (18:51 +0000)]
[Hexagon] Higher versions of HVX imply presence of lower versions

The code in Hexagon_MC::completeHVXFeatures wasn't setting all HVX-
related features correctly.

llvm-svn: 321008

6 years ago[IR] Support the new TBAA metadata format in IR verifier
Ivan A. Kosarev [Mon, 18 Dec 2017 18:46:44 +0000 (18:46 +0000)]
[IR] Support the new TBAA metadata format in IR verifier

Differential Revision: https://reviews.llvm.org/D40438

llvm-svn: 321007

6 years agoFix inconsistent line endings in ARCDisassembler.cpp. NFC.
Dimitry Andric [Mon, 18 Dec 2017 18:45:37 +0000 (18:45 +0000)]
Fix inconsistent line endings in ARCDisassembler.cpp. NFC.

llvm-svn: 321006

6 years agoi[Hexagon] ANY_EXTEND_VECTOR_INREG should be Custom, not Legal in r321004
Krzysztof Parzyszek [Mon, 18 Dec 2017 18:41:52 +0000 (18:41 +0000)]
i[Hexagon] ANY_EXTEND_VECTOR_INREG should be Custom, not Legal in r321004

llvm-svn: 321005

6 years ago[Hexagon] Generate HVX code for vector sign-, zero- and any-extends
Krzysztof Parzyszek [Mon, 18 Dec 2017 18:32:27 +0000 (18:32 +0000)]
[Hexagon] Generate HVX code for vector sign-, zero- and any-extends

Implement any-extend as zero-extend.

llvm-svn: 321004

6 years ago[X86] Regenerate test to improve codegen testing for D41350
Simon Pilgrim [Mon, 18 Dec 2017 18:31:02 +0000 (18:31 +0000)]
[X86] Regenerate test to improve codegen testing for D41350

llvm-svn: 321003

6 years ago[Hexagon] Prefer to widen HVX vectors instead of promoting
Krzysztof Parzyszek [Mon, 18 Dec 2017 18:21:01 +0000 (18:21 +0000)]
[Hexagon] Prefer to widen HVX vectors instead of promoting

llvm-svn: 321002

6 years agoRemoved unused DominanceFrontier
Matt Arsenault [Mon, 18 Dec 2017 18:01:13 +0000 (18:01 +0000)]
Removed unused DominanceFrontier

llvm-svn: 321001

6 years ago[ThinLTO] Make distributed indexes test more robust
Teresa Johnson [Mon, 18 Dec 2017 18:00:32 +0000 (18:00 +0000)]
[ThinLTO] Make distributed indexes test more robust

Modify test so that it passes in the reverse-iteration bot.
We use DenseMap instead of std::map for the summaries to emit into
distributed index files. The iteration order is not defined, but
it is deterministic, which is good enough.

llvm-svn: 321000

6 years ago[PGO] Test case changes for D41059
Xinliang David Li [Mon, 18 Dec 2017 17:56:42 +0000 (17:56 +0000)]
[PGO] Test case changes for D41059

Differential Revision: http://reviews.llvm.org/D41059

llvm-svn: 320999

6 years ago[PGO] add MST min edge selection heuristic to ensure non-zero entry count
Xinliang David Li [Mon, 18 Dec 2017 17:56:19 +0000 (17:56 +0000)]
[PGO] add MST min edge selection heuristic to ensure non-zero entry count

Differential Revision: http://reviews.llvm.org/D41059

llvm-svn: 320998

6 years ago[YAML] Fix mustQuote return type changed in r320996
Francis Visoiu Mistrih [Mon, 18 Dec 2017 17:49:27 +0000 (17:49 +0000)]
[YAML] Fix mustQuote return type changed in r320996

llvm-svn: 320997

6 years ago[YAML] Add support for non-printable characters
Francis Visoiu Mistrih [Mon, 18 Dec 2017 17:38:03 +0000 (17:38 +0000)]
[YAML] Add support for non-printable characters

LLVM IR function names which disable mangling start with '\01'
(https://www.llvm.org/docs/LangRef.html#identifiers).

When an identifier like "\01@abc@" gets dumped to MIR, it is quoted, but
only with single quotes.

http://www.yaml.org/spec/1.2/spec.html#id2770814:

"The allowed character range explicitly excludes the C0 control block
allowed), the surrogate block #xD800-#xDFFF, #xFFFE, and #xFFFF."

http://www.yaml.org/spec/1.2/spec.html#id2776092:

"All non-printable characters must be escaped.
[...]
Note that escape sequences are only interpreted in double-quoted scalars."

This patch adds support for printing escaped non-printable characters
between double quotes if needed.

Should also fix PR31743.

Differential Revision: https://reviews.llvm.org/D41290

llvm-svn: 320996

6 years agoAdd a test.
Rafael Espindola [Mon, 18 Dec 2017 17:36:28 +0000 (17:36 +0000)]
Add a test.

This changed in r315658, but it was missing a test.

llvm-svn: 320995

6 years agoFix the reference to the now renamed member of TBAAStructField
Ivan A. Kosarev [Mon, 18 Dec 2017 16:50:11 +0000 (16:50 +0000)]
Fix the reference to the now renamed member of TBAAStructField

See https://reviews.llvm.org/D39956 for details.

llvm-svn: 320994