Pragnesh Patel [Fri, 29 May 2020 06:03:34 +0000 (11:33 +0530)]
riscv: cpu: fu540: Add support for cpu fu540
Add SiFive fu540 cpu to support RISC-V arch
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:33 +0000 (11:33 +0530)]
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
This sync has changes required to use GPIO in U-Boot and
U-Boot SPL.
Sync dts from linux v5.7-rc2 commit:
"riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file"
(sha1:
0a91330b2af9f71ceeeed483f92774182b58f6d9)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:32 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: set ethernet clock rate
Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps,
Earlier this is done by FSBL. With this change We can remove the
ethernet clock rate code from FSBL.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:31 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Release ethernet clock reset
U-Boot ethernet works with FSBL flow where releasing ethernet clock
reset is part of FSBL itself but with the SPL, We need to release
ethernet clock reset explicitly for U-Boot proper. With this change
Release ethernet clock reset code in FSBL might not be needed or
unaffected.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:30 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Add ddr clock initialization
Release ddr clock reset once clock is initialized
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:29 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Add clock enable and disable ops
Added clock enable and disable functions in prci ops
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:28 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: add U-Boot dmc node
Add dmc node to enable ddr driver. dmc is used to
initialize the memory controller.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:27 +0000 (11:33 +0530)]
sifive: dts: fu540: Add DDR controller and phy register settings
Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:26 +0000 (11:33 +0530)]
sifive: fu540: add ddr driver
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:25 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
Devicetree files in FU540 platform is synced from Linux, like other
platforms does. Apart from these U-Boot in FU540 would also require
some U-Boot specific node like clint.
So, create board specific -u-boot.dtsi files. This would help of
maintain U-Boot specific changes separately without touching Linux
dts(i) files which indeed easy for syncing from Linux between
releases.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:24 +0000 (11:33 +0530)]
lib: Makefile: build crc7.c when CONFIG_MMC_SPI
When build U-Boot SPL, meet an issue of undefined reference to
'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when
CONFIG_MMC_SPI selected.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:23 +0000 (11:33 +0530)]
riscv: Add _image_binary_end for SPL
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:22 +0000 (11:33 +0530)]
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Use the OTP DM driver to set the serial environment variable.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:21 +0000 (11:33 +0530)]
misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Wed, 3 Jun 2020 16:27:51 +0000 (12:27 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Toshiba spinand (Yoshio)
- SPI/SPI Flash cleanup (Jagan)
- Remove SH SPI (Jagan)
Tom Rini [Wed, 3 Jun 2020 15:52:13 +0000 (11:52 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 emac support
- USB PHY H6 logic alignment
Tom Rini [Wed, 3 Jun 2020 15:44:12 +0000 (11:44 -0400)]
Merge branch '2020-06-03-misc-bugfixes'
- Update various docs to not have 'ARCH=' in them as that's not part of
how U-Boot builds.
- Add macOS tools-only build to Azure to help catch problems on BSD
hosts with tools.
- Bugfixes from the latest header cleanup around ARCH_DMA_MINALIGN
- Assorted small Kconfig logic/typo corrections
- Add a default hash to FIT images that have their its auto generated.
- Other assorted fixes
Masahiro Yamada [Wed, 20 May 2020 02:43:34 +0000 (11:43 +0900)]
ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI
arch/arm/include/asm/system.h declares psci_arch_init(), but it is
surrounded by #ifdef CONFIG_ARMV8_PSCI.
psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing
function declaration.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Frédéric Danis [Wed, 20 May 2020 07:13:26 +0000 (09:13 +0200)]
bootcount_ext: Add Ext4 build dependency
This config option depends on EXT4 support.
If Ext4 write capability is not selected, it generate write error messages
and is unable to maintain boot counter.
Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
Marcin Juszkiewicz [Tue, 26 May 2020 17:07:16 +0000 (19:07 +0200)]
kconfig: fix typo for OHCI host and add to DM list
Description said that OHCI is not supported for driver model
while it was converted too.
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Marcin Juszkiewicz [Tue, 26 May 2020 17:07:15 +0000 (19:07 +0200)]
kconfig: fix some typos
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Marcin Juszkiewicz [Tue, 26 May 2020 17:07:14 +0000 (19:07 +0200)]
kconfig: mark SPL/TPL options for DM_KEYBOARD
All three options had the same description.
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Heinrich Schuchardt [Tue, 26 May 2020 16:34:15 +0000 (18:34 +0200)]
cmd: fitupd: move config check to Kconfig
Configuration checks should not be in the C files but in the Kconfig files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:55 +0000 (14:36 -0400)]
cubieboard7: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
While in here, add the doc file to the MAINTAINERS entry.
Cc: Amit Singh Tomar <amittomer25@gmail.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Amit Singh Tomar <amittomer25@gmail.com>
Tom Rini [Tue, 26 May 2020 18:36:54 +0000 (14:36 -0400)]
fu540: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
While in here, add the doc file to the MAINTAINERS entry.
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:53 +0000 (14:36 -0400)]
m68k: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
While in here, add the doc file to the MAINTAINERS entry for coldfire.
Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:52 +0000 (14:36 -0400)]
arm: ti: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:51 +0000 (14:36 -0400)]
rockchip: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
Acked-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 26 May 2020 18:36:50 +0000 (14:36 -0400)]
powerpc: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
Cc: Po Liu <po.liu@nxp.com>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:49 +0000 (14:36 -0400)]
imx: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
Cc: Adam Ford <aford173@gmail.com>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 18:36:48 +0000 (14:36 -0400)]
amlogic: Remove ARCH= references from documentation
When building U-Boot we select the architecture via Kconfig and not ARCH
being passed in via the environment or make cmdline.
Cc: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Cc: u-boot-amlogic@groups.io
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 27 May 2020 00:39:03 +0000 (20:39 -0400)]
Azure: Add 'tools-only' build for macOS X hosts
Add building the 'tools-only' target on macOS X 'Catalina'. Hopefully
this will catch changes to host tools that are incompatible on BSD style
environments.
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Wed, 27 May 2020 13:24:55 +0000 (07:24 -0600)]
mkimage: Default to adding a crc32 hash with '-f auto'
This option currently does not add any sort of hash to the images in the
FIT.
Add a hash node requesting a crc32 checksum, which at least provides some
protection.
The crc32 value is easily ignored (e.g. in SPL) if not needed. and takes
up only about 48 bytes per image, including overhead.
Suggested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Denk <wd@denx.de>
Harald Seiler [Thu, 28 May 2020 15:54:45 +0000 (17:54 +0200)]
tools: fw_env: Fix warning when reading too little
When using CONFIG_ENV_IS_IN_FAT and the config-file specifies a size
larger than what U-Boot wrote into the env-file, a confusing error
message is shown:
$ fw_printenv
Read error on /boot/uboot.env: Success
Fix this by showing a different error message when read returns too
little data.
Signed-off-by: Harald Seiler <hws@denx.de>
Christian Gmeiner [Fri, 29 May 2020 15:53:45 +0000 (17:53 +0200)]
image: android: fix abootimg support
abootimg creates images where all load addresses are 0.
Android Boot Image Info:
* file name = artifacts/fastboot.img
* image size =
31381504 bytes (29.93 MB)
page size = 2048 bytes
* Boot Name = ""
* kernel size = 9397406 bytes (8.96 MB)
ramdisk size =
21981144 bytes (20.96 MB)
* load addresses:
kernel: 0x00000000
ramdisk: 0x00000000
tags: 0x00000000
Without this fix we end in a data abort:
Booting kernel at 0x15000000...
* kernel: cmdline image address = 0x15000000
Kernel load addr 0x00000000 size 9178 KiB
Kernel command line: ip=dhcp console=ttymxc0,115200n8
kernel data at 0x15000800, len = 0x008f649e (9397406)
* ramdisk: cmdline image address = 0x15000000
RAM disk load addr 0x00000000 size 21473 KiB
ramdisk start = 0x158f7000, ramdisk end = 0x16def35c
kernel loaded at 0x00000000, end = 0x00000000
Loading Kernel Image
data abort
pc : [<
8ff8c004>] lr : [<
5d7ac70f>]
sp :
8f57ed64 ip :
48f17668 fp :
00000000
r10:
00000002 r9 :
8f58aed0 r8 :
03fa4c58
r7 :
5e842497 r6 :
fbe73965 r5 :
7c459955 r4 :
df020fde
r3 :
1b7aa45b r2 :
007f23fe r1 :
15104820 r0 :
00104000
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: f07c e8b1 51f8 3a20 (e8a0) 51f8
Resetting CPU ...
resetting ...
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Simon Glass [Sat, 30 May 2020 16:29:04 +0000 (10:29 -0600)]
dma-mapping: Add header file for ARCH_DMA_MINALIGN
This is defined in the asm/cache.h header file. Update this header file to
include it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Simon Glass [Sat, 30 May 2020 16:29:03 +0000 (10:29 -0600)]
usb: ohci: Add header file for ARCH_DMA_MINALIGN
This is defined in the asm/cache.h header file. Update this header file to
include it so it gets the same value consistently across U-Boot.
This fixes 'usb host' on omapl138_lcdk.
Fixes:
90526e9fbac ("common: Drop net.h from common header")
Reported-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Sat, 30 May 2020 22:44:24 +0000 (00:44 +0200)]
test/py: use actual core count for parallel builds
When building U-Boot we should not blindly use make -j8 but consider the
actual core count given by os.cpu_count().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Tue, 2 Jun 2020 03:34:18 +0000 (23:34 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Corrected some FSP-M/FSP-S settings for Chromebook Coral
- ICH SPI driver and mrccache fixes for obtaining the SPI memory map
- Fixed various warnings generated by latest version IASL when compiling
ACPI tables
Bin Meng [Mon, 1 Jun 2020 04:15:15 +0000 (21:15 -0700)]
x86: quark: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA
20200430:
Warning 3073 - Multiple types (Device object requires either a _HID
or _ADR, but not both)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Bin Meng [Mon, 1 Jun 2020 04:15:14 +0000 (21:15 -0700)]
x86: baytrail: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former. This fixes the following warning
reported by ACPICA
20200430:
Warning 3073 - Multiple types (Device object requires either a _HID
or _ADR, but not both)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Bin Meng [Mon, 1 Jun 2020 04:15:13 +0000 (21:15 -0700)]
x86: baytrail: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA
20200430 complains
about this:
Remark 2173 - Creation of named objects within a method is highly
inefficient, use globals or method local variables instead
(\_SB.PCI0.LPCB.IURT._CRS)
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Thu, 28 May 2020 09:17:36 +0000 (12:17 +0300)]
x86: tangier: acpi: Drop _HID() where enumerated by _ADR()
ACPICA complains that either _HID() or _ADR() should be used.
For General Purpose DMA we may not drop the _ADR() because
the device is enumerated by PCI. Thus, simple drop _HID().
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Thu, 28 May 2020 09:17:35 +0000 (12:17 +0300)]
x86: tangier: acpi: Drop _ADR() where _HID() is present
ACPICA complains that either _HID() or _ADR() should be used.
Drop _ADR() where _HID() is present.
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Thu, 28 May 2020 09:17:34 +0000 (12:17 +0300)]
x86: tangier: acpi: Replace _ADR() by _UID() in description of PCI host bridge
PCI Firmware specification requires _UID() and doesn't require _ADR()
to be set. Replace latter by former.
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Andy Shevchenko [Thu, 28 May 2020 09:17:33 +0000 (12:17 +0300)]
x86: tangier: acpi: Create buffers outside of the methods
Create buffers outside of the methods as ACPICA
20200214 complains about this:
Remark 2173 - Creation of named objects within a method is
highly inefficient, use globals or method local variables
instead
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 12:56:53 +0000 (06:56 -0600)]
x86: minnowmax: Add support for Winbond flash
This allows the use of the Dediprog em100pro so I can test SPI flash on
this board in my lab.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 11:42:14 +0000 (05:42 -0600)]
x86: apl: Add hex offsets for registers in FSP-S
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.
Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 11:42:13 +0000 (05:42 -0600)]
x86: coral: Correct some FSP-S settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values. This includes some audio settings and a
few others that have changed.
Note that we still rely on the FSP defaults for most values, so there is
no need to specify a value if the FSP default is suitable.
This makes WiFi work again.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 11:42:12 +0000 (05:42 -0600)]
x86: apl: Add hex offsets for registers in FSP-M
When comparing hex dumps it is useful to see the offsets of the registers.
Add them in where they correspond to a multiple of 16.
Possibly it would be useful to have a a command to output the FSP values
in human-readable form, making use of the fsp_bindings implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 11:42:11 +0000 (05:42 -0600)]
x86: coral: Correct some FSP-M settings
Some settings were modified slightly in the device-tree conversion. Return
these to their original values.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 12:58:49 +0000 (06:58 -0600)]
x86: mrccache: Allow use before driver model is active
The change to avoid searching the device tree does not work on boards
wich don't have driver model set up this early, for example minnowmax.
Put back the old code (converted to livetree) as a fallback for these
devices. Also update the documentation.
This is tested on minnowmax, link, samus and coral.
Fixes:
87f1084a630 (x86: Adjust mrccache_get_region() to use livetree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
Simon Glass [Wed, 27 May 2020 12:58:48 +0000 (06:58 -0600)]
x86: spl: Print the error on SPL failure
The error code is often useful to figure out what is going on. Printing it
does not increase code size much, so print out the error and then hang.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Wed, 27 May 2020 12:58:47 +0000 (06:58 -0600)]
x86: spi: Rewrite logic for obtaining the SPI memory map
At present this logic does not work on link and samus, since their SPI
controller is not a PCI device, but a child of the PCH.
Unfortunately, fixing this involves a lot of extra logic. Still, this was
requested in the review of the fix-up patch, so here it is.
Fixes:
92842147c31 ("spi: ich: Add support for get_mmap() method")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> (on Intel minnowmax)
Simon Glass [Wed, 27 May 2020 12:58:46 +0000 (06:58 -0600)]
x86: spi: Add a way to access the SPI mapping via registers
At present the PCI BDF (bus/device/function) is needed to access the SPI
mapping, since the registers are at BAR0. This doesn't work when PCI
auto-config has not been done yet, since BARs are unassigned.
Add another way to find the mapping, using the MMIO base, if the caller
knows this.
Also add a missing function comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Samuel Holland [Thu, 7 May 2020 23:10:52 +0000 (18:10 -0500)]
sunxi: H6: Enable Ethernet on the Pine H64
Now that the EMAC driver supports the H6 SoC, we can enable the Ethernet
hardware on the Pine H64 board.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 7 May 2020 23:10:51 +0000 (18:10 -0500)]
net: sun8i_emac: Add support for the H6 variant
The H6 EMAC is very similar to the H3 variant, except that it uses the
same pinmux as R40. Add support for it.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 7 May 2020 23:10:50 +0000 (18:10 -0500)]
net: sun8i_emac: Use consistent clock bitfield definitions
While the R40 uses a different register for EMAC clock configuration
than other chips, the register has a very similar layout. Reuse the
existing bitfield definitions in this file, since they match.
This allows the driver to compile on the H6 platform, where the
CCM_GMAC_CTRL definitions are not present.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Samuel Holland [Thu, 7 May 2020 23:02:33 +0000 (18:02 -0500)]
sunxi: Silence warning about non-static inline function
When compiling with CONFIG_SPL_SERIAL=n, gcc warns about
mbus_configure_port not being marked as static:
In file included from include/common.h:34,
from arch/arm/mach-sunxi/dram_sunxi_dw.c:11:
include/log.h:185:4: warning: 'printf' is static but used in inline function 'mbus_configure_port' which is not static
185 | printf(pr_fmt(fmt), ##args); \
| ^~~~~~
include/log.h:192:2: note: in expansion of macro 'debug_cond'
192 | debug_cond(_DEBUG, fmt, ##args)
| ^~~~~~~~~~
arch/arm/mach-sunxi/dram_sunxi_dw.c:100:2: note: in expansion of macro 'debug'
100 | debug("MBUS port %d cfg0 %08x cfg1 %08x\n", port, cfg0, cfg1);
| ^~~~~
Fix this by updating the function accordingly.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Roman Stratiienko [Tue, 12 May 2020 18:24:49 +0000 (21:24 +0300)]
phy: sun4i-usb: Align H6 initialization logic with the kernel
H6 SOC needs additional initialization of PHY registers. Corresponding
changes can be found in the kernel patch [1].
Without this changes there is no enumeration of 'musb' gadget.
[1] - https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=
ae409cc7c3cdb9ac4a1dba3eae70efec3d6b6c79
Fixes:
35fa673e0e5f ("sunxi: phy: Add USB PHY support for Allwinner H6")
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Mon, 1 Jun 2020 15:42:47 +0000 (11:42 -0400)]
Merge tag 'rpi-next-2020.07.2' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi
rpi4:
- set ARCH_FIXUP_FDT_MEMORY
- bump NR_DRAM_BANKS to four to enable 8 GB of RAM
Tom Rini [Mon, 1 Jun 2020 15:42:22 +0000 (11:42 -0400)]
Merge tag 'u-boot-stm32-
20200528' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- stm32mp15: fix DT on DHCOR SOM and avenger96 board
- stm32mp15: re-enable KS8851 on DHCOM
Jagan Teki [Mon, 1 Jun 2020 13:40:17 +0000 (19:10 +0530)]
doc: driver-model: Update SPI migration status
DM_SPI migration status fror v2020.07
removed:
lpc32xx_ssp.c
sh_spi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Thu, 14 May 2020 11:07:57 +0000 (16:37 +0530)]
mtd: sf: Drop plat from sf_probe
dm_spi_slave_platdata used in sf_probe for printing
plat->cs value and there is no relevant usage apart
from this.
We have enough debug messages available in SPI and SF
areas so drop this plat get and associated bug statement.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 13 May 2020 11:02:42 +0000 (16:32 +0530)]
env: sf: Free the old env_flash
env_flash is a global flash pointer, and the probe would
happen only if env_flash is NULL, but there is no checking
and free the pointer if is not NULL.
So, this patch frees the old env_flash, and get the probed
flash in to env_flash pointer and finally check if is not NULL.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 13 May 2020 10:58:01 +0000 (16:28 +0530)]
cmd: sf Drop reassignment of new into flash
The new pointer points to flash found and that would
assign it to global 'flash' pointer for further flash
operations and also keep track of old flash pointer.
This would happen if the probe is successful or even
failed, but current code assigning new into flash before
and after checking the new.
So, drop the assignment after new checks so flash always
latest new pointer even if probe failed or succeed.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 13 May 2020 10:02:23 +0000 (15:32 +0530)]
mtd: spi: Call sst_write in _write ops
Currently spi-nor code is assigning _write ops for SST
and other flashes separately.
Just call the sst_write from generic write ops and return
if SST flash found, this way it avoids the confusion of
multiple write ops assignment during the scan and makes
it more feasible for code readability.
No functionality changes.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 13 May 2020 12:46:39 +0000 (18:16 +0530)]
sf: Drop spl_flash_get_sw_write_prot
The get_sw_write_prot API is used to get the write-protected
bits of flash by reading the status register and other wards
it's API for reading register bits.
1) This kind of requirement can be achieved using existing
flash operations and flash locking API calls instead of
making a separate flash API.
2) Technically there is no real hardware user for this API to
use in the source tree.
3) Having a flash operations API for simple register read bits
also make difficult to extend the flash operations.
4) Instead of touching generic code, it is possible to have
this functionality inside spinor operations in the form of
flash hooks or fixups for associated flash chips.
Considering all these points, this patch drops the get_sw_write_prot
and associated code bases.
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 12 May 2020 18:41:27 +0000 (00:11 +0530)]
mtd: spi: Use CONFIG_IS_ENABLED to prevent ifdef
Use CONFIG_IS_ENABLED to prevent ifdef in sf_probe.c
Cc: Simon Glass <sjg@chromium.org>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 25 May 2020 18:53:51 +0000 (00:23 +0530)]
spi: Zap sh_spi driver
sh_spi driver is deprecated, no active updates and
no board user, hence dropped the same.
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 25 May 2020 18:54:19 +0000 (00:24 +0530)]
spi: Kconfig: Move MSCC_BB_SPI, FSL_QSPI into DM_SPI
- MSCC_BB_SPI
- FSL_QSPI
Both are fully dm-driven, let's move them into DM_SPI
side definition.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 25 May 2020 18:45:25 +0000 (00:15 +0530)]
spi: Kconfig: Drop redundant CF_SPI definition
CF_SPI kconfig option defined twice with DM_SPI
and non DM_SPI.
Drop the non DM_SPI side kconfig definition.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 25 May 2020 18:22:23 +0000 (23:52 +0530)]
spi Drop spi_init()
spi_init doesn't exist anywhere in the code.
Drop it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Mon, 1 Jun 2020 00:07:39 +0000 (20:07 -0400)]
Merge tag 'u-boot-rockchip-
20200531' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix mmc of path after syncfrom kernel dts;
- Add dwc3 host support with DM for rk3399;
- Add usb2phy and typec phy for rockchip platform;
- Migrate board list doc to rockchip.rst;
- Add rk3399 Pinebook Pro board support;
- Update dram_init in board_init and add memory node in SPL;
Heiko Stuebner [Mon, 25 May 2020 17:57:25 +0000 (19:57 +0200)]
spl: add fixed memory node in target fdt also when loading ATF
In a loading chain SPL -> ATF (->OP-TEE) -> U-Boot, ATF and a subsequent
OP-TEE will re-use the same fdt as the U-Boot target and may need the
information about usable memory ranges.
Especially OP-TEE needs this to initialize dynamic shared memory
(the only type U-Boot implements when talking to OP-TEE).
So allow spl_fixup_fdt() to take a fdt_blob argument, falling back to
the existing CONFIG_SYS_SPL_ARGS_ADDR if needed and call it from the
ATF path as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heiko Stuebner [Mon, 25 May 2020 17:57:24 +0000 (19:57 +0200)]
rockchip: spl: do full dram_init instead of only probing
Parts of later SPL may need RAM information as well, so do full
dram_init() call, which includes the existing dram probing but also
initializes the ram information in gd.
dram_init() from sdram.c does the following steps:
- uclass_get_device(UCLASS_RAM, ...) like the current code
- ret = ram_get_info(dev, &ram);
- gd->ram_size = ram.size;
CONFIG_SPL_RAM already makes sure that sdram.c gets compiled
and thus no other variant of dram_init() can exist.
So it's the same functionality as before and only adds that the
SPL now aquires knowledge about the amount of available ram,
which it didn't know about before.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Mon, 20 Apr 2020 19:27:36 +0000 (20:27 +0100)]
rockchip: Add initial support for the Pinebook Pro laptop from Pine64.
Specification:
- Rockchip RK3399
- 4GB Dual-Channel LPDDR4
- eMMC socket
- mSD card slot
- 128Mbit (16Mb) SPI Flash
- AP6256 for 11AC WiFi + BT5
- 14 inch 1920*1080 eDP MiPi display
- Camera
- USB 3.0, 2.0 ports
- Type-C port with alt-mode display (DP 1.2) and 15W charge
- DC 5V/3A
- optional PCIe slot for NVMe SSD drive
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Mon, 20 Apr 2020 19:27:35 +0000 (20:27 +0100)]
arm: dts: rockchip: Add initial DT for Pinebook Pro
Sync initial support for Pinebook Pro device tree from Linux 5.7-rc1.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Mon, 20 Apr 2020 19:27:33 +0000 (20:27 +0100)]
dt-bindings: input: adopt Linux gpio-keys binding constants
Sync the gpio-keys input bindings from linux 5.7-rc1.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Tom Rini [Sun, 31 May 2020 00:11:38 +0000 (20:11 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- r2dplus fixes
Tom Rini [Sun, 31 May 2020 00:11:06 +0000 (20:11 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- ehci-mx6, eth/r8152 bugfixes
Matthias Brugger [Fri, 29 May 2020 14:42:22 +0000 (16:42 +0200)]
configs: rpi: set NR_DRAM_BANKS to four
With the new RPi4 which has 8 GB of RAM, we can have up to four DRAM
banks. Bump up the configuration files to detect all the memory in
U-Boot.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Corentin Labbe [Wed, 13 May 2020 08:07:24 +0000 (08:07 +0000)]
rpi_4_defconfig: add missing CONFIG_ARCH_FIXUP_FDT_MEMORY
As discussed at https://lore.kernel.org/linux-arm-kernel/
b726290c-1038-3771-5187-
6ac370bc92c9@arm.com/T/
the defconfig for rpi4 miss CONFIG_ARCH_FIXUP_FDT_MEMORY.
Without it, booting with an initrd fail.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tom Rini [Sat, 30 May 2020 15:37:32 +0000 (11:37 -0400)]
Merge tag 'dm-pull-30may20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
Patman changelog enhancements
Sandbox SPI flash doc update
Tom Rini [Sat, 30 May 2020 03:54:01 +0000 (23:54 -0400)]
Merge tag 'bugfixes-for-v2020.07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for v2020.07-rc4
- fix eeprom issue with AT24MAC402 (address != 0)
- fix in i2c-uclass.c when compiling compiling with -Wtype-limits
- designware_i2c: small fixes:
- check if the device is powered
- tidy up use of NULL priv
Sean Anderson [Mon, 4 May 2020 20:28:36 +0000 (16:28 -0400)]
patman: Modify functional tests for new behavior
This patch adds or modifies functional tests for the Cover-changes,
Commit-changes, and Series-process-log tags in order to account for new
behavior added in the previous few patches. The '(no changes since v1)'
case is not tested for, since that would need an additional commit to test
in addition to testing the existing code paths.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 4 May 2020 20:28:35 +0000 (16:28 -0400)]
patman: Support multi-line changes in changelogs
This patch adds support to multi-line changes. That is, if one has a line
in a changelog like
- Do a thing but
it spans multiple lines
Using Series-process-log sort would sort as if those lines were unrelated.
With this patch, any change line starting with whitespace will be
considered part of the change before it.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 4 May 2020 20:28:34 +0000 (16:28 -0400)]
patman: Add new tags for finer-grained changelog control
By default patman generates a combined changelog for the cover letter. This
may not always be desirable.
Many patches may have the same changes. These can be coalesced with
"Series-process-log: uniq", but this is imperfect. Similar changes like
"Move foo to patch 7" will not be merged with the similar "Move foo to this
patch from patch 6".
Changes may not make sense outside of the patch they are written for. For
example, a change line of "Add check for bar" does not make sense outside
of the context in which bar might be checked for. Some changes like "New"
or "Lint" may be repeated many times throughout different change logs, but
carry no useful information in a summary.
Lastly, I like to summarize the broad strokes of the changes I have made in
the cover letter, while documenting all the details in the appropriate
patches. I think this makes it easier to get a good feel for what has
changed, without making it difficult to wade through every change in the
whole series.
This patch adds two new tags to add changelog entries which only appear in
the cover letter, or only appear in the commit. Changes documented with
"Commit-changes" will only appear in the commit, and will not appear in the
cover letter. Changes documented with "Cover-changes" will not appear in
any commit, and will only appear in the cover letter.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 4 May 2020 20:28:33 +0000 (16:28 -0400)]
patman: Suppress empty changelog entries
Patman outputs a line for every edition of the series in every patch,
regardless of whether any changes were made. This can result in many
redundant lines in patch changelogs, especially when a patch did not exist
before a certain revision. For example, the existing behaviour could result
in a changelog of
Changes in v7: None
Changes in v6: None
Changes in v5:
- Make a change
Changes in v4: None
Changes in v3:
- New
Changes in v2: None
With this patch applied and with --no-empty-changes, the same patch would
look like
(no changes since v5)
Changes in v5:
- Make a change
Changes in v3:
- New
This is entirely aesthetic, but I think it reduces clutter, especially for
patches added later on in a series.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 4 May 2020 07:52:44 +0000 (00:52 -0700)]
patman: Add an option to create patches without binary contents
Some mailing lists have size limits and when we add binary contents
to our patches it's easy to exceed the size limits.
Git supports a command line option "--no-binary" to generate patches
without any binary contents. Add an option in patman to handle this.
Note with this option patches cannot be applied properly, but they
are still useful for code review.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 4 May 2020 07:52:43 +0000 (00:52 -0700)]
patman: Sort the command line options
Sort the existing command line options by:
- help comes first
- option starts with '-'
- option starts with '--'
Lower case followed by upper case letters, in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Wed, 29 Apr 2020 07:08:44 +0000 (09:08 +0200)]
dm: core: Reorder include files in read.c
Including the assembler headers before including common.h etc leads to
compilation errors upon MIPS64 based platforms using OF_LIVE. This
patch reorders the include files to the "correct" oder.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
AKASHI Takahiro [Mon, 27 Apr 2020 06:46:45 +0000 (15:46 +0900)]
sandbox: update documents regarding spi_sf
Since the commit
1289e96797bf ("sandbox: spi: Drop command-line SPI
option"), "--spi_sf" command line option is no longer supported.
So update the following documents to sync them up with the change.
doc/arch/sandbox.rst
doc/SPI/README.sandbox-spi
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
AKASHI Takahiro [Mon, 27 Apr 2020 04:22:17 +0000 (13:22 +0900)]
sandbox: drop CONFIG_SYS_RELOC_GD_ENV_ADDR
As we discussed in [1], this option is not needed for sandbox build.
[1] https://lists.denx.de/pipermail/u-boot/2020-February/400182.html
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marcin Juszkiewicz [Tue, 26 May 2020 16:18:49 +0000 (18:18 +0200)]
rockchip: rockpro64: enable DM_KEYBOARD
USB stack uses DM so DM_KEYBOARD is needed to get USB keyboard working.
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 26 May 2020 03:35:16 +0000 (11:35 +0800)]
roc-rk3399-pc: Enable USB3.0 Host
Enable USB3.0 Host support for ROC-RK3399-PC boards.
Tested USB3.0 SSD on Type C1 port on board.
=> usb start
starting USB...
Bus usb@
fe380000: USB EHCI 1.00
Bus usb@
fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@
fe380000 for devices... 1 USB Device(s) found
scanning bus usb@
fe3c0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 6 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Hub (480 Mb/s, 100mA)
USB 2.0 Hub [MTT]
1 Hub (5 Gb/s, 0mA)
| U-Boot XHCI Host Controller
|
+-2 Hub (480 Mb/s, 0mA)
| | VIA Labs, Inc. USB2.0 Hub
| |
| +-4 Hub (480 Mb/s, 100mA)
| | USB 2.0 Hub
| |
| +-5 (480 Mb/s, 100mA)
| VIA Technologies Inc. USB 2.0 BILLBOARD
0000000000000001
|
+-3 Hub (5 Gb/s, 0mA)
| VIA Labs, Inc. USB3.0 Hub
|
+-6 Mass Storage (5 Gb/s, 224mA)
JMicron External Disk 3.0
DB12345678A2
=> usb reset
resetting USB...
Bus usb@
fe380000: USB EHCI 1.00
Bus usb@
fe3c0000: USB EHCI 1.00
Bus dwc3: usb maximum-speed not found
Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
scanning bus usb@
fe380000 for devices... 1 USB Device(s) found
scanning bus usb@
fe3c0000 for devices... 2 USB Device(s) found
scanning bus dwc3 for devices... 6 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Frank Wang [Tue, 26 May 2020 03:35:15 +0000 (11:35 +0800)]
configs: evb-rk3399: update support usb3.0 host
Update evb-rk3399 default config to support USB3.0 Host.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Frank Wang [Tue, 26 May 2020 03:34:33 +0000 (11:34 +0800)]
ARM: dts: rk3399-evb: usb3.0 host support
Configure 'tcphy1' and 'usbdrd_dwc3_1' nodes to support USB3.0 host
for Rockchip RK3399 Evaluation Board.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Frank Wang [Tue, 26 May 2020 03:34:32 +0000 (11:34 +0800)]
driver: usb: drop legacy rockchip xhci driver
We have changed to use dwc3 generic driver for usb3.0 host, so the
legacy Rockchip's xHCI driver is not needed, and drop it.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Frank Wang [Tue, 26 May 2020 03:34:31 +0000 (11:34 +0800)]
usb: dwc3: add make compatible for rockchip platform
RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
in resetting to hold pipe power state in P2 before initializing the PHY.
This commit fixed it and added device compatible for rockchip platform.
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>