Samuel Pitoiset [Mon, 23 Jan 2023 15:43:32 +0000 (16:43 +0100)]
radv: fix RADV_DEBUG=hang with multiple cmdbuffer per submission
With RADV_DEBUG=hang, there is only one cmdbuffer per submission and
this has been broken recently.
This fixes a segfault when generating GPU hang reports.
Fixes:
76deaa1b1a9 ("radv: Refactor command buffer handling in radv_queue_submit_normal.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20860>
Bas Nieuwenhuizen [Sun, 22 Jan 2023 23:37:32 +0000 (00:37 +0100)]
radv: Reduce descriptor pool allocation for alignment.
Since we can now rely on this due to the stricter layout code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20847>
Bas Nieuwenhuizen [Sun, 22 Jan 2023 23:30:15 +0000 (00:30 +0100)]
radv: Strictly limit alignment needed within a descriptor set.
By doing two passes we limit the number of times we need to have a gap
after a 16-byte descriptor to align for an image descriptor.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20847>
Pierre-Eric Pelloux-Prayer [Fri, 13 Jan 2023 15:13:46 +0000 (16:13 +0100)]
radeonsi/gfx11: fix ge_cntl programming
gfx11 renamed PRIM_GRP_SIZE to VERTS_PER_SUBGRP but another change was
was missed.
Update our code based on PAL's UniversalCmdBuffer::CalcGeCntl function
(especially useVgtOnchipCntlForTess being false for gfx11).
Fixes:
25a66477d02 ("radeonsi/gfx11: register changes")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
Pierre-Eric Pelloux-Prayer [Fri, 13 Jan 2023 10:00:07 +0000 (11:00 +0100)]
radeonsi/gfx11: clamp PRIM_GRP_SIZE
Legal range of values is [1, 256].
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
Pierre-Eric Pelloux-Prayer [Thu, 12 Jan 2023 16:31:53 +0000 (17:31 +0100)]
winsys/amdgpu: use DMA_BUF_SET_NAME_B if available
Give a name to dma-buf. This name appears in /sys/kernel/debug/dma_buf/bufinfo
and could be useful to debug dma-buf:
Dma-buf Objects:
size flags mode count exp_name ino name
00606208 00000002 00080007 00000003 drm
00192014 2321705-glxgears
The name is only added to non-shared buffer, to avoid overwriting
an existing name when exporting an imported buffer (otherwise all
dma-buf will pretend to be created by XWayland).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
Pierre-Eric Pelloux-Prayer [Tue, 17 Jan 2023 20:50:09 +0000 (21:50 +0100)]
drm-uapi/dma-buf.h: use __u32/__u64 types
Otherwise we might get build errors: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
34886940
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20728>
Kenneth Graunke [Wed, 18 Jan 2023 18:33:49 +0000 (10:33 -0800)]
iris: Add missing untyped data port flush on PIPELINE_SELECT
This is needed when switching away from GPGPU mode. See the previous
commit for anv. This is not likely to make a practical difference for
iris because it never switches back and forth between modes like anv.
Fixes:
172e0b0ebff ("iris: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>
Kenneth Graunke [Wed, 18 Jan 2023 10:50:32 +0000 (02:50 -0800)]
anv: Add missing untyped data port flush on PIPELINE_SELECT
See the comments in emit_apply_pipe_flushes(). Flushing HDC is not
sufficient in GPGPU mode, and we need to set the untyped data port flush
bit as well.
Fixes many dEQP-VK failures with INTEL_COMPUTE_CLASS=1 on Alchemist.
Fixes:
1067ec90a59 ("anv: Update PIPELINE_CONTROL flush when switching pipeline mode in TGL+")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20774>
Yogesh Mohan Marimuthu [Fri, 20 Jan 2023 06:59:00 +0000 (12:29 +0530)]
radeonsi: remove some shadow reg optimization for bf1 game
This patch removes below shadow reg optimization. This is done for
Vega64 battlefield 1 crash when shadow regs enabled.
+ reset only dirty states with buffers in si_pm4_reset_emitted()
+ various draw states in si_begin_new_gfx_cs()
v2: remove first_cs parameter from si_pm4_reset_emitted() (Marek Olšák)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Thu, 12 Jan 2023 04:12:53 +0000 (09:42 +0530)]
radv: allow NULL initial_preamble_cs in radv_amdgpu_winsys_cs_submit_sysmem()
In case of mcbp, shadowed_regs is initialized early in radv_queue_init()
function by submitting the command buffer. The command buffer is submitted in
radv_init_shadowed_regs_buffer_state() function. When RADV_DEBUG=noibs is used
radv_amdgpu_winsys_cs_submit_sysmem() function is used to submit command buffer.
radv_amdgpu_winsys_cs_submit_sysmem() crashes here because initial_preamble_cs
is NULL. This patch fixes the radv_amdgpu_winsys_cs_submit_sysmem() function
to support NULL initial_preamble_cs.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Tue, 18 Oct 2022 06:54:36 +0000 (12:24 +0530)]
radv: fence complete struct is 4 qw size
also libdrm function amdgpu_cs_chunk_fence_info_to_data() has qw multiplier
and hence need not do it in radv_amdgpu_cs_submit().
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Mon, 12 Sep 2022 18:01:11 +0000 (23:31 +0530)]
radv: INDEX_TYPE and NUM_INSTANCES PKT3 are not shadowed
INDEX_TYPE and NUM_INSTANCES PKT3 should be always written
if shadowing is enabled since they are not shadowed.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Tue, 22 Nov 2022 08:12:17 +0000 (13:42 +0530)]
radv: set preemp flag and pre_ena bit for shadowregs
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Thu, 22 Sep 2022 18:52:42 +0000 (00:22 +0530)]
radv: add support for register shadowing
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Mon, 29 Aug 2022 05:23:28 +0000 (10:53 +0530)]
radv: add shadowregs variable to RADV_DEBUG environment variable
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Yogesh Mohan Marimuthu [Tue, 20 Sep 2022 18:25:53 +0000 (23:55 +0530)]
ac,radeonsi: move shadow regs create ib preamble function to amd common
The si_create_shadowing_ib_preamble() function can be reused from radv also.
Hence it is moved.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18301>
Emma Anholt [Wed, 25 Jan 2023 01:03:27 +0000 (17:03 -0800)]
ci/freedreno: Mark max-texture-size as a flake.
It's been a popular spurious fail in merges in the last week.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20894>
Jakub Kulík [Wed, 12 Oct 2022 13:28:01 +0000 (15:28 +0200)]
mesa: Fix format transform on big endian platforms
Reviewed-by: Emma Anholt <emma@anholt.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6001
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19051>
Emma Anholt [Tue, 24 Jan 2023 18:47:37 +0000 (10:47 -0800)]
ci/zink: Update radv xfails for the recent shadow fixes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Thu, 19 Jan 2023 05:36:33 +0000 (21:36 -0800)]
ci/zink: Update TGL full-run xfails.
arb_shader_texture_lod-texgradcube was a fail incorrectly removed in the
sahdow changes. line-smooth-* is new piglit coverage.
Haven't pinpointed when the rest were fixed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Thu, 12 Jan 2023 22:28:26 +0000 (14:28 -0800)]
ci/zink: Add coverage using the vulkan validation layer on lvp.
Let's make sure we aren't introducing new validation failures as
development proceeds. Basically, we record the current set of known
validation failures from the CTS, and for any validation failure we have
the layer log it and abort.
I had started encoding xfails from piglit, but it turns out that piglit
and the validation layer fight about the teardown process, producing
use-after-frees.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Thu, 19 Jan 2023 00:59:11 +0000 (16:59 -0800)]
zink: Re-emit the SpvBuiltInSampleMask access chain each load.
Otherwise, the access chain you emitted last time may not dominate the
current use.
Fixes the following validation failure in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.bits_unique_per_sample.multisample_texture_2:
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv(ERROR / SPEC):
msgNum: 7060244 - Validation Error: [
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
0x55cf3cea2c60, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
SPIR-V module not valid: ID '67[%67]' defined in block '23[%23]' does
not dominate its use in block '31[%31]'
Fixes:
8899f6a19857 ("zink: fix gl_SampleMaskIn spirv generation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Wed, 18 Jan 2023 22:29:55 +0000 (14:29 -0800)]
zink: Fix up mismatches of memory model vs addressing model.
MemoryModelVulkan was left out for CSes using it.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Tue, 17 Jan 2023 21:33:32 +0000 (13:33 -0800)]
zink: Fix validation failure for maxLod < minLod.
GL lets you set a silly state, so do something plausible instead of
undefined.
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Thu, 12 Jan 2023 22:43:38 +0000 (14:43 -0800)]
zink: Add missing Flat decorations on some inputs.
Fixes validation failures:
Test case 'dEQP-GLES31.functional.android_extension_pack.shaders.es32.extension_directive.oes_sample_variables'..
MESA: error: Validation Error: [
UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle =
0x563a1838b790, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 |
SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment
OpEntryPoint operand 31 with Input interfaces with integer or float type
must have a Flat decoration for Entry Point id 4.
%gl_SampleId = OpVariable %_ptr_Input_uint Input
Test case 'KHR-GL46.shader_ballot_tests.ShaderBallotAvailability'..
MESA: error: Validation Error: [ UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle = 0x5558e12f17e0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 | SPIR-V module not valid: [VUID-StandaloneSpirv-Flat-04744] Fragment OpEntryPoint operand 28 with Input interfaces with integer or float type must have a Flat decoration for Entry Point id 4.
%gl_SubgroupLocalInvocationId = OpVariable %_ptr_Input_uint Input
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Emma Anholt [Fri, 13 Jan 2023 00:03:20 +0000 (16:03 -0800)]
zink: Fatal error if requesting validation and we fail to load the layer.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20756>
Jesse Natalie [Thu, 19 Jan 2023 21:31:12 +0000 (13:31 -0800)]
dzn: Use core feature matching logic instead of rolling our own
This will print nice messages on unsupported features
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:30:49 +0000 (13:30 -0800)]
dzn: Implement subgroup size control extension
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:30:23 +0000 (13:30 -0800)]
dzn: Support more subgroup/quad ops
See the comment around supported shader stages - to avoid
introducing CTS failures, vertex/geometry support for
subgroups are turned off since they cannot support quads.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:28:33 +0000 (13:28 -0800)]
spirv2dxil: Support subgroup SPIR-V caps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:28:18 +0000 (13:28 -0800)]
spirv2dxil: Lower some wave op properties
DXIL has no concept of subgroup mask ops, relative
shuffle ops, and everything is scalar.
Most wave broadcast ops support i1 overloads, except
for quad swap operations. Go figure. Use lower_bit_size
to promote those to i32 instead.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:26:13 +0000 (13:26 -0800)]
microsoft/compiler: Support emitting the SM6.6 wave size tag
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:25:53 +0000 (13:25 -0800)]
microsoft/compiler: Implement more wave/quad ops
This handles ballot, vote, shuffle, broadcast, and quads
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:24:42 +0000 (13:24 -0800)]
microsoft/compiler: Handle i1 overloads
Some wave ops can have bool/i1 overloads
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:23:54 +0000 (13:23 -0800)]
microsoft/compiler: Handle i2i1 and u2u1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Jesse Natalie [Thu, 19 Jan 2023 21:23:35 +0000 (13:23 -0800)]
microsoft/compiler: Don't emit threadgroup barriers for graphics shaders
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20801>
Pedro J. Estébanez [Tue, 24 Jan 2023 13:42:07 +0000 (14:42 +0100)]
spirv_to_dxil: Unify spirv_to_nir_options
Beyond the pure refactoring, this fixes spirv2dxil, which was using outdated values.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20884>
Jesse Natalie [Tue, 24 Jan 2023 16:24:56 +0000 (08:24 -0800)]
dzn: Enable Vulkan 1.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Sat, 21 Jan 2023 00:48:27 +0000 (16:48 -0800)]
dzn: Fix independent blend check
Memcmp returns 0 on equal, so !memcmp means equal.
Fixes:
c92729c3 ("dzn: Enable independent blending")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 21:47:44 +0000 (13:47 -0800)]
dzn: Don't expose variable pointers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 18:12:15 +0000 (10:12 -0800)]
dzn: A single sampler descriptor set needs to support 1024 samplers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 18:11:42 +0000 (10:11 -0800)]
dzn: Descriptor limits are based on binding tier, not heap tier
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 17:44:12 +0000 (09:44 -0800)]
dzn: Usage MULTISAMPLE_LOAD support instead of RT/DS support for MSAA
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 17:43:52 +0000 (09:43 -0800)]
dzn: Support EXTENDED_USAGE bit
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 17:43:02 +0000 (09:43 -0800)]
dzn: Usage image view usage instead of image usage
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 17:41:55 +0000 (09:41 -0800)]
dzn: Use SHADER_LOAD to indicate SAMPLED_IMAGE support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Fri, 20 Jan 2023 17:37:26 +0000 (09:37 -0800)]
dzn: Move patched vertex buffer capability check up a level
Some of these patched formats are also needed as (trivial) image
formats, so we can't just report vertex buffer as the only supported
operation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:33:25 +0000 (15:33 -0800)]
dzn: When rendering to 3D, don't treat layers as subresources for barriers
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:27:38 +0000 (15:27 -0800)]
dzn: Set dynamic rendering caps
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:27:24 +0000 (15:27 -0800)]
dzn: Respect suspending/resuming flags to omit clears/resolves
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:11:26 +0000 (15:11 -0800)]
dzn: Use common physical device list/enumeration helpers
Implements EnumeratePhysicalDeviceGroups for us for free
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:10:15 +0000 (15:10 -0800)]
dzn: Support vkCmdDispatchBase
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:09:33 +0000 (15:09 -0800)]
spirv2dxil: Support dispatches with base group indices
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 11 Jan 2023 23:08:45 +0000 (15:08 -0800)]
microsoft/compiler: Lower device index to zero
Maybe we'll support actual device groups at some point, but today
is not that day.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Jesse Natalie [Wed, 18 Jan 2023 18:13:55 +0000 (10:13 -0800)]
microsoft/compiler: Fix atomic image umax
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20823>
Mike Blumenkrantz [Mon, 23 Jan 2023 19:53:38 +0000 (14:53 -0500)]
zink: fix implicit feedback loop detection
the code here was all expecting the VkPipelineStageFlags bitfield expansions,
but u_foreach_bit() gives the actual bit, so implicit feedback loops were never
actually being detected
instead, convert back to the bitfield at the top of the loop so the value works
as expected
Fixes:
9ba06579035 ("zink: make implicit feedback loop application stricter")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20863>
Samuel Pitoiset [Tue, 24 Jan 2023 07:26:26 +0000 (08:26 +0100)]
radv: print depth image size with RADV_DEBUG=img
This turned out to be useful when investigating a GPU hang.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20872>
Lionel Landwerlin [Fri, 20 Jan 2023 09:30:46 +0000 (11:30 +0200)]
intel/common: add a INTEL_DECODE variable to parameter decoder at runtime
Sometimes you want to diff 2 runs with INTEL_DEBUG=bat, but a tiny
allocation change can mess quite badly with offsets printed in the
decoding, making it hard to look at the diff with meld.
Fortunately our decoder can avoid printing offsets. We just need a
variable to specify that.
We still use the defaults specified by the driver but you can turn
things on/off with :
INTEL_DECODE=+color,-offsets,-floats INTEL_DEBUG=bat ./my_app
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20874>
Lionel Landwerlin [Wed, 11 Jan 2023 09:53:02 +0000 (11:53 +0200)]
intel/decoder: print out compute push constants
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20874>
Marcin Ślusarz [Tue, 24 Jan 2023 09:52:10 +0000 (10:52 +0100)]
intel/compiler/mesh: handle const data in task & mesh programs
Started showing up when nir_opt_large_constants call was moved in
88756cee8da.
Fixes dEQP-VK.mesh_shader.ext.smoke.monolithic.fullscreen_gradient*
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes:
88756cee8da ("intel/compiler: Run nir_opt_large_constants before scalarizing consts")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20876>
Marcin Ślusarz [Thu, 12 Jan 2023 15:06:42 +0000 (16:06 +0100)]
intel/compiler: fix generation of vec8/vec16 alu instruction
I stumbled on this when I inserted some suboptimal lowering code after all
optimizations. Adding certain subset of optimizations after my lowering code
actually avoided this bug, so I think it's not possible to hit this on upstream.
Let's fix this for the next person generating suboptimal code...
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20857>
Yogesh Mohan Marimuthu [Sat, 17 Dec 2022 18:27:50 +0000 (23:57 +0530)]
loader,glx,egl: remove is_different_gpu variable from loader
v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohan Marimuthu [Mon, 23 Jan 2023 11:06:48 +0000 (16:36 +0530)]
glx: remove is_different_gpu variable from struct dri_screen
v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohan Marimuthu [Sat, 17 Dec 2022 17:47:15 +0000 (23:17 +0530)]
egl: remove is_different_gpu variable from struct dri2_egl_display
v2: fd number is different (Pierre-Eric)
v1: remove is_different_gpu (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohan Marimuthu [Sat, 17 Dec 2022 17:21:08 +0000 (22:51 +0530)]
loader,glx,egl,vl,d3d: loader_get_user_preferred_fd() function to return original_fd
v1: return original_fd in loader_get_user_preferred_fd() (Pierre-Eric)
v2: fix *original_id crash for android, haiku... (Pierre-Eric)
remove extra comment (Pierre-Eric)
v2: also return render fd in case of original_fd passed is NULL (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohan Marimuthu [Mon, 23 Jan 2023 11:04:40 +0000 (16:34 +0530)]
loader,glx: add render_gpu tag psc->driScreen and psc->fd
v1: add render_gpu_tag (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohan Marimuthu [Thu, 1 Dec 2022 09:29:34 +0000 (14:59 +0530)]
egl: add render_gpu tag to dri2_dpy->fd and dri2_dpy->dri_screen variable
v1: add render_gpu_tag (Pierre-Eric)
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Wed, 20 Oct 2021 14:48:05 +0000 (20:18 +0530)]
egl/wayland: for prime, allocate linear_copy from display GPU VRAM
Allocates VRAM in display GPU in case of prime. Then the dma_buf is imported
into prime GPU.
v4: add image tag to __DRIimage (Marek Olšák)
v3: move display fd opening to separate commit (Pierre-Eric)
image_format_to_fourcc() non-static to seperate commit (Pierre-Eric)
v2: close query fds after linear_copy buffer import (Marek Olšák)
use image_format_to_fourcc() from loader_dri3_helper.c (Marek Olšák)
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Mon, 22 Nov 2021 14:25:41 +0000 (19:55 +0530)]
loader: make image_format_to_fourcc() non-static
the image_format_to_fourcc() function will be used from
egl/wayland hence make it non-static. Also move the function
into loader_dri_helper.c from loader_dri3_helper.c since
loader_dri3_helper library depends on xcb which will make
egl wayland depend on xcb indirectly.
v2: add loader tag to extern image_format_to_fourcc() (Marek Olšák)
V3: move image_format_to_fourcc to loader_dri_helper.c
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Mon, 22 Nov 2021 13:15:18 +0000 (18:45 +0530)]
egl/wayland: keep display fd open for prime
Keep the display fd open for creating DRI screen on display gpu in
case of prime.
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Mon, 18 Oct 2021 16:14:25 +0000 (21:44 +0530)]
loader,glx,egl/x11: init dri_screen_display_gpu in struct loader_dri3_drawable
Initialize dri_screendisplay_gpu variable in struct laoder_dri3_drawable.
Also make dri_screen_display_gpu variable as input parameter to function
loader_dri3_drawable_init() since dri_screen variable is initialized this way.
This also helps to avoid duplicate initializing dri_screen_display_gpu
in glx and egl code.
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Mon, 18 Oct 2021 04:22:16 +0000 (09:52 +0530)]
egl: create DRI screen for display GPU in case of prime
The created DRI screen can be used to allocate VRAM memory from
display GPU in case of prime.
v2: remove extra whitespace (Marek Olšák)
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Mon, 22 Nov 2021 15:34:53 +0000 (21:04 +0530)]
egl,egl/x11: keep display fd open for prime
Keep the display fd open for creating DRI screen on display gpu in
case of prime. Also close the fd opened in dri2_display_destroy()
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Yogesh Mohanmarimuthu [Sun, 17 Oct 2021 16:54:10 +0000 (22:24 +0530)]
egl: add fd_display_gpu to struct dri2_egl_display
fd opened on display gpu is saved in fd_display_gpu. It is later used
to create dri screen on display gpu.
Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13422>
Tapani Pälli [Mon, 23 Jan 2023 08:57:20 +0000 (10:57 +0200)]
intel/genxml: set unused 3DSTATE_PS_EXTRA field as mbz
Wa_14015360517 mentions situations where HW produces invalid
occlusion query results when "Pixel Shader Does not write to RT"
bit is set.
"When Pixel Shader Kills Pixel is set, SW must perform a dummy render
target write from the shader and not set this bit, so that Occlusion
Query is correct."
Another situation is when writing to UAV or to NULL render target.
Patch sets field as 'must be zero' to discourage possible use of it.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20849>
Tapani Pälli [Thu, 12 Jan 2023 09:52:16 +0000 (11:52 +0200)]
mesa: move component bits queries as GL ES only
These enums have been removed/deprecated long time ago from desktop
GL. Here we remove them from modern GL while still allow for compat
contexts (~old apps). This change matches proprietary drivers and makes
our behaviour same within CTS with some tests.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20719>
Iago Toral Quiroga [Tue, 24 Jan 2023 07:24:49 +0000 (08:24 +0100)]
v3dv: ensure we allocate at least the requested space for a CL
While we are already ensuring we allocate at least 8192 bytes should
this not be the first allocation and our allocations are typically just
a few bytes, multilayered framebuffers with large numbers of layers may
require more space than that in a single allocation.
Fixes:
3325950648 ('v3dv: increase BO allocation size when growing CLs')
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20871>
Mike Blumenkrantz [Fri, 20 Jan 2023 19:53:32 +0000 (14:53 -0500)]
mesa: (more) correctly handle incomplete depth textures
according to GL spec, incomplete shadow samplers should return 0
this is technically possible for drivers to do using a RGBA texture in
the sense that somehow it's been working, but it's broken at the gallium-level
for what drivers should be expecting to see in such circumstances given
that such scenarios have been binding a RGBA texture to use with shadow samplers
instead, we can give drivers a fallback Z32 texture to avoid format/sampler
mismatches and complying with expected behavior
see also KHR-GL46.incomplete_texture_access.sampler for driver-specific testing
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>
Mike Blumenkrantz [Fri, 20 Jan 2023 19:52:21 +0000 (14:52 -0500)]
mesa: populate gl_program::ShadowSamplers mask from shader data
this data is already processed, it just isn't being propagated for whatever reason
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>
Mike Blumenkrantz [Fri, 20 Jan 2023 18:58:52 +0000 (13:58 -0500)]
mesa: remove dead parameter doc for _mesa_new_texture_object()
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20817>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:49:23 +0000 (16:49 -0500)]
zink: pass depth swizzle data block to shader compile
with everything now hooked up, this should fix all related test failures
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Wed, 4 Jan 2023 20:24:24 +0000 (15:24 -0500)]
zink: remove old depth swizzle workaround
this is already handled in match_tex_dests(), so it does nothing here
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Fri, 6 Jan 2023 15:38:22 +0000 (10:38 -0500)]
zink: create another samplerview for shadow textures
when doing legacy depth texture mode sampling, it's necessary to keep
another view that has the right (R in component 0) swizzle so that depth
values can actually be returned in cases where it would otherwise be
a constant value due to swizzling
this also allows zink_sampler_view::shadow_needs_shader_swizzle to be removed
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:43:08 +0000 (16:43 -0500)]
zink: plug in the program/module parts of shadow texture mode emulation
this is clunky because of how big the swizzle data block is,
but the gist of it is the data block is stored onto the shader module key
after all the other data, and then it gets manually hashed/compared in
relevant cases
it's gross, but so is this functionality
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:39:08 +0000 (16:39 -0500)]
zink: block pipeline fast-pathing for any programs using depth texture modes
the data for this is too big to compress into a shader key, so these pipelines
will always consume more cpu
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:36:30 +0000 (16:36 -0500)]
zink: rework depth sampler splatting in shaders
this enables passing a zink_fs_shadow_key to the compiler to manually
apply a swizzle other than R/R/R/R to depth texture results
currently no data is passed, so the previous splatting behavior is preserved
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:34:18 +0000 (16:34 -0500)]
zink: add a fs shader key member to indicate depth texturing mode
this does nothing now besides track the data
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:28:33 +0000 (16:28 -0500)]
zink: track depth swizzle on samplerviews
this will provide info for shader rewrites
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 21:27:43 +0000 (16:27 -0500)]
zink: add an extra_data param to zink_shader_compile
this is extra shader key data that can be used in various ways per stage
and is too large to fit into the shader key
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 18:36:13 +0000 (13:36 -0500)]
zink: break out tex dest rewriting into separate function
no functional changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Mike Blumenkrantz [Thu, 5 Jan 2023 18:32:25 +0000 (13:32 -0500)]
zink: flag old-style shadow tex mask for fragment shaders
this will be useful for handling depth texturing modes
only 32 are tracked now for performance reasons
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20598>
Samuel Pitoiset [Mon, 23 Jan 2023 07:58:31 +0000 (08:58 +0100)]
radv/winsys: fix incorrect PCIID for GFX11 in the null winsys
Fixes:
bbad550f3d4 ("radv/winsys: fill real info for CHIP_GFX1100")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20850>
Lionel Landwerlin [Mon, 23 Jan 2023 09:58:50 +0000 (11:58 +0200)]
intel/fs: avoid cmod optimization on instruction with different write_mask
I've been running into failures with tests like :
dEQP-VK.robustness.robustness2.bind.notemplate.rgba32i.unroll.nonvolatile.uniform_buffer_dynamic.no_fmt_qual.len_4.samples_1.1d.frag
With the load_global_const_block_intel NIR intrinsic, you can load a
vec8/vec16 with a predicate. The predicate is correctly uniformized to
feed into the SEND instruction's flag register.
The problem is that a series of optimization first remove the
find_live_channel and then changes the broadcast into a simple MOV
instruction, on the assumption that the first channel is always active
if there is not control flow. This is correct.
But after that the cmod optimzation will remove this instruction :
mov.nz.f0.0(16) null:D, vgrf16+0.0<0>:D NoMask
because it seems to be equivalent to :
cmp.g.f0.0(16) vgrf16:D, vgrf12:D, 63d
In this case vgrf16 is the predicate to the load block SEND
instruction. Since the execution mask is different between both, some
of the channels of the SEND instruction end up not being loaded or
loaded with the wrong predication and we end up with incorrect UBO
data.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20852>
Emma Anholt [Thu, 19 Jan 2023 20:18:58 +0000 (12:18 -0800)]
ci/piglit: Exclude swapbuffers front-readback tests with PIGLIT_PLATFORM=gbm.
These are expected to fail by the design of gbm. Don't make each driver
track them.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
Emma Anholt [Tue, 3 Jan 2023 20:25:19 +0000 (12:25 -0800)]
ci/piglit: Add some common piglit skips for Mesa CI's testing of glx.
Since our X servers don't have a compositor, and we run tests in parallel,
various swap and frontbuffer tests won't ever be stable. Rather than
having every driver have to track those flakes, make a general X11 skips
list as a known issue of our CI rather than pointing fingers at drivers.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
Emma Anholt [Thu, 19 Jan 2023 21:20:27 +0000 (13:20 -0800)]
ci: Move PIGLIT_PLATFORM settings out of the .tomls.
I'm going to add some automatic platform-based skips lists shortly (like
all-skips but more targeted), and this avoids needing to add them to each
.toml.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
Emma Anholt [Tue, 29 Nov 2022 22:15:00 +0000 (14:15 -0800)]
ci/freedreno: Switch the piglit job to using a deqp-runner suite.
This is one of the few remaining piglit-runner.sh users.
I think the notable change here is that we no longer set
EGL_PLATFORM=surfaceless like the piglit-runner.sh script did.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
Emma Anholt [Thu, 19 Jan 2023 22:57:36 +0000 (14:57 -0800)]
ci/zink: Clear issue #7781 flakes.
These tests all had valgrind UAF complaints that got fixed with the MR
closing that bug.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>
Emma Anholt [Thu, 19 Jan 2023 20:02:35 +0000 (12:02 -0800)]
ci/zink: Drop glx-swap-copy xfails.
These now skip, since there are no preserved configs any more.
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20798>