Matt Davis [Wed, 27 Jun 2018 16:09:33 +0000 (16:09 +0000)]
[llvm-mca] Register listeners with stages; remove Pipeline dependency from Stage.
Summary:
This patch removes a few callbacks from Pipeline. It comes at the cost of
registering Listeners with all Stages. Not all stages need listeners or issue
callbacks, this registration is a bit redundant. However, as we build-out the
API, this redundancy can disappear.
The main purpose here is to move callback code from the Pipeline and into the
stages that actually issue those callbacks. This removes the back-pointer to
the Pipeline that was put into a few Stage subclasses.
Reviewers: andreadb, courbet, RKSimon
Reviewed By: andreadb, courbet
Subscribers: tschuett, gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D48576
llvm-svn: 335748
Vedant Kumar [Wed, 27 Jun 2018 16:06:15 +0000 (16:06 +0000)]
[asan] Relax the null_deref.cc test even further
On Darwin/x86_64, asan may report the crashing line of NullDeref as line
19 (i.e the closing brace of the function), whereas on other targets we
see line 15 ("ptr[10]++").
The optimized debug info here isn't reliable enough to check.
rdar://problem/
41526369
llvm-svn: 335747
Simon Pilgrim [Wed, 27 Jun 2018 16:00:53 +0000 (16:00 +0000)]
[X86][SSE] Add missing AVX512 rotation tests
Increase coverage to make sure we're not doing anything stupid without AVX512BW
llvm-svn: 335746
Craig Topper [Wed, 27 Jun 2018 15:57:57 +0000 (15:57 +0000)]
[X86] Rename llvm.x86.avx512.mask.fpclass.p* to exclude 'mask.' from the name to match llvm.
llvm-svn: 335745
Craig Topper [Wed, 27 Jun 2018 15:57:53 +0000 (15:57 +0000)]
[X86] Rename the autoupgraded of packed fp compare and fpclass intrinsics that don't take a mask as input to exclude '.mask.' from their name.
I think the intrinsics named 'avx512.mask.' should refer to the previous behavior of taking a mask argument in the intrinsic instead of using a 'select' or 'and' instruction in IR to accomplish the masking. This is more consistent with the goal that eventually we will have no intrinsics that have masking builtin. When we reach that goal, we should have no intrinsics named "avx512.mask".
llvm-svn: 335744
Fangrui Song [Wed, 27 Jun 2018 15:56:32 +0000 (15:56 +0000)]
[ELF] Rename RF_PROGBITS_NOT_EXEC_OR_WRITE to RF_RODATA
Post commit review at D48406
llvm-svn: 335743
Stanislav Mekhanoshin [Wed, 27 Jun 2018 15:33:33 +0000 (15:33 +0000)]
[AMDGPU] Convert rcp to rcp_iflag
If a source of rcp instruction is a result of any conversion from
an integer convert it into rcp_iflag instruction. No FP exception
can ever happen except division by zero if a single precision rcp
argument is a representation of an integral number.
Differential Revision: https://reviews.llvm.org/D48569
llvm-svn: 335742
Vedant Kumar [Wed, 27 Jun 2018 14:57:59 +0000 (14:57 +0000)]
[asan] Relax a test which depends on optimized debug info
On some ARM platforms this test depends on debug locations being
present on constant materialization code, which was eliminated in
r335497.
Relax the test to allow two outcomes: the backtrace either contains the
right line numbers, or no line numbers.
llvm-svn: 335741
Alexander Kornienko [Wed, 27 Jun 2018 14:56:12 +0000 (14:56 +0000)]
[analyzer] Allow registering custom statically-linked analyzer checkers
Summary:
Add an extension point to allow registration of statically-linked Clang Static
Analyzer checkers that are not a part of the Clang tree. This extension point
employs the mechanism used when checkers are registered from dynamically loaded
plugins.
Reviewers: george.karpenkov, NoQ, xazax.hun, dcoughlin
Reviewed By: george.karpenkov
Subscribers: mgorny, mikhail.ramalho, rnkovacs, xazax.hun, szepet, a.sidorin, cfe-commits
Differential Revision: https://reviews.llvm.org/D45718
llvm-svn: 335740
Mikhail R. Gadelha [Wed, 27 Jun 2018 14:39:41 +0000 (14:39 +0000)]
[analyzer] Fix string not being formatted with extra arguments
Signed-off-by: Mikhail Ramalho <mikhail.ramalho@gmail.com>
llvm-svn: 335739
George Rimar [Wed, 27 Jun 2018 14:37:02 +0000 (14:37 +0000)]
[ELF] - ICF: Add test case to check many sections case.
Currently, ICF does not enable threading if we have less than 1024
sections in each equivalence class.
And the following code is uncovered by our test cases:
https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L404
This patch adds a test case that triggers the mentioned code to execute.
llvm-svn: 335738
Luke Geeson [Wed, 27 Jun 2018 14:34:40 +0000 (14:34 +0000)]
[AArch64] Reverting FP16 vcvth_n_s64_f16 to fix
llvm-svn: 335737
Alexander Kornienko [Wed, 27 Jun 2018 14:30:55 +0000 (14:30 +0000)]
[clang-tidy] Add ExprMutationAnalyzer, that analyzes whether an expression is mutated within a statement.
Summary:
(Originally started as a clang-tidy check but there's already D45444 so shifted to just adding ExprMutationAnalyzer)
`ExprMutationAnalyzer` is a generally useful helper that can be used in different clang-tidy checks for checking whether a given expression is (potentially) mutated within a statement (typically the enclosing compound statement.)
This is a more general and more powerful/accurate version of isOnlyUsedAsConst, which is used in ForRangeCopyCheck, UnnecessaryCopyInitialization.
It should also be possible to construct checks like D45444 (suggest adding const to variable declaration) or https://bugs.llvm.org/show_bug.cgi?id=21981 (suggest adding const to member function) using this helper function.
This function is tested by itself and is intended to stay generally useful instead of tied to any particular check.
Reviewers: hokein, alexfh, aaron.ballman, ilya-biryukov, george.karpenkov
Reviewed By: aaron.ballman
Subscribers: lebedev.ri, shuaiwang, rnkovacs, hokein, alexfh, aaron.ballman, a.sidorin, Eugene.Zelenko, xazax.hun, JonasToth, klimek, mgorny, cfe-commits
Tags: #clang-tools-extra
Patch by Shuai Wang.
Differential Revision: https://reviews.llvm.org/D45679
llvm-svn: 335736
Adhemerval Zanella [Wed, 27 Jun 2018 13:58:46 +0000 (13:58 +0000)]
[AArch64] Add custom lowering for v4i8 trunc store
This patch adds a custom trunc store lowering for v4i8 vector types.
Since there is not v.4b register, the v4i8 is promoted to v4i16 (v.4h)
and default action for v4i8 is to extract each element and issue 4
byte stores.
A better strategy would be to extended the promoted v4i16 to v8i16
(with undef elements) and extract and store the word lane which
represents the v4i8 subvectores. The construction:
define void @foo(<4 x i16> %x, i8* nocapture %p) {
%0 = trunc <4 x i16> %x to <4 x i8>
%1 = bitcast i8* %p to <4 x i8>*
store <4 x i8> %0, <4 x i8>* %1, align 4, !tbaa !2
ret void
}
Can be optimized from:
umov w8, v0.h[3]
umov w9, v0.h[2]
umov w10, v0.h[1]
umov w11, v0.h[0]
strb w8, [x0, #3]
strb w9, [x0, #2]
strb w10, [x0, #1]
strb w11, [x0]
ret
To:
xtn v0.8b, v0.8h
str s0, [x0]
ret
The patch also adjust the memory cost for autovectorization, so the C
code:
void foo (const int *src, int width, unsigned char *dst)
{
for (int i = 0; i < width; i++)
*dst++ = *src++;
}
can be vectorized to:
.LBB0_4: // %vector.body
// =>This Inner Loop Header: Depth=1
ldr q0, [x0], #16
subs x12, x12, #4 // =4
xtn v0.4h, v0.4s
xtn v0.8b, v0.8h
st1 { v0.s }[0], [x2], #4
b.ne .LBB0_4
Instead of byte operations.
llvm-svn: 335735
Ivan A. Kosarev [Wed, 27 Jun 2018 13:58:43 +0000 (13:58 +0000)]
[NEON] Support vldNq intrinsics in AArch32 (Clang part)
This patch reworks the support for dup NEON intrinsics as
described in D48439.
Differential Revision: https://reviews.llvm.org/D48440
llvm-svn: 335734
Ivan A. Kosarev [Wed, 27 Jun 2018 13:57:52 +0000 (13:57 +0000)]
[NEON] Support vldNq intrinsics in AArch32 (LLVM part)
This patch adds support for the q versions of the dup
(load-to-all-lanes) NEON intrinsics, such as vld2q_dup_f16() for
example.
Currently, non-q versions of the dup intrinsics are implemented
in clang by generating IR that first loads the elements of the
structure into the first lane with the lane (to-single-lane)
intrinsics, and then propagating it other lanes. There are at
least two problems with this approach. First, there are no
double-spaced to-single-lane byte-element instructions. For
example, there is no such instruction as 'vld2.8 { d0[0], d2[0]
}, [r0]'. That means we cannot rely on the to-single-lane
intrinsics and instructions to implement the q versions of the
dup intrinsics. Note that to-all-lanes instructions do support
all sizes of data items, including bytes.
The second problem with the current approach is that we need a
separate vdup instruction to propagate the structure to each
lane. So for vld4q_dup_f16() we would need four vdup instructions
in addition to the initial vld instruction.
This patch introduces dup LLVM intrinsics and reworks handling of
the currently supported (non-q) NEON dup intrinsics to expand
them into those LLVM intrinsics, thus eliminating the need for
using to-single-lane intrinsics and instructions.
Additionally, this patch adds support for u64 and s64 dup NEON
intrinsics. These are marked as Arch64-only in the ARM NEON
Reference, but it seems there are no reasons to not support them
in AArch32 mode. Please correct, if that is wrong.
That's what we generate with this patch applied:
vld2q_dup_f16:
vld2.16 {d0[], d2[]}, [r0]
vld2.16 {d1[], d3[]}, [r0]
vld3q_dup_f16:
vld3.16 {d0[], d2[], d4[]}, [r0]
vld3.16 {d1[], d3[], d5[]}, [r0]
vld4q_dup_f16:
vld4.16 {d0[], d2[], d4[], d6[]}, [r0]
vld4.16 {d1[], d3[], d5[], d7[]}, [r0]
Differential Revision: https://reviews.llvm.org/D48439
llvm-svn: 335733
Zaara Syeda [Wed, 27 Jun 2018 13:55:41 +0000 (13:55 +0000)]
[PPC64] Add support for R_PPC64_GOT_DTPREL16* relocations
The local dynamic TLS access on PPC64 ELF v2 ABI uses R_PPC64_GOT_DTPREL16*
relocations when a TLS variables falls outside 2 GB of the thread storage
block. This patch adds support for these relocations by adding a new RelExpr
called R_TLSLD_GOT_OFF which emits a got entry for the TLS variable relative
to the dynamic thread pointer using the relocation R_PPC64_DTPREL64. It then
evaluates the R_PPC64_GOT_DTPREL16* relocations as the got offset for the
R_PPC64_DTPREL64 got entries.
Differential Revision: https://reviews.llvm.org/D48484
llvm-svn: 335732
Gabor Marton [Wed, 27 Jun 2018 13:32:50 +0000 (13:32 +0000)]
Re-apply: [ASTImporter] Import the whole redecl chain of functions
Summary:
With this patch when any `FunctionDecl` of a redeclaration chain is imported
then we bring in the whole declaration chain. This involves functions and
function template specializations. Also friend functions are affected. The
chain is imported as it is in the "from" tu, the order of the redeclarations
are kept. I also changed the lookup logic in order to find friends, but first
making them visible in their declaration context. We may have long
redeclaration chains if all TU contains the same prototype, but our
measurements shows no degradation in time of CTU analysis (Tmux, Xerces,
Bitcoin, Protobuf). Also, as further work we could squash redundant
prototypes, but first ensure that functionality is working properly; then
should we optimize.
This may seem like a huge patch, sorry about that. But, most of the changes are
new tests, changes in the production code is not that much. I also tried to
create a smaller patch which does not affect specializations, but that patch
failed to pass some of the `clang-import-test`s because there we import
function specializations. Also very importantly, we can't just change the
import of `FunctionDecl`s without changing the import of function template
specializations because they are handled as `FunctionDecl`s.
Reviewers: a.sidorin, r.stahl, xazax.hun, balazske, a_sidorin
Reviewed By: a_sidorin
Subscribers: labath, aprantl, a_sidorin, rnkovacs, dkrupp, cfe-commits
Differential Revision: https://reviews.llvm.org/D47532
Re-apply commit rC335480
llvm-svn: 335731
Zaara Syeda [Wed, 27 Jun 2018 13:27:29 +0000 (13:27 +0000)]
[PPC64] Add TLS global dynamic to local exec relaxation
This patch adds the target call back relaxTlsGdToLe to support TLS relaxation
from global dynamic to local exec model.
The relaxation performs the following transformation:
addis r3, r2, x@got@tlsgd@ha --> nop
addi r3, r3, x@got@tlsgd@l --> addis r3, r13, x@tprel@ha
bl __tls_get_addr(x@tlsgd) --> nop
nop --> addi r3, r3, x@tprel@l
Differential Revision: https://reviews.llvm.org/D48082
llvm-svn: 335730
Florian Hahn [Wed, 27 Jun 2018 12:57:51 +0000 (12:57 +0000)]
[ValueLattice] Return false if value range did not change in mergeIn.
llvm-svn: 335729
Dan Liew [Wed, 27 Jun 2018 12:56:34 +0000 (12:56 +0000)]
[CMake] Tidy up the organisation of compiler-rt when configured as a standalone
build with an IDE (e.g. Xcode) as the generator.
Previously the global `USE_FOLDERS` property wasn't set in standalone
builds leading to existing settings of FOLDER not being respected.
In addition to this there were several targets that appeared at the top
level that were not interesting and clustered up the view. These have
been changed to be displayed in "Compiler-RT Misc".
Now when an Xcode project is generated from a standalone compiler-rt
build the project navigator is much less cluttered. The interesting
libraries should appear in "Compiler-RT Libraries" in the IDE.
Differential Revision: https://reviews.llvm.org/D48378
llvm-svn: 335728
Simon Pilgrim [Wed, 27 Jun 2018 12:45:31 +0000 (12:45 +0000)]
[DAGCombiner] visitSDIV - add special case handling for (sdiv X, 1) -> X in pow2 expansion
For divisor = 1, perform a select of X - reduces scalarisation of simple SDIVs
llvm-svn: 335727
Mikhail R. Gadelha [Wed, 27 Jun 2018 12:42:48 +0000 (12:42 +0000)]
[Analyzer] Moved RangeConstraintManager to header. NFC.
Summary: While at it, added a dump method to RangeSet.
Reviewers: george.karpenkov, NoQ
Reviewed By: george.karpenkov
Subscribers: xazax.hun, szepet, a.sidorin
Differential Revision: https://reviews.llvm.org/D48561
llvm-svn: 335726
Nico Weber [Wed, 27 Jun 2018 12:05:06 +0000 (12:05 +0000)]
Add regression test for PR37935.
llvm-svn: 335725
Nico Weber [Wed, 27 Jun 2018 11:52:30 +0000 (11:52 +0000)]
Build TaskQueueTest in threads=on builds, fixes regression from r335608.
llvm-svn: 335724
Sam McCall [Wed, 27 Jun 2018 11:43:54 +0000 (11:43 +0000)]
[clangd] Sema ranking tweaks: downrank keywords and injected names.
Summary:
Injected names being ranked too high was just a bug.
The high boost for keywords was intended, but was too much given how useless
keywords are. We should probably boost them on a case-by-case basis eventually.
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D48368
llvm-svn: 335723
Andrea Di Biagio [Wed, 27 Jun 2018 11:17:07 +0000 (11:17 +0000)]
[llvm-mca] Avoid calling method update() on instructions that are already in the IS_READY state. NFCI
When promoting instructions from the wait queue to the ready queue, we should
check if an instruction has already reached the IS_READY state before
calling method update().
llvm-svn: 335722
Simon Pilgrim [Wed, 27 Jun 2018 10:59:36 +0000 (10:59 +0000)]
[X86][SSE] Include MIN_SIGNED element in non-uniform SDIV pow2 tests
llvm-svn: 335721
Simon Pilgrim [Wed, 27 Jun 2018 10:51:55 +0000 (10:51 +0000)]
[DAGCombiner] visitSDIV - simplify pow2 handling. NFCI.
Use the builtin constant folding of getNode() etc. instead of doing it manually.
llvm-svn: 335720
Simon Pilgrim [Wed, 27 Jun 2018 10:21:06 +0000 (10:21 +0000)]
[DAGCombiner] Fold SDIV(%X, MIN_SIGNED) -> SELECT(%X == MIN_SIGNED, 1, 0)
Fixes PR37569.
llvm-svn: 335719
Ilya Biryukov [Wed, 27 Jun 2018 09:47:20 +0000 (09:47 +0000)]
[clangd] Do not show namespace comments.
Summary:
Comments from namespaces that clangd produces are too noisy and often
not useful.
Namespaces have too many redecls and we don't have a good way of
determining which of the comments are relevant and which should be
ignored (e.g. because they come from code generators like the protobuf
compiler).
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ioeric, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D48211
llvm-svn: 335718
Simon Pilgrim [Wed, 27 Jun 2018 09:41:22 +0000 (09:41 +0000)]
[DAGCombiner] Don't accept signbit sdiv divisors in sdiv-by-pow2 vector expansion (PR37569)
llvm-svn: 335717
Luke Geeson [Wed, 27 Jun 2018 09:23:38 +0000 (09:23 +0000)]
Removing empty CodeGen dir in root
llvm-svn: 335716
Luke Geeson [Wed, 27 Jun 2018 09:20:13 +0000 (09:20 +0000)]
[AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns
llvm-svn: 335715
George Rimar [Wed, 27 Jun 2018 08:08:12 +0000 (08:08 +0000)]
[ELF] - Implement linker script OVERLAYs.
This is PR36768.
Linker script OVERLAYs are described in 4.6.9. Overlay Description of the spec:
https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/4/html/Using_ld_the_GNU_Linker/sections.html
They are used to allow output sections which have different LMAs but the same VAs
and used for embedded programming.
Currently, LLD restricts overlapping of sections and that seems to be the most desired
behaviour for defaults. My thoughts about possible approaches for PR36768 are on the bug page,
this patch implements OVERLAY keyword and allows VAs overlapping for sections that within the overlay.
Differential revision: https://reviews.llvm.org/D44780
llvm-svn: 335714
Rui Ueyama [Wed, 27 Jun 2018 07:56:23 +0000 (07:56 +0000)]
Make -z option check more strict.
llvm-svn: 335713
Rui Ueyama [Wed, 27 Jun 2018 07:22:27 +0000 (07:22 +0000)]
Report an error for an unknown -z option.
This is a less clever version of https://reviews.llvm.org/D48433.
This is a dumb version but I think I prefer this for its simplicity.
Differential Revision: https://reviews.llvm.org/D48621
llvm-svn: 335712
Tatyana Krasnukha [Wed, 27 Jun 2018 07:01:07 +0000 (07:01 +0000)]
Add missing constness.
llvm-svn: 335711
Tatyana Krasnukha [Wed, 27 Jun 2018 06:50:10 +0000 (06:50 +0000)]
Move AddressClass to private enums since API doesn't provide any functions to manage it.
This change allows to make AddressClass strongly typed enum and not to have issues with old versions of SWIG that don't support enum classes.
llvm-svn: 335710
Dave Lee [Wed, 27 Jun 2018 06:46:09 +0000 (06:46 +0000)]
Fix a single typo in SBSymbolContext
Summary: Fix a "Manay" in SBSymbolContext.i
Reviewers: xiaobai
Reviewed By: xiaobai
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D48620
llvm-svn: 335709
Petr Hosek [Wed, 27 Jun 2018 05:50:43 +0000 (05:50 +0000)]
[CMake] Support passing FUCHSIA_SDK as the only variable
Now that the structure of Fuchsia SDK has been formalized, we no
longer need to pass all the different CFLAGS/LDFLAGS to the CMake
build separately, we can simply set the FUCHSIA_SDK variable and
derive all the necessary variables from that one inside the cache
file.
Differential Revision: https://reviews.llvm.org/D48564
llvm-svn: 335708
Konstantin Zhuravlyov [Wed, 27 Jun 2018 05:36:03 +0000 (05:36 +0000)]
AMDGPU/NFC: Fix typo in comment
llvm-svn: 335707
Konstantin Zhuravlyov [Wed, 27 Jun 2018 05:18:50 +0000 (05:18 +0000)]
AMDHSA: Rename RESERVED -> RESERVED0, mark gfx9-specific field
llvm-svn: 335706
Konstantin Zhuravlyov [Wed, 27 Jun 2018 04:56:00 +0000 (04:56 +0000)]
AMDHSA/NFC: Address missed review feedback from
https://reviews.llvm.org/D47566
Change wording from "Must be backwards compatible" to
"Must match hardware definition" for enums that are
defined by hardware.
llvm-svn: 335705
Petr Hosek [Wed, 27 Jun 2018 03:35:53 +0000 (03:35 +0000)]
[CMake] Provide direct support for building sanitized runtimes
This avoids having to rely on magic separators and special parsing.
Differential Revision: https://reviews.llvm.org/D48061
llvm-svn: 335704
Petr Hosek [Wed, 27 Jun 2018 03:14:41 +0000 (03:14 +0000)]
[CMake] Use variables rather than ":" delimiters
This is a more idiomatic CMake.
Differential Revision: https://reviews.llvm.org/D37644
llvm-svn: 335703
Zachary Turner [Wed, 27 Jun 2018 02:49:22 +0000 (02:49 +0000)]
Fix warning about unhandled enumeration in switch.
llvm-svn: 335702
George Karpenkov [Wed, 27 Jun 2018 01:51:55 +0000 (01:51 +0000)]
[analyzer] [NFC] A convenient getter for getting a current stack frame
Differential Revision: https://reviews.llvm.org/D44756
llvm-svn: 335701
George Karpenkov [Wed, 27 Jun 2018 01:51:36 +0000 (01:51 +0000)]
[analyzer] [NFC] Add -verify to malloc checker test
Differential Revision: https://reviews.llvm.org/D48514
llvm-svn: 335700
Richard Smith [Wed, 27 Jun 2018 01:32:04 +0000 (01:32 +0000)]
Diagnose missing 'template' keywords in contexts where a comma is not a
binary operator.
Factor out the checking for a comma within potential angle brackets and
also call it from contexts where we parse a comma-separated list of
arguments or initializers.
llvm-svn: 335699
Justin Bogner [Wed, 27 Jun 2018 00:54:36 +0000 (00:54 +0000)]
[ADT] Pass DerivedT from pointe{e,r}_iterator to iterator_adaptor_base
These were passing the wrong type into iterator_adaptor_base if T was
anything but the default.
llvm-svn: 335698
Matt Davis [Wed, 27 Jun 2018 00:54:11 +0000 (00:54 +0000)]
[llvm-mca] Add a comment to Stage::execute and fix a spelling error. NFC.
llvm-svn: 335697
Vedant Kumar [Wed, 27 Jun 2018 00:47:53 +0000 (00:47 +0000)]
[InstCombine] Avoid creating mis-sized dbg.values in commonCastTransforms()
This prevents InstCombine from creating mis-sized dbg.values when
replacing a sequence of casts with a simpler cast. For example, in:
(fptrunc (floor (fpext X))) -> (floorf X)
We no longer emit dbg.value(X) (with a 32-bit float operand) to describe
(fpext X) (which is a 64-bit float).
This was diagnosed by the debugify check added in r335682.
llvm-svn: 335696
Vedant Kumar [Wed, 27 Jun 2018 00:47:52 +0000 (00:47 +0000)]
[Debugify] Handle failure to get fragment size when checking dbg.values
It's not possible to get the fragment size of some dbg.values. Teach the
mis-sized dbg.value diagnostic to detect this scenario and bail out.
Tested with:
$ find test/Transforms -print -exec opt -debugify-each -instcombine {} \;
llvm-svn: 335695
Craig Topper [Wed, 27 Jun 2018 00:42:24 +0000 (00:42 +0000)]
[X86] Don't store register and memory FMA3 opcodes in the same X86InstrFMA3Group.
Nothing was using this relationship. By splitting them we no longer need to worry about register or memory entries being empty in a group.
The memory folding tables in X86InstrInfo.cpp can be used to access this relationship if needed.
llvm-svn: 335694
Vlad Tsyrklevich [Wed, 27 Jun 2018 00:31:17 +0000 (00:31 +0000)]
Fix another bot broken by r335644
The android sanitizer bot can't resolve the function name in the DSO and
it's not relevant to the test.
llvm-svn: 335693
John Baldwin [Wed, 27 Jun 2018 00:02:16 +0000 (00:02 +0000)]
[mips] Explicitly specify the linker emulation for MIPS on FreeBSD.
FreeBSD's mips64 builds O32 binaries for /usr/lib32 by default and
thus needs to be able to link O32 binaries which requires an explicit
linker emulation. Go ahead and list all the linker emulation variants
for MIPS so that any supported MIPS ABI binary can be linked by any
linker supporting MIPS.
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D48507
llvm-svn: 335691
Jim Ingham [Tue, 26 Jun 2018 23:54:50 +0000 (23:54 +0000)]
Use the API's to get the TargetSP.
llvm-svn: 335690
Jim Ingham [Tue, 26 Jun 2018 23:38:58 +0000 (23:38 +0000)]
The Process class ivar ivar was changed to a weak pointer, but was still _sp.
Fix that to _wp.
llvm-svn: 335689
Jim Ingham [Tue, 26 Jun 2018 23:31:44 +0000 (23:31 +0000)]
This is not a debug info sensitive test.
llvm-svn: 335688
Richard Smith [Tue, 26 Jun 2018 23:20:26 +0000 (23:20 +0000)]
Diagnose missing 'template' keywords in more cases.
We track when we see a name-shaped expression followed by a '<' token
and parse the '<' as a comparison. Then:
* if we see a token sequence that cannot possibly be an expression but
can be a template argument (in particular, a type-id) that follows
either a ',' or the '<', diagnose that the '<' was supposed to start
a template argument list, and
* if we see '>()', diagnose that the '<' was supposed to start a
template argument list.
This only changes the diagnostic for error cases, and in practice
appears to catch the most common cases where a missing 'template'
keyword leads to parse errors within a template.
Differential Revision: https://reviews.llvm.org/D48571
llvm-svn: 335687
Shoaib Meenai [Tue, 26 Jun 2018 23:18:59 +0000 (23:18 +0000)]
[clang] Add test dependency on llvm-as
r335618 added tests that invoke llvm-as, so we should also ensure that
running clang tests rebuilds llvm-as.
llvm-svn: 335686
George Karpenkov [Tue, 26 Jun 2018 23:17:35 +0000 (23:17 +0000)]
[analyzer] [tests] Include statistics in tests.
llvm-svn: 335685
Evgeniy Stepanov [Tue, 26 Jun 2018 23:10:48 +0000 (23:10 +0000)]
Revert "[MS] Use mangled names and comdats for string merging with ASan"
Depends on r334313, which has been reverted in r335681.
llvm-svn: 335684
George Karpenkov [Tue, 26 Jun 2018 23:10:05 +0000 (23:10 +0000)]
[analyzer] Minor cleanups for BugReporter, expose a getter for AnalyzerOptions.
llvm-svn: 335683
Vedant Kumar [Tue, 26 Jun 2018 22:46:41 +0000 (22:46 +0000)]
[Debugify] Diagnose mis-sized dbg.values
Report an error in -check-debugify when the size of a dbg.value operand
doesn't match up with the size of the variable it describes.
Eventually this check should be moved into the IR verifier. For the
moment, it's useful to include the check in -check-debugify as a means
of catching regressions and finding existing bugs.
Here are some instances of bugs the new check finds in the -O2 pipeline
(all in InstCombine):
1) A float is used where a double is expected:
ERROR: dbg.value operand has size 32, but its variable has size 64:
call void @llvm.dbg.value(metadata float %expf, metadata !12, metadata
!DIExpression()), !dbg !15
2) An i8 is used where an i32 is expected:
ERROR: dbg.value operand has size 8, but its variable has size 32:
call void @llvm.dbg.value(metadata i8 %t4, metadata !14, metadata
!DIExpression()), !dbg !24
3) A <4 x i32> is used where something twice as large is expected
(perhaps a <4 x i64>, I haven't double-checked):
ERROR: dbg.value operand has size 128, but its variable has size 256:
call void @llvm.dbg.value(metadata <4 x i32> %4, metadata !40, metadata
!DIExpression()), !dbg !95
Differential Revision: https://reviews.llvm.org/D48408
llvm-svn: 335682
Evgeniy Stepanov [Tue, 26 Jun 2018 22:43:48 +0000 (22:43 +0000)]
Revert "[asan] Instrument comdat globals on COFF targets"
Causes false positive ODR violation reports on __llvm_profile_raw_version.
llvm-svn: 335681
Lang Hames [Tue, 26 Jun 2018 22:43:01 +0000 (22:43 +0000)]
[ORC] Don't call isa<> on a null value.
This should fix the recent builder failures in the test-global-ctors.ll testcase.
llvm-svn: 335680
Lang Hames [Tue, 26 Jun 2018 22:30:42 +0000 (22:30 +0000)]
[ORC] Fix a missing return value.
llvm-svn: 335677
Fangrui Song [Tue, 26 Jun 2018 22:20:04 +0000 (22:20 +0000)]
[ELF] Move `// REQUIRES:` line to the top
llvm-svn: 335676
Michael Zolotukhin [Tue, 26 Jun 2018 22:19:48 +0000 (22:19 +0000)]
[JumpThreading] Don't try to rewrite a use if it's already valid.
Summary:
When recording uses we need to rewrite after cloning a loop we need to
check if the use is not dominated by the original def. The initial
assumption was that the cloned basic block will introduce a new path and
thus the original def will only dominate the use if they are in the same
BB, but as the reproducer from PR37745 shows it's not always the case.
This fixes PR37745.
Reviewers: haicheng, Ka-Ka
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D48111
llvm-svn: 335675
Fangrui Song [Tue, 26 Jun 2018 22:13:32 +0000 (22:13 +0000)]
[ELF] Make non-writable non-executable PROGBITS sections closer to .text
This generalizes the old heuristic placing SHT_DYNSYM SHT_DYNSTR first in the readonly SHF_ALLOC segment.
Reviewers: espindola
Subscribers: emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D48406
llvm-svn: 335674
Lang Hames [Tue, 26 Jun 2018 22:12:02 +0000 (22:12 +0000)]
[ORC] Add a dependence on MC to LLVMBuild.txt
llvm-svn: 335673
Jessica Paquette [Tue, 26 Jun 2018 22:09:48 +0000 (22:09 +0000)]
[MachineOutliner] Emit a warning when using -moutline on unsupported targets
Instead of just saying "flag unused", we should tell the user that the
outliner isn't (at least officially) supported for some given architecture.
This adds a warning that will state something like
The 'blah' architecture does not support -moutline; flag ignored
when we call -moutline with the 'blah' architecture.
Since the outliner is still mostly an AArch64 thing, any architecture
other than AArch64 will emit this warning.
llvm-svn: 335672
Simon Pilgrim [Tue, 26 Jun 2018 22:03:00 +0000 (22:03 +0000)]
[X86] Add test for SDIV by sign bit (minsigned) value
llvm-svn: 335671
Lang Hames [Tue, 26 Jun 2018 21:35:48 +0000 (21:35 +0000)]
[ORC] Add LLJIT and LLLazyJIT, and replace OrcLazyJIT in LLI with LLLazyJIT.
LLJIT is a prefabricated ORC based JIT class that is meant to be the go-to
replacement for MCJIT. Unlike OrcMCJITReplacement (which will continue to be
supported) it is not API or bug-for-bug compatible, but targets the same
use cases: Simple, non-lazy compilation and execution of LLVM IR.
LLLazyJIT extends LLJIT with support for function-at-a-time lazy compilation,
similar to what was provided by LLVM's original (now long deprecated) JIT APIs.
This commit also contains some simple utility classes (CtorDtorRunner2,
LocalCXXRuntimeOverrides2, JITTargetMachineBuilder) to support LLJIT and
LLLazyJIT.
Both of these classes are works in progress. Feedback from JIT clients is very
welcome!
llvm-svn: 335670
Konstantin Zhuravlyov [Tue, 26 Jun 2018 21:33:38 +0000 (21:33 +0000)]
AMDGPU: Silence unused warnings in waitcnt insertion pass in release build
Differential Revision: https://reviews.llvm.org/D48607
llvm-svn: 335669
Jessica Paquette [Tue, 26 Jun 2018 21:30:34 +0000 (21:30 +0000)]
[X86][AsmParser] Recommit r335658
Recommit of r335658 so that it does not change the behaviour of any
existing error output.
llvm-svn: 335668
Vedant Kumar [Tue, 26 Jun 2018 21:16:59 +0000 (21:16 +0000)]
Rename skipDebugInfo -> skipDebugIntrinsics, NFC
This addresses post-commit feedback about the name 'skipDebugInfo' being
misleading. This name could be interpreted as meaning 'a function that
skips instructions with debug locations'.
The new name, 'skipDebugIntrinsics', makes it clear that this function
only skips debug info intrinsics.
Thanks to Adrian Prantl for pointing this out!
llvm-svn: 335667
George Karpenkov [Tue, 26 Jun 2018 21:12:08 +0000 (21:12 +0000)]
[analyzer] Do not run visitors until the fixpoint, run only once.
In the current implementation, we run visitors until the fixed point is
reached.
That is, if a visitor adds another visitor, the currently processed path
is destroyed, all diagnostics is discarded, and it is regenerated again,
until it's no longer modified.
This pattern has a few negative implications:
- This loop does not even guarantee to terminate.
E.g. just imagine two visitors bouncing a diagnostics around.
- Performance-wise, e.g. for sqlite3 all visitors are being re-run at
least 10 times for some bugs.
We have already seen a few reports where it leads to timeouts.
- If we want to add more computationally intense visitors, this will
become worse.
- From architectural standpoint, the current layout requires copying
visitors, which is conceptually wrong, and can be annoying (e.g. no
unique_ptr on visitors allowed).
The proposed change is a much simpler architecture: the outer loop
processes nodes upwards, and whenever the visitor is added it only
processes current nodes and above, thus guaranteeing termination.
Differential Revision: https://reviews.llvm.org/D47856
llvm-svn: 335666
Lang Hames [Tue, 26 Jun 2018 20:59:51 +0000 (20:59 +0000)]
[ORC] Allow IRTransformLayer2's transform to be modified after initialization.
Also give the constructor's transform parameter a default no-op transform value.
llvm-svn: 335665
Lang Hames [Tue, 26 Jun 2018 20:59:50 +0000 (20:59 +0000)]
[ORC] Reset AsynchronousSymbolQuery's NotifySymbolsResolved callback on error.
AsynchronousSymbolQuery::canStillFail checks the value of the callback to
prevent sending it redundant error notifications, so we need to reset it after
running it.
llvm-svn: 335664
Lang Hames [Tue, 26 Jun 2018 20:59:49 +0000 (20:59 +0000)]
[ORC] Move the VSOList typedef out of VSO.
llvm-svn: 335663
Lang Hames [Tue, 26 Jun 2018 20:59:49 +0000 (20:59 +0000)]
[ORC] Add a FIXME.
llvm-svn: 335662
Lang Hames [Tue, 26 Jun 2018 20:59:46 +0000 (20:59 +0000)]
[ORC] Fix a FIXME by moving MangleAndInterner to Core.h.
llvm-svn: 335661
Jessica Paquette [Tue, 26 Jun 2018 20:57:19 +0000 (20:57 +0000)]
Revert "[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode"
This reverts commit
4850a9aae8b38c7deadc103d634ec7397e6c323b.
It caused MC/X86/x86_errors.s to fail. Will fix and recommit shortly.
llvm-svn: 335660
Jim Ingham [Tue, 26 Jun 2018 20:40:29 +0000 (20:40 +0000)]
Reverting r335656, SWIG doesn't like "enum class".
llvm-svn: 335659
Jessica Paquette [Tue, 26 Jun 2018 20:33:46 +0000 (20:33 +0000)]
[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit mode
Right now, when we use RIP-relative instructions in 32-bit mode, we'll just
assert and crash.
This adds an error message which tells the user that they can't do that in
32-bit mode, so that we don't crash (and also can see the issue outside of
assert builds).
llvm-svn: 335658
Vlad Tsyrklevich [Tue, 26 Jun 2018 20:21:33 +0000 (20:21 +0000)]
Fix test broken by r335644
llvm-svn: 335657
Tatyana Krasnukha [Tue, 26 Jun 2018 20:08:05 +0000 (20:08 +0000)]
Amend "Change AddressClass type from 'enum' to 'enum class'".
r335599 changes usages of AddressClass, but doesn't change the type itself.
llvm-svn: 335656
Brian Gesiak [Tue, 26 Jun 2018 20:05:18 +0000 (20:05 +0000)]
[AST] Fix typo in LazyOffsetPtr::get docs (NFC)
llvm-svn: 335655
Stanislav Mekhanoshin [Tue, 26 Jun 2018 20:04:19 +0000 (20:04 +0000)]
[AMDGPU] Add llvm.amdgcn.fmad.ftz intrinsic
This intrinsic selects v_mad_f32 regardless of fp32 denorm support.
Differential Revision: https://reviews.llvm.org/D48573
llvm-svn: 335654
John Baldwin [Tue, 26 Jun 2018 19:48:05 +0000 (19:48 +0000)]
[mips] Use more conservative default CPUs for MIPS on FreeBSD.
FreeBSD defaults to mips3 for all MIPS ABIs with GCC as that is the
minimum MIPS architecture FreeBSD supports. Use mips3 for MIPS64 and
mips2 for MIPS32 to match.
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D48499
llvm-svn: 335653
Sanjay Patel [Tue, 26 Jun 2018 19:46:56 +0000 (19:46 +0000)]
[DAGCombiner] use isBitwiseNot to simplify code; NFC
llvm-svn: 335652
Sean Fertile [Tue, 26 Jun 2018 19:38:18 +0000 (19:38 +0000)]
[PPC64] Thread-local storage general-dynamic to initial-exec relaxation.
Patch adds support for relaxing the general-dynamic tls sequence to
initial-exec.
the relaxation performs the following transformation:
addis r3, r2, x@got@tlsgd@ha --> addis r3, r2, x@got@tprel@ha
addi r3, r3, x@got@tlsgd@l --> ld r3, x@got@tprel@l(r3)
bl __tls_get_addr(x@tlsgd) --> nop
nop --> add r3, r3, r13
and instead of emitting a DTPMOD64/DTPREL64 pair for x, we emit a single
R_PPC64_TPREL64.
Differential Revision: https://reviews.llvm.org/D48090
llvm-svn: 335651
Matt Arsenault [Tue, 26 Jun 2018 19:10:00 +0000 (19:10 +0000)]
AMDGPU: Add pass to lower kernel arguments to loads
This replaces most argument uses with loads, but for
now not all.
The code in SelectionDAG for calling convention lowering
is actively harmful for amdgpu_kernel. It attempts to
split the argument types into register legal types, which
results in low quality code for arbitary types. Since
all kernel arguments are passed in memory, we just want the
raw types.
I've tried a couple of methods of mitigating this in SelectionDAG,
but it's easier to just bypass this problem alltogether. It's
possible to hack around the problem in the initial lowering,
but the real problem is the DAG then expects to be able to use
CopyToReg/CopyFromReg for uses of the arguments outside the block.
Exposing the argument loads in the IR also has the advantage
that the LoadStoreVectorizer can merge them.
I'm not sure the best approach to dealing with the IR
argument list is. The patch as-is just leaves the IR arguments
in place, so all the existing code will still compute the same
kernarg size and pointlessly lowers the arguments.
Arguably the frontend should emit kernels with an empty argument
list in the first place. Alternatively a dummy array could be
inserted as a single argument just to reserve space.
This does have some disadvantages. Local pointer kernel arguments can
no longer have AssertZext placed on them as the equivalent !range
metadata is not valid on pointer typed loads. This is mostly bad
for SI which needs to know about the known bits in order to use the
DS instruction offset, so in this case this is not done.
More importantly, this skips noalias arguments since this pass
does not yet convert this to the equivalent !alias.scope and !noalias
metadata. Producing this metadata correctly seems to be tricky,
although this logically is the same as inlining into a function which
doesn't exist. Additionally, exposing these loads to the vectorizer
may result in degraded aliasing information if a pointer load is
merged with another argument load.
I'm also not entirely sure this is preserving the current clover
ABI, although I would greatly prefer if it would stop widening
arguments and match the HSA ABI. As-is I think it is extending
< 4-byte arguments to 4-bytes but doesn't align them to 4-bytes.
llvm-svn: 335650
Matt Arsenault [Tue, 26 Jun 2018 18:55:43 +0000 (18:55 +0000)]
ConstantFold: Don't fold global address vs. null for addrspace != 0
Not sure why this logic seems to be repeated in 2 different places,
one called by the other.
On AMDGPU addrspace(3) globals start allocating at 0, so these
checks will be incorrect (not that real code actually tries
to compare these addresses)
llvm-svn: 335649
Vedant Kumar [Tue, 26 Jun 2018 18:55:26 +0000 (18:55 +0000)]
Use a variable to appease a no-asserts bot, NFC
Failure URL:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/22836
llvm-svn: 335648
Vedant Kumar [Tue, 26 Jun 2018 18:54:10 +0000 (18:54 +0000)]
[Debugify] Don't treat missing dbg.values as an error (PR37942)
When checking the debug info in a module, don't treat a missing
dbg.value as an error. The dbg.value may simply have been DCE'd, in
which case the debugger has enough information to display the variable
as <optimized out>.
llvm-svn: 335647
Tim Shen [Tue, 26 Jun 2018 18:54:10 +0000 (18:54 +0000)]
[ConstantRange] Add support of mul in makeGuaranteedNoWrapRegion.
Summary: This is trying to add support for r334428.
Reviewers: sanjoy
Subscribers: jlebar, hiraditya, bixia, llvm-commits
Differential Revision: https://reviews.llvm.org/D48399
llvm-svn: 335646