Bruce Wang [Mon, 24 Sep 2018 16:22:27 +0000 (12:22 -0400)]
drm/msm/dpu: Make dpu_plane_danger_signal_ctrl void
Removed all impossible checks from the function, which eliminates
the need for a return value. This function is also never used
outside of dpu_plane.c, so the function is made static.
v3: Using helper function _dpu_plane_get_kms() instead of doing
it locally.
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:26 +0000 (12:22 -0400)]
drm/msm/dpu: Change _dpu_crtc_vblank_enable_no_lock to void
Removes redundant tests for _dpu_crtc_vblank_enable_no_lock.
Function return type is now void and all function calls have
been changed accordingly.
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Wed, 26 Sep 2018 21:28:59 +0000 (17:28 -0400)]
drm/msm/dpu: Remove _dpu_crtc_power_enable
All checks for _dpu_crtc_power_enable are not true, so the function
can never return an error code. This removes the need for the
function as pm_runtime functions can be used instead.
v3: Separated _dpu_crtc_power_enable into _dpu_crtc_power_enable and
_dpu_crtc_power_disable for clarity.
v4: Removed both _dpu_crtc_power_enable and _dpu_crtc_power_disable
and called pm_runtime_get_sync and pm_runtime_put_sync from all
call points
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:24 +0000 (12:22 -0400)]
drm/msm/dpu: Remove unneeded checks in dpu_crtc.c
Removes impossible checks in dpu_crtc.c.
Variable assignments are moved up to be initializations where
possible. Some variables are no longer used, these are removed.
v3: reverted back to original patch
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:23 +0000 (12:22 -0400)]
drm/msm/dpu: Clean up plane atomic disable/update
Removes unnecessary checks from dpu_plane_atomic_disable, old_state
argument for both dpu_plane_atomic_disable and
dpu_plane_sspp_atomic_update is removed as it is no longer used.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Bruce Wang [Mon, 24 Sep 2018 16:22:22 +0000 (12:22 -0400)]
drm/msm/dpu: Remove unneeded checks in dpu_plane.c
Removes some checks from dpu_plane.c that will never result in an error.
Subsequent variable assignments become part of the initialization wherever
possible. Unused variables are removed.
v3: removed additional impossible checks and called helper function
_dpu_plane_get_kms() where possible.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Bruce Wang <bzwang@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:50 +0000 (14:33 -0400)]
drm/msm: dpu: Don't store/deref pointers in trace ringbuffer
TP_printk is not synchronous, so storing pointers and then later
dereferencing them is a Bad Idea. This patch stores everything locally to
avoid display stomped memory.
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
[seanpaul fixed up commit msg typo on apply]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:49 +0000 (14:33 -0400)]
drm/msm: dpu: Add extra_flush_bits to trigger_flush trace
It's useful to know which bits of the flush come from extra_flush_bits
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 19 Sep 2018 18:33:48 +0000 (14:33 -0400)]
drm/msm: dpu: Clear frame_busy_mask bit after trace
We're printing the frame_busy_mask in a trace, but after it's been
cleared. This, as it turns out, is pretty pointless.
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:59 +0000 (09:54 -0400)]
drm/msm: dpu: Don't continue after error in atomic_check
There's no benefit in falling out of the if, just return directly.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:58 +0000 (09:54 -0400)]
drm/msm: dpu: Make dpu_plane_sspp_atomic_update() void
All of the checks in dpu_plane_sspp_atomic_update() are impossible, so
remove them and make the function void. This removes the need to error
check in dpu_plane_atomic_update(). Additionally, remove impossible checks
in dpu_plane_atomic_update().
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:57 +0000 (09:54 -0400)]
drm/msm: dpu: Remove dpu_plane_enabled()
plane->state->visible encompasses all of these checks and more, so we
can just check visible.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:56 +0000 (09:54 -0400)]
drm/msm: dpu: Remove dpu_plane_sspp_enabled()
It's doing the same thing dpu_plane_enabled() is.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:55 +0000 (09:54 -0400)]
drm/msm: dpu: Consolidate atomic_check functions()
dpu_plane_atomic_check() is a very thin wrapper around
dpu_plane_sspp_atomic_check(). All it does is a NULL-check of state->fb,
which is already done by drm_atomic_helper_check_plane_state(). Further,
the helper sets state->visible = false when this is true. So remove
dpu_plane_atomic_check() and just use dpu_plane_sspp_atomic_check()
directly.
Changes in v2:
- Fix spelling mistake in Subject (Jeykumar)
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:54 +0000 (09:54 -0400)]
drm/msm: dpu: Move atomic_check_plane_state() call to atomic_check
src/dst rects are checked in both atomic_check and atomic_update, with
the more comprehensive check occurring in atomic_update, which is
backwards. So consolodate the checks in atomic_check.
Changes in v2:
- Use the correct crtc state (Jeykumar)
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 12 Sep 2018 13:54:53 +0000 (09:54 -0400)]
drm/msm: dpu: Remove impossible checks
This patch removes some checks which are impossible to hit. As a result,
we can move some of the local var assignments into the declarations.
Changes in v2:
- None
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Thu, 13 Sep 2018 16:46:15 +0000 (10:46 -0600)]
drm/msm/dpu: Remove an unused enum
enum dpu_ad isn't used and can be safely removed.
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:27 +0000 (17:24 -0700)]
drm/msm/dpu: remove RM topology definition
RM maintained a redundant definition for display topology
to identify the no. of hw blocks needed for a display
and their hardware dependencies. This information can be
implicitly deduced from the msm_display_topology structure
available in RM reserve request. In addition to getting
rid of the redundant topology, this change also removes
the topology name enums and their usages.
changes in v4:
- remove the topology name enum entirely (Sean)
changes in v5:
- remove RM topology definition and their
references (Sean)
- Implement helper for dual mixer CRTC (Sean)
changes in v6:
- avoid heap memory for topology (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:26 +0000 (17:24 -0700)]
drm/msm/dpu: relax parameter validation in encoders
DPU, being over protective, validates every parameter of a
module. This change traces the call stack for some of encoder
functions affected by previous set of clean up patches and
cleans up unwanted validations.
changes in v5:
- Introduced in the series
changes in v6:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Sat, 8 Sep 2018 00:24:25 +0000 (17:24 -0700)]
drm/msm/dpu: remove RM dependency on connector state
Connector states were passed around RM to update the custom
topology connector property with chosen topology data. Now that
we got rid of both custom properties and topology names, this
change cleans up the mechanism to pass connector states across
RM helpers and encoder functions.
changes in v5:
- Introduced in the series
changes in v6:
- remove parameter checking in rm reserve (Jordan)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:25 +0000 (19:08 -0700)]
drm/msm/dpu: remove display H_TILE from encoder
Encoder H_TILE values are not used for allocating the hw blocks.
no. of hw_intf blocks provides the info.
changes in v4:
- remove irrelevant changes (Sean)
- retain log macros (Sean)
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:24 +0000 (19:08 -0700)]
drm/msm/dpu: remove LOCK/CLEAR support in RM
DPU had the support to LOCK the hw resources in
atomic check and CLEAR the locked resources explicitly
through custom property values. Now that DPU is
stripped off of all the custom properties, the RM
handlers for this feature will be no-op's. This change
gets rid of all its references.
changes in v5:
- Introduced in the series.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:23 +0000 (19:08 -0700)]
drm/msm/dpu: remove cdm block support from resource manager
Support for CDM block is not present in DPU. Remove CDM
handlers from resource manager.
changes in v4:
- Introduced in the series
changes in v5:
- Remove catalog references to CDM (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:22 +0000 (19:08 -0700)]
drm/msm/dpu: clean up destination scaler residue
Destination scaling(DS) is a Snapdragon hardware feature to
scale up the display ROI after layer blending. DPU driver doesn't
support programming of DS blocks yet. This change cleans up the
residual code present in catalog and RM for DS block handling.
Support for the same can be added back when the feature is
formally implemented.
changes in v5:
- introduced in the series
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:21 +0000 (19:08 -0700)]
drm/msm/dpu: rename hw_ctl to lm_ctl
Rename hw_ctl to lm_ctl to mean the ctl associated
with the hw layer mixer block.
sed -i 's/\([*@.>]\)hw_ctl\([^s]\)/\1lm_ctl\2/g' dpu_crtc.c dpu_crtc.h
changes in v4:
- Specifiy shell command used for renaming (Sean)
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:20 +0000 (19:08 -0700)]
drm/msm/dpu: move hw resource tracking to crtc state
Prep changes for state based resource management.
Moves all the hw block tracking for the crtc to the state
object.
changes in v4:
- Serialize crtc state access in debugfs handlers (Sean)
- Split the crtc width query as a separate change (Sean)
changes in v5:
- mode set lock all before crtc state access (Sean)
- remove unwanted memset for hw mixer cache (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:19 +0000 (19:08 -0700)]
drm/msm/dpu: make crtc get_mixer_width helper static
Mark CRTC get_mixer_width helper API static as it is
not used outside the file.
changes in v4:
- Patch introduced in the series
changes in v5:
- Simplify the inline function (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:18 +0000 (19:08 -0700)]
drm/msm/dpu: avoid querying for hw intf before assignment
Resource manager assigns hw_intf blocks for the encoder only on
modeset. If queried for hw_intf objects during init, it will be
NULL. Since hw_intf objects are needed only after encoder enable,
defer the query to encoder enable which will be triggered after
modeset.
changes in v4:
- Add details on commit text on why the change is needed (Sean)
changes in v5:
- Reword commit text on the usage of hw_intf objects (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:17 +0000 (19:08 -0700)]
drm/msm/dpu: iterate for assigned hw ctl in virtual encoder
In virtual encoder modeset, DPU makes RM request to assign hw blocks
for the display. It is also expected in modeset to iterate and
associate the physical encoders with their relevant hw blocks.
Ping pong blocks are already handled here but hw ctl blocks are not.
This change moves the hw_ctl iteration and mapping from physical
encoder to virtual encoder.
changes in v4:
- Fix hw_ctl initialization (Sean)
changes in v5:
- Update commit text with details on why the change is
needed (Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:16 +0000 (19:08 -0700)]
drm/msm/dpu: use kms stored hw mdp block
Avoid querying RM for hw mdp block. Use the one
stored in KMS during initialization.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:15 +0000 (19:08 -0700)]
drm/msm/dpu: enable master-slave encoders explicitly
Identify slave-master encoders during initialization and enable
the encoders explicitly as the current logic has redundant and
ambiguous loops.
changes in v4:
- identify master/slave encoder while adding
adding physical encoders(Sean)
changes in v5:
- get rid of temporary variable for phys enc(Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:14 +0000 (19:08 -0700)]
drm/msm/dpu: remove ping pong split topology variables
removes left out variables of previous ping pong
split topology cleanup.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:13 +0000 (19:08 -0700)]
drm/msm/dpu: remove resource pool manager
resource pool manager utility was introduced to manage
rotator sessions. Removing the support as the rotator
feature doesn't exist.
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:12 +0000 (19:08 -0700)]
drm/msm/dpu: remove scalar config definitions
cleans up left out scalar config definitions from headers
changes in v4:
- none
changes in v5:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:11 +0000 (19:08 -0700)]
drm/msm/dpu: squash power handle event types
DPU power handler maintained PRE/POST versions of power
ENABLE/DISABLE events to accommodate tasks which need be
handled before/after data bus voting. But since the bus voting
API's are deprecated and removed from the driver, squash
the events and their clients respective event handlers
to handle only ENABLE/DISABLE events.
changes in v5:
- introduced in the series
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
[seanpaul converted #defines to BIT(x) in dpu_power_handle.h]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Thu, 6 Sep 2018 02:08:10 +0000 (19:08 -0700)]
drm/msm/dpu: remove debugfs support for misr
MISR support is the debug feature present in Snapdragon chipsets.
At the layer mixer and interfaces, MISR algorithm can generate CRC
signatures of the pixel data which can be used for validating
the frames generated. Since there are no clients for this feature,
strip down the support from the driver.
changes in v4:
- changed introduced in the series
changes in v5:
- update commit text with the need for the change(Sean)
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jordan Crouse [Tue, 28 Aug 2018 21:23:04 +0000 (15:23 -0600)]
drm/msm/dpu: Remove dpu_mdss_isr when dpu_mdss_destroy is called
The MDSS device is created before the MSM driver attempts to bind the
sub components. If any of the components return -EPROBE_DEFER the MDSS
device is destroyed and tried again later.
If this happens the dpu_mdss_isr interrupt created from the DPU MDSS
is not freed when the MDSS device is destroyed and has a risk of
triggering later and hitting a fault by accessing a mmio region that
no longer exists. Even if the interrupt isn't triggered by
accident when the device attempts to reprobe it would error out
when it tries to re-register the interrupt so unconditionally removing
it in the destroy is the right move.
Switch the device managed dpu_mdss_isr to be unmanaged and add a
free_irq() in the mdss destroy function.
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Wed, 29 Aug 2018 17:49:47 +0000 (13:49 -0400)]
drm/msm: dpu: Allow planes to extend past active display
The atomic_check is a bit too aggressive with respect to planes which
leave the active area. This caused a bunch of log spew when the cursor
got to the edge of the screen and stopped it from going all the way.
This patch removes the conservative bounds checks from atomic and clips
the dst rect such that we properly display planes which go off the
screen.
Changes in v2:
- Apply the clip to src as well (taking into account scaling)
Changes in v3:
- Use drm_atomic_helper_check_plane_state() to clip src/dst
Cc: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:18 +0000 (16:02 -0700)]
drm/msm/dpu: use encoder type to identify display type
With patch [1], DPU is broken since it continues to use
incorrect connector_type to identify the display type. Update
DPU to use the encoder type to get the info.
[1] https://patchwork.kernel.org/patch/
10568269/
Acked-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:17 +0000 (16:02 -0700)]
drm/msm/dpu: remove unwanted encoder type mapping
This change gets rid of unwanted connector-encoder type
mapping used for dsi-staging driver. Now that DPU will
be using upstream DSI driver, remove the stale code.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Jeykumar Sankaran [Tue, 28 Aug 2018 23:02:16 +0000 (16:02 -0700)]
drm/msm/dpu: remove stale display port programming
Remove stale display port programming. It can be
added back with DPU support for display port.
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sravanthi Kollukuduru [Wed, 22 Aug 2018 17:49:57 +0000 (23:19 +0530)]
drm/msm/dpu: fix for cursor blend issue
The current driver has the opaque blend mode set as the
default causing the black box effect around the cursor.
The fix enables choosing a different blend mode for alpha
enabled formats.
Changes in V2:
- Use drm_get_format_name() in the logs (Sean)
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sravanthi Kollukuduru [Wed, 22 Aug 2018 17:49:56 +0000 (23:19 +0530)]
drm/msm/dpu: enable cursor plane on dpu
Reserve DMA pipe for cursor plane and attach it to the
crtc during the initialization.
Changes in V2:
None
Signed-off-by: Sravanthi Kollukuduru <skolluku@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Stephen Boyd [Thu, 16 Aug 2018 23:36:16 +0000 (16:36 -0700)]
drm/msm/disp/dpu: Use proper define for drm_encoder_init() 'encoder_type'
We got a bug report that this function oopses when trying to do a kasprintf().
PC is at string+0x2c/0x60
LR is at vsnprintf+0x28c/0x4ec
pc : [<
ffffff80088d35d8>] lr : [<
ffffff80088d5fc4>] pstate:
a0c00049
sp :
ffffff80095fb540
x29:
ffffff80095fb540 x28:
ffffff8008ad42bc
x27:
00000000ffffffd8 x26:
0000000000000000
x25:
ffffff8008c216c8 x24:
0000000000000000
x23:
0000000000000000 x22:
ffffff80095fb720
x21:
0000000000000000 x20:
ffffff80095fb720
x19:
ffffff80095fb6f0 x18:
000000000000000a
x17:
00000000b42ba473 x16:
ffffff800805bbe8
x15:
00000000000a157d x14:
000000000000000c
x13:
0000000000000000 x12:
0000ffff0000000f
x11:
0000000000000003 x10:
0000000000000001
x9 :
0000000000000040 x8 :
000000000000001c
x7 :
ffffffffffffffff x6 :
0000000000000000
x5 :
0000000000000228 x4 :
0000000000000000
x3 :
ffff0a00ffffff04 x2 :
0000000000007961
x1 :
0000000000000000 x0 :
0000000000000000
Process kworker/3:1 (pid: 61, stack limit = 0xffffff80095f8000)
Call trace:
Exception stack(0xffffff80095fb400 to 0xffffff80095fb540)
b400:
0000000000000000 0000000000000000 0000000000007961 ffff0a00ffffff04
b420:
0000000000000000 0000000000000228 0000000000000000 ffffffffffffffff
b440:
000000000000001c 0000000000000040 0000000000000001 0000000000000003
b460:
0000ffff0000000f 0000000000000000 000000000000000c 00000000000a157d
b480:
ffffff800805bbe8 00000000b42ba473 000000000000000a ffffff80095fb6f0
b4a0:
ffffff80095fb720 0000000000000000 ffffff80095fb720 0000000000000000
b4c0:
0000000000000000 ffffff8008c216c8 0000000000000000 00000000ffffffd8
b4e0:
ffffff8008ad42bc ffffff80095fb540 ffffff80088d5fc4 ffffff80095fb540
b500:
ffffff80088d35d8 00000000a0c00049 ffffff80095fb550 ffffff80080d06a4
b520:
ffffffffffffffff ffffff80088d5e0c ffffff80095fb540 ffffff80088d35d8
[<
ffffff80088d35d8>] string+0x2c/0x60
[<
ffffff80088d5fc4>] vsnprintf+0x28c/0x4ec
[<
ffffff80083973b8>] kvasprintf+0x68/0x100
[<
ffffff800839755c>] kasprintf+0x60/0x80
[<
ffffff800849cc24>] drm_encoder_init+0x134/0x164
[<
ffffff80084d9a7c>] dpu_encoder_init+0x60/0x94
[<
ffffff80084eced0>] _dpu_kms_drm_obj_init+0xa0/0x424
[<
ffffff80084ed870>] dpu_kms_hw_init+0x61c/0x6bc
[<
ffffff80084f7614>] msm_drm_bind+0x380/0x67c
[<
ffffff80085114e4>] try_to_bring_up_master+0x228/0x264
[<
ffffff80085116e8>] component_master_add_with_match+0x90/0xc0
[<
ffffff80084f722c>] msm_pdev_probe+0x260/0x2c8
[<
ffffff800851a910>] platform_drv_probe+0x58/0xa8
[<
ffffff80085185c8>] driver_probe_device+0x2d8/0x40c
[<
ffffff8008518928>] __device_attach_driver+0xd4/0x10c
[<
ffffff800851644c>] bus_for_each_drv+0xb4/0xd0
[<
ffffff8008518230>] __device_attach+0xd0/0x160
[<
ffffff8008518984>] device_initial_probe+0x24/0x30
[<
ffffff800851744c>] bus_probe_device+0x38/0x98
[<
ffffff8008517aac>] deferred_probe_work_func+0x144/0x148
[<
ffffff80080c8654>] process_one_work+0x218/0x3bc
[<
ffffff80080c883c>] process_scheduled_works+0x44/0x48
[<
ffffff80080c95bc>] worker_thread+0x288/0x32c
[<
ffffff80080cea30>] kthread+0x134/0x13c
[<
ffffff8008084750>] ret_from_fork+0x10/0x18
Code:
910003fd 2a0403e6 eb0400ff 54000060 (
38646845)
Looking at the code I see that drm_encoder_init() is called from the DPU
code with 'DRM_MODE_CONNECTOR_DSI' passed in as the 'encoder_type'
argument (follow from _dpu_kms_initialize_dsi()). That corresponds to
the integer 16. That is then indexed into drm_encoder_enum_list in
drm_encoder_init() to look up the name of the encoder. If you're still
following along, that's an encoder not a connector! We really want to
use DRM_MODE_ENCODER_DSI (integer 6) instead of DRM_MODE_CONNECTOR_DSI
here, or we'll go out of bounds of the encoder array. Pass the right
thing and everything is fine.
Cc: Jeykumar Sankaran <jsanka@codeaurora.org>
Cc: Jordan Crouse <jcrouse@codeaurora.org>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes:
25fdd5933e4c (drm/msm: Add SDM845 DPU support)
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:55 +0000 (11:26 -0400)]
drm/msm: Don't fail bind if nothing connected to dsi
If there is no bridge or panel connected to a dsi node, don't fail the
entire msm bind. Just ignore the dsi block and move on.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:54 +0000 (11:26 -0400)]
drm/msm: dsi: Return errors whan dt parsing fails
If dt parsing fails, we should return an error instead of pretending
everything completed successfully.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Sean Paul [Mon, 30 Jul 2018 15:26:53 +0000 (11:26 -0400)]
drm/msm: dsi: Initialize msm_dsi->id to -1
Currently msm_dsi->id is initialized to 0 during kzalloc. If bind fails
for a secondary dsi device before its id can be properly set (such as
during dt parsing), the id will point to the primary dsi device, causing
its reference to be removed from dsi_manager's global (msm_dsim_glb)
array.
This patch initializes the id to -1 and checks for negative in the
manager cleanup.
Cc: Doug Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
Dave Airlie [Thu, 27 Sep 2018 23:48:35 +0000 (09:48 +1000)]
Merge branch 'drm-next-4.20' of git://people.freedesktop.org/~agd5f/linux into drm-next
More new features and fixes for 4.20:
- Add dynamic powergating support for VCN on picasso
- Scheduler cleanup
- Vega20 support for KFD
- DC cleanups and bug fixes
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927184348.2696-1-alexander.deucher@amd.com
Dave Airlie [Thu, 27 Sep 2018 23:47:23 +0000 (09:47 +1000)]
Merge tag 'drm/tegra/for-4.20-rc1' of git://anongit.freedesktop.org/tegra/linux into drm-next
drm/tegra: Changes for v4.20-rc1
This contains initial Tegra194 support as well as a couple of fixes for
DMA/IOMMU integration.
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thierry Reding <thierry.reding@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927205051.30017-1-thierry.reding@gmail.com
Dave Airlie [Thu, 27 Sep 2018 23:37:51 +0000 (09:37 +1000)]
Merge tag 'drm-intel-next-2018-09-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Driver Changes:
- Bugzilla 107600: Fix stuttering video playback on MythTV on old hardware (Chris)
- Avoid black screen when using CSC coefficient matrix (Raviraj)
- Hammer PDs on Baytrail to make sure they reload (Chris)
- Capture some objects if unable to capture all, on error (Chris)
- Add W/A for 16 GB DIMMs on SKL+ (Mahesh)
- Only enable IPC for symmetric memory configurations on KBL+ (Mahesh)
- Assume pipe A to have maximum stride limits (Ville)
- Always update update OA contexts via context image (Tvrtko)
- Icelake enabling patches (Madhav, Dhinakaran)
- Add Icelake DMC firmware (Anusha)
- Fixes for CI found corner cases (Chris)
- Limit the backpressure for request allocation (Chris)
- Park GPU on module load so usage starts from known state (Chris)
- Flush tasklet when checking for idle (Chris)
- Use coherent write into the context image on BSW+ (Chris)
- Fix possible integer overflow for framebuffers that get aligned past 4GiB (Ville)
- Downgrade fence timeout from warn to notice and add debug hint (Chris)
- Fixes to multi function encoder code (Ville)
- Fix sprite plane check logic (Dan, Ville)
- PAGE_SIZE vs. I915_GTT_PAGE_SIZE fixes (Ville)
- Decode memory bandwidth and parameters for BXT and SKL+ (Mahesh)
- Overwrite BIOS set IPC value from KMS (Mahesh)
- Multiple pipe handling code cleanups/restructurings/optimizations (Ville)
- Spare low 4G address for non-48bit objects (Chris)
- Free context_setparam of struct_mutex (Chris)
- Delay updating ring register state on resume (Chris)
- Avoid unnecessarily copying overlay IOCTL parameters (Chris)
- Update GuC power domain states even without submission (Michal)
- Restore GuC preempt-context across S3/S4 (Chris)
- Add kernel selftest for rapid context switching (Chris)
- Keep runtime power management ref for live selftests (Chris)
- GEM code cleanups (Matt)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927095933.GA11458@jlahtine-desk.ger.corp.intel.com
Dave Airlie [Thu, 27 Sep 2018 23:31:03 +0000 (09:31 +1000)]
Merge tag 'drm-misc-next-2018-09-27' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 4.20:
UAPI Changes:
- None
Cross-subsystem Changes:
- MAINTAINERS: Move udl, mxsfb, and fsl-dcu into drm-misc (Stefan, Sean)
Core Changes:
- syncobj: Check condition before returning timeout in schedule() (Chris)
Driver Changes:
- various: First wave of drm_fbdev_generic_setup() conversions (Noralf)
- bochs/virtio: More format byte-order improvements (Gerd)
- mxsfb: A couple fixes + add runtime pm support (Leonard)
- virtio: Add vmap support for prime objects (Ezequiel)
Cc: Stefan Agner <stefan@agner.ch>
Cc: Sean Paul <sean@poorly.run>
Cc: Noralf Trønnes <noralf@tronnes.org>
Cc: Gerd Hoffman <kraxel@redhat.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Sean Paul <sean@poorly.run>
Link: https://patchwork.freedesktop.org/patch/msgid/20180927093950.GA180365@art_vandelay
Nayan Deshmukh [Tue, 25 Sep 2018 17:09:02 +0000 (02:09 +0900)]
drm/scheduler: remove timeout work_struct from drm_sched_job (v3)
having a delayed work item per job is redundant as we only need one
per scheduler to track the time out the currently executing job.
v2: the first element of the ring mirror list is the currently
executing job so we don't need a additional variable for it
v3: squash in fixes for v3d and etnaviv
Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nathan Chancellor [Fri, 21 Sep 2018 21:01:06 +0000 (14:01 -0700)]
drm/amd/powerplay: Change id parameter type in pp_atomfwctrl_get_clk_information_by_clkid
Clang generates warnings when one enumerated type is implicitly
converted to another.
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomfwctrl.c:532:57:
warning: implicit conversion from enumeration type 'enum
atom_smu11_syspll0_clock_id' to different enumeration type 'BIOS_CLKID'
(aka 'enum atom_smu9_syspll0_clock_id') [-Wenum-conversion]
if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr,
SMU11_SYSPLL0_SOCCLK_ID, &frequency))
In this case, that is expected behavior. To make that clear to Clang
without explicitly casting these values, change id's type to uint8_t
in pp_atomfwctrl_get_clk_information_by_clkid so no conversion happens.
Reported-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Mon, 18 Jun 2018 18:47:21 +0000 (14:47 -0400)]
drm/amdkfd: Remove the requirement for atomic Ops on vg20
Firmware have the workaround to replace the atomic Ops with read-modify-write on CP side.
User should not expect atomic Ops on system memory works normally if system didn't not
support it.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-By: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jernej Skrabec [Mon, 25 Jun 2018 12:02:53 +0000 (14:02 +0200)]
dt-bindings: display: sun4i-drm: Add R40 mixer compatibles
R40 DE2 mixers are similar to those found in A83T, except it needs
different clock settings.
Add a compatibles for them.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180625120304.7543-14-jernej.skrabec@siol.net
Chen-Yu Tsai [Fri, 21 Sep 2018 14:27:43 +0000 (22:27 +0800)]
Revert "drm/sun4i: Remove R40 display pipeline compatibles"
This reverts commit
3510e7a7f91088159bfc67e8abdc9f9e77d28870.
During the 4.19 merge window for drm-misc, two patches critical to
supporting the display pipeline on the Allwinner R40 SoC were missed.
They were applied later but missed the merge window deadline. As a
result 4.19-rc1 kernel would crash on the R40 when it couldn't parse
the new device tree structure. We ended up removing support for the
R40 display pipeline for 4.19.
Since the missing patches are already merged for 4.20, we can now
revert the commit that removed support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180921142743.8711-1-wens@csie.org
Sean Paul [Thu, 27 Sep 2018 06:54:54 +0000 (02:54 -0400)]
Merge drm/drm-next into drm-misc-next
Backmerging 4.19-rc5 to pick up sun4i fix
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Alex Deucher [Wed, 26 Sep 2018 16:24:25 +0000 (11:24 -0500)]
drm/amdgpu/vcn: whitespace cleanup
Fix some indentation issues.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Wed, 26 Sep 2018 16:18:47 +0000 (11:18 -0500)]
drm/amdgpu/soc15: fix warnings in register macro
expects argument of type ‘unsigned int’ has type ‘long int’
Fixes:
52e211c1f04 ("drm/amdgpu:Add error message when register failed to reach expected value")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Fri, 21 Sep 2018 18:47:45 +0000 (14:47 -0400)]
drm/amdgpu:Enable DPG mode on PCO
Add flag AMD_PG_SUPPORT_DPG to enable DPG mode on Picasso
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Fri, 21 Sep 2018 18:43:18 +0000 (14:43 -0400)]
drm/amdgpu:Add DPG pause mode support
Add functions to support VCN DPG pause mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 22:15:11 +0000 (18:15 -0400)]
drm/amdgpu:Add DPG pause state
Add DPG pause state to support VCN DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Fri, 21 Sep 2018 18:35:32 +0000 (14:35 -0400)]
drm/amdgpu:Add DPG mode support for vcn 1.0
Add DPG mode start/stop/mc_resume/clock_gating to
support vcn 1.0 DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 20:00:36 +0000 (16:00 -0400)]
drm/amdgpu:Add DPG mode read/write macro
Some registers read/write needs program through SDRAM pool under
DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 19:23:40 +0000 (15:23 -0400)]
drm/amdgpu:Add DPG support flag
Add DPG support flag for VCN DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 18:58:16 +0000 (14:58 -0400)]
drm/amdgpu:Add new register offset/mask to support VCN DPG mode
New register offset/mask need to be added to support VCN DPG mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Mon, 10 Sep 2018 18:06:08 +0000 (14:06 -0400)]
drm/amdgpu:Use register UVD_SCRATCH9 for VCN ring/ib test
Use register UVD_SCRATCH9 for VCN ring/ib test. Since those registers
can't be directly accessed under DPG(Dynamic Power Gate) mode.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 17 Sep 2018 13:29:28 +0000 (15:29 +0200)]
drm/amdgpu: move more defines into amdgpu_irq.h
Everything that isn't related to the IH ring.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 17 Sep 2018 13:18:37 +0000 (15:18 +0200)]
drm/amdgpu: move more interrupt processing into amdgpu_irq.c
Add a callback to amdgpu_ih_process to remove most of the IV logic.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Tue, 25 Sep 2018 14:24:16 +0000 (10:24 -0400)]
drm/amdgpu: Move fence SW fallback warning v3
Only print the warning if there was actually some fence processed
from the SW fallback timer.
v2: Add return value to amdgpu_fence_process to let
amdgpu_fence_fallback know fences were actually
processed and then print the warning.
v3: Always return true if seq != last_seq
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Sun, 16 Sep 2018 18:13:21 +0000 (20:13 +0200)]
drm/amdgpu: cleanup amdgpu_ih.c
Cleanup amdgpu_ih.c to be able to handle multiple interrupt rings.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 17 Sep 2018 13:41:45 +0000 (15:41 +0200)]
drm/amdgpu: make function pointers mandatory
We always want those to be setup correctly.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 20 Sep 2018 11:26:18 +0000 (13:26 +0200)]
drm/amdgpu: drop extra newline in amdgpu_iv trace
That is superflous here.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Huang Rui [Fri, 21 Sep 2018 10:15:01 +0000 (18:15 +0800)]
drm/amdgpu: fix the page fault of raven2
While the apg_end address is 0xffffffff, if add 1 with it, the value will be
overflow and roll back to 0. So when 0 is written to
mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, the system aperture is actually disabled. And
so any access to vram will trigger a page fault.
Raven2's HW issue only need increase the vram end address, and needn't do it on
the agp.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 20 Sep 2018 08:47:06 +0000 (16:47 +0800)]
drm/amd/pp: Disable dpm features on smu7/8 when suspend
Need to disable dpm features before halt rlc.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Thu, 20 Sep 2018 09:06:22 +0000 (17:06 +0800)]
drm/amdgpu: Remove redundant code in gfx_v8_0.c
the CG related registers have been programed in golden setting
PG register default value is 0.
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 11 Sep 2018 02:33:38 +0000 (10:33 +0800)]
drm/amdgpu: Halt rlc/cp in rlc_safe_mode
before halt rlc/cp, need to
1. enter rlc safe mode
2. wait rlc/cp idle
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Hang Zhou <hang.zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 28 Aug 2018 10:20:19 +0000 (18:20 +0800)]
drm/amdgpu: Refine function name
change function name gfx_v6/7/8/9_0_gpu_init to
gfx_v6/7/8/9_0_constants_init.
this function is just for init gfx constants such
as max pipes, render backends...
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Mon, 24 Sep 2018 12:10:22 +0000 (14:10 +0200)]
drm/amdgpu: Deactivate SW interrupt fallback in amdgpu_fence_process v2
Deactivate SW interrupt fallback when all emited fences are completed.
Also switch interrupt SW fallback message from INFO to WARN.
v2: shorten the warning message a bit and only re-activate the timer during
processing if it was already activated before. (Christian)
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Suggested-by: Christian Konig <Christian.Koenig@amd.com>
Reviewed-and-Tested-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Tue, 31 Oct 2017 17:32:53 +0000 (13:32 -0400)]
drm/amdkfd: Vega20 bring up on amdkfd side
Add Vega20 device IDs, device info and enable it in KFD.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Shaoyun Liu [Tue, 6 Feb 2018 20:37:53 +0000 (15:37 -0500)]
drm/amdgpu: Add vega20 support on kfd probe
Add Vega20 support in amdgpu_amdkfd_device_probe.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Shaoyun Liu [Tue, 13 Mar 2018 21:44:09 +0000 (17:44 -0400)]
drm/amd: Interface change to support 64 bit page_table_base
amdgpu_gpuvm_get_process_page_dir should return the page table address
in the format expected by the pm4_map_process packet for all ASIC
generations.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Fri, 9 Feb 2018 21:29:14 +0000 (16:29 -0500)]
drm/amdkfd: Make the number of SDMA queues variable
Vega20 supports 8 SDMA queues per engine
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Thu, 9 Aug 2018 07:05:31 +0000 (15:05 +0800)]
drm/amdgpu/sriov: Correct the setting about sdma doorbell offset of Vega10
Correct the format
For vega10 sriov, the sdma doorbell must be fixed as follow to keep the
same setting with host driver, or it will happen conflicts.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shaoyun Liu [Fri, 23 Mar 2018 21:20:41 +0000 (16:20 -0500)]
drm/amdgpu: Doorbell assignment for 8 sdma user queue per engine
Change doorbell assignments to allow routing doorbells for 8 user
mode SDMA queues per engine.
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Fri, 24 Aug 2018 22:24:53 +0000 (18:24 -0400)]
drm/amdgpu: remove unnecessary forward declaration
struct vi_sdma_mqd is defined in vi_structs.h.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jay Cornwall [Tue, 2 May 2017 22:39:37 +0000 (17:39 -0500)]
drm/amdkfd: Add wavefront context save state retrieval ioctl
Wavefront context save data is of interest to userspace clients for
debugging static wavefront state. The MQD contains two parameters
required to parse the control stack and the control stack itself
is kept in the MQD from gfx9 onwards.
Add an ioctl to fetch the context save area and control stack offsets
and to copy the control stack to a userspace address if it is kept in
the MQD.
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Tue, 21 Aug 2018 00:15:00 +0000 (20:15 -0400)]
drm/amdkfd: Report SDMA firmware version in the topology
Also save the version in struct kfd_dev so we only need to query
it once.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harish Kasiviswanathan [Thu, 22 Jun 2017 20:40:28 +0000 (16:40 -0400)]
drm/amdgpu: Enable BAD_OPCODE intr for gfx8
This enables KFD_EVENT_TYPE_HW_EXCEPTION notifications to user mode in
response to bad opcodes in a CP queue.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Thu, 14 Dec 2017 01:31:01 +0000 (09:31 +0800)]
drm/amdkfd: KFD doesn't support TONGA SRIOV
KFD module doesn't support TONGA SRIOV, if init KFD module in TONGA SRIOV
environment, it will let compute ring IB test fail.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Huang [Mon, 4 Jun 2018 19:22:24 +0000 (15:22 -0400)]
drm/amdkfd: reflect atomic support in IO link properties
Add the flags of properties according to Asic type and pcie
capabilities.
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 21 Sep 2018 19:41:52 +0000 (15:41 -0400)]
drm/amdgpu: Add warning message for INT SW fallback.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrey Grodzovsky [Fri, 21 Sep 2018 18:48:50 +0000 (14:48 -0400)]
Revert "drm/amdgpu: remove fence fallback"
This reverts commit
9b0df0937a852d299fbe42a5939c9a8a4cc83c55.
This commit breaks KCQ IB test and S3 on Polaris 11.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
James Zhu [Thu, 13 Sep 2018 20:55:44 +0000 (16:55 -0400)]
drm/amdgpu:No action when VCN PG state is unchanged
When VCN PG state is unchanged, it is unnecessary to reset power
gate state
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
zhong jiang [Fri, 21 Sep 2018 13:12:11 +0000 (21:12 +0800)]
drm/amd/display: remove redundant null pointer check before kfree
kfree has taken the null pointer into account. hence it is safe
to remove the redundant null pointer check before kfree.
Signed-off-by: zhong jiang <zhongjiang@huawei.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 21 Sep 2018 03:50:07 +0000 (22:50 -0500)]
drm/amdgpu: print smc feature mask in debugfs amdgpu_pm_info
Print the enabled smc feature mask in amdgpu_pm_info for debugging.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 21 Sep 2018 03:36:38 +0000 (22:36 -0500)]
drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega20
So we can query what features are enabled for debugging.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 21 Sep 2018 03:36:23 +0000 (22:36 -0500)]
drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega12
So we can query what features are enabled for debugging.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 21 Sep 2018 03:34:42 +0000 (22:34 -0500)]
drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega10
So we can query what features are enabled for debugging.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 21 Sep 2018 03:16:45 +0000 (22:16 -0500)]
drm/amdgpu: add new AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK sensor
For getting the 64 bit enabled smc feature mask from vega parts.
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>