Sonic Zhang [Mon, 9 Dec 2013 04:19:38 +0000 (12:19 +0800)]
blackfin: fix build error by adding CONFIG_BFIN_SERIAL
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Prabhakar Kushwaha [Wed, 11 Dec 2013 07:19:13 +0000 (12:49 +0530)]
powerpc/mpc85xx: Update CONFIG_SYS_FSL_TBCLK_DIV for T1040
The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16.
So, update its value as default.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Claudiu Manoil [Tue, 10 Dec 2013 09:22:22 +0000 (11:22 +0200)]
powerpc/p1_p2_rdb_pc: Fix warnings for __iomem pointers
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers with
__iomem pointers for tsec.
p1_p2_rdb_pc.c:373:24: warning: incorrect type in assignment (different
address spaces)
p1_p2_rdb_pc.c:373:24: expected struct tsec_mii_mng [noderef]
<asn:2>*regs
p1_p2_rdb_pc.c:373:24: got struct tsec_mii_mng *<noident>
Use TSEC_GET_MDIO_REGS_BASE() for the remaining mdio 'regs'
initializations to remove the __iomem warnings and for consistency.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Mon, 2 Dec 2013 02:23:11 +0000 (10:23 +0800)]
net/fman: add ft_fixup_xgec to support 3rd and 4th 10GEC
As mEMAC1 and mEMAC2 are dual-role MACs, which are used as 1G or 10G MAC.
So we update dynamically 'cell-index' to '2' and '3' for 10GEC3 and 10GEC4.
Also change 'fsl,fman-port-1g-rx' to 'fsl,fman-port-10g-rx', ditto for Tx.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Shaohui Xie [Thu, 28 Nov 2013 05:52:51 +0000 (13:52 +0800)]
powerpc/t4240: Add a frequency setting case for fman1
A new valid setting case added for fman1, it uses platform frequency.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Tom Rini [Tue, 10 Dec 2013 22:15:18 +0000 (17:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
board/samsung/trats2/trats2.c
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
Albert ARIBAUD [Tue, 10 Dec 2013 13:31:56 +0000 (14:31 +0100)]
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
Tom Rini [Tue, 10 Dec 2013 14:36:23 +0000 (09:36 -0500)]
Merge branch 'spi' of git://git.denx.de/u-boot-x86
Tom Rini [Tue, 10 Dec 2013 14:33:13 +0000 (09:33 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 10 Dec 2013 14:29:45 +0000 (09:29 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Ian Campbell [Sun, 17 Nov 2013 15:17:42 +0000 (15:17 +0000)]
vexpress: use correct timer address on extended memory map systems
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Cc: albert.u.boot@aribaud.net
Soren Brinkmann [Wed, 30 Oct 2013 14:49:32 +0000 (15:49 +0100)]
serial: zynq: Remove unused #defines
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mike Frysinger [Tue, 3 Dec 2013 23:43:28 +0000 (16:43 -0700)]
sandbox: spi: Enable new spi/sf layers
We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.
This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Mike Frysinger [Tue, 3 Dec 2013 23:43:27 +0000 (16:43 -0700)]
sandbox: spi: Add new SPI flash driver
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write. Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.
sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Mike Frysinger [Tue, 3 Dec 2013 23:43:26 +0000 (16:43 -0700)]
sandbox: spi: Add SPI emulation bus
This adds a SPI framework for people to hook up simulated SPI clients.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 3 Dec 2013 23:43:25 +0000 (16:43 -0700)]
spi: Add device tree binding for SPI bus
This was obtained from Linux 3.12 commit
5e01dc7b26.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 3 Dec 2013 23:43:24 +0000 (16:43 -0700)]
spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT node
This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 3 Dec 2013 23:43:23 +0000 (16:43 -0700)]
sandbox: Rename sb_cmdline_option to sandbox_cmdline_option
The new name is longer but more clearly related to sandbox.
This is in a separate patch within the same series since some comments on the
SPI series rely on it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
Mateusz Kulikowski [Mon, 2 Dec 2013 22:30:58 +0000 (23:30 +0100)]
arm: at91: support for the Calao USB-A9263 board (based on AT91SAM9263)
Add support for USB-A9263 board manufactured by Calao Systems
(http://www.calao-systems.com/).
Code is based on old U-Boot sources (2010.09) released by Calao.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Heiko Schocher [Mon, 2 Dec 2013 06:47:23 +0000 (07:47 +0100)]
arm, at91: add siemens corvus board
enable support for the siemens AT91SAM9G20 based board corvus.
Signed-off-by: Boris Schmidt <boris.schmidt@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Heiko Schocher [Mon, 2 Dec 2013 06:47:22 +0000 (07:47 +0100)]
arm, at91: add Siemens board taurus and axm
enable support for the siemens AT91SAM9G20 based boards taurus
and axm.
Signed-off-by: Roger Meier <r.meier@siemens.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Fri, 29 Nov 2013 11:13:46 +0000 (12:13 +0100)]
at91: switch coloured LED to gpio API
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Fri, 29 Nov 2013 11:13:45 +0000 (12:13 +0100)]
at91: nand: switch atmel_nand to generic GPIO API
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik)<esw@bus-elektronik.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Andreas Bießmann [Fri, 29 Nov 2013 11:13:44 +0000 (12:13 +0100)]
at91: redefine legacy GPIO PIN_BASE
In order to get the very same value for legacy pin definitions and new gpio
definitions set the legacy PIN_BASE to 0.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Andreas Bießmann [Fri, 29 Nov 2013 11:13:43 +0000 (12:13 +0100)]
at91: add new gpio pin definitions
This patch define new names for GPIO pins on at91 devices. Follow up patches
will convert the whole infrastructure to use these new definitions.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Kuo-Jung Su [Mon, 25 Nov 2013 02:51:41 +0000 (10:51 +0800)]
mmc: add Faraday FTSDC021 SDHCI controller support
Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.
However this driver is only verified with SD memory cards.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>
Priyanka Jain [Thu, 28 Nov 2013 04:42:16 +0000 (10:12 +0530)]
powerpc: mmc: Add corenet devices support in esdhc spl
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Alexey Brodkin [Wed, 27 Nov 2013 13:00:52 +0000 (17:00 +0400)]
mmc/dwmmc: modify FIFO threshold only if value explicitly set
If platform provides "host->fifoth_val" it will be used for
initialization of DWMCI_FIFOTH register. Otherwise default value will be
used.
This implementation allows:
* escape unclear and recursive calculations that are currently in use
* use whatever custom value for DWMCI_FIFOTH initialization if any
particular SoC requires it
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Alim Akhtar <alim.akhtar@samsung.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Amar <amarendra.xt@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Jaehoon Chung [Fri, 29 Nov 2013 11:08:57 +0000 (20:08 +0900)]
mmc: dw_mmc: remove the exynos specific code in dw-mmc.c
dw-mmc.c is the general driver file.
So, remove the exynos specific code at dw-mmc.c.
Instead, exynos specific cod can be move into exynos-dw_mmc.c.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Albert ARIBAUD [Thu, 7 Nov 2013 13:21:46 +0000 (14:21 +0100)]
arm: keep all sections in ELF file
Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Masahiro Yamada [Mon, 7 Oct 2013 02:46:56 +0000 (11:46 +0900)]
ARM: align MVBAR on 32 byte boundary
The lower 5 bit of MVBAR is UNK/SBZP.
So, Monitor Vector Base Address must be 32-byte aligned.
On the other hand, the secure monitor handler does not need
32-byte alignment.
This commit moves ".algin 5" directive to the correct place.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Andre Przywara <andre.przywara@linaro.org>
Albert ARIBAUD [Fri, 6 Dec 2013 15:54:42 +0000 (16:54 +0100)]
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Albert ARIBAUD [Fri, 6 Dec 2013 13:26:51 +0000 (14:26 +0100)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Tom Rini [Fri, 6 Dec 2013 12:19:09 +0000 (07:19 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Tom Rini [Tue, 6 Dec 2011 15:49:41 +0000 (08:49 -0700)]
AM3517 EVM: Enable ethernet
Signed-off-by: Tom Rini <trini@ti.com>
Roger Quadros [Mon, 2 Dec 2013 13:47:45 +0000 (15:47 +0200)]
omap4_panda: Don't use ulpi_reset
Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"
It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 2 Dec 2013 13:47:44 +0000 (15:47 +0200)]
omap3_beagle: Don't use ulpi_reset
Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"
It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 2 Dec 2013 13:47:43 +0000 (15:47 +0200)]
usb: ehci-omap: Reset the USB Host OMAP module
In commit bb1f327 we removed the UHH reset to fix NFS root (over usb
ethernet) problems with Beagleboard (3530 ES1.0). However, this
seems to cause USB detection problems for Pandaboard, about (3/8).
On further investigation, it seems that doing the UHH reset is not
the cause of the original Beagleboard problem, but in the way the reset
was done.
This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based
on the UHH_REVISION register. This should fix the Beagleboard NFS
problem as well as the Pandaboard USB detection problem.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Michael Trimarchi [Sat, 30 Nov 2013 06:59:58 +0000 (07:59 +0100)]
arm: omap3: Enable clocks for peripherals only if they are used
This patch change the per_clocks_enable() function used in OMAP3
code to enable peripherals clocks. Only required clock should be
activated. So if the board use the uart(x) as a console we need
to activate it. The Board's config should include define to enable
every subsystem that the board use. For a complete list
of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
should be checked.
Right now the bootloader can enable and disable clocks for:
uart(x) using CONFIG_SYS_NS16550
gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.
Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
are not supported by any define.
Their activation need to included in the per_clocks_enable if the
peripheral is included. Not booting board should enable the peripheral
clock connected to their driver
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Minkyu Kang [Fri, 6 Dec 2013 10:18:13 +0000 (19:18 +0900)]
arm: arndale: disable spi boot
arndale board is booted from mmc
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Inderpal Singh <inderpal.singh@linaro.org>
Minkyu Kang [Fri, 6 Dec 2013 10:04:03 +0000 (19:04 +0900)]
arm: exynos: adds ifdef for spi boot
This patch fix following errors and warnings
spl_boot.c: In function 'exynos_spi_copy':
spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function)
spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in
spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function)
spl_boot.c: In function 'copy_uboot_to_ram':
spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable]
spl_boot.c: At top level:
spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function]
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Albert ARIBAUD [Fri, 6 Dec 2013 09:41:49 +0000 (10:41 +0100)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Masahiro Yamada [Fri, 29 Nov 2013 06:34:16 +0000 (15:34 +0900)]
blackfin: Do not generate unused header bootrom-asm-offsets.h
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Axel Lin [Mon, 2 Dec 2013 04:57:44 +0000 (12:57 +0800)]
spi: bfin_spi6xx: Remove unnecessary test for bus and pins[bus]
For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Axel Lin [Mon, 2 Dec 2013 04:57:33 +0000 (12:57 +0800)]
spi: bfin_spi: Remove unnecessary test for bus and pins[bus]
For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Mon, 18 Nov 2013 10:59:18 +0000 (18:59 +0800)]
blackfin: soft-i2c: No need to define blackfin specific soft i2c operations
Use default GPIO operations.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Acked-by: Heiko Schocher <hs@denx.de>
Sonic Zhang [Mon, 18 Nov 2013 06:50:19 +0000 (14:50 +0800)]
blackfin: Add missing macro CONFIG_BFIN_SERIAL
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Mon, 18 Nov 2013 06:12:39 +0000 (14:12 +0800)]
blackfin: If none ADI_GPIOX macro is defined, use ADI_GPIO1 as default
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Mon, 18 Nov 2013 06:01:38 +0000 (14:01 +0800)]
blackfin: Use ADI_GPIO2 driver other than the default ADI_GPIO1
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Naveen Krishna Ch [Fri, 6 Dec 2013 06:42:38 +0000 (12:12 +0530)]
i2c: samsung: register i2c busses for Exynso5420 and Exynos5250
This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Nikita Kiryanov [Thu, 28 Nov 2013 16:04:42 +0000 (18:04 +0200)]
arm: omap: i2c: don't zero cnt in i2c_write
Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:
Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.
The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.
Therefore, remove all writes that zero the cnt register.
Cc: Heiko Schocher <hs@denx.de>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lubomir Popov <lpopov@mm-sol.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:59 +0000 (16:02 +0800)]
cmd_eeprom: bug fix for i2c read/write
The local pointer of address (i.e., addr) only gets
referenced under SPI mode, and it won't be appropriate
to pass only 1-byte addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 1.
1. In U-boot's I2C model, the address would be re-assembled
to a byte string in MSB order inside I2C controller drivers.
2. The 'CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW' option which could
be found at soft_i2c.c is always turned on in cmd_eeprom.c,
the addr[0] always contains the device address with overflowed
MSB address bits.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:58 +0000 (16:02 +0800)]
i2c: fti2c010: serial out r/w address in MSB order
For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:57 +0000 (16:02 +0800)]
i2c: fti2c010: migrate to new i2c model
Replace the legacy i2c model with the new one.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
Kuo-Jung Su [Mon, 2 Dec 2013 08:02:56 +0000 (16:02 +0800)]
i2c: fti2c010: cosmetic: coding style cleanup
Coding style cleanup
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
Piotr Wilczek [Wed, 20 Nov 2013 09:43:50 +0000 (10:43 +0100)]
driver:i2c:s3c24x0: fix clock init for hsi2c
Fix clock value initialisation for Exynos other than Exynos5 for hsi2c.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Piotr Wilczek [Wed, 20 Nov 2013 09:43:49 +0000 (10:43 +0100)]
driver:i2c:s3c24x0: adapt driver to new i2c
This patch adapts the s3c24x0 driver to the new i2c framework.
Config file is modified for all the boards that use the driver.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Heiko Schocher <hs@denx.de>
CC: Inderpal Singh <inderpal.singh@linaro.org>
CC: David Müller <d.mueller@elsoft.ch>
CC: Chander Kashyap <k.chander@samsung.com>
CC: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Jaehoon Chung [Tue, 3 Dec 2013 05:00:21 +0000 (14:00 +0900)]
arm: exynos: remove the unused define.
These defines didn't use anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Jaehoon Chung [Tue, 3 Dec 2013 05:01:06 +0000 (14:01 +0900)]
arm: exynos/goni: fix the return type for s5p_mmc_init
The "int" type is right.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
York Sun [Tue, 3 Dec 2013 21:16:59 +0000 (13:16 -0800)]
powerpc/mpc8349: Use generic mpc85xx DDR driver
MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.
Signed-off-by: York Sun <yorksun@freescale.com>
Shengzhou Liu [Wed, 4 Dec 2013 06:21:05 +0000 (14:21 +0800)]
powerpc/t2080qds: undef CONFIG_FSL_DDR_INTERACTIVE
Usually CONFIG_FSL_DDR_INTERACTIVE feature is used for debug.
we would not enable this by default to save the limited space of u-boot.
This avoid following compiling error:
section .bootpg loaded at [
00000000effff000,
00000000effff577] overlap ssection
.data loaded at [
00000000efff31b8,
00000000f00010c7]
u-boot: section .bootpg lma 0xeffff000 adjusted to 0xf00010c8
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Zang Roy-R61911 [Thu, 28 Nov 2013 05:23:37 +0000 (13:23 +0800)]
T4240: Address T4240/T4160 Rev2.0 DDR clock change
MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0.
It's 12 in Rev1.0, for Rev2.0 it uses 6.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Priyanka Jain [Thu, 28 Nov 2013 04:38:12 +0000 (10:08 +0530)]
powerpc: spiflash:Add corenet devices support in eSPI SPL
Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Po Liu [Tue, 26 Nov 2013 06:34:07 +0000 (14:34 +0800)]
powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROM
Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Zhao Qiang [Tue, 26 Nov 2013 05:59:15 +0000 (13:59 +0800)]
powerpc/p1010rdb:modify the mtest start_address
In new board P1010RDB-PB, the interrupt vector table is at
the start of memory. So if the start_address needs to be set
a proper value.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Dave Liu [Thu, 28 Nov 2013 06:58:08 +0000 (14:58 +0800)]
powerpc/corenet: CPC1 speculation disable
In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable
CPC1 speculation and keep it till relocation. Otherwise, speculation
transactions will go to DDR controller, it will cause problem.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Vladimir Koutny [Thu, 28 Nov 2013 09:38:40 +0000 (10:38 +0100)]
am335x: cpsw: optimize cpsw_recv to increase network performance
In
48ec5291, only TX path was optimized; this does the same also for RX
path. This results in huge increase of TFTP throughput on custom am3352
board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer
timeouts.
Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
Hardik Patel [Wed, 27 Nov 2013 15:46:21 +0000 (21:16 +0530)]
pandaboard: 1/1] ARM:OMAP4+: panda-es: Support Rev B3 Elpida DDR2 RAM
Signed-off-by: Hardik Patel <hardik.patel@volansystech.com>
Viktar Palstsiuk [Tue, 26 Nov 2013 11:30:26 +0000 (14:30 +0300)]
davinci: fix Master Priority Registers location
MSTPRI0 (Master Priority 0 Register) sits at 0x01C14110 not at
0x01C14114
Signed-off-by: Viktar Palstsiuk <viktar.palstsiuk@promwad.com>
Stefan Roese [Fri, 22 Nov 2013 11:56:29 +0000 (12:56 +0100)]
arm: am335x: Add DT (FDT) support to Siemens boards
Enable FDT support for all Siemens AM335x boards. To support
newer Linux kernels with DT booting.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Heiko Schocher<hs@denx.de>
Tom Rini [Mon, 18 Nov 2013 15:36:23 +0000 (10:36 -0500)]
am335x_evm: Update nandboot to use partitions and DT
Signed-off-by: Tom Rini <trini@ti.com>
Michael Trimarchi [Mon, 18 Nov 2013 14:06:21 +0000 (15:06 +0100)]
arm: omap3: Add uart4 omap3 adddress
This patch add the OMAP34XX_UART4 memory address
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Lokesh Vutla [Thu, 14 Nov 2013 06:01:51 +0000 (11:31 +0530)]
ARM: OMAP5+: Remove unnecessary EFUSE settings
Certain EFUSE settings were recommended for the first
four lots of OMAP5 ES1.0 silicon. These are not applicable
for OMAP5 ES2.0 and DRA7 silicon. So removing these EFUSE settings.
Reported-by: Griffis, Brad <bgriffis@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:44 +0000 (16:56 +0200)]
ARM: dra7_evm: Add SATA support
The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:43 +0000 (16:56 +0200)]
ARM: DRA7xx: Add PRCM and Control information for SATA
Adds the necessary PRCM and Control register information for
SATA on DRA7xx.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:42 +0000 (16:56 +0200)]
ARM: omap5_uevm: Add SATA support
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:41 +0000 (16:56 +0200)]
ARM: OMAP5: Add SATA platform glue
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:40 +0000 (16:56 +0200)]
ARM: OMAP5: Add PRCM and Control information for SATA
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:39 +0000 (16:56 +0200)]
ARM: OMAP5: Add Pipe3 PHY driver
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:38 +0000 (16:56 +0200)]
ahci: Fix cache align error messages
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Aneesh V <aneesh@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Roger Quadros [Mon, 11 Nov 2013 14:56:37 +0000 (16:56 +0200)]
ahci: Error out with message on malloc() failure
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
SRICHARAN R [Fri, 8 Nov 2013 12:10:38 +0000 (17:40 +0530)]
ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039
When core power domain hits oswr, then DDR3 memories does not come back
while resuming. This is because when EMIF registers are lost, then the
controller takes care of copying the values from the shadow registers.
If the shadow registers are not updated with the right values, then this
results in incorrect settings while resuming. So updating the shadow registers
with the corresponding status registers here during the boot.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
SRICHARAN R [Fri, 8 Nov 2013 12:10:37 +0000 (17:40 +0530)]
ARM: DRA: EMIF: Change DDR3 settings to use hw leveling
Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
software leveling. This was done since hardware leveling was not
working. Now that the right sequence to do hw leveling is identified,
use it. This is required for EMIF clockdomain to idle and come back
during lowpower usecases.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
SRICHARAN R [Fri, 8 Nov 2013 12:10:36 +0000 (17:40 +0530)]
ARM: DRA7: Add is_dra7xx cpu check definition
A generic is_dra7xx cpu check is useful for grouping
all the revisions under that. This is used in the
subsequent patches.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Tom Rini [Thu, 7 Nov 2013 16:42:57 +0000 (11:42 -0500)]
am33xx: Stop modifying certain EMIF4D registers
Based on the definitive guide to EMIF configuration[1] certain registers
that we have been modifying (and are documented registers) should be
left in their reset values rather than modified. This has been tested
on AM335x GP EVM and Beaglebone White.
[1]: http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Javier Martinez Canillas <javier@dowhile0.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Lars Poeschel <poeschel@lemonage.de>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-by: Matt Porter <matt.porter@linaro.org>
Oleg Kosheliev [Tue, 8 Oct 2013 12:49:56 +0000 (15:49 +0300)]
ARMV7: OMAP4: Add twl6032 support
Added chip type detection and twl6032
support in the battery control
and charge functions.
Based on Balaji T K <balajitk@ti.com> patches for TI u-boot.
Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
Oleg Kosheliev [Tue, 8 Oct 2013 12:49:55 +0000 (15:49 +0300)]
ARMV7: OMAP4: Add struct for twl603x data
The data struct is used to support different
PMIC chip types. It contains the chip type and
the data (e.g. registers addresses, adc multiplier)
which is different for twl6030 and twl6032.
Replaced some hardcoded values with the
structure vars.
Based on Balaji T K <balajitk@ti.com> patches for TI u-boot.
Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
Lubomir Popov [Wed, 20 Nov 2013 13:32:17 +0000 (15:32 +0200)]
ARM: OMAP4: Fix bug in omap4470_volts struct
The struct incorrectly referenced SMPS1 for all three power
domains. Fixed this by using SMPS2 and SMPS5 as appropriate.
Add some comments and choose voltage values that correspond
to voltage selection codes.
Signed-off-by: Lubomir Popov <l-popov@ti.com>
Lars Poeschel [Tue, 19 Nov 2013 10:22:18 +0000 (11:22 +0100)]
pcm051: Support for revision 3
Phytec sells revision or version 3 of pcm051. It is labeled 1358.3 on
the board. The difference for u-boot is that is has other DDR3 RAM on it:
1 x MT41K256M16HA125E instead of 2 x MT41J256M8HX15E on revisions 1 and
2. Both configurations are 512 MiB.
Configure your u-boot build with pcm051_rev3 for the new RAM and
pcm051_rev1 for the old RAM configuration. Board revision 2 has to use
pcm051_rev1 also.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Ilya Ledvich [Thu, 7 Nov 2013 05:57:35 +0000 (07:57 +0200)]
cm_t335: add support for pca9555 i2c gpio extender
Add support for the 16 bits pca9555 i2c to gpio extender featured
by the SB-T335 baseboard.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Ilya Ledvich [Thu, 7 Nov 2013 05:57:34 +0000 (07:57 +0200)]
cm_t335: add support for status LED
Add support for status LED. Use the STATUS_LED APIs for indicating a
boot progress.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Ilya Ledvich [Thu, 7 Nov 2013 05:57:33 +0000 (07:57 +0200)]
cm_t335: add cm_t335 board support
Add cm_t335 board directory, config file. Enable build.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
[trini: Adapt Makefile]
Signed-off-by: Tom Rini <trini@ti.com>
Chin Liang See [Mon, 2 Dec 2013 18:01:39 +0000 (12:01 -0600)]
socfpga: Adding Freeze Controller driver
Adding Freeze Controller driver. All HPS IOs need to be
in freeze state during pin mux or IO buffer configuration.
It is to avoid any glitch which might happen
during the configuration from propagating to external devices.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Piotr Wilczek [Wed, 27 Nov 2013 10:11:02 +0000 (11:11 +0100)]
board: trats2: update Tizen partition definitions
This patch updates Tizen partions layout.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Piotr Wilczek [Wed, 27 Nov 2013 10:11:01 +0000 (11:11 +0100)]
board: trats2: fix access to samsung registers
This patch use 'samsung_get_base' common functions to access registers.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Piotr Wilczek [Wed, 27 Nov 2013 10:11:00 +0000 (11:11 +0100)]
board: trats2: fix environmental variables
In this patch variable names are used instead of hardcoded names
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Piotr Wilczek [Wed, 27 Nov 2013 10:10:59 +0000 (11:10 +0100)]
board: trats2: remove unused defines from config file
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Rajeshwari Shinde [Tue, 8 Oct 2013 13:12:22 +0000 (18:42 +0530)]
exynos: spl: Add a custom spi copy function
This patch implements a custom spi_copy funtion to copy u-boot from SF
to RAM. This is faster then iROM spi_copy funtion as this runs spi at
50Mhz and also in WORD mode of operation.
Changed a printf in pinmux.c to debug just to avoid the compilation
error in SPL.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Nobuhiro Iwamatsu [Thu, 28 Nov 2013 08:52:47 +0000 (17:52 +0900)]
arm: rmobile: Remove config.mk
Renesas ARM SoCs (R-Mobile, R-Car) are armv7 only.
This drops armv5 supprt from PLATFORM_CPPFLAGS and remove config.mk of
rmobile.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Thu, 28 Nov 2013 08:52:46 +0000 (17:52 +0900)]
arm: kzm9g: Fix undefined reference to `__aeabi_uldivmod' error
The kzm9g board fails in building with -march=armv7-a.
This fixs this problem by converting to do_div().
-----
USE_PRIVATE_LIBGCC=yes ./MAKEALL kzm9g
...
arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_us':
arch/arm/cpu/armv7/rmobile/timer.c:41: undefined reference to `__aeabi_uldivmod'
arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_ms':
arch/arm/cpu/armv7/rmobile/timer.c:47: undefined reference to `__aeabi_uldivmod'
-----
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Tetsuyuki Kobayashi <koba@kmckk.co.jp>