Walter Lee [Mon, 7 May 2018 16:39:09 +0000 (16:39 +0000)]
[asan] Port asan_malloc_linux.cc to RTEMS
We reuse the allocation interceptors as is. RTEMS doesn't support
dlsyms. However, it needs to handle memory allocation requests before
the ASan run-time has been initialized. We use the dlsym alloc pool
for this purpose, and we increase its size to 4k to support this
usage.
Differential Revision: https://reviews.llvm.org/D46465
llvm-svn: 331649
Walter Lee [Mon, 7 May 2018 16:38:45 +0000 (16:38 +0000)]
[sanitizer] On RTEMS, avoid recursion when reporting Mmap failure
Differential Revision: https://reviews.llvm.org/D46463
llvm-svn: 331648
Walter Lee [Mon, 7 May 2018 16:38:20 +0000 (16:38 +0000)]
[asan] Set flags appropriately for RTEMS
Disable both unmap_shadow_on_exit and protect_shadow_gap.
Differential Revision: https://reviews.llvm.org/D46461
llvm-svn: 331647
Walter Lee [Mon, 7 May 2018 16:37:55 +0000 (16:37 +0000)]
[sanitizer] Add definitions for Myriad RTEMS platform
Introduce two definitions to be used by the Myriad RTEMS port of the
ASan run-time: SANITIZER_MYRIAD2 for the platform and SANITIZER_RTEMS
for the OS. We expect to use SANITIZER_MYRIAD2 to guard the portion
of the port corresponding to Myriad's unique memory map, and
SANITIZER_RTEMS for most of the rest.
Differential Revision: https://reviews.llvm.org/D46453
llvm-svn: 331646
Simon Pilgrim [Mon, 7 May 2018 16:34:26 +0000 (16:34 +0000)]
[X86][Znver1] Remove WriteFMul/WriteFRcp InstRW overrides/aliases.
Fixes x87 schedules to more closely match Agner - AMD doesn't tend to "special case" x87 instructions as much as Intel.
llvm-svn: 331645
Joel Galenson [Mon, 7 May 2018 16:23:46 +0000 (16:23 +0000)]
[docs] Fix typos in the Clang User's Manual.
llvm-svn: 331644
Simon Pilgrim [Mon, 7 May 2018 16:15:46 +0000 (16:15 +0000)]
[X86] Split WriteFDiv schedule classes to support single/double scalar, XMM and YMM/ZMM instructions.
This removes all InstrRW overrides for these instructions - some x87 overrides remain but most use default (and realistic) values.
llvm-svn: 331643
Alexey Bataev [Mon, 7 May 2018 14:50:05 +0000 (14:50 +0000)]
[OPENMP, NVPTX] Added support for L2 parallelism.
Added initial codegen for level 2, 3 etc. parallelism. Currently, all
the second, the third etc. parallel regions will run sequentially.
llvm-svn: 331642
Mark Searles [Mon, 7 May 2018 14:43:28 +0000 (14:43 +0000)]
[AMDGPU][Waitcnt] Remove the old waitcnt pass
Remove the old waitcnt pass ( si-insert-waits ), which is no longer maintained
and getting crufty
Differential Revision: https://reviews.llvm.org/D46448
llvm-svn: 331641
Aleksandar Beserminji [Mon, 7 May 2018 14:30:49 +0000 (14:30 +0000)]
[mips] Improve handling of -fno-[pic/PIC] option
In order to disable PIC and to match GCC behaviour, -mno-abicalls
option is neccessary. When -fno-[pic/PIC] is used witout -mno-abicalls,
warning is reported. An error is reported when -fno-pic or -fno-PIC is
used in combination with -mabicalls.
In this commit, test case is added.
Depends on D44381.
Differential Revision: https://reviews.llvm.org/D44684
llvm-svn: 331640
Aleksandar Beserminji [Mon, 7 May 2018 14:28:42 +0000 (14:28 +0000)]
Revert "[mips] Improve handling of -fno-[pic/PIC] option"
This reverts commit r331636. Forgot to add the test case.
llvm-svn: 331639
Marshall Clow [Mon, 7 May 2018 14:21:52 +0000 (14:21 +0000)]
Update for Rapperswil
llvm-svn: 331638
Greg Clayton [Mon, 7 May 2018 14:21:04 +0000 (14:21 +0000)]
Fix "file ./a.out" and file "../a.out" so that is works after recent FileSpec normalization path changes.
Test coming soon, but I want to unbreak people.
llvm-svn: 331637
Aleksandar Beserminji [Mon, 7 May 2018 14:19:54 +0000 (14:19 +0000)]
[mips] Improve handling of -fno-[pic/PIC] option
In order to disable PIC and to match GCC behaviour, -mno-abicalls
option is neccessary. When -fno-[pic/PIC] is used witout -mno-abicalls,
warning is reported. An error is reported when -fno-pic or -fno-PIC is
used in combination with -mabicalls.
Depends on D44381.
Differential Revision: https://reviews.llvm.org/D44684
llvm-svn: 331636
Petar Jovanovic [Mon, 7 May 2018 14:09:33 +0000 (14:09 +0000)]
Add option -verify-cfiinstrs to run verifier in CFIInstrInserter
Instead of enabling it for non NDEBUG builds, use -verify-cfiinstrs to
run verifier in CFIInstrInserter. It defaults to false.
Differential Revision: https://reviews.llvm.org/D46444
llvm-svn: 331635
Clement Courbet [Mon, 7 May 2018 13:26:47 +0000 (13:26 +0000)]
[NFC] Fix typo in variable name.
llvm-svn: 331634
Tim Renouf [Mon, 7 May 2018 13:21:26 +0000 (13:21 +0000)]
[AMDGPU] Don't force WQM for DS op
Summary:
Previously, all DS ops forced WQM in a pixel shader. That was a hack to
allow for graphics frontends using ds_swizzle to implement explicit
derivatives, on SI/CI at least where DPP is not available. But it forced
WQM for _any_ DS op.
With this commit, DS ops no longer force WQM. Both graphics frontends
(Mesa and LLPC) need to change to issue an explicit llvm.amdgcn.wqm
intrinsic call when calculating explicit derivatives.
The required Mesa change is: "amd/common: use llvm.amdgcn.wqm for
explicit derivatives".
Subscribers: qcolombet, arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D46051
Change-Id: I9b745b626fa91bbd66456e6cf41ee07eeea42f81
llvm-svn: 331633
Joachim Protze [Mon, 7 May 2018 12:42:21 +0000 (12:42 +0000)]
[OMPT] Fix thread_num for implicit_task_end callbacks in nested parallel regions
implicit_task_end callbacks in nested parallel regions did not always give the
correct thread_num, since the inner parallel region may have already been
finalized.
Now, the thread_num is stored at the beginning of the implicit task and
retrieved at the end, whenever necessary.
A testcase was added as well.
Differential Revision: https://reviews.llvm.org/D46260
llvm-svn: 331632
Joachim Protze [Mon, 7 May 2018 12:42:15 +0000 (12:42 +0000)]
[OMPT] Add api_calls_misc.c testcase and rename api_calls.c testcase
The api_calls_misc.c testcase tests the following api calls:
ompt_get_callback()
ompt_get_state()
ompt_enumerate_states()
ompt_enumerate_mutex_impls()
These have not been tested previously.
The api_calls.c testcase has been renamed to api_calls_places.c because it only tests api calls that are related to places.
Differential Revision: https://reviews.llvm.org/D42523
llvm-svn: 331631
Peter Szecsi [Mon, 7 May 2018 12:08:27 +0000 (12:08 +0000)]
[ASTImporter] Support importing UnresolvedMemberExpr, DependentNameType, DependentScopeDeclRefExpr
The visit callback implementations for the 3 C++ AST Node added to the ASTImporter.
Differential Revision: https://reviews.llvm.org/D38845
llvm-svn: 331630
Simon Pilgrim [Mon, 7 May 2018 11:50:44 +0000 (11:50 +0000)]
[X86] Split WriteFRcp/WriteFRsqrt/WriteFSqrt schedule classes
WriteFRcp/WriteFRsqrt are split to support scalar, XMM and YMM/ZMM instructions.
WriteFSqrt is split into single/double/long-double sizes and scalar, XMM, YMM and ZMM instructions.
This removes all InstrRW overrides for these instructions.
NOTE: There were a couple of typos in the Znver1 model - notably a 1cy throughput for SQRT that is highly unlikely and doesn't tally with Agner.
NOTE: I had to add Agner's numbers for several targets for WriteFSqrt80.
llvm-svn: 331629
Petar Jovanovic [Mon, 7 May 2018 11:47:48 +0000 (11:47 +0000)]
Skip unreachable blocks for CFIInstrInserter verify
Iterate only through reachable blocks. This finetunes r330706 and
it resolves build issue reported by Craig Topper.
llvm-svn: 331628
Jonas Paulsson [Mon, 7 May 2018 10:48:43 +0000 (10:48 +0000)]
[SystemZ] Bugfix for MVCLoop CC clobbering.
MVCLoop clobbers CC (since it emits a compare/branch), but this was not
modelled.
Review: Ulrich Weigand
llvm-svn: 331627
Igor Kudrin [Mon, 7 May 2018 10:07:22 +0000 (10:07 +0000)]
[sanitizer] Be more accurate when calculating the previous instruction address on ARM.
Differential Revision: https://reviews.llvm.org/D46004
llvm-svn: 331626
Roman Lebedev [Mon, 7 May 2018 09:42:45 +0000 (09:42 +0000)]
[InstCombine][NFC] Add tests for one more masked merge pattern.
This pattern came up in D46494.
I'm pretty sure we want to canonicalize it from
(x | ~m) & (y & m)
to
(x & m) | (y & ~m)
https://rise4fun.com/Alive/TEM
llvm-svn: 331625
Clement Courbet [Mon, 7 May 2018 09:09:48 +0000 (09:09 +0000)]
Re-land r331622 "[llvm-exegesis] Add a library to cluster benchmark results."
Add missing move.
llvm-svn: 331624
Clement Courbet [Mon, 7 May 2018 08:30:18 +0000 (08:30 +0000)]
Revert r331622 "[llvm-exegesis] Add a library to cluster benchmark results."
Breaks build over llvm::Error copy construction.
llvm-svn: 331623
Clement Courbet [Mon, 7 May 2018 08:20:00 +0000 (08:20 +0000)]
[llvm-exegesis] Add a library to cluster benchmark results.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D46432
llvm-svn: 331622
Richard Smith [Mon, 7 May 2018 06:43:31 +0000 (06:43 +0000)]
Remove now-unnecessary check for non-zero nvsize in addition to
emptyness in MS record layout.
llvm-svn: 331621
Richard Smith [Mon, 7 May 2018 06:43:30 +0000 (06:43 +0000)]
Non-zero-length bit-fields make a class non-empty.
This implements the rule intended by the standard (see LWG 2358)
and the rule intended by the Itanium C++ ABI (see
https://github.com/itanium-cxx-abi/cxx-abi/pull/51), and makes
Clang match the behavior of GCC, ICC, and MSVC.
A pedantic reading of both the standard and the ABI indicate that Clang
is currently technically correct, but that's not worth much when it's
clear that the wording is wrong in both those places.
This is an ABI break for classes that derive from a class that is empty
other than one or more unnamed non-zero-length bit-fields. Such cases
are expected to be rare, but -fclang-abi-compat=6 restores the old
behavior just in case.
Differential Revision: https://reviews.llvm.org/D45174
llvm-svn: 331620
Vitaly Buka [Mon, 7 May 2018 06:14:12 +0000 (06:14 +0000)]
[sanitizer] Add operator== and operator!= for InternalMmapVectorNoCtor
llvm-svn: 331619
Vitaly Buka [Mon, 7 May 2018 05:56:36 +0000 (05:56 +0000)]
[sanitizer] Replace InternalScopedBuffer with InternalMmapVector
llvm-svn: 331618
Vitaly Buka [Mon, 7 May 2018 05:56:24 +0000 (05:56 +0000)]
[sanitizer] Remove reserving constructor from InternalMmapVector
llvm-svn: 331617
Vitaly Buka [Mon, 7 May 2018 05:56:12 +0000 (05:56 +0000)]
[sanitizer] Implement InternalScopedBuffer with InternalMmapVector
llvm-svn: 331616
Fangrui Song [Mon, 7 May 2018 05:21:20 +0000 (05:21 +0000)]
Fix comment. NFC
llvm-svn: 331615
Amaury Sechet [Mon, 7 May 2018 01:43:42 +0000 (01:43 +0000)]
[ARM] Select result 1 from ConvertBooleanCarryToCarryFlag's result automatically. NFC
The old behavior return the value 0, which is error prone.
llvm-svn: 331614
Craig Topper [Mon, 7 May 2018 01:32:18 +0000 (01:32 +0000)]
[TargetLowering] Use StringRef::split instead of SplitString. NFC
SplitString splits based on a list of delimeters, but we're only using one delimeter so we should use the simpler split.
llvm-svn: 331613
Vitaly Buka [Mon, 7 May 2018 01:08:13 +0000 (01:08 +0000)]
[sanitizer] Make InternalScopedBuffer::size() behavior similar to vector.
llvm-svn: 331612
Craig Topper [Mon, 7 May 2018 00:47:02 +0000 (00:47 +0000)]
[X86] Fix copy/paste mistake in comment. NFC
llvm-svn: 331611
Fangrui Song [Sun, 6 May 2018 23:08:29 +0000 (23:08 +0000)]
[llvm-dwp] Define InitLLVM.
llvm-svn: 331610
Roman Lebedev [Sun, 6 May 2018 20:02:22 +0000 (20:02 +0000)]
[NFC][DAGCombine] unfoldMaskedMerge(): rename two variables
The current names can be confused with the A and B sides
of the canonical masked merge pattern.
llvm-svn: 331609
Roman Lebedev [Sun, 6 May 2018 19:50:04 +0000 (19:50 +0000)]
ELF Thunks: fix build error: missing 'overrides'
llvm-svn: 331608
Sean Fertile [Sun, 6 May 2018 19:13:29 +0000 (19:13 +0000)]
[PPC64] Emit plt call stubs to the text section rather then the plt section.
On PowerPC calls to functions through the plt must be done through a call stub
that is responsible for:
1) Saving the toc pointer to the stack.
2) Loading the target functions address from the plt into both r12 and the
count register.
3) Indirectly branching to the target function.
Previously we have been emitting these call stubs to the .plt section, however
the .plt section should be reserved for the lazy symbol resolution stubs. This
patch moves the call stubs to the text section by moving the implementation from
writePlt to the thunk framework.
Differential Revision: https://reviews.llvm.org/D46204
llvm-svn: 331607
Craig Topper [Sun, 6 May 2018 17:48:21 +0000 (17:48 +0000)]
[X86] Enable reciprocal estimates for v16f32 vectors by using VRCP14PS/VRSQRT14PS
Summary:
The legacy VRCPPS/VRSQRTPS instructions aren't available in 512-bit versions. The new increased precision versions are. So we can use those to implement v16f32 reciprocal estimates.
For KNL CPUs we can probably use VRCP28PS/VRSQRT28PS and avoid the NR step altogether, but I leave that for a future patch.
Reviewers: spatel
Reviewed By: spatel
Subscribers: RKSimon, llvm-commits, mehdi_amini
Differential Revision: https://reviews.llvm.org/D46498
llvm-svn: 331606
Craig Topper [Sun, 6 May 2018 17:45:40 +0000 (17:45 +0000)]
[X86] Add test cases for reciprocal estimation for v16f32 vectors with AVX512F.
We should be able to use the vrsqrt14ps and vrcp14ps instructions for these cases.
llvm-svn: 331605
Amaury Sechet [Sun, 6 May 2018 16:00:23 +0000 (16:00 +0000)]
Add test cases for large integer legalization of add and sub. NFC
llvm-svn: 331604
Daniel Sanders [Sat, 5 May 2018 21:19:59 +0000 (21:19 +0000)]
[globalisel] Remove redundant -global-isel option from tests that use -run-pass. NFC
As Roman Tereshin pointed out in https://reviews.llvm.org/D45541, the
-global-isel option is redundant when -run-pass is given. -global-isel sets up
the GlobalISel passes in the pass manager but -run-pass skips that entirely and
configures it's own pipeline.
llvm-svn: 331603
Fangrui Song [Sat, 5 May 2018 20:54:03 +0000 (20:54 +0000)]
[MC] Remove unused MCOI::GenericOperandType
llvm-svn: 331602
Daniel Sanders [Sat, 5 May 2018 20:53:24 +0000 (20:53 +0000)]
[globalisel] Update GlobalISel emitter to match new representation of extending loads
Summary:
Previously, a extending load was represented at (G_*EXT (G_LOAD x)).
This had a few drawbacks:
* G_LOAD had to be legal for all sizes you could extend from, even if
registers didn't naturally hold those sizes.
* All sizes you could extend from had to be allocatable just in case the
extend went missing (e.g. by optimization).
* At minimum, G_*EXT and G_TRUNC had to be legal for these sizes. As we
improve optimization of extends and truncates, this legality requirement
would spread without considerable care w.r.t when certain combines were
permitted.
* The SelectionDAG importer required some ugly and fragile pattern
rewriting to translate patterns into this style.
This patch changes the representation to:
* (G_[SZ]EXTLOAD x)
* (G_LOAD x) any-extends when MMO.getSize() * 8 < ResultTy.getSizeInBits()
which resolves these issues by allowing targets to work entirely in their
native register sizes, and by having a more direct translation from
SelectionDAG patterns.
Each extending load can be lowered by the legalizer into separate extends
and loads, however a target that supports s1 will need the any-extending
load to extend to at least s8 since LLVM does not represent memory accesses
smaller than 8 bit. The legalizer can widenScalar G_LOAD into an
any-extending load but sign/zero-extending loads need help from something
else like a combiner pass. A follow-up patch that adds combiner helpers for
for this will follow.
The new representation requires that the MMO correctly reflect the memory
access so this has been corrected in a couple tests. I've also moved the
extending loads to their own tests since they are (mostly) separate opcodes
now. Additionally, the re-write appears to have invalidated two tests from
select-with-no-legality-check.mir since the matcher table no longer contains
loads that result in s1's and they aren't legal in AArch64 anymore.
Depends on D45540
Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar
Reviewed By: rtereshin
Subscribers: javed.absar, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D45541
llvm-svn: 331601
Heejin Ahn [Sat, 5 May 2018 20:53:23 +0000 (20:53 +0000)]
[MIRPraser] Improve error checking for typed immediate operands
Summary:
This improves error checks for typed immediate operands introduced in
D45948 (rL331586), and removes a code block copied by mistake.
Reviewers: rtereshin
Subscribers: dschuff, sbc100, jgravelle-google, llvm-commits
Differential Revision: https://reviews.llvm.org/D46491
llvm-svn: 331600
Fangrui Song [Sat, 5 May 2018 20:14:38 +0000 (20:14 +0000)]
Simplify LLVM_ATTRIBUTE_USED call sites.
llvm-svn: 331599
Aaron Ballman [Sat, 5 May 2018 17:38:42 +0000 (17:38 +0000)]
Disallow pointers to const in __sync_fetch_and_xxx.
Diagnoses code like:
void f(const int *ptr) {
__sync_fetch_and_add(ptr, 1);
}
which matches the behavior of GCC and ICC.
llvm-svn: 331598
Teresa Johnson [Sat, 5 May 2018 16:37:31 +0000 (16:37 +0000)]
Add -target to address errors in test from r331592
The error turns out to be:
Assertion failed: (Target.isCompatibleDataLayout(getDataLayout()) && "Can't create a MachineFunction using a Module with a " "Target-incompatible DataLayout attached\n"), function init, file /Users/buildslave/jenkins/workspace/clang-stage1-cmake-RA-incremental/llvm/lib/CodeGen/MachineFunction.cpp, line 180.
Add -target to address this. Also re-enable the test I had temporarily
commented, and move it further down in case there is still a failure
(since it pipes stderr to FileCheck).
llvm-svn: 331597
Teresa Johnson [Sat, 5 May 2018 15:54:57 +0000 (15:54 +0000)]
Skip part of test added in r331592 to help debug bot failures
Trying to debug why/where a few bots getting exit code 256 e.g.
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/48471/testReport/Clang/CodeGen/thinlto_diagnostic_handler_remarks_with_hotness_ll/
and a few windows bots getting no output from that RUN line e.g.
http://lab.llvm.org:8011/builders/clang-x86-windows-msvc2015/builds/11865/steps/ninja%20check%201/logs/FAIL%3A%20Clang%3A%3Athinlto-diagnostic-handler-remarks-with-hotness.ll
llvm-svn: 331596
Roman Lebedev [Sat, 5 May 2018 15:45:40 +0000 (15:45 +0000)]
[DAGCombiner] Masked merge: don't touch "not" xor's.
Summary:
Split off form D46031.
It seems we don't want to transform the pattern if the `xor`'s are actually `not`'s.
In vector case, this breaks `andnpd` / `vandnps` patterns.
That being said, we may want to re-visit this `not` handling, maybe in D46073.
Reviewers: spatel, craig.topper, javed.absar
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46492
llvm-svn: 331595
Andrea Di Biagio [Sat, 5 May 2018 15:36:47 +0000 (15:36 +0000)]
[llvm-mca] removes flag -instruction-tables from the "View Options" category.
This patch also improves the description of a couple of flags in the view
options. With this change, the -help now specifies which views are enabled by
default.
llvm-svn: 331594
Teresa Johnson [Sat, 5 May 2018 15:15:04 +0000 (15:15 +0000)]
Add required target to address bot failures from r331592
Failing on non-x86 bots, needs x86 target for code gen.
llvm-svn: 331593
Teresa Johnson [Sat, 5 May 2018 14:37:29 +0000 (14:37 +0000)]
[ThinLTO] Support opt remarks options with distributed ThinLTO backends
Summary:
Passes down the necessary code ge options to the LTO Config to enable
-fdiagnostics-show-hotness and -fsave-optimization-record in the ThinLTO
backend for a distributed build.
Also, remove warning about not having PGO when the input is IR.
Reviewers: pcc
Subscribers: mehdi_amini, inglorion, eraman, cfe-commits
Differential Revision: https://reviews.llvm.org/D46464
llvm-svn: 331592
Teresa Johnson [Sat, 5 May 2018 14:37:20 +0000 (14:37 +0000)]
[LTO] Handle Task=-1 passed to addSaveTemps
Summary:
This change is necessary for D46464, which will pass -1 as the Task
ID for distributed backends, so that the save temps files don't end
up with "
4294967295" in their path. For distributed back ends, when -1
is passed, don't append any Task ID.
An existing test (tools/clang/test/CodeGen/thinlto_backend.ll) will
fail without this change after D46464.
Reviewers: pcc
Subscribers: mehdi_amini, inglorion, llvm-commits
Differential Revision: https://reviews.llvm.org/D46488
llvm-svn: 331591
Andrea Di Biagio [Sat, 5 May 2018 12:21:54 +0000 (12:21 +0000)]
[llvm-mca] minor tweak to the resource pressure printing functionality. NFC.
llvm-svn: 331590
Andrea Di Biagio [Sat, 5 May 2018 10:53:31 +0000 (10:53 +0000)]
Fix -Wunused-variable warning introduced at r331566.
llvm-svn: 331589
Roman Lebedev [Sat, 5 May 2018 10:39:54 +0000 (10:39 +0000)]
[NFC][DagCombiner] unfoldMaskedMerge(): improve readability.
llvm-svn: 331588
Piotr Padlewski [Sat, 5 May 2018 10:23:27 +0000 (10:23 +0000)]
[CaptureTracking] Handle capturing of launder.invariant.group
Summary:
launder.invariant.group has the same rules of capturing as
bitcast, gep, etc - the original value is not captured
if the returned pointer is not captured.
With this patch, we mark 40% more functions as noalias when compiling with -fstrict-vtable-pointers;
1078 vs 1778 (39.37%)
Reviewers: sanjoy, davide, nlewycky, majnemer, mehdi_amini
Subscribers: JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D32673
llvm-svn: 331587
Heejin Ahn [Sat, 5 May 2018 07:05:51 +0000 (07:05 +0000)]
[MIRParser] Allow register class names in the form of integer/scalar
Summary:
The current code cannot handle register class names like 'i32', which is
a valid register class name in WebAssembly. This patch removes special
handling for integer/scalar/pointer type parsing and treats them as
normal identifiers.
Reviewers: thegameg
Subscribers: jfb, dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D45948
llvm-svn: 331586
Fangrui Song [Sat, 5 May 2018 06:05:31 +0000 (06:05 +0000)]
[Option] Remove an unnecessary conversion function.
llvm-svn: 331585
George Burgess IV [Sat, 5 May 2018 04:52:26 +0000 (04:52 +0000)]
Range-ify for loop; NFC
llvm-svn: 331582
Kamil Rytarowski [Sat, 5 May 2018 03:57:07 +0000 (03:57 +0000)]
Remove dead sanitizer_procmaps_freebsd.cc
This file has been obsoleted by sanitizer_procmaps_bsd.cc.
llvm-svn: 331581
Tom Stellard [Sat, 5 May 2018 02:52:41 +0000 (02:52 +0000)]
GlobalISel/InstructionSelector: Implement GIR_CopyFConstantAsFPImm
Summary: AMDGPU will need this to enable the TableGen'd GlobalISel selector.
Reviewers: dsanders, aditya_nandakumar
Reviewed By: dsanders
Subscribers: rovka, kristof.beyls, tpr, llvm-commits
Differential Revision: https://reviews.llvm.org/D45990
llvm-svn: 331579
Craig Topper [Sat, 5 May 2018 01:58:26 +0000 (01:58 +0000)]
Fix a couple places that immediately called operator-> on the result of dyn_cast.
It looks like it safe to just use cast for both cases.
llvm-svn: 331578
Craig Topper [Sat, 5 May 2018 01:57:00 +0000 (01:57 +0000)]
Fix a bunch of places where operator-> was used directly on the return from dyn_cast.
Inspired by r331508, I did a grep and found these.
Mostly just change from dyn_cast to cast. Some cases also showed a dyn_cast result being converted to bool, so those I changed to isa.
llvm-svn: 331577
Stephan T. Lavavej [Sat, 5 May 2018 01:40:27 +0000 (01:40 +0000)]
[libcxx] [test] Fix whitespace, NFC.
Strip trailing whitespace and untabify.
llvm-svn: 331576
Stephan T. Lavavej [Sat, 5 May 2018 01:40:24 +0000 (01:40 +0000)]
[libcxx] [test] Fix MSVC x64 truncation warning.
warning C4267: 'argument': conversion from 'size_t' to 'int', possible loss of data
Requesting post-commit review.
llvm-svn: 331575
Sam Clegg [Sat, 5 May 2018 01:23:07 +0000 (01:23 +0000)]
[WebAssembly] Check function signatures by default
But only produce a warning (for now) unless --fatal-warnings
is passed.
Differential Revision: https://reviews.llvm.org/D46484
llvm-svn: 331574
Peter Collingbourne [Sat, 5 May 2018 00:51:55 +0000 (00:51 +0000)]
LowerTypeTests: Fix non-determinism in code that handles icall branch funnels.
This was exposed by enabling expensive checks, which causes llvm::sort
to sort randomly.
Differential Revision: https://reviews.llvm.org/D45901
llvm-svn: 331573
Sam Clegg [Sat, 5 May 2018 00:32:26 +0000 (00:32 +0000)]
Add llvm-dwarfdump tool_patterns
Differential Revision: https://reviews.llvm.org/D46481
llvm-svn: 331572
Sam Clegg [Sat, 5 May 2018 00:18:43 +0000 (00:18 +0000)]
[WebAssembly] Only perform sanity checking of relocation targets in debug builds
Also:
- Reduce the error to a warning so that debug and release
versions can still link the same inputs.
- Add another check to verify the input LEB is padded to 5 bytes
Differential Revision: https://reviews.llvm.org/D46479
llvm-svn: 331571
Eli Friedman [Sat, 5 May 2018 00:09:51 +0000 (00:09 +0000)]
Add warning flag -Wordered-compare-function-pointers.
The C standard doesn't allow comparisons like "f1 < f2" (where f1 and f2
are function pointers), but we allow them as an extension. Add a
warning flag to control this warning.
Differential Revision: https://reviews.llvm.org/D46155
llvm-svn: 331570
Teresa Johnson [Fri, 4 May 2018 23:59:34 +0000 (23:59 +0000)]
[LTO] Allow pass remarks with hotness to be set when emitting to stderr
Summary:
Set setDiagnosticsHotnessRequested before the early exit check for a
diagnostic output file, so that pass remarks with hotness works when
emitting pass remarks to stderr (e.g. via -pass-remarks=.).
Also fix the llvm-lto2 diagnistic handler so that it only calls exit(1)
when the diagnistic is an error type. Otherwise the new test invocation
of llvm-lto2 with -pass-remarks causes it to fail. The new code is
consistent with the diagnostic handler elsewhere (e.g. on the
LLVMContext).
Reviewers: pcc, davide
Subscribers: fhahn, mehdi_amini, llvm-commits, inglorion
Differential Revision: https://reviews.llvm.org/D46387
llvm-svn: 331569
Davide Italiano [Fri, 4 May 2018 23:41:25 +0000 (23:41 +0000)]
[llvm-mc-assemble-fuzzer] Catch up with API changes.
llvm-svn: 331568
Michael Berg [Fri, 4 May 2018 23:41:15 +0000 (23:41 +0000)]
Mapping SDNode flags to MachineInstr flags
Summary: Providing the glue to map SDNode fast math sub flags to MachineInstr fast math sub flags.
Reviewers: spatel, arsenm, wristow
Reviewed By: spatel
Subscribers: wdng
Differential Revision: https://reviews.llvm.org/D46447
llvm-svn: 331567
Sam Clegg [Fri, 4 May 2018 23:14:42 +0000 (23:14 +0000)]
[WebAssembly] Add support for debug (DWARF) sections
Specifically add support for custom sections that contain
relocations, and for the two new relocation types needed
by DWARF sections.
See: https://reviews.llvm.org/D44184
Patch by Yury Delendik!
Differential Revision: https://reviews.llvm.org/D44184
llvm-svn: 331566
Artem Dergachev [Fri, 4 May 2018 23:01:10 +0000 (23:01 +0000)]
[analyzer] Remove untested code in evalLoad.
No functional change intended.
llvm-svn: 331565
Konstantin Zhuravlyov [Fri, 4 May 2018 22:53:55 +0000 (22:53 +0000)]
AMDGPU/NFC: Update D16PreservesUnusedBits description based Tony Tye's comments
llvm-svn: 331564
Artem Dergachev [Fri, 4 May 2018 22:19:32 +0000 (22:19 +0000)]
[analyzer] Invalidate union regions properly. Don't hesitate to load later.
We weren't invalidating our unions correctly. The previous behavior in
invalidateRegionsWorker::VisitCluster() was to direct-bind an UnknownVal
to the union (at offset 0).
For that reason we were never actually loading default bindings from our unions,
because there never was any default binding to load, and the value
that is presumed when there's no default binding to load
is usually completely incorrect (eg. UndefinedVal for stack unions).
The new behavior is to default-bind a conjured symbol (of irrelevant type)
to the union that's being invalidated, similarly to what we do for structures
and classes. Then it becomes safe to load the value properly.
Differential Revision: https://reviews.llvm.org/D45241
llvm-svn: 331563
Artem Dergachev [Fri, 4 May 2018 22:11:12 +0000 (22:11 +0000)]
[analyzer] pr36458: Fix retrieved value cast for symbolic void pointers.
C allows us to write any bytes into any memory region. When loading weird bytes
from memory regions of known types, the analyzer is required to make sure that
the loaded value makes sense by casting it to an appropriate type.
Fix such cast for loading values that represent void pointers from non-void
pointer type places.
Differential Revision: https://reviews.llvm.org/D46415
llvm-svn: 331562
Artem Dergachev [Fri, 4 May 2018 21:56:51 +0000 (21:56 +0000)]
[analyzer] pr18953: Split C++ zero-initialization from default initialization.
The bindDefault() API of the ProgramState allows setting a default value
for reads from memory regions that were not preceded by writes.
It was used for implementing C++ zeroing constructors (i.e. default constructors
that boil down to setting all fields of the object to 0).
Because differences between zeroing consturctors and other forms of default
initialization have been piling up (in particular, zeroing constructors can be
called multiple times over the same object, probably even at the same offset,
requiring a careful and potentially slow cleanup of previous bindings in the
RegionStore), we split the API in two: bindDefaultInitial() for modeling
initial values and bindDefaultZero() for modeling zeroing constructors.
This fixes a few assertion failures from which the investigation originated.
The imperfect protection from both inability of the RegionStore to support
binding extents and lack of information in ASTRecordLayout has been loosened
because it's, well, imperfect, and it is unclear if it fixing more than it
was breaking.
Differential Revision: https://reviews.llvm.org/D46368
llvm-svn: 331561
Craig Topper [Fri, 4 May 2018 21:56:43 +0000 (21:56 +0000)]
[X86] Correct the attributes on the incssp and rdssp builtins to only have 'nothrow'
llvm-svn: 331560
Craig Topper [Fri, 4 May 2018 21:45:25 +0000 (21:45 +0000)]
[X86] Fix some inconsistent formatting in the first line of our intrinsics headers.
Some were too long and some were too short.
llvm-svn: 331559
Artem Dergachev [Fri, 4 May 2018 21:39:25 +0000 (21:39 +0000)]
[analyzer] pr37209: Fix casts of glvalues to references.
Many glvalue expressions aren't of their respective reference type -
they are simply glvalues of their value type.
This was causing problems when we were trying to obtain type of the original
expression while evaluating certain glvalue bit-casts.
Fixed by artificially forging a reference type to provide to the casting
procedure.
Differential Revision: https://reviews.llvm.org/D46224
llvm-svn: 331558
Philip Reames [Fri, 4 May 2018 21:35:00 +0000 (21:35 +0000)]
[LICM] Compute a must execute property for the prefix of the header as we go
Computing this property within the existing walk ensures that the cost is linear with the size of the block. If we did this from within isGuaranteedToExecute, it would be quadratic without some very fancy caching.
This allows us to reliably catch a hoistable instruction within a header which may throw at some point *after* our hoistable instruction. It doesn't do anything for non-header cases, but given how common single block loops are, this seems very worthwhile.
llvm-svn: 331557
Artem Dergachev [Fri, 4 May 2018 20:52:39 +0000 (20:52 +0000)]
[analyzer] Treat more const variables and fields as known contants.
When loading from a variable or a field that is declared as constant,
the analyzer will try to inspect its initializer and constant-fold it.
Upon success, the analyzer would skip normal load and return the respective
constant.
The new behavior also applies to fields/elements of brace-initialized structures
and arrays.
Patch by Rafael Stahl!
Differential Revision: https://reviews.llvm.org/D45774
llvm-svn: 331556
Simon Atanasyan [Fri, 4 May 2018 20:48:53 +0000 (20:48 +0000)]
[ELF][MIPS] Reorganize isMipsPIC routine. NFC
llvm-svn: 331555
Simon Atanasyan [Fri, 4 May 2018 20:48:47 +0000 (20:48 +0000)]
[ELF][MIPS] Add STO_MIPS_MICROMIPS flag to symbols point to microMIPS PLT records
llvm-svn: 331554
Konstantin Zhuravlyov [Fri, 4 May 2018 20:21:31 +0000 (20:21 +0000)]
AMDGPU/NFC: Fix formatting for 900, 902 ISA Version features
llvm-svn: 331553
Sterling Augustine [Fri, 4 May 2018 20:12:39 +0000 (20:12 +0000)]
Allow modifying the PrintingPolicy for fully qualified names.
Author: mikhail.ramalho@gmail.com
llvm-svn: 331552
Konstantin Zhuravlyov [Fri, 4 May 2018 20:06:57 +0000 (20:06 +0000)]
AMDGPU: Add D16 instructions preserve unused bits feature
- Predicate D16 patterns on this new feature
- Added this new feature to gfx900/2/4
Differential Revision: https://reviews.llvm.org/D46366
llvm-svn: 331551
Guansong Zhang [Fri, 4 May 2018 19:29:28 +0000 (19:29 +0000)]
[OpenMP] Use LIBOMPTARGET_DEVICE_RTL_DEBUG env var to control debug messages on the device side
Summary:
Enable the device side debug messages at compile time, use env var to control at runtime.
To achieve this, an environment data block is passed to the device lib when it is loaded.
By default, the message is off, to enable it, a user need to set LIBOMPDEVICE_DEBUG=1.
Reviewers: grokos
Reviewed By: grokos
Subscribers: openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D46210
llvm-svn: 331550
Geoff Berry [Fri, 4 May 2018 19:25:09 +0000 (19:25 +0000)]
[MachineLICM] Debug intrinsics shouldn't affect hoist decisions
Summary:
When checking if an instruction stores to a given frame index, check
that the instruction can write to memory before looking at the memory
operands list to avoid e.g. DBG_VALUE instructions that reference a
frame index preventing a load from that index from being hoisted.
Reviewers: dblaikie, MatzeB, qcolombet, reames, javed.absar
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D46284
llvm-svn: 331549
Shoaib Meenai [Fri, 4 May 2018 19:03:11 +0000 (19:03 +0000)]
[ObjCARC] Account for catchswitch in bitcast insertion
A catchswitch is both a pad and a terminator, meaning it must be the
only non-phi instruction in its basic block. When we're inserting a
bitcast in the incoming basic block for a phi, if that incoming block is
a catchswitch, we should go up the dominator tree to find a valid
insertion point rather than attempting to insert before the catchswitch
(which would result in invalid IR).
Differential Revision: https://reviews.llvm.org/D46412
llvm-svn: 331548
Michael Berg [Fri, 4 May 2018 18:48:20 +0000 (18:48 +0000)]
Fast Math Flag mapping into SDNode
Summary: Adding support for Fast flags in the SDNode to leverage fast math sub flag usage.
Reviewers: spatel, arsenm, jbhateja, hfinkel, escha, qcolombet, echristo, wristow, javed.absar
Reviewed By: spatel
Subscribers: llvm-commits, rampitec, nhaehnle, tstellar, FarhanaAleen, nemanjai, javed.absar, jbhateja, hfinkel, wdng
Differential Revision: https://reviews.llvm.org/D45710
llvm-svn: 331547