Alexandre Torgue [Mon, 28 Nov 2022 13:33:39 +0000 (14:33 +0100)]
Revert "ARM: dts: stm32: add fake interrupt propoerty for ASync notif - TEMP/TO REMOVE"
This reverts commit
fb4ce97d9c5daafe100a83670c697b92c9d1bb45.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Link: https://lore.kernel.org/r/20221128133339.25055-1-alexandre.torgue@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 30 Nov 2022 14:06:51 +0000 (15:06 +0100)]
Merge tag 'mvebu-dt-6.2-1' of git://git./linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt for 6.2 (part 1)
Fix assigned-addresses for every PCIe Root Port
Align LED node names with dtschema
Add a new kirkwood based board: Zyxel NSA310S
Fix compatible string for gpios for Armada 38x and 39x
Add interrupts for watchdog on Armada XP
Turris Omnia (Armada 385 based):
- Add switch port 6 node
- Add ethernet aliases
Switch to using gpiod API in pm-board code
* tag 'mvebu-dt-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada-xp: add interrupts for watchdog
ARM: dts: armada: align LED node names with dtschema
ARM: mvebu: switch to using gpiod API in pm-board code
ARM: dts: armada-39x: Fix compatible string for gpios
ARM: dts: armada-38x: Fix compatible string for gpios
ARM: dts: turris-omnia: Add switch port 6 node
ARM: dts: turris-omnia: Add ethernet aliases
ARM: dts: armada-39x: Fix assigned-addresses for every PCIe Root Port
ARM: dts: armada-38x: Fix assigned-addresses for every PCIe Root Port
ARM: dts: armada-375: Fix assigned-addresses for every PCIe Root Port
ARM: dts: armada-xp: Fix assigned-addresses for every PCIe Root Port
ARM: dts: armada-370: Fix assigned-addresses for every PCIe Root Port
ARM: dts: dove: Fix assigned-addresses for every PCIe Root Port
ARM: dts: kirkwood: Add Zyxel NSA310S board
Link: https://lore.kernel.org/r/87cz979adf.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 30 Nov 2022 14:06:00 +0000 (15:06 +0100)]
Merge tag 'mvebu-dt64-6.2-1' of git://git./linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt64 for 6.2 (part 1)
Update cache properties for various Marvell SoCs
Reserved memory for optee firmware
Turris Mox (Armada 3720 based Socs)
- Define slot-power-limit-milliwatt for PCIe
- Add missing interrupt for RTC
* tag 'mvebu-dt64-6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: add optee FW definitions
arm64: dts: Update cache properties for marvell
arm64: dts: armada-3720-turris-mox: Add missing interrupt for RTC
arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe
Link: https://lore.kernel.org/r/87fse39aer.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 30 Nov 2022 14:04:49 +0000 (15:04 +0100)]
Merge tag 'at91-dt-6.2-3' of https://git./linux/kernel/git/at91/linux into soc/dt
AT91 DT for 6.2 #3
It contains:
- proper power rail description for SDMMC devices available on
SAMA7G5-EK
- OTP controller has been added for LAN966X devices
* tag 'at91-dt-6.2-3' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: lan966x: Add otp support
ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1
Link: https://lore.kernel.org/r/20221125140525.384928-1-claudiu.beznea@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 30 Nov 2022 14:03:42 +0000 (15:03 +0100)]
Merge tag 'musb-for-v6.2-signed' of git://git./linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree related musb changes for omap3 for v6.2
Recent musb driver regressions eposed two issues for musb legacy
probing. The changes to use device_set_of_node_from_dev() confuse
the legacy interconnect code. And we now have to manually populate
the musb core irq resources.
The musb driver has a fix for these, but it's not a good long term
solution. To fix the issue properly, let's just update musb to
probe with ti-sysc interconnect driver with proper devicetree data.
This allows dropping most of the musb driver workaround later on.
And with these changes we have the omap2430 musb glue layer behaving
the same way for all the SoCs using it.
We need to patch the ti-sysc driver quirks, and add devicetree
data to make things work. And we want to drop the legacy data too
to avoid pointless warnings.
As we have a musb driver workaround, these changes are not needed as
fixes and can wait for the merge window.
* tag 'musb-for-v6.2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Drop legacy hwmod data for omap3 otg
ARM: dts: Update omap3 musb to probe with ti-sysc
bus: ti-sysc: Add otg quirk flags for omap3 musb
Link: https://lore.kernel.org/r/pull-1669364566-84575@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 30 Nov 2022 14:03:08 +0000 (15:03 +0100)]
Merge tag 'omap-for-v6.2/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree fixes for omaps for v6.2
Two devicetree fixes for omaps. These fixes are not urgent and
can wait for the merge window:
- Fix up the node names and missing #pwm-cells property for
ti,omap-dmtimer-pwm to avoid warnings when the the related
yaml binding gets merged
- Fix TDA998x port addressing
* tag 'omap-for-v6.2/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Unify pwm-omap-dmtimer node names
ARM: dts: am335x: Fix TDA998x ports addressing
ARM: dts: am335x-pcm-953: Define fixed regulators in root node
Link: https://lore.kernel.org/r/pull-1669363695-856423@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 29 Nov 2022 20:16:46 +0000 (21:16 +0100)]
Merge tag 'qcom-arm64-for-6.2' of https://git./linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DTS updates for 6.2
This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms
and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google
Pazquel and OnePlus Nord N100.
A wide variety of updates to align with DeviceTree bindings across
many/most platforms is introduced, and incorrectly styled comments are
adjusted across the tree.
Apps RSC is added to the cluster-idle power-domain across SM8150,
SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as
the last core is being powered down.
Remoteproc firmware patches are aligned with agreed upon structure used
in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony
Xperia devices and Samsung Galaxy Book2 (although these are not
available in linux-firmware today).
On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc
supply is specified for the HK01 board.
Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained
vibrator support.
The application subsystem's IOMMU and the display subsystem is enabled
for MSM8953.
A new CPU frequency table is introduced for MSM8996Pro, to properly
describe it separate of MSM8996. The GPU opp-table is extended as well.
On SC7180 USB is marked as a wakeup source, USB gains required-opps to
ensure that the core voltage rail is voted for as needed. The
description of the fingerprint sensor in Trogdor is corrected.
On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS
USB PHY is defined across SC7280.
The memory map across Google Herobrine is adjusted, to regain unused
memory on the WiFi SKUs. A LTE SKU of the Evoker board is introduced
and the bard gains touchscreen.
NVME support is disabled on Villager boards, as it's not used.
PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi
enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs
and thermal zones are intrduced for the same. Lenovo Thinkpad X13s
gains LID switch support.
Fairphone FP3 gains touchscreen support.
Support for Xiaomi Poco F1 variant with EBBG panel.
The round-robin ADC is enabled across DB845c, OnePlus devices and
Pocophone F1 devices.
The displayport controller on SDM845 is introduced.
SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card,
touchscreen and GPI DMA is enabled.
Fairphone FP4 got SD-card support.
UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and
SM8450.
Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC
regulators defined and USB definition corrected, to enable USB3.
The SDHCI controller is described for SM8450 and microSD support is
enabled for the HDK and QRD devices.
SM8450 also gains camera CCI interface and display clock controller.
* tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (261 commits)
arm64: dts: qcom: sdm845-polaris: Don't duplicate DMA assignment
arm64: dts: qcom: sm8350-sagami: Wire up USB regulators and fix USB3
arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators
arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more
arm64: dts: qcom: trim addresses to 8 digits
arm64: dts: msm8998: unify PCIe clock order withMSM8996
arm64: dts: msm8998: add MSM8998 specific compatible
arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller
arm64: dts: qcom: sc8280xp-x13s: enable modem
arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD
arm64: dts: qcom: sc8280xp-crd: enable WiFi controller
arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem
arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD
arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators
arm64: dts: qcom: sa8295p-adp: enable PCIe
arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes
arm64: dts: qcom: add sdm670 and pixel 3a device trees
arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment
arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE
arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card
...
Link: https://lore.kernel.org/r/20221124100650.1982448-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 29 Nov 2022 14:47:15 +0000 (15:47 +0100)]
Merge tag 'v6.2-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into asahi-wip
New boards:
- Model A and blade baseboards for the SOQuartz (rk3568) SoM,
- Anberic RG351M, RG353V, RG353VS; Odroid Go Super, Advance gaming devices
- Odroid M1
- Theobroma px30 SoM with baseboard
- Rockchip's own rk3566 demo board
Some core support for per SoC specifics:
- crypto support for rk3399 and rk3328
- second I2S controller for rk3568
- Cache properties for follow the binding for rk3308 and rk3328
Bigger device support updates for:
- SOQuartz: PCIe2, video output, gpu, HDMI sound
- Rock 3A: eth regulator, eth clock input, Wifi+Bt, I2S, PCIe3
As well as some minor extensions for Rock960 (hdmi supplies),
rk3566-roc-pc (PCIe2), Rock 4C+ (thermal support), Pinephone Pro (Wifi+Bt)
* tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (51 commits)
arm64: dts: rockchip: update cache properties for rk3308 and rk3328
arm64: dts: rockchip: Add SOQuartz Model A baseboard
dt-bindings: arm: rockchip: Add SOQuartz Model A
arm64: dts: rockchip: Add SOQuartz blade board
dt-bindings: arm: rockchip: Add SOQuartz Blade
arm64: dts: rockchip: Add Anbernic RG351M
arm64: dts: rockchip: Add Odroid Go Super
arm64: dts: rockchip: Add Odroid Go Advance Black Edition
dt-bindings: arm: rockchip: Add more RK3326 devices
arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add HDMI supplies on Rock960
arm64: dts: rockchip: Add dts for rockchip rk3566 box demo board
dt-bindings: rockchip: Add Rockchip rk3566 box demo board
arm64: dts: rockchip: Enable PCIe 2 on SOQuartz CM4IO
arm64: dts: rockchip: Enable HDMI sound on SOQuartz
arm64: dts: rockchip: Enable video output and HDMI on SOQuartz
arm64: dts: rockchip: Enable GPU on SOQuartz CM4
arm64: dts: rockchip: enable pcie2 on rk3566-roc-pc
...
Link: https://lore.kernel.org/r/4716610.aeNJFYEL58@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 29 Nov 2022 20:14:34 +0000 (21:14 +0100)]
Merge tag 'renesas-arm-dt-for-v6.2-tag3' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas ARM DT updates for v6.2 (take three)
- Rename Renesas DTB overlay source files from .dts to .dtso.
* tag 'renesas-arm-dt-for-v6.2-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Rename DTB overlay source files from .dts to .dtso
Link: https://lore.kernel.org/r/cover.1669283381.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Konstantin Porotchkin [Wed, 9 Nov 2022 15:07:43 +0000 (17:07 +0200)]
arm64: dts: marvell: add optee FW definitions
Add reserved memory and ARM firmware definitions for optee
memory region in Marvell Armada SoCs to avoid protected memory
access.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pierre Gondois [Mon, 31 Oct 2022 09:20:16 +0000 (10:20 +0100)]
arm64: dts: Update cache properties for marvell
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The recently added init_of_cache_level() function checks
these properties. Add them if missing.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Sat, 24 Sep 2022 11:58:26 +0000 (13:58 +0200)]
arm64: dts: armada-3720-turris-mox: Add missing interrupt for RTC
MCP7940MT-I/MNY RTC has connected interrupt line to GPIO2_5.
Fixes:
7109d817db2e ("arm64: dts: marvell: add DTS for Turris Mox")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Chris Packham [Fri, 11 Feb 2022 00:32:56 +0000 (13:32 +1300)]
ARM: dts: armada-xp: add interrupts for watchdog
The first interrupt is for the regular watchdog timeout. Normally the
RSTOUT line will trigger a reset before this interrupt fires but on
systems with a non-standard reset it may still trigger.
The second interrupt is for a timer1 which is used as a pre-timeout for
the watchdog.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Krzysztof Kozlowski [Fri, 25 Nov 2022 14:41:32 +0000 (15:41 +0100)]
ARM: dts: armada: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:
armada-370-seagate-personal-cloud.dtb: gpio-leds: 'red-sata0' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Dmitry Torokhov [Tue, 15 Nov 2022 23:12:41 +0000 (15:12 -0800)]
ARM: mvebu: switch to using gpiod API in pm-board code
This switches PM code to use the newer gpiod API instead of legacy
gpio API that we want to retire.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Thu, 14 Jul 2022 18:33:28 +0000 (20:33 +0200)]
ARM: dts: armada-39x: Fix compatible string for gpios
Armada 39x supports per CPU interrupts for gpios, like Armada XP.
So add compatible string "marvell,armadaxp-gpio" for Armada 39x GPIO nodes.
Driver gpio-mvebu.c which handles both pre-XP and XP variants already
provides support for per CPU interrupts on XP and newer variants.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
d81a914fc630 ("ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Thu, 14 Jul 2022 18:33:27 +0000 (20:33 +0200)]
ARM: dts: armada-38x: Fix compatible string for gpios
Armada 38x supports per CPU interrupts for gpios, like Armada XP. Pre-XP
variants like Armada 370 do not support per CPU interrupts for gpios.
So change compatible string for Armada 38x from "marvell,armada-370-gpio"
which indicates pre-XP variant to "marvell,armadaxp-gpio" which indicates
XP variant or new.
Driver gpio-mvebu.c which handles both pre-XP and XP variants already
provides support for per CPU interrupts on XP and newer variants.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
7cb2acb3fbae ("ARM: dts: mvebu: Add PWM properties for armada-38x")
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Thu, 25 Aug 2022 12:21:02 +0000 (14:21 +0200)]
ARM: dts: turris-omnia: Add switch port 6 node
Switch port 6 is connected to eth0, so add appropriate device tree node for it.
Fixes:
26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 27 Jul 2022 13:09:26 +0000 (15:09 +0200)]
ARM: dts: turris-omnia: Add ethernet aliases
This allows bootloader to correctly pass MAC addresses used by bootloader
to individual interfaces into kernel device tree.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:53 +0000 (00:30 +0200)]
ARM: dts: armada-39x: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
538da83ddbea ("ARM: mvebu: add Device Tree files for Armada 39x SoC and board")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:52 +0000 (00:30 +0200)]
ARM: dts: armada-38x: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
0d3d96ab0059 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:51 +0000 (00:30 +0200)]
ARM: dts: armada-375: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
4de59085091f ("ARM: mvebu: add Device Tree description of the Armada 375 SoC")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:50 +0000 (00:30 +0200)]
ARM: dts: armada-xp: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
9d8f44f02d4a ("arm: mvebu: add PCIe Device Tree informations for Armada XP")
Fixes:
12b69a599745 ("ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capable")
Fixes:
2163e61c92d9 ("ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:49 +0000 (00:30 +0200)]
ARM: dts: armada-370: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
a09a0b7c6ff1 ("arm: mvebu: add PCIe Device Tree informations for Armada 370")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 17 Aug 2022 22:30:48 +0000 (00:30 +0200)]
ARM: dts: dove: Fix assigned-addresses for every PCIe Root Port
BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.
Fixes:
74ecaa403a74 ("ARM: dove: add PCIe controllers to SoC DT")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pawel Dembicki [Sat, 29 Oct 2022 20:57:38 +0000 (22:57 +0200)]
ARM: dts: kirkwood: Add Zyxel NSA310S board
Zyxel NSA310S is a NAS based on Marvell kirkwood SoC.
Specification:
- Processor Marvell 88F6702 1 GHz
- 256MB RAM
- 128MB NAND
- 1x GBE LAN port (PHY: Marvell 88E1318)
- 2x USB 2.0
- 1x SATA
- 3x button
- 7x leds
- serial on J1 connector (115200 8N1) (GND-NOPIN-RX-TX-VCC)
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Acked-by: Adam Baker <linux@baker-net.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Tue, 27 Sep 2022 14:19:20 +0000 (16:19 +0200)]
arm64: dts: armada-3720-turris-mox: Define slot-power-limit-milliwatt for PCIe
PCIe Slot Power Limit on Turris Mox is 10W.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Horatiu Vultur [Fri, 16 Sep 2022 19:49:46 +0000 (21:49 +0200)]
ARM: dts: lan966x: Add otp support
Add OTP (one time programmable) support.
The both lan966x SocS (lan9662 and lan9668) have the same OTP IP.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220916194946.2869510-1-horatiu.vultur@microchip.com
Eugen Hristev [Thu, 24 Nov 2022 15:46:10 +0000 (17:46 +0200)]
ARM: dts: at91: sama7g5ek: align power rails for sdmmc0/1
On this board SDMMC0 has a 1.8 signaled eMMC device powered at
3.3V. Hence, correctly describe the connected rails from the PMIC.
SDMMC1 is connected to a voltage switch that can change from
3.3V to 1.8V by a hardware controlled pin.
However SDMMC1 at the moment works only in 3.3V mode (default speed,
no UHS-I modes), thus connect the signaling to the 3.3V rail.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[claudiu.beznea: reshaped a bit the commit message]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20221124154610.246790-1-eugen.hristev@microchip.com
Arnd Bergmann [Wed, 23 Nov 2022 12:03:02 +0000 (13:03 +0100)]
Merge tag 'amlogic-arm64-dt-for-v6.2' of https://git./linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT changes for v6.2:
- meson-gxl: add SPI pinctrl nodes for CLK
- meson-gxbb: add SPI pinctrl nodes for CLK
- Enable active coling using gpio-fan on Odroid N2/N2+
- remove clock-frequency from rtc
- Update cache properties for amlogic
- Add DDR PMU node for G12 series SoC
- document Odroid Go Ultra compatible
- add initial Odroid Go Ultra DTS
* tag 'amlogic-arm64-dt-for-v6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
arm64: dts: amlogic: add initial Odroid Go Ultra DTS
dt-bindings: amlogic: document Odroid Go Ultra compatible
arm64: dts: meson: Add DDR PMU node
arm64: dts: Update cache properties for amlogic
arm64: dts: meson: remove clock-frequency from rtc
arm64: dts: meson: Enable active coling using gpio-fan on Odroid N2/N2+
arm64: dts: meson-gxbb: add SPI pinctrl nodes for CLK
arm64: dts: meson-gxl: add SPI pinctrl nodes for CLK
Link: https://lore.kernel.org/r/8faa1d3c-5a17-2c3f-92d1-f8fe3df74131@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 23 Nov 2022 11:39:47 +0000 (12:39 +0100)]
Merge tag 'nuvoton-6.2-devicetree' of git://git./linux/kernel/git/joel/bmc into soc/dt
Nuvoton device tree updates for 6.2
- Update fix-partition syntax
- WPCM450 updates for SPI controller, clock, watchdog, serial
- GPIO line names for Supermicro X9SCI-LN4F BMC
* tag 'nuvoton-6.2-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: nuvoton: wpcm450: Add missing aliases for serial0/serial1
ARM: dts: wpcm450: Enable watchdog by default
ARM: dts: wpcm450: Add clock controller node
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add SPI flash
ARM: dts: wpcm450: Add FIU SPI controller node
ARM: dts: nuvoton: Remove bogus unit addresses from fixed-partition nodes
ARM: dts: nuvoton,wpcm450-supermicro-x9sci-ln4f: Add GPIO line names
Link: https://lore.kernel.org/r/CACPK8XffL5_L5D_ZGQid0r4h0wfTc+XBGUO1-0QW7ErPPrrvEQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 23 Nov 2022 11:37:11 +0000 (12:37 +0100)]
Merge tag 'ti-k3-dt-for-v6.2' of git://git./linux/kernel/git/ti/linux into soc/dt
TI K3 devicetree updates for v6.2
New Features:
J721e:
* PWMs, BeagleBone AI-64 platform.
J721s2:
* Crypto
AM65/AM62:
* General purpose Timer support (system timer is still arch timer)
Fixes:
* Bunch of fixes in crypto usage and GPIO intr
* Minor schema related fixes for audio, addressing etc.
Cleanups:
* Refactor of device tree to "disable" peripherals at SoC level
for nodes that are un-usable without board level properties.
TI K3 devices have large number of peripherals of which only a
smaller subset is actually enabled on platforms. Switching
to this approach enables two benefits: lesser confusion in
creating board level devicetrees as only relevant pinned out
device nodes need enabled, as well as smaller board device
trees as most un-used peripherals don't need to explicitly
disabled.
* tag 'ti-k3-dt-for-v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (61 commits)
arm64: dts: ti: Add k3-j721e-beagleboneai64
dt-bindings: arm: ti: Add bindings for BeagleBone AI-64
arm64: dts: ti: k3-j721s2-main: Enable crypto accelerator
arm64: dts: ti: k3-am64-main: Drop RNG clock
arm64: dts: ti: k3-j721e-main: Drop RNG clock
arm64: dts: ti: k3-am65-main: Drop RNG clock
arm64: dts: ti: j721e-common-proc-board: Fix sound node-name
arm64: dts: ti: k3-j721s2: Fix the interrupt ranges property for main & wkup gpio intr
arm64: dts: ti: k3-j7200-mcu-wakeup: Drop dma-coherent in crypto node
arm64: dts: ti: k3-j721e-main: Drop dma-coherent in crypto node
arm64: dts: ti: k3-am65-main: Drop dma-coherent in crypto node
arm64: dts: ti: k3-am62: Add general purpose timers for am62
arm64: dts: ti: k3-am65: Add general purpose timers for am65
arm64: dts: ti: k3-am65: Configure pinctrl for timer IO pads
arm64: dts: ti: Trim addresses to 8 digits
arm64: dts: ti: k3-j721e-sk: Add pinmux for RPi Header
arm64: dts: ti: k3-j721e-main: Add dts nodes for EHRPWMs
arm64: dts: ti: k3-am65: Enable McASP nodes at the board level
arm64: dts: ti: k3-am65: Enable Mailbox nodes at the board level
arm64: dts: ti: k3-am65: Enable PCIe nodes at the board level
...
Link: https://lore.kernel.org/r/20221122190209.jwfj56d6kxpxdkua@untreated
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 23 Nov 2022 11:29:23 +0000 (12:29 +0100)]
Merge tag 'aspeed-6.2-devicetree' of git://git./linux/kernel/git/joel/bmc into soc/dt
ASPEED device tree updates for 6.2
- New machines
* IBM Bonnell AST2600 BMC, for a Power10 server
* Delta AHE-50DC AST1250 BMC, for a 1U Open19 power shelf
- Removed machines
* IBM Mihawk AST2500 BMC, a Power9 server similar to Witherspoon
- Fixes and updates for bletchley, mtjade/mtmitchell, rainier/everest
* tag 'aspeed-6.2-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: aspeed: mtjade: Add SMPro nodes
ARM: dts: aspeed: mtjade,mtmitchell: Add BMC SSIF nodes
ARM: dts: aspeed: Add Delta AHE-50DC BMC
dt-bindings: arm: aspeed: document Delta AHE-50DC BMC
ARM: dts: aspeed: rainier: Fix pca9551 nodes
ARM: dts: aspeed: p10bmc: Add occ-hwmon nodes
ARM: dts: aspeed-g6: Add aliases for mdio nodes
ARM: dts: aspeed: Remove Mihawk
ARM: dts: aspeed: rainier,everest: Move reserved memory regions
ARM: dts: aspeed: Add IBM Bonnell system BMC devicetree
ARM: dts: aspeed: bletchley: Enable emmc and ehci1
ARM: dts: aspeed: bletchley: Update and fix gpio-line-names
ARM: dts: aspeed: bletchley: Update fusb302 nodes
ARM: dts: aspeed: bletchley: Bind presence-sledX pins via gpio-keys
ARM: dts: aspeed: bletchley: Disable GPIOV2 pull-down
ARM: dts: aspeed: bletchley: Change LED sys_log_id to active low
Link: https://lore.kernel.org/r/CACPK8Xfsc8BaL_qAgV+3Rk-AFcQoDVfTpMzHvq_rR-UYqwpNNQ@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:03:55 +0000 (11:03 +0100)]
Merge tag 'tegra-for-6.2-arm-dt' of git://git./linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.2-rc1
This fixes various minor issues in device trees that are flagged by the
DT validation tools.
* tag 'tegra-for-6.2-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove duplicate pin entry in pinmux
ARM: tegra: Remove unused interrupt-parent properties
ARM: tegra: Fix nvidia,io-reset properties
ARM: tegra: Add missing power-supply for panels
ARM: tegra: Fixup pinmux node names
ARM: tegra: Use correct compatible string for ASUS TF101 panel
Link: https://lore.kernel.org/r/20221119012025.3968358-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Pierre Gondois [Mon, 7 Nov 2022 15:57:12 +0000 (16:57 +0100)]
arm64: dts: rockchip: update cache properties for rk3308 and rk3328
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Link: https://lore.kernel.org/r/20221107155825.1644604-20-pierre.gondois@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Andrew Powers-Holmes [Wed, 16 Nov 2022 11:53:37 +0000 (12:53 +0100)]
arm64: dts: rockchip: Add SOQuartz Model A baseboard
This patch adds the device tree for the "Model A" baseboard for
the SOQuartz CM4 SoM, which is not to be confused with the
Quartz64 Model A, which is the same form factor and SoC, but is
not a CM4 carrier board.
The board features a PCIe 2 x1 slot, USB 2 host ports, CSI/DSI
connectors, an eDP FFC connector, gigabit ethernet, HDMI, and a
12V DC barrel jack. Also present is a microSD card slot, 40-pin
GPIO, and a power and reset button.
Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net>
[rebase, misc fixes, reword]
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20221116115337.541601-5-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Nicolas Frattaroli [Wed, 16 Nov 2022 11:53:36 +0000 (12:53 +0100)]
dt-bindings: arm: rockchip: Add SOQuartz Model A
The SOQuartz Model A base board is a carrier board for the CM4
form factor, designed around the PINE64 SOQuartz CM4 SoM.
The board sports "Model A" dimensions like the Quartz64 Model A,
but is not to be confused with that.
As for I/O, it features USB 2 ports, Gigabit Ethernet, a PCIe 2
x1 slot, HDMI, a 40-pin GPIO header, CSI/DSI connectors, an eDP
flat-flex cable connector, a 12V DC barrel jack for power input
and power/reset buttons as well as a microSD card slot.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221116115337.541601-4-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Andrew Powers-Holmes [Wed, 16 Nov 2022 11:53:35 +0000 (12:53 +0100)]
arm64: dts: rockchip: Add SOQuartz blade board
This adds a device tree for the PINE64 SOQuartz blade baseboard,
a 1U rack mountable baseboard for the CM4 form factor with PoE
support designed for the SOQuartz CM4 System-on-Module.
The board takes power from either PoE or a 5V DC input, and allows
for mounting an M.2 SSD.
The board also features one USB 2.0 host port, one HDMI output,
a 3.5mm jack for UART, and the aforementioned gigabit networking
port.
Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net>
[rebase, squash, reword, misc fixes]
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Link: https://lore.kernel.org/r/20221116115337.541601-3-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Nicolas Frattaroli [Wed, 16 Nov 2022 11:53:34 +0000 (12:53 +0100)]
dt-bindings: arm: rockchip: Add SOQuartz Blade
Add a compatible for the SOQuartz Blade base board to the rockchip
platforms binding.
The SOQuartz Blade is a PoE-capable carrier board for the CM4 SoM
form factor, designed around the SOQuartz CM4 System-on-Module.
The board features the usual connectivity (GPIO, USB, HDMI,
Ethernet) and an M.2 slot for SSDs. It may also be powered from
a 5V barrel jack input, and has a 3.5mm jack for UART debug
output.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221116115337.541601-2-frattaroli.nicolas@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Maya Matuszczyk [Thu, 17 Nov 2022 21:59:54 +0000 (22:59 +0100)]
arm64: dts: rockchip: Add Anbernic RG351M
This device is a clone of Odroid Go Advance, with added PWM motor, internal
gamepad connected on USB instead of just having it be on GPIO + ADC, and
missing battery shunt resistor.
Due to missing shunt resistor and lack of a workaround in rk817_charger
driver rk817_charger is not enabled in dts.
There's also an LED on GPIO 77(I *guess* PB5 on &gpio2),
that is controlled in a weird way:
- It is set to red by setting output value to 1
- Set to green by setting output value to 0
- Set to yellow by setting gpio direction to input
I have no idea how to describe that in DTS, without adding a custom
driver, for now it's just left out.
Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Link: https://lore.kernel.org/r/20221117215954.4114202-6-maccraft123mc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Maya Matuszczyk [Thu, 17 Nov 2022 21:59:53 +0000 (22:59 +0100)]
arm64: dts: rockchip: Add Odroid Go Super
This device is another revision of Odroid Go Advance, with added two
volume buttons, a second analog stick and a bigger screen that isn't yet
supported in the mainline kernel.
Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Link: https://lore.kernel.org/r/20221117215954.4114202-5-maccraft123mc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Maya Matuszczyk [Thu, 17 Nov 2022 21:59:52 +0000 (22:59 +0100)]
arm64: dts: rockchip: Add Odroid Go Advance Black Edition
This device is a minor revision of the origin Odroid Go Advance, with
added two more buttons and a WiFi card
Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Link: https://lore.kernel.org/r/20221117215954.4114202-4-maccraft123mc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Maya Matuszczyk [Thu, 17 Nov 2022 21:59:51 +0000 (22:59 +0100)]
dt-bindings: arm: rockchip: Add more RK3326 devices
This patch adds Anbernic RG351M, Odroid Go Advance Black Edition and
Odroid Go Super into dt bindings.
Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221117215954.4114202-3-maccraft123mc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Maya Matuszczyk [Thu, 17 Nov 2022 21:59:50 +0000 (22:59 +0100)]
arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
To support more devices that are clones of this device or minor
revisions without duplication move most of go2's dts into a dtsi file.
Signed-off-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Link: https://lore.kernel.org/r/20221117215954.4114202-2-maccraft123mc@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Arnd Bergmann [Tue, 22 Nov 2022 22:10:15 +0000 (23:10 +0100)]
Merge tag 'v6.1-next-dts64' of https://git./linux/kernel/git/matthias.bgg/linux into soc/dt
Fix check warnings all over the place.
mt7986:
- Add crypto, I2C and SPI nodes
mt6795:
- Add clock nodes
- Add DMA support for UARTs
- Add MMC nodes
- Add basic support for Sonyx Xperia M5
mt8195:
- Add video enconder node
- Add PCIe support
- Fine tune capacity-dmips-mhz
- Add support for internal and external display port
* tag 'v6.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (35 commits)
arm64: dts: mt7986: add spi related device nodes
arm64: dts: mt7986: move wed_pcie node
arm64: dts: mediatek: Add support for MT6795 Sony Xperia M5 smartphone
dt-bindings: arm: mediatek: Add compatible for MT6795 Sony Xperia M5
arm64: dts: mediatek: mt6795: Add support for eMMC/SD/SDIO controllers
arm64: dts: mediatek: mt6795: Add support for APDMA and wire up UART DMAs
arm64: dts: mediatek: mt6795: Replace UART dummy clocks with pericfg
arm64: dts: mediatek: mt6795: Add topckgen, infra, peri clocks/resets
arm64: dts: mediatek: cherry: Add edptx and dptx support
arm64: dts: mediatek: cherry: Add dp-intf ports
arm64: dts: mt8195: Add edptx and dptx nodes
arm64: dts: mt8195: Add dp-intf nodes
arm64: dts: mediatek: mt6797: Fix 26M oscillator unit name
arm64: dts: mediatek: pumpkin-common: Fix devicetree warnings
arm64: dts: mt2712-evb: Fix usb vbus regulators unit names
arm64: dts: mt2712-evb: Fix vproc fixed regulators unit names
arm64: dts: mt2712e: Fix unit address for pinctrl node
arm64: dts: mt2712e: Fix unit_address_vs_reg warning for oscillators
arm64: dts: mt6779: Fix devicetree build warnings
arm64: dts: mt7896a: Fix unit_address_vs_reg warning for oscillator
...
Link: https://lore.kernel.org/r/8933d687-71f0-e9ad-a7c6-2e5a8993463d@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Anand Moon [Wed, 16 Nov 2022 20:01:45 +0000 (20:01 +0000)]
arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
Add regulator support for ethernet node
Fix following warning.
[ 7.365199] rk_gmac-dwmac
fe010000.ethernet: no regulator found
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20221116200150.4657-4-linux.amoon@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Anand Moon [Wed, 16 Nov 2022 20:01:44 +0000 (20:01 +0000)]
arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
Add support of external clock gmac1_clkin which is used as input clock
to ethernet node.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Michael Riesch <michael.riesch@wolfvision.net>
Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20221116200150.4657-3-linux.amoon@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Arnd Bergmann [Tue, 22 Nov 2022 22:02:24 +0000 (23:02 +0100)]
Merge tag 'tegra-for-6.2-arm64-dt-v2' of git://git./linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.2-rc1
This contains many new additions, primarily for Tegra234, as well as a
slew of cleanups for issues flagged by the DT validation tools.
* tag 'tegra-for-6.2-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
arm64: tegra: Remove unneeded clock-names for Tegra132 PWM
arm64: tegra: Fix up compatible string for SDMMC1 on Tegra234
arm64: tegra: Remove unused reset-names for QSPI
arm64: tegra: Fixup pinmux node names
arm64: tegra: Remove reset-names for QSPI
arm64: tegra: Use correct compatible string for Tegra234 HDA
arm64: tegra: Use correct compatible string for Tegra194 HDA
arm64: tegra: Use vbus-gpios property
arm64: tegra: Restructure Tegra210 PMC pinmux nodes
arm64: tegra: Update cache properties
arm64: tegra: Remove 'enable-active-low'
arm64: tegra: Add dma-channel-mask in GPCDMA node
arm64: tegra: Fix non-prefetchable aperture of PCIe C3 controller
arm64: tegra: Add missing compatible string to Ethernet USB device
arm64: tegra: Separate AON pinmux from main pinmux on Tegra194
arm64: tegra: Add ECAM aperture info for all the PCIe controllers
arm64: tegra: Remove clock-names from PWM nodes
arm64: tegra: Enable GTE nodes
arm64: tegra: Update console for Jetson Xavier and Orin
arm64: tegra: Enable PWM users on Jetson AGX Orin
...
Link: https://lore.kernel.org/r/20221121171239.2041835-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 22 Nov 2022 22:00:52 +0000 (23:00 +0100)]
Merge tag 'tegra-for-6.2-dt-bindings-v2' of git://git./linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.2-rc1
New memory client IDs and IOMMU stream IDs, as well as new compatible
strings are introduced to support more hardware on Tegra234. Some device
tree bindings are converted to json-schema to allow formal validation.
* tag 'tegra-for-6.2-dt-bindings-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: usb: tegra-xusb: Convert to json-schema
dt-bindings: pwm: tegra: Convert to json-schema
dt-bindings: pinctrl: tegra194: Separate instances
dt-bindings: pinctrl: tegra: Convert to json-schema
dt-bindings: PCI: tegra234: Add ECAM support
dt-bindings: pwm: tegra: Document Tegra234 PWM
dt-bindings: Add bindings for Tegra234 NVDEC
dt-bindings: tegra: Update headers for Tegra234
dt-bindings: Add headers for NVDEC on Tegra234
Link: https://lore.kernel.org/r/20221121171239.2041835-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 22 Nov 2022 22:00:03 +0000 (23:00 +0100)]
Merge tag 'socfpga_dts_updates_for_v6.2' of git://git./linux/kernel/git/dinguyen/linux into soc/dt
SoCFPGA dts updates for v6.2
- Use the "clk-phase-sd-hs" property for SDMMC
- Remove the "clk-phase" fom the sdmmc_clk that is no longer used
- Clean dtschema for mmc node
- Increase NAND partition for Arria10
* tag 'socfpga_dts_updates_for_v6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
arm: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
arm: dts: socfpga: remove "clk-phase" in sdmmc_clk
arm: dts: socfpga: align mmc node names with dtschema
ARM: dts: socfpga: arria10: Increase NAND boot partition size
Link: https://lore.kernel.org/r/20221121163259.341974-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 22 Nov 2022 21:57:53 +0000 (22:57 +0100)]
Merge tag 'riscv-dt-for-v6.2-mw0' of https://git./linux/kernel/git/conor/linux into soc/dt
RISC-V DeviceTrees for v6.2
dt-bindings:
- new compatibles to support the StarFive VisionFive & thead CPU cores
- a fix for the PolarFire SoC's pwm binding, merged through my tree as
suggested by the PWM maintainers
Microchip:
- Non-urgent fix for the node address not matches the reg in a way that
the checkers don't complain about
- Add GPIO controlled LEDs for Icicle
- Support for the "CCC" clocks in the FPGA fabric. Previously these
used fixed-frequency clocks in the dt, but if which CCC is in use is
known, as in the v2022.09 Icicle Kit Reference Design, the rates can
be read dynamically. It's an "is known" as it *can* be set via
constraints in the FPGA tooling but does not have to be.
- A fix for the Icicle's pwm-cells
- Removal of some unused PCI clocks
StarFive:
- Addition of the VisionFive DT, which has been a long time coming!
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.2-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles
riscv: dts: microchip: remove unused pcie clocks
riscv: dts: microchip: remove pcie node from the sev kit
riscv: dts: microchip: fix the icicle's #pwm-cells
dt-bindings: pwm: fix microchip corePWM's pwm-cells
riscv: dts: starfive: Add StarFive VisionFive V1 device tree
riscv: dts: starfive: Add common DT for JH7100 based boards
dt-bindings: riscv: starfive: Add StarFive VisionFive V1 board
riscv: dts: microchip: fix memory node unit address for icicle
riscv: dts: microchip: icicle: Add GPIO controlled LEDs
riscv: dts: microchip: add the mpfs' fabric clock control
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tony Lindgren [Fri, 18 Nov 2022 12:19:24 +0000 (14:19 +0200)]
ARM: dts: Unify pwm-omap-dmtimer node names
There is no reg property for pwm-omap-dmtimer.
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Tue, 22 Nov 2022 11:25:14 +0000 (13:25 +0200)]
ARM: OMAP2+: Drop legacy hwmod data for omap3 otg
With complete devicetree data available to probe with ti-sysc interconnect
target module driver, we can now drop the related SoC data.
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Sicelo A. Mhlongo <absicsz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Tue, 22 Nov 2022 11:25:14 +0000 (13:25 +0200)]
ARM: dts: Update omap3 musb to probe with ti-sysc
We can drop the legacy booting for the related musb driver if we update
the omap3 SoCs variants to boot using ti-sysc interconnect target module.
devicetree@vger.kernel.org
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Sicelo A. Mhlongo <absicsz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Tue, 22 Nov 2022 11:25:14 +0000 (13:25 +0200)]
bus: ti-sysc: Add otg quirk flags for omap3 musb
To prepare for probing omap3 musb with ti-sysc, these quirk flags are
needed similar to what we have for omap4.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Sicelo A. Mhlongo <absicsz@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Geert Uytterhoeven [Mon, 21 Nov 2022 16:11:09 +0000 (17:11 +0100)]
ARM: dts: am335x: Fix TDA998x ports addressing
Fix addressing in the NXP TDA998x HDMI transmitters' subnodes:
- Add missing #{address,size}-cells properties to ports capsule,
- Add missing reg properties to port child nodes,
- Drop bogus unit addresses from endpoint grandchildren nodes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Message-Id: <
e9ac64d29bc18b3b394fd9a2abbfeafacc624f98.
1669047037.git.geert+renesas@glider.be>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Jonathan Neuschäfer [Sat, 8 Oct 2022 13:08:22 +0000 (15:08 +0200)]
ARM: dts: nuvoton: wpcm450: Add missing aliases for serial0/serial1
Without these, /chosen/stdout-path = "serial0:115200n8" does not work.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221008130822.1227104-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Jonathan Neuschäfer [Thu, 9 Jun 2022 21:48:29 +0000 (23:48 +0200)]
ARM: dts: wpcm450: Enable watchdog by default
The watchdog timer is always usable, regardless of board design, so
there is no point in marking the watchdog device as disabled-by-default
in nuvoton-wpcm450.dtsi.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20220609214830.127003-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Jonathan Neuschäfer [Fri, 4 Nov 2022 16:18:48 +0000 (17:18 +0100)]
ARM: dts: wpcm450: Add clock controller node
This declares the clock controller and the necessary 48 Mhz reference
clock in the WPCM450 device. Switching devices over to the clock
controller is intentionally done in a separate patch to give time for
the clock controller driver to land.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221104161850.2889894-5-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Jonathan Neuschäfer [Sat, 5 Nov 2022 18:59:09 +0000 (19:59 +0100)]
ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add SPI flash
Add the BMC firmware flash to the devicetree, so that it can be accessed
from Linux.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-7-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Jonathan Neuschäfer [Sat, 5 Nov 2022 18:59:08 +0000 (19:59 +0100)]
ARM: dts: wpcm450: Add FIU SPI controller node
Add the SPI controller (FIU, Flash Interface Unit) to the WPCM450
devicetree, according to the newly defined binding, as well as the SHM
(shared memory interface) syscon.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-6-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Robert Nelson [Fri, 18 Nov 2022 16:31:39 +0000 (10:31 -0600)]
arm64: dts: ti: Add k3-j721e-beagleboneai64
BeagleBoard.org BeagleBone AI-64 is an open source hardware single
board computer based on the Texas Instruments TDA4VM SoC featuring
dual-core 2.0GHz Arm Cortex-A72 processor, C7x+MMA and 2 C66x
floating-point VLIW DSPs, 3x dual Arm Cortex-R5 co-processors,
2x 6-core Programmable Real-Time Unit and Industrial Communication
SubSystem, PowerVR Rogue 8XE GE8430 3D GPU. The board features 4GB
DDR4, USB3.0 Type-C, 2x USB SS Type-A, miniDisplayPort, 2x 4-lane
CSI, DSI, 16GB eMMC flash, 1G Ethernet, M.2 E-key for WiFi/BT, and
BeagleBone expansion headers.
This board family can be indentified by the BBONEAI-64-B0 in the
at24 eeprom:
[aa 55 33 ee 01 37 00 10 2e 00 42 42 4f 4e 45 41 |.U3..7....BBONEA|]
[49 2d 36 34 2d 42 30 2d 00 00 42 30 30 30 37 38 |I-64-B0-..B00078|]
https://beagleboard.org/ai-64
https://git.beagleboard.org/beagleboard/beaglebone-ai-64
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Andrew Davis <afd@ti.com>
CC: Nishanth Menon <nm@ti.com>
CC: Vignesh Raghavendra <vigneshr@ti.com>
CC: Tero Kristo <kristo@kernel.org>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221118163139.3592054-2-robertcnelson@gmail.com
Sam Shih [Fri, 18 Nov 2022 19:01:21 +0000 (20:01 +0100)]
arm64: dts: mt7986: add spi related device nodes
This patch adds spi support for MT7986.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221118190126.100895-7-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Frank Wunderlich [Fri, 18 Nov 2022 19:01:16 +0000 (20:01 +0100)]
arm64: dts: mt7986: move wed_pcie node
Move the wed_pcie node to have node aligned by address.
Fixes:
00b9903996b3 ("arm64: dts: mediatek: mt7986: add support for Wireless Ethernet Dispatch")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221118190126.100895-2-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Robert Nelson [Fri, 18 Nov 2022 16:31:38 +0000 (10:31 -0600)]
dt-bindings: arm: ti: Add bindings for BeagleBone AI-64
This board is based on the ti,j721e
https://beagleboard.org/ai-64
https://git.beagleboard.org/beagleboard/beaglebone-ai-64
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
CC: Nishanth Menon <nm@ti.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221118163139.3592054-1-robertcnelson@gmail.com
Arnd Bergmann [Mon, 21 Nov 2022 10:56:08 +0000 (11:56 +0100)]
Merge tag 'renesas-arm-dt-for-v6.2-tag2' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas ARM DT updates for v6.2 (take two)
- Timer (TMU and CMT) and quad Cortex-A76 CPU topology support for
the R-Car V4H SoC,
- Watchdog, L2 cache, and system controller support for the RZ/V2M
SoC on the RZ/V2M Evaluation Kit 2.0,
- Ethernet Switch and SERDES supports for the R-Car S4-8 SoC and the
Spider development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v6.2-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits)
arm64: dts: renesas: spider-ethernet: Enable Ethernet Switch and SERDES
arm64: dts: renesas: r8a779f0: Add Ethernet Switch and SERDES nodes
arm64: dts: renesas: r9a09g011: Add system controller node
arm64: dts: renesas: r8a779g0: Add CA76 operating points
arm64: dts: renesas: r8a779g0: Add CPU core clocks
arm64: dts: renesas: r8a779g0: Add CPUIdle support
arm64: dts: renesas: r8a779g0: Add secondary CA76 CPU cores
arm64: dts: renesas: r8a779g0: Add L3 cache controller
arm64: dts: renesas: r9a09g011: Add L2 Cache node
arm64: dts: renesas: rzv2mevk2: Enable watchdog
arm64: dts: renesas: r9a09g011: Add watchdog node
arm64: dts: renesas: spider-cpu: Switch from SCIF3 to HSCIF0
arm64: dts: renesas: rzg2l: Drop #address-cells from pinctrl nodes
arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings
arm64: dts: renesas: rzg2l: Add missing cache-level properties
arm64: dts: renesas: r8a779g0: Add CMT node
arm64: dts: renesas: r9a09g011: Fix unit address format error
arm64: dts: renesas: white-hawk-cpu: Sort RWDT entry correctly
arm64: dts: renesas: r8a779g0: Add TMU nodes
arm64: dts: renesas: r8a779f0: Fix SCIF "brg_int" clock
...
Link: https://lore.kernel.org/r/cover.1668788921.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:53:45 +0000 (11:53 +0100)]
Merge tag 'renesas-riscv-dt-for-v6.2-tag1' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas RISC-V DT updates for v6.2
- Add initial support for the Renesas RZ/Five SoC and the Renesas
RZ/Five SMARC EVK development board.
* tag 'renesas-riscv-dt-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
MAINTAINERS: Add entry for Renesas RISC-V
riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC
Link: https://lore.kernel.org/r/cover.1668788930.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:53:09 +0000 (11:53 +0100)]
Merge tag 'renesas-dt-bindings-for-v6.2-tag2' of git://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.2 (take two)
- Document support for the Andes Technology AX45MP RISC-V CPU Core, as
used on the Renesas RZ/Five SoC,
- Document support for the Renesas RZ/V2M System Configuration.
* tag 'renesas-dt-bindings-for-v6.2-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration
dt-bindings: riscv: Add Andes AX45MP core to the list
dt-bindings: riscv: Sort the CPU core list alphabetically
Link: https://lore.kernel.org/r/cover.1668788927.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:44:13 +0000 (11:44 +0100)]
Merge tag 'stm32-dt-for-v6.2-1' of git://git./linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.2, round 1
Highlights:
----------
- MPU:
- ST boards:
- Add MCP23017 IO expander support on stm32mp135f-dk board.
- Add stm32g0 support for USB typeC on stm32mp135f-dk
- Add USB (EHCI / OTG) on stm32mp135f-dk
- Add ADC support on stm32mp135f-dk
- Add USB2514B onboard hub on stm32mp157c-ev1
- DH:
- Fix severals Yaml DT validation issues
* tag 'stm32-dt-for-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (28 commits)
ARM: dts: stm32: Rename mdio0 to mdio on DHCOR Testbench board
ARM: dts: stm32: add mcp23017 IO expander on I2C1 on stm32mp135f-dk
ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
ARM: dts: stm32: enable USB OTG in dual role mode on stm32mp135f-dk
ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
ARM: dts: stm32: add fixed regulators to support usb on stm32mp135f-dk
ARM: dts: stm32: add USB OTG HS support on stm32mp131
ARM: dts: stm32: add UBSH EHCI and OHCI support on stm32mp131
ARM: dts: stm32: add USBPHYC and dual USB HS PHY support on stm32mp131
ARM: dts: stm32: add PWR fixed regulators on stm32mp131
ARM: dts: stm32: Fix AV96 WLAN regulator gpio property
ARM: dts: stm32: add adc support on stm32mp135f-dk
ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk
ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
ARM: dts: stm32: add adc support to stm32mp13
ARM: dts: stm32: Drop MMCI interrupt-names
ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
...
Link: https://lore.kernel.org/r/3235e5be-d89f-f76c-5e25-5d1210feb857@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:43:39 +0000 (11:43 +0100)]
Merge tag 'hisi-arm64-dt-for-6.2' of https://github.com/hisilicon/linux-hisi into soc/dt
ARM64: DT: HiSilicon ARM64 DT updates for 6.2
- Add missing cache-level properties
* tag 'hisi-arm64-dt-for-6.2' of https://github.com/hisilicon/linux-hisi:
arm64: dts: Update cache properties for hisilicon
Link: https://lore.kernel.org/r/63744D38.9010700@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:40:29 +0000 (11:40 +0100)]
Merge tag 'imx-dt64-6.2' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree update for 6.2:
- New device trees for i.MX8MM based Cloos PHG and WB15 SoM/EVK.
- A set of tqma8mpql/mba8mpxl changes, adding USB Host, PCIe, PWM fan
support.
- Rename DTB overlay source files from .dts to .dtso.
- A series from Frank Li to add USB, ADC, FlexSPI, LPSPI support for
i.MX8DXL.
- A couple of librem5-devkit changes, switching LED to use PWM and using
function and color properties for LED.
- Enable wakeup-source for USB PHY for i.MX8MM/N EVK.
- A set of random changes from Marcel Ziswiler to improve i.MX8M based
Verdin device trees.
- A series from Marek Vasut to update Data Modul i.MX8M Mini eDM SBC and
DH electronics i.MX8M Plus DHCOM, modeling PMIC to SNVS RTC clock
path, dropping QCA clk_out setup, adding bluetooth UART, etc.
- A bunch of changes from Peng Fan to add LPSPI, TPM etc for i.MX93,
update i.MX8MP/N EVK with UART, I2C addition.
- Update cache properties per DeviceTree Specification v0.3.
- Add gpio-ranges property for i.MX8DXL and i.MX8Q LSIO Subsystem.
- Misc small and random changes.
* tag 'imx-dt64-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (60 commits)
arm64: dts: freescale: Rename DTB overlay source files from .dts to .dtso
arm64: dts: imx8mm-evk: add vcc supply for pca6416
arm64: dts: imx8m[m,q]-evk: change to use off-on-delay-us in regulator
arm64: dts: imx8mn-evk: enable uart1
arm64: dts: imx8mn-evk: add i2c gpio recovery settings
arm64: dts: imx8mn-evk: set off-on-delay-us in regulator
arm64: dts: imx8mn-evk: update vdd_soc dvs voltage
arm64: dts: imx8mp-evk: enable I2C2 node
arm64: dts: imx8mp-evk: enable fspi nor on imx8mp evk
arm64: dts: imx8mp-evk: enable uart1/3 ports
ARM64: dts: imx8mp-evk: add pwm support
arm64: dts: imx8mp: add mlmix power domain
arm64: dts: imx8mq: fix dtschema warning for imx7-csi
arm64: dts: Update cache properties for freescale
arm64: dts: imx8mm-phg: Add initial board support
arm64: dts: imx8qxp-ss-lsio: add gpio-ranges property
arm64: dts: imx8qm-ss-lsio: add gpio-ranges property
arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property
arm64: dts: imx8dxl_evk: add lpspi0 support
arm64: dts: imx8dxl: add lpspi support
...
Link: https://lore.kernel.org/r/20221119125733.32719-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:08:01 +0000 (11:08 +0100)]
Merge tag 'imx-dt-6.2' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm device tree update for 6.2:
- New device tree for Kobo Aura 2 E-Boot reader which is built on i.MX6SL
SoC.
- Enable backlight and boost support for imx6sl-tolino-shine2hd.
- Enable CYTTSP5 touchscreen support for E60K02.
- Enable Silergy SY7636A EPD PMIC on imx7d-remarkable2 epaper tablet.
- Add watchdog property 'fsl,suspend-in-wait' for i.MX6UL Phytec Phycore
SoM to avoid watchdog triggering in 'freeze' low power mode.
- Correct the polarity of AT86RF233 reset line for vf610-zii-dev-rev-c
board.
- A bunch of Colibri device tree updates from Marcel Ziswiler and Philippe
Schenker, correct USBH_PEN property, remove spurious debounce property,
add USB dual-role switching, and some cosmetic change.
- Other small and random changes.
* tag 'imx-dt-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: colibri-imx6ull: Enable dual-role switching
ARM: dts: imx: e60k02: Add touchscreen
ARM: dts: imx6qdl-sabre: Add mmc aliases
ARM: dts: imx6ul/ull: suspend i.MX6UL watchdog in wait mode
ARM: dts: imx7d-remarkable2: Enable silergy,sy7636a
ARM: dts: imx6sl-tolino-shine2hd: Add backlight boost
ARM: dts: imx6sl-tolino-shine2hd: Add backlight
ARM: dts: colibri-imx7: fix confusing naming
ARM: dts: colibri-imx6ull: add -hog to gpio hogs
ARM: dts: colibri-imx6ull: enable default peripherals
ARM: dts: colibri-imx6ull: keep peripherals disabled
ARM: dts: ls1021: correct indentation
ARM: dts: vf610-zii-dev-rev-c: fix polarity of at86rf233 reset line
ARM: dts: imx7-colibri: remove spurious debounce property
ARM: dts: colibri-imx6: specify usbh_pen gpio being active-low
ARM: dts: colibri-imx6: move vbus-supply to module level device tree
ARM: dts: colibri-imx6: usb dual-role switching
ARM: dts: imx: Add devicetree for Kobo Aura 2
Link: https://lore.kernel.org/r/20221119125733.32719-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 21 Nov 2022 10:06:42 +0000 (11:06 +0100)]
Merge tag 'imx-bindings-6.2' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX dt-bindings update for 6.2:
- New vendor prefix for Cloos and InnoComm.
- New compatible for Cloos PHG board, InnoComm WB15 EVK and Kobo Aura 2.
- Improve snvs-lpgpr bindings schema regarding i.MX8M SNVS LPGRP
compatible strings.
- Improve fsl-imx-cspi bindings schema for i.MX8MP ECSPI.
- Add bindings schema for i.MX8M ANATOP device.
- Update SCU firmware resource ID header by syncing with the latest
available SCFW kit version 1.13.0.
* tag 'imx-bindings-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add an entry for Cloos PHG board
dt-bindings: vendor-prefixes: Add an entry for Cloos
dt-bindings: nvmem: snvs-lpgpr: Fix i.MX8M compatible strings
dt-bindings: spi: fsl-imx-cspi: update i.MX8MP binding
dt-bindings: arm: fsl: add compatible string for Kobo Aura 2
dt-bindings: clock: add i.MX8M Anatop
dt-bindings: arm: fsl: Add InnoComm WB15 EVK
dt-bindings: vendor-prefixes: Add prefix for InnoComm
dt-bindings: firmware: imx: sync with SCFW kit v1.13.0
Link: https://lore.kernel.org/r/20221119125733.32719-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thierry Reding [Thu, 17 Nov 2022 08:32:41 +0000 (09:32 +0100)]
arm64: tegra: Remove unneeded clock-names for Tegra132 PWM
There's only a single clock for this IP block, so it doesn't need a
clock-names property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 12:38:34 +0000 (13:38 +0100)]
arm64: tegra: Fix up compatible string for SDMMC1 on Tegra234
The compatible string list for SDHCI on Tegra234 should be
"nvidia,tegra234-sdhci", followed by the "nvidia,tegra186-sdhci"
fallback. Use that consistently for all SDHCI controllers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 12:35:57 +0000 (13:35 +0100)]
arm64: tegra: Remove unused reset-names for QSPI
The Tegra QSPI controller uses a single reset line, so there's no need
for a reset-names property. Remove such properties.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 12:35:08 +0000 (13:35 +0100)]
arm64: tegra: Fixup pinmux node names
Pinmux node names should have a pinmux- prefix and not use underscores.
Fix up some cases that didn't follow those rules.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 5 Sep 2022 16:08:55 +0000 (18:08 +0200)]
arm64: tegra: Remove reset-names for QSPI
The Tegra QSPI controllers use a single reset control, so reset-names is
not necessary and therefore not specified in the DT bindings. Drop the
property from device tree files to avoid validation warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 13:14:16 +0000 (14:14 +0100)]
arm64: tegra: Use correct compatible string for Tegra234 HDA
The Tegra234 HDA controller is not backwards-compatible with Tegra30, so
drop the corresponding compatible string from the list.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 13:11:04 +0000 (14:11 +0100)]
arm64: tegra: Use correct compatible string for Tegra194 HDA
The Tegra194 HDA controller is not backwards-compatible with Tegra30, so
drop the corresponding compatible string from the list.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 13:10:17 +0000 (14:10 +0100)]
arm64: tegra: Use vbus-gpios property
Instead of using the deprecated vbus-gpio property, switch to using the
more standard vbus-gpios property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Tue, 7 Dec 2021 14:03:41 +0000 (15:03 +0100)]
arm64: tegra: Restructure Tegra210 PMC pinmux nodes
The PMC pinmux configuration nodes need to be part of a top-level pinmux
node. Add that new "pinmux" node and move the configuration nodes into
it.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Pierre Gondois [Mon, 7 Nov 2022 15:57:08 +0000 (16:57 +0100)]
arm64: tegra: Update cache properties
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fabio Estevam [Mon, 19 Sep 2022 10:43:50 +0000 (07:43 -0300)]
arm64: tegra: Remove 'enable-active-low'
The 'enable-active-low' property is not a valid one.
Only 'enable-active-high' is valid, and when this property is absent
the gpio regulator will act as active low by default.
Remove the invalid 'enable-active-low' property.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Akhil R [Thu, 10 Nov 2022 17:17:47 +0000 (22:47 +0530)]
arm64: tegra: Add dma-channel-mask in GPCDMA node
Add dma-channel-mask property in Tegra GPCDMA device tree node.
The property would help to specify the channels to be used in
kernel and reserve few for the firmware. This was previously
achieved by limiting the channel number to 31 in the driver.
This is wrong and does not align with the hardware. Correct this
and update the interrupts property to list all 32 interrupts.
Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vidya Sagar [Tue, 25 Oct 2022 18:25:08 +0000 (23:55 +0530)]
arm64: tegra: Fix non-prefetchable aperture of PCIe C3 controller
Fix the starting address of the non-prefetchable aperture of PCIe C3
controller.
Fixes:
ec142c44b026 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 3 Nov 2022 11:35:48 +0000 (12:35 +0100)]
arm64: tegra: Add missing compatible string to Ethernet USB device
According to the DT schema in usb-device.yaml, each USB device node
needs a compatible string, so add one for the built-in USB Ethernet
device on Jetson TX1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 14:23:45 +0000 (15:23 +0100)]
arm64: tegra: Separate AON pinmux from main pinmux on Tegra194
The registers for the AON pinmux reside in a partition different from
the registers for the main pinmux. Instead of treating them as one and
the same device, split them up so that they are each their own devices.
Also add gpio-ranges properties to the corresponding GPIO controllers
such that the pinmux and GPIO controllers can be paired up properly.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vidya Sagar [Mon, 14 Nov 2022 15:53:33 +0000 (15:53 +0000)]
arm64: tegra: Add ECAM aperture info for all the PCIe controllers
Add the ECAM aperture information for all the PCIe controllers of
Tegra234.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 4 Nov 2022 11:43:49 +0000 (12:43 +0100)]
arm64: tegra: Remove clock-names from PWM nodes
The Tegra PWFM controllers use a single clock, so there's no need for a
clock-names property.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dipen Patel [Thu, 3 Nov 2022 17:45:22 +0000 (10:45 -0700)]
arm64: tegra: Enable GTE nodes
Add and enable AON and LIC GTE nodes by default.
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Fri, 28 Oct 2022 12:35:56 +0000 (13:35 +0100)]
arm64: tegra: Update console for Jetson Xavier and Orin
The Tegra Combined UART (TCU) is the default serial interface for Jetson
Xavier and Orin platforms and so update the bootargs for these platforms
to use the TCU.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sandipan Patra [Mon, 19 Sep 2022 14:14:55 +0000 (19:44 +0530)]
arm64: tegra: Enable PWM users on Jetson AGX Orin
Enable additional PWM controllers in device tree so that the PWM pins on
the Jetson AGX Orin Developer Kit 40-pin header can be used.
Signed-off-by: Sandipan Patra <spatra@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 24 Oct 2022 14:05:57 +0000 (16:05 +0200)]
arm64: tegra: Add missing whitespace
The unit-address of a node should be separated from the opening brace by
a space.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 24 Oct 2022 14:05:16 +0000 (16:05 +0200)]
arm64: tegra: Sort nodes by unit-address
The P2U nodes that were recently added were not added in the correct
order. Sort them in the right place by unit-address.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Prathamesh Shete [Fri, 7 Oct 2022 16:59:41 +0000 (22:29 +0530)]
arm64: tegra: Add Tegra234 SDMMC1 device tree node
Add device tree node for Tegra234 SDMMC1 instance.
Add and enable SD card instance in device tree.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Wed, 19 Oct 2022 14:47:00 +0000 (15:47 +0100)]
arm64: tegra: Add SBSA UART for Tegra234
Populate the SBSA UART for Tegra234 and enable this UART for Jetson AGX
Orin.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Wed, 19 Oct 2022 13:29:03 +0000 (14:29 +0100)]
arm64: tegra: Add PWM fan for Jetson AGX Orin
Add the PWM fan node for the Tegra234 Jetson AGX Orin platform.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Wed, 19 Oct 2022 13:29:02 +0000 (14:29 +0100)]
arm64: tegra: Populate Tegra234 PWMs
Populate all the PWM devices for Tegra234. Finally, update the
compatible string for the existing 'pwm1' node to just be 'tegra194-pwm'
and remove the fallback to 'tegra186-pwm', which aligns with the
binding documentation.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Jon Hunter [Wed, 19 Oct 2022 13:16:13 +0000 (14:16 +0100)]
arm64: tegra: Remove unused property for I2C
Commit
156af9de0932 ("arm64: tegra: Add Tegra234 I2C devicetree nodes")
populated the I2C device nodes for Tegra234. One of these nodes
contains the property 'nvidia,hw-instance-id' which is neither
documented or used. Remove this unused property.
Fixes:
156af9de0932 ("arm64: tegra: Add Tegra234 I2C devicetree nodes")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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