Tom Rini [Thu, 19 Aug 2021 18:29:00 +0000 (14:29 -0400)]
ppc: Rework some hard-coded BOOTCOMMANDS
There are an assortment of hard-coded CONFIG_BOOTCOMMAND options in some
board headers. Rework these so that they do not add to the CONFIG
namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 18:19:39 +0000 (14:19 -0400)]
arm: Migrate GICV2 / GICV3 to Kconfig
Migrate CONFIG_GICV2 and CONFIG_GICV3 to Kconfig. We still have the GIC
related registers that need to be handled more cleanly but start by
moving this symbol to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 17:56:20 +0000 (13:56 -0400)]
nand: vf610_nfc: Do not abuse CONFIG namespace
This driver uses the CONFIG namespace to set the chips internal CONFIG
namespace related bits. However, CONFIG is reserved for the top-level
Kconfig based configuration system. Use CFG as the namespace here
instead to avoid pollution.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 19 Aug 2021 03:12:39 +0000 (23:12 -0400)]
varisys: Remove dead code
The platforms this code was for have been removed, drop this support
code as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:38 +0000 (23:12 -0400)]
README: Remove some old i2c related text
These sections are no longer relevant, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Thu, 19 Aug 2021 03:12:37 +0000 (23:12 -0400)]
Convert CONFIG_I2C_SET_DEFAULT_BUS_NUM et al to Kconfig
This converts the following to Kconfig:
CONFIG_I2C_SET_DEFAULT_BUS_NUM
CONFIG_I2C_DEFAULT_BUS_NUMBER
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:36 +0000 (23:12 -0400)]
tegra: Cleanup I2C support
Remove the irrelevant section from the README and remove the
non-functional SPL-undef section.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:35 +0000 (23:12 -0400)]
i2c: fsl_i2c: Migrate to Kconfig
- As there are no boards that use different values for speed / slave on
different buses, use a single option.
- Switch to using the common SYS_I2C_SPEED / SYS_I2C_SLAVE options.
- Introduce _HAS_ options for additional buses as only the first one is
common to all users.
- Convert all remaining symbols to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:34 +0000 (23:12 -0400)]
rcar: i2c: Migrate SYS_I2C_SH to Kconfig
- Migrate SYS_I2C_SH and related defines to Kconfig
- Remove currently unused SYS_I2C_SH related defines
- Cleanup related README section.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:33 +0000 (23:12 -0400)]
Convert CONFIG_SYS_I2C_MXC et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_I2C_MXC
CONFIG_SYS_I2C_MXC_I2C1
CONFIG_SYS_I2C_MXC_I2C2
CONFIG_SYS_I2C_MXC_I2C3
CONFIG_SYS_I2C_MXC_I2C4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:32 +0000 (23:12 -0400)]
Convert CONFIG_SYS_I2C_SPEED et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_I2C_SPEED
CONFIG_SYS_I2C_SLAVE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:31 +0000 (23:12 -0400)]
cmd/i2c.c: Remove unused legacy code
There are no longer any cases where we are neither SYS_I2C_LEGACY nor
DM_I2C. Remove these code paths.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:30 +0000 (23:12 -0400)]
i2c: Remove non-DM code from ihs_i2c.c
This driver and it's only user are converted to DM_I2C, remove legacy
code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:29 +0000 (23:12 -0400)]
ti: i2c: Convert CONFIG_SYS_OMAP24_I2C to CONFIG_SYS_I2C namespace
The omap24xx I2C driver uses its own CONFIG namespace for common I2C
variables. Rather than convert more of them to Kconfig, rename these to
the common I2C ones and remove the entirely unused functionality. As
part of this, we make the am335x_shc platforms consistent with their
intended speed values.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:28 +0000 (23:12 -0400)]
am43xx: Drop non-DM_I2C code
On this platform, we have DM_I2C and SPL_DM_I2C always enabled.
Remove legacy options.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Thu, 19 Aug 2021 03:12:27 +0000 (23:12 -0400)]
am335x: Drop non-DM_I2C code
On this platform, we have DM_I2C and SPL_DM_I2C always enabled. Remove
legacy options.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:26 +0000 (23:12 -0400)]
i2c: designware: Remove unused non-DM functionality
There are no users of more than 1 i2c bus in the non-DM case currently.
Remove the additional defines for this.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:25 +0000 (23:12 -0400)]
Convert CONFIG_SYS_I2C_EARLY_INIT to Kconfig
Convert SYS_I2C_EARLY_INIT to Kconfig, and make it depend on
SPL_SYS_I2C_LEGACY. Remove the weak implementation as it's either
something that needs to exist for real, or shouldn't be called.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 19 Aug 2021 03:12:24 +0000 (23:12 -0400)]
Convert CONFIG_SYS_I2C_LEGACY to Kconfig and add CONFIG_[ST]PL_SYS_I2C_LEGACY
First, we convert CONFIG_SYS_I2C_LEGACY to Kconfig. Next, as you cannot
have SYS_I2C_LEGACY and DM_I2C at the same time, introduce
CONFIG_SPL_SYS_I2C_LEGACY so that we can enable the legacy option only
in SPL. Finally, for some PowerPC cases we also need
CONFIG_TPL_SYS_I2C_LEGACY support. Convert all of the existing users to
one or more symbols.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:48 +0000 (17:59 -0400)]
i2c: Remove unused additional legacy soft i2c bus support
Currently the legacy software i2c support is only used for a single bus.
Remove all of the extra and unused support. Also update the README to
not reference that, and finish removing some already badly auto-edited
related text.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:47 +0000 (17:59 -0400)]
Convert CONFIG_SYS_I2C_MVTWSI to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_I2C_MVTWSI
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:46 +0000 (17:59 -0400)]
Convert CONFIG_SYS_I2C_SOFT et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_I2C_SOFT
CONFIG_SYS_I2C_SOFT_SPEED
CONFIG_SYS_I2C_SOFT_SLAVE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:45 +0000 (17:59 -0400)]
Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig
- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
to Kconfig. We move these symbols around a bit and add appropriate
dependencies to them. In some cases, we now add a correct default value
as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:44 +0000 (17:59 -0400)]
eeprom: Drop CONFIG_ENV_EEPROM_IS_ON_I2C usage
At this point in time, there's no systems with "U-Boot environment
exists on an EEPROM which is accessed over the I2C bus" that sets this
option. Drop it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:43 +0000 (17:59 -0400)]
cl-som-imx7: Enable CMD_EEPROM
This platform defines everything needed to be able to use the
eeprom command. In addition, board/compulab/common/eeprom.c is required
by the platform, and does not use CONFIG_ID_EEPROM to enable/disable
builing of it. In order to migrate CONFIG symbols to Kconfig and to not
have to add complex logic to handle this case, enable CMD_EEPROM on this
board.
Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:42 +0000 (17:59 -0400)]
i2c: S3C24X0: Finish Kconfig migration
Finish moving this driver to Kconfig.
- Update the dependency logic for Exynos5 too
- Remove the unused CONFIG_SYS_I2C_S3C24X0_SPEED variable
- Drop CONFIG_SYS_I2C_S3C24X0_SLAVE as it's always set to 0.
- Move the internal SYS_I2C_S3C24X0_SLAVE define closer to the only user.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Tue, 17 Aug 2021 21:59:41 +0000 (17:59 -0400)]
Convert CONFIG_ID_EEPROM to Kconfig
This converts the following to Kconfig:
CONFIG_ID_EEPROM
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:40 +0000 (17:59 -0400)]
siemens: Move CONFIG_SYS_I2C_EEPROM_ADDR usage out of CONFIG namespace
The instances of CONFIG_SYS_I2C_EEPROM_ADDR on these platforms doesn't
match up with the rest of the EERPOM related defines in U-Boot. Move
these out of the CONFIG namespace rather than make complex Kconfig
logic.
Cc: Samuel Egli <samuel.egli@siemens.com>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tom Rini [Tue, 17 Aug 2021 21:59:39 +0000 (17:59 -0400)]
keymile: Use CONFIG_SYS_IVM_EEPROM_ADR
As the code reads now, making this code path use
CONFIG_SYS_IVM_EEPROM_ADR rather than CONFIG_SYS_I2C_EEPROM_ADDR seems
to make sense as the rest of the EEPROM infrastructure isn't used on
these platforms.
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Tom Rini [Tue, 17 Aug 2021 21:59:38 +0000 (17:59 -0400)]
arm: shc: Change CONFIG_SYS_I2C_EEPROM_ADDR to EEPROM_ADDR
The shc platforms do not make use of the rest of the EEPROM
infrastructure. Rather than make more elaborate Kconfig logic, remove
this setting from the CONFIG namespace.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 17 Aug 2021 21:59:37 +0000 (17:59 -0400)]
davinci: Drop CONFIG_MAC_ADDR_IN_EEPROM
Looking over the current boards, there are no users of
CONFIG_MAC_ADDR_IN_EEPROM. Further, omapl138_lcdk uses
CONFIG_NET_RANDOM_ETHADDR. Drop various unused code paths.
Cc: Adam Ford <aford173@gmail.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Aug 2021 21:59:36 +0000 (17:59 -0400)]
kp_imx53: Switch to using a local namespace for ID EEPROM
This platform does not use any of the standard EEPROM functionality and
instead provides its own. Use a local namespace for the I2C related
defines to access the EEPROM.
Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Tom Rini [Wed, 11 Aug 2021 12:26:52 +0000 (08:26 -0400)]
powerpc: Remove unused FCC ethernet code
This code is no longer used, remove it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 Aug 2021 21:34:22 +0000 (17:34 -0400)]
exynos: Update environment macros a bit
Rework the default environment a bit to not use non-standard
CONFIG_ENV_... names and similar one-off CONFIG names.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Tue, 10 Aug 2021 21:34:21 +0000 (17:34 -0400)]
arm: keystone2: Rename CONFIG_ENV_KS2_BOARD_SETTINGS
Rename CONFIG_ENV_KS2_BOARD_SETTINGS to ENV_KS2_BOARD_SETTINGS so that
it better fits with the rest of the environment addition macros.
Cc: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 10 Aug 2021 21:34:20 +0000 (17:34 -0400)]
aristainetos2: Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in
order to not further add to the CONFIG namespace.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 10 Aug 2021 20:17:55 +0000 (16:17 -0400)]
usb: dwc2: Rename CONFIG_DWC2 namespace to DWC2
There are a number of DWC2 configuration options that are set in dwc2.h
and referenced in dwc2.c only. Move these out of the CONFIG_DWC2
namespace and in to the DWC2 namespace. Note that hikey was defining an
option that was already always enabled, so we can remove that hunk.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 30 Aug 2021 16:45:46 +0000 (12:45 -0400)]
Prepare v2021.10-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 30 Aug 2021 16:40:24 +0000 (12:40 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 27 Aug 2021 12:33:02 +0000 (08:33 -0400)]
Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.10-rc3
xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT
zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012
zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode
versal:
- Add soc driver
sdhci:
- Update tap delay programming for zynq_sdhci driver
cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message
watchdog:
- Fix wwdt compilation
rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver
fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
Michal Simek [Tue, 24 Aug 2021 12:56:47 +0000 (14:56 +0200)]
xilinx: zynqmp: Enable stack relocation to DDR
There is no space in OCM for SPL stack because the space in OCM is occupied
by TF-A. That's why move relocate stack to DDR to 0x18000000 address
and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is
default address for TFA.
It is good to summarize current DDR usage in SPL flow.
0-0x80000 is used for BSS
(CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE)
0x100000 is used for DTB passing address
(CONFIG_XILINX_OF_BOARD_DTB_ADDR)
0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD
0x18000000 is used for SPL stack
(CONFIG_SPL_STACK_R_ADDR)
0x20000000-0x21000000 is used for SPL malloc area
(CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 19 Aug 2021 12:17:37 +0000 (14:17 +0200)]
xilinx: zynqmp: Update descriptions for u-boot.its
Use TF-A instead of ATF in description. And update generic description with
removing ATF because also configurations without it are supported.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 11 Aug 2021 12:23:54 +0000 (14:23 +0200)]
xilinx: common: Enabling generic function for DT reselection
U-Boot support board detection at run time and based on it change DT.
This feature is implemented for SOM Kria platforms which contain two
eeproms which contain information about SOM module and CC (Carrier card).
Full U-Boot starts with minimal DT file defined by
CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image.
It is using default setup of board_name variable initializaed to
DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option.
When DTB_RESELECT is enabled board_detection() is called. Keep it your mind
that this code is called before relocation. board_detection() is calling
xilinx_read_eeprom() which fills board_info (xilinx_board_description)
structure which are parsed in board_name_decode().
Based on DT configuration and amount of nvmemX aliases name of the board is
composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev"
<board_revision> "-" <cc_name> "-rev" <cc_revision>.
If CC is not present or more are available it keeps going.
When board name is composed and returned from board_name_decode() it is
assigned to board_name variable which is used by
board_fit_config_name_match() which is called via fdtdec_setup() when it
goes over config options in multi dtb FIT image.
From practical point of view multi DTB image is key point here which has to
contain configs for detected combinations. Unfortunately as of now they
have to be full DTBs and DTBOs are not supported.
That's why configuration like:
config_X {
description = "zynqmp-board-cc";
fdt = "board", "cc";
};
needs to be squashed together with:
fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \
arch/arm/dts/zynqmp-cc.dtbo
and only one dtb is in fit:
config_X {
description = "zynqmp-board-cc";
fdt = "board-cc";
};
For creating multi DTBs fit image use mkimage -E, e.g.:
mkimage -E -f all.its all.dtb
When DTB_RESELECT is enabled xilinx_read_eeprom() is called before
relocation and it uses calloc for getting a buffer. Because this is dynamic
memory it is not relocated that's why xilinx_read_eeprom() is called again
as the part of board_init(). This second read with calloc buffer placed in
proper position board_late_init_xilinx() can setup u-boot variables as
before.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 19 Aug 2021 10:02:57 +0000 (12:02 +0200)]
xilinx: zynqmp: Generate different u-boot.itb for MULTI_DTB_FIT
When MULTI_DTB_FIT is enabled fit-dtb.blob fit image is created which
contain all DTBs listed by CONFIG_OF_LIST. And with DTB_RELESELECT there is
a need to handle it as one file with DTBs in it not as separate DTBs in
u-boot.its/itb.
That's why extend mkimage_fit_atf.sh to generate u-boot.itb correctly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 19 Aug 2021 09:29:41 +0000 (11:29 +0200)]
arm64: dts: Make sure that all DTBs are 64bit aligned
Start of DTB should be 64bit aligned that's why also make sure that end is
also 64bit aligned. It is not required but it is nice thing to do.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 19 Aug 2021 09:09:37 +0000 (11:09 +0200)]
Makefile: Align fit-dtb.blob and u-boot.itb by 64bits
Enabling MULTI_DTB_FIT and DTB_RESELECT can end up with multi DTBs in FIT
image placed and aligned only by 32bits (4bytes). Based on device tree
specification:
"Specifically, the memory reservation block shall be aligned to an 8-byte boundary
and the structure block to a 4-byte boundary."
is 64bit (8bytes) alignment required. That's why make sure that
fit-dtb.blob and u-boot.itb as our primary target images for Xilinx ZynqMP
are all 64bit aligned.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Michal Simek [Thu, 19 Aug 2021 09:07:59 +0000 (11:07 +0200)]
xilinx: zynqmp: Check that DT is 64bit aligned
DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try
to read information about reserved memory. The system ends in exception
without any clue what's going it. That's why detect not aligned DT and
panic to show where the issue is coming from.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 23 Jul 2021 07:59:59 +0000 (09:59 +0200)]
xilinx: Add support for generic board detection
Add support for changing DT at run time. It is done via board_detection()
which returns platform_id and platform_version which can be used via
board_name_decode() to compose board_local_name string which corresponds
with DT which is should be used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 13 Aug 2021 07:17:10 +0000 (09:17 +0200)]
xilinx: common: Free allocated structure
There is no need to keep fru_content around. Free this space.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 12 Aug 2021 10:30:36 +0000 (12:30 +0200)]
xilinx: common: Change board_info[] handling
Origin code was allocating only pointers to struct xilinx_board_description
and there was separate allocation for structure self and freeing in case of
failure.
The code is directly allocating space for all structures by one calloc to
simlify logic.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 23 Jul 2021 07:55:59 +0000 (09:55 +0200)]
xilinx: Use variable for passing board_name
Use variable which points to DEVICE_TREE by default. The reason for this
change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection
can be used for change DTB at run time. That's why there must be reference
in board_fit_config_name_match() via variable instead of hardcoding it
which is sufficient for that use case.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 12 Aug 2021 09:03:49 +0000 (11:03 +0200)]
xilinx: fru: Replace spaces with \0 in detected name
FRU spec expected \0 for unused symbols but unfortunately a lot of boards
are using spaces instead of \0. That's why after saving it to desc->name
name is checked again and all spaces are converted to \0. This will ensure
that names can be used for string manipulations like concatenation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 21 Jan 2021 13:02:30 +0000 (14:02 +0100)]
xilinx: zynqmp: Enable gpio-key/button driver
Enable button uclass and also gpio-key driver by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 4 Dec 2020 09:37:38 +0000 (10:37 +0100)]
arm64: zynqmp: Enable sha1sum command
Enable it for TPM usage.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Tue, 10 Aug 2021 06:16:12 +0000 (00:16 -0600)]
watchdog: versal: Include header file needed for dev_ functions
dev_dbg, dev_err and dev_warn seems to be moved to different header file.
Include dm/device_compat.h file to compile properly.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Jul 2021 10:25:49 +0000 (12:25 +0200)]
xilinx: zynqmp: Add debug messages for boot mode
Add debug messages to see HW boot mode and also alternative boot mode in
logs directly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 11 Aug 2021 10:01:25 +0000 (12:01 +0200)]
cmd: boot: Update reset usage message
The commit
573a3811edc8 ("sysreset: psci: support system reset in a generic
way with PSCI") has added support for warm reset via PSCI but this hasn't
been reflected in usage message and user has to look at the code how to run
it. That's why update usage text to make this clear.
Here is full help with updated usage:
ZynqMP> help reset
reset - Perform RESET of the CPU
Usage:
reset - cold boot without level specifier
reset -w - warm reset if implemented
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Michal Simek [Thu, 1 Jul 2021 09:44:51 +0000 (11:44 +0200)]
cmd: pwm: Remove additional pwm description
The first name is taken from command name that's why shouldn't be listed in
help. And commands shouldn't be listed with <> which means value but value
itself is command name.
Also add description for commands to make it clear what it does.
Before
pwm pwm <invert> <pwm_dev_num> <channel> <polarity>
pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns>
...
After:
pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity
pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM
pwm enable <pwm_dev_num> <channel> - enable PWM output
pwm disable <pwm_dev_num> <channel> - disable PWM output
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
T Karthik Reddy [Tue, 10 Aug 2021 12:50:21 +0000 (06:50 -0600)]
xilinx: Enable config to display cpuinfo
Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Tue, 10 Aug 2021 12:50:20 +0000 (06:50 -0600)]
xilinx: common: Add function to print SoC info
Add print_cpuinfo() to print SoC info like family & revision.
This function depends on CONFIG_DISPLAY_CPUINFO config.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Tue, 10 Aug 2021 12:50:19 +0000 (06:50 -0600)]
soc: xilinx: versal: Add soc_xilinx_versal driver
soc_xilinx_versal driver allows identification of family & revision
of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL.
Probe this driver using platdata U_BOOT_DEVICE structure which is
defined at mach-versal/cpu.c.
Add this config to xilinx_versal_virt_defconfig &
xilinx_versal_mini_ospi_defconfig file to select this driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Tue, 10 Aug 2021 12:50:18 +0000 (06:50 -0600)]
soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver
soc_xilinx_zynqmp driver allows identification of family & revision
of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP.
Add this config to xilinx_zynqmp_virt_defconfig file.
Probe this driver using platdata U_BOOT_DEVICE structure which is
specified in mach-zynqmp/cpu.c.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 10 Aug 2021 07:21:54 +0000 (09:21 +0200)]
fdt_support: Add kernel-doc for fdt_fixup_memory_banks()
Add kernel-doc description for fdt_fixup_memory_banks() because it is
implemented in one specific way and this information should be available
for others to decide if their SoC conforms to it.
If you don't want U-Boot to update your memory DT layout please disable
CONFIG_ARCH_FIXUP_FDT_MEMORY.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Fri, 6 Aug 2021 12:09:32 +0000 (14:09 +0200)]
xilinx: Disable ARCH_FIXUP_FDT_MEMORY
Based on DT spec you can have one memory node which multiple ranges or
multiple nodes.
fdt_fixup_memory_banks() is not implemented in a correct way when multiple
memory nodes are present because all ranges are put it to the first memory
node found. And next memory nodes are kept in DT which ends up in the same
range specification in the same DT.
Here is what it is happening.
Origin DT.
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
memory@
800000000 {
device_type = "memory";
reg = <0x8 0x00000000 0x0 0x80000000>;
};
After fdt_fixup_memory_banks()
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};
memory@
800000000 {
device_type = "memory";
reg = <0x8 0x00000000 0x0 0x80000000>;
};
As is visible memory@0 node got second range but there is still
memory@
800000000 node present and 2G range is listed twice.
The solution can't be that second node is removed because it can be
referenced already that's why it is better for us to disable this option
for now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Aug 2021 11:30:11 +0000 (13:30 +0200)]
ARM: zynq: Enable smcc and nor for zc770-xm012
Enable cfi flash on zc770-xm012 configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Aug 2021 11:30:19 +0000 (13:30 +0200)]
ARM: zynq: Wire single qspi on couple of boards
Single configuration is working fine and no issue to enable it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Sai Krishna Potthuri [Fri, 6 Aug 2021 07:41:46 +0000 (01:41 -0600)]
ARM: zynq: Replace 'io-standard' with 'power-source' property
Replace 'io-standard' property with 'power-source' property in all
zynq dts files to be in sync with Zynq Pinctrl driver.
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Raju Kumar Pothuraju [Thu, 1 Jul 2021 08:45:11 +0000 (14:15 +0530)]
xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP)
Add missing "jedec, spi-nor" compatible string for QSPI flash node.
Spi-nor framework uses this compatibility string to probe &
initialize flash. With missing compatibility string we are observing
below error:
Zynq> sf probe 0 0 0
jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes:
00, 00, 00 Failed to initialize SPI flash at 0:0 (error -2)
Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 5 Aug 2021 06:28:46 +0000 (08:28 +0200)]
arm64: zynqmp: Update comment style sm-k26
Trivial style patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Aug 2021 09:12:29 +0000 (11:12 +0200)]
arm64: zynqmp: Fix header alignment on kv260 boards
Fix header alignment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Aug 2021 09:12:56 +0000 (11:12 +0200)]
arm64: zynqmp: Fix node name for ds35/36 leds
By dt-binding specs led nodes should have -led suffix that's why add it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 29 Jul 2021 12:22:05 +0000 (14:22 +0200)]
xilinx: zynqmp: Initialize usb and scsi via preboot
Based on thread
https://lists.denx.de/pipermail/u-boot/2021-June/451828.html
especially
"Overall we have a deficiency in the UEFI implementation in that we
cannot deal with block devices added or removed after initialization."
there is a need to deal with removable media as usb/scsi/sata.
That's why bridge this gap in EFI implementation by resetting usb and
scsi resets to get all disks before efi_init_obj_list() is called.
In our standard boot flow, where we use distro boot, order is fixed as
"jtag mmc0 mmc1 qspi0 nand0 usb0 usb1 scsi0 pxe dhcp" with prioritizing
boot device added by commit
2882b39d564b ("arm64: zynqmp: Setup the first
boot_target at run time").
When device has ESP partition all devices should be detected because then
efi_disk_register() in efi_init_obj_list() is called only once.
The first such a device is sd/emmc(mmc0/mmc1) and then disks on usb/sata
are not handled at all.
The commit
6bb577dbb30f ("arm64: zynqmp: Disable
EFI_CAPSULE_ON_DISK_EARLY") also pointed out on this issue but detection of
removable media wasn't solved that's why do it now via preboot command.
I have tested cases without usb and scsi and there is no problem with
calling resets without devices itself.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Aug 2021 07:18:17 +0000 (09:18 +0200)]
arm64: zynqmp: Disable WDT_CDNS driver by default
Do not enable watchdog driver in default zynqmp configuration. The reason
is that not all distributions are handling watchdog properly and then
expires and system resets. If someone needs watchdog in their design please
enable it by hand.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Tue, 3 Aug 2021 05:20:46 +0000 (23:20 -0600)]
mmc: zynq_sdhci: Use set_control_reg from sdhci.c
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Tue, 3 Aug 2021 05:20:45 +0000 (23:20 -0600)]
mmc: zynq_sdhci: Wait till sd card detect state is stable
As per SD spec when SD host controller is reset, it takes 1000msec
to detect the card state. In case, if we enable the sd bus voltage &
card detect state is not stable, then host controller will disable
the sd bus voltage.
In case of warm/subsystem reboot, due to unstable card detect state
host controller is disabling the sd bus voltage to sd card causing
sd card timeout error. So we wait for a maximum of 1000msec to get
the card detect state stable before we enable the sd bus voltage.
This current fix is workaround for now, this needs to be analysed
further. Zynqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Tue, 3 Aug 2021 05:20:44 +0000 (23:20 -0600)]
mmc: zynq_sdhci: Move setting tapdelay code to driver
Move tapdelay function calls to zynq_sdhci.c and make them static
inline. zynqmp_tap_delay.h has function prototypes for the functions
defined in tap_delays.c, which will not be needed anymore.
Remove tap_delays.c and zynqmp_tap_delay.h files.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ashok Reddy Soma [Tue, 3 Aug 2021 05:20:43 +0000 (23:20 -0600)]
mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelays
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set
tapdelay values and DLL resets. Continue to use this for SPL and mini
U-Boot where U-Boot will be executed at EL3 level.
Use firmware call xilinx_pm_request() using appropriate arguments to
set input/output tapdelays and also for DLL resets in regular flow(EL2).
Host driver should explicitly request DLL reset before ITAP (assert DLL)
and after OTAP (release DLL) to avoid issues in some cases. Also handle
error return where possible.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 25 Aug 2021 11:48:06 +0000 (07:48 -0400)]
Merge branch 'next-socfpga' of https://github.com/tienfong/uboot_mainline
Siew Chin Lim [Tue, 10 Aug 2021 03:26:42 +0000 (11:26 +0800)]
arm: socfpga: Enable Intel N5X device build
Add defconfig for N5X to support legacy, ATF and VAB boot flow.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:41 +0000 (11:26 +0800)]
include: configs: Add Intel N5X device CONFIGs
Add CONFIGs for N5X.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:40 +0000 (11:26 +0800)]
arm: dts: Add base dtsi and devkit dts for Intel N5X device
Add device tree for N5X.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <lftan.linux@gmail.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:39 +0000 (11:26 +0800)]
board: intel: Add socdk board support for Intel N5X device
Add N5X SoC devkit board.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:38 +0000 (11:26 +0800)]
arm: socfpga: Add SPL for Intel N5X device
Add SPL for N5X.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Tien Fong Chee [Tue, 10 Aug 2021 03:26:37 +0000 (11:26 +0800)]
ddr: altera: Add SDRAM driver for Intel N5X device
The DDR subsystem in Diamond Mesa is consisted of controller, PHY,
memory reset manager and memory clock manager.
Configuration settings of controller, PHY and memory reset manager
is come from DDR handoff data in bitstream, which contain the register
base addresses and user settings from tool.
Configuration settings of memory clock manager is come from the HPS
handoff data in bitstream, however the register base address is defined
in device tree.
The calibration is fully done in HPS, which requires IMEM and DMEM
binaries loading to PHY SRAM for running this calibration, both
IMEM and DMEM binaries are also part of bitstream, this bitstream
would be loaded to OCRAM by SDM, and configured by DDR driver.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tien Fong Chee [Tue, 10 Aug 2021 03:26:36 +0000 (11:26 +0800)]
ddr: socfpga: Enable memory test on memory size less than 1GB
Minimum 1GB memory size is required in current memory test, so this patch
improves the memory test for processing memory size less than 1GB, and
the size in power of two.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:35 +0000 (11:26 +0800)]
arm: socfpga: Changed misc_s10.c to misc_soc64.c
Rename to common file name to used by all SOC64 devices.
No functionality change.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:34 +0000 (11:26 +0800)]
arm: socfpga: Add clock manager for Intel N5X device
Add clock manager for N5X.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:33 +0000 (11:26 +0800)]
arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h
Move cm_get_mpu_clk_hz function declaration from individual device's
clock manager header file to common clock_manager.h.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:32 +0000 (11:26 +0800)]
drivers: clk: Add memory clock driver for Intel N5X device
Add memory clock manager driver for N5X. Provides memory clock
initialization and enable functions.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:31 +0000 (11:26 +0800)]
arm: socfpga: Get clock manager base address for Intel N5X device
Add N5X clock manager to socfpga_get_managers_addr function.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:30 +0000 (11:26 +0800)]
drivers: clk: Add clock driver for Intel N5X device
Add clock manager driver for N5X. Provides clock initialization
and get_rate functions.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Tien Fong Chee [Tue, 10 Aug 2021 03:26:29 +0000 (11:26 +0800)]
arm: socfpga: Add handoff data support for Intel N5X device
N5X support both HPS handoff data and DDR handoff data.
Existing HPS handoff functions are restructured to support both existing
devices and N5X device.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:28 +0000 (11:26 +0800)]
arm: socfpga: Add base address for Intel N5X device
Reuse base_addr_soc64.h for Intel N5X device, the address is the
same as Agilex.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:27 +0000 (11:26 +0800)]
arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h
Rename to common file name to used by all SOC64 devices and change
"_S10_" to "_SOC64_" in base_addr_soc64.h.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Tue, 10 Aug 2021 03:26:26 +0000 (11:26 +0800)]
arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function
Move 'linux_qspi_enable' from bootcommand to board_prep_linux function when
OS booted from FIT image for Stratix 10 and Agilex. This flow is common for
all Intel SOC64 devices.
U-Boot will update 'fdt_addr' environment value based on FIT image in
board_prep_linux function, and 'linux_qspi_enable' will refer to 'fdt_addr'
environment value to retrieve the device tree node.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Tom Rini [Mon, 23 Aug 2021 16:44:12 +0000 (12:44 -0400)]
Merge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-10-rc3
Documentation:
* Rename Freescale to NXP
* Document structures used for the UEFI TCG2 protocol
UEFI:
* Device paths must use EfiBootServicesData
Tom Rini [Mon, 23 Aug 2021 13:17:32 +0000 (09:17 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
fsl-qoriq: Fixes related to env, spi, usb, crypto, configs, distro-boot
for Layerscape Boards like lx2, sl28, ls2088ardb.
powerpc: Fixes for t208xrdb revd board and cortina related configs
update for T208xRDB, T4240RDB.
Tom Rini [Mon, 23 Aug 2021 13:17:07 +0000 (09:17 -0400)]
Merge tag 'for-v2021.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for for-v2021.10-rc3
new driver:
- Introduce mcp230xx support
from Sebastian Reichel
new feature:
- i2c-gpio: add support for "sda-gpios" + "scl-gpios" i2c-gpio bindings.
from Samuel Holland
- bootcount: add a new driver with syscon as backend
from Nandor Han
Tom Rini [Sun, 22 Aug 2021 19:44:53 +0000 (15:44 -0400)]
Merge branch '2021-08-21-assorted-changes'
Nandor Han [Thu, 10 Jun 2021 12:40:38 +0000 (15:40 +0300)]
bootcount: add a new driver with syscon as backend
The driver will use a syscon regmap as backend and supports both
16 and 32 size value. The value will be stored in the CPU's endianness.
Signed-off-by: Nandor Han <nandor.han@vaisala.com>
Reviewed-by: Simon Glass <sjg@chromium.org>