platform/kernel/linux-rpi.git
6 years agodrm/amd/display: Update MST edid property every time
Jerry (Fangzhi) Zuo [Tue, 17 Apr 2018 17:49:48 +0000 (13:49 -0400)]
drm/amd/display: Update MST edid property every time

Extended fix to: "Don't read EDID in atomic_check"

Fix display property not observed in GUI display after hot plug.

Call drm_mode_connector_update_edid_property every time in
.get_modes hook, due to the fact that edid property is getting
removed from usermode ioctl DRM_IOCTL_MODE_GETCONNECTOR each time
in hot unplug.

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add assert that chroma pitch is non zero
Julian Parkin [Fri, 13 Apr 2018 17:23:02 +0000 (13:23 -0400)]
drm/amd/display: Add assert that chroma pitch is non zero

Signed-off-by: Julian Parkin <jparkin@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: compact the rq/dlg/ttu log
Dmytro Laktyushkin [Wed, 11 Apr 2018 15:51:32 +0000 (11:51 -0400)]
drm/amd/display: compact the rq/dlg/ttu log

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: update dtn logging and goldens
Anthony Koo [Tue, 17 Apr 2018 16:12:56 +0000 (12:12 -0400)]
drm/amd/display: update dtn logging and goldens

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add some DTN logs for input and output tf
Anthony Koo [Fri, 13 Apr 2018 13:40:21 +0000 (09:40 -0400)]
drm/amd/display: add some DTN logs for input and output tf

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add cursor TTU CRQ related
Charlene Liu [Mon, 16 Apr 2018 19:14:15 +0000 (15:14 -0400)]
drm/amd/display: add cursor TTU CRQ related

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add user_regamma to color module
Krunoslav Kovac [Fri, 13 Apr 2018 20:06:24 +0000 (16:06 -0400)]
drm/amd/display: Add user_regamma to color module

Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.43
Tony Cheng [Mon, 16 Apr 2018 17:30:02 +0000 (13:30 -0400)]
drm/amd/display: dal 3.1.43

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: DP link validation bug for YUV422
Hersen Wu [Wed, 11 Apr 2018 19:22:10 +0000 (15:22 -0400)]
drm/amd/display: DP link validation bug for YUV422

remove limit YUV422 color depth to 24bits which is
workaround for old ASIC

Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Refactor otg_blank sequence
Eric Bernstein [Mon, 9 Apr 2018 21:19:27 +0000 (17:19 -0400)]
drm/amd/display: Refactor otg_blank sequence

Also rename otg_blank to blank_pixel_data.

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Make program_output_csc HWSS interface function
Eric Bernstein [Mon, 9 Apr 2018 19:47:42 +0000 (15:47 -0400)]
drm/amd/display: Make program_output_csc HWSS interface function

Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix issue related to infopacket was not transmitted
Anthony Koo [Wed, 11 Apr 2018 17:19:56 +0000 (13:19 -0400)]
drm/amd/display: fix issue related to infopacket was not transmitted

Check in code was incorrect, and infopacket is only transmitted after update
function is called multiple times.
Purpose of the function was to check if infopackets are being enabled, and
then enable global control. Fix the code to do this.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Disallow enabling CRTC without primary plane with FB
Harry Wentland [Mon, 16 Apr 2018 21:28:11 +0000 (17:28 -0400)]
drm/amd/display: Disallow enabling CRTC without primary plane with FB

The below commit

    "drm/atomic: Try to preserve the crtc enabled state in drm_atomic_remove_fb, v2"

introduces a slight behavioral change to rmfb. Instead of disabling a crtc
when the primary plane is disabled, it now preserves it.

Since DC is currently not equipped to handle this we need to fail such
a commit, otherwise we might see a corrupted screen.

This is based on Shirish's previous approach but avoids adding all
planes to the new atomic state which leads to a full update in DC for
any commit, and is not what we intend.

Theoretically DM should be able to deal with states with fully populated planes,
even for simple updates, such as cursor updates. This should still be
addressed in the future.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Unify dm resume sequence into a single call
Mikita Lipski [Sat, 3 Feb 2018 19:18:07 +0000 (14:18 -0500)]
drm/amd/display: Unify dm resume sequence into a single call

Merge amdgpu_dm_display_resume function into dm_resume,
as it is not called anywhere else anymore.

Initially the call was broken down into 2 functions for cursor corruption
issue. Now the issue is not visible, hence the dm_resume will perform
dm_display_resume in it.

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix deadlock when flushing irq
Mikita Lipski [Wed, 10 Jan 2018 15:01:38 +0000 (10:01 -0500)]
drm/amd/display: Fix deadlock when flushing irq

Lock irq table when reading a work in queue,
unlock to flush the work, lock again till all tasks
are cleared

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/sriov: Need to set in_gpu_reset flag to back after gpu reset
Emily Deng [Thu, 26 Apr 2018 10:02:14 +0000 (18:02 +0800)]
drm/amdgpu/sriov: Need to set in_gpu_reset flag to back after gpu reset

After host os reset gpu reset, need to set flag in_gpu_reset to
zero.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: For sriov reset, move IB test into exclusive mode
Emily Deng [Thu, 26 Apr 2018 10:02:55 +0000 (18:02 +0800)]
drm/amdgpu: For sriov reset, move IB test into exclusive mode

When put the IB test out of exclusive mode, and do sriov reset,
the IB test will randomly fail. As out of exclusive mode it uses
kiq to do read and write registers, but as it has world switch,
the kiq read and write time will be random, sometimes it will
beyond the MAX_KIQ_REG_WAIT and then the read or write register
will fail, which will result the IB test fail.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: don't update last scheduled fence in TDR
Pixel Ding [Wed, 25 Apr 2018 02:52:45 +0000 (22:52 -0400)]
drm/scheduler: don't update last scheduled fence in TDR

The current sequence in scheduler thread is:
1. update last sched fence
2. job begin (adding to mirror list)
3. job finish (remove from mirror list)
4. back to 1

Since we update last sched prior to joining mirror list, the jobs
in mirror list already pass the last sched fence. TDR just run
the jobs in mirror list, so we should not update the last sched
fences in TDR.

Signed-off-by: Pixel Ding <Pixel.Ding@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/powerplay: Add powertune table for VEGAM
Eric Huang [Wed, 11 Apr 2018 23:23:54 +0000 (18:23 -0500)]
drm/powerplay: Add powertune table for VEGAM

Add the powertune table for VEGAM.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add specific changes for VEGAM in smu7_hwmgr.c
Eric Huang [Wed, 11 Apr 2018 20:38:11 +0000 (15:38 -0500)]
drm/amd/powerplay: add specific changes for VEGAM in smu7_hwmgr.c

VEGAM specific changes for smu7:
1. add avfs control.
2. add a smc message defferent as smu7.
3. don't switch mc arb memory timing.
4. update LCAC_MC0/1_CNTL value.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add smumgr support for VEGAM (v2)
Eric Huang [Wed, 11 Apr 2018 20:32:58 +0000 (15:32 -0500)]
drm/amd/powerplay: add smumgr support for VEGAM (v2)

The smumgr handles communication between the driver
and the SMU for power management.

v2: fix typo (Alex)

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: update process pptables
Eric Huang [Fri, 17 Nov 2017 16:31:09 +0000 (11:31 -0500)]
drm/amd/powerplay: update process pptables

Add functionality to fetch gpio table from vbios.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: update ppatomctrl.c (v2)
Eric Huang [Fri, 17 Nov 2017 16:21:02 +0000 (11:21 -0500)]
drm/amd/powerplay: update ppatomctrl.c (v2)

used for calculating memory clocks in powerplay.

v2: handle endian swapping of atom data (Alex)

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd: add a new struct in atombios.h
Eric Huang [Fri, 17 Nov 2017 16:17:48 +0000 (11:17 -0500)]
drm/amd: add a new struct in atombios.h

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add smu75 header files
Eric Huang [Thu, 9 Nov 2017 21:29:28 +0000 (16:29 -0500)]
drm/amd/powerplay: add smu75 header files

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Use HBR2 if eDP monitor it doesn't advertise link rate
Harry Wentland [Tue, 21 Nov 2017 18:34:48 +0000 (13:34 -0500)]
drm/amd/display: Use HBR2 if eDP monitor it doesn't advertise link rate

Some eDP displays use the extra link rate table to advertise link rate
support. If they do that they don't need to provide link rate through
the usual registers. Since we don't currently have support for the extra
link rate table default to HBR2 for the display in this.

Note that this is a HACK. Ultimately we need to teach DC to use the
extra link rate table.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add VEGAM support to the legacy DCE 11 module
Alex Deucher [Thu, 19 Apr 2018 21:38:46 +0000 (16:38 -0500)]
drm/amdgpu: Add VEGAM support to the legacy DCE 11 module

DC is preferred.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Implement VEGAM device IDs in DM
Jerry (Fangzhi) Zuo [Thu, 9 Nov 2017 16:51:13 +0000 (11:51 -0500)]
drm/amd/display: Implement VEGAM device IDs in DM

Add CHIP_VEGAM

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Implement VEGAM device IDs in DC
Jerry (Fangzhi) Zuo [Wed, 11 Apr 2018 20:39:35 +0000 (15:39 -0500)]
drm/amd/display: Implement VEGAM device IDs in DC

Implement device IDs for VEGAM

Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM pci ids
Leo Liu [Thu, 9 Nov 2017 18:25:31 +0000 (13:25 -0500)]
drm/amdgpu: add VEGAM pci ids

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM support to vi
Leo Liu [Wed, 11 Apr 2018 20:28:28 +0000 (15:28 -0500)]
drm/amdgpu: add VEGAM support to vi

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM to VCE harvest config
Leo Liu [Fri, 10 Nov 2017 17:32:04 +0000 (12:32 -0500)]
drm/amdgpu: add VEGAM to VCE harvest config

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM VCE firmware support
Leo Liu [Wed, 11 Apr 2018 20:25:57 +0000 (15:25 -0500)]
drm/amdgpu: add VEGAM VCE firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM UVD encode support
Leo Liu [Wed, 11 Apr 2018 20:24:01 +0000 (15:24 -0500)]
drm/amdgpu: add VEGAM UVD encode support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM UVD firmware support
Leo Liu [Fri, 10 Nov 2017 17:27:40 +0000 (12:27 -0500)]
drm/amdgpu: add VEGAM UVD firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: initialize VEGAM GFX
Leo Liu [Thu, 16 Nov 2017 18:49:56 +0000 (13:49 -0500)]
drm/amdgpu: initialize VEGAM GFX

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GFX golden settings
Leo Liu [Thu, 16 Nov 2017 18:41:03 +0000 (13:41 -0500)]
drm/amdgpu: add VEGAM GFX golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GFX firmware support
Leo Liu [Fri, 10 Nov 2017 16:04:09 +0000 (11:04 -0500)]
drm/amdgpu: add VEGAM GFX firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SDMA golden settings
Leo Liu [Wed, 11 Apr 2018 20:22:20 +0000 (15:22 -0500)]
drm/amdgpu: add VEGAM SDMA golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SDMA firmware support
Leo Liu [Thu, 9 Nov 2017 18:56:12 +0000 (13:56 -0500)]
drm/amdgpu: add VEGAM SDMA firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: initialize VEGAM GMC (v2)
Leo Liu [Wed, 11 Apr 2018 20:20:35 +0000 (15:20 -0500)]
drm/amdgpu: initialize VEGAM GMC (v2)

v2: use proper register rather than hardcoding.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM GMC golden settings
Leo Liu [Wed, 11 Apr 2018 20:18:20 +0000 (15:18 -0500)]
drm/amdgpu: add VEGAM GMC golden settings

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: skip VEGAM MC firmware load
Leo Liu [Thu, 16 Nov 2017 18:15:12 +0000 (13:15 -0500)]
drm/amdgpu: skip VEGAM MC firmware load

Directly loaded by VBIOS

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM dc support check
Leo Liu [Wed, 8 Nov 2017 23:07:12 +0000 (18:07 -0500)]
drm/amdgpu: add VEGAM dc support check

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/virtual_dce: add VEGAM support
Leo Liu [Fri, 3 Nov 2017 18:22:16 +0000 (14:22 -0400)]
drm/amdgpu/virtual_dce: add VEGAM support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM SMU firmware support
Leo Liu [Thu, 9 Nov 2017 18:24:47 +0000 (13:24 -0500)]
drm/amdgpu: add VEGAM SMU firmware support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: specify VEGAM ucode SMU load method
Leo Liu [Thu, 9 Nov 2017 18:26:54 +0000 (13:26 -0500)]
drm/amdgpu: specify VEGAM ucode SMU load method

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set VEGAM to ASIC family and ip blocks
Leo Liu [Thu, 9 Nov 2017 18:22:54 +0000 (13:22 -0500)]
drm/amdgpu: set VEGAM to ASIC family and ip blocks

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: bypass GPU info firmware load for VEGAM
Leo Liu [Thu, 9 Nov 2017 18:19:58 +0000 (13:19 -0500)]
drm/amdgpu: bypass GPU info firmware load for VEGAM

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add VEGAM ASIC type
Leo Liu [Thu, 9 Nov 2017 18:18:24 +0000 (13:18 -0500)]
drm/amdgpu: add VEGAM ASIC type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: Change the default to PCI on PowerPC
Mathieu Malaterre [Tue, 24 Apr 2018 19:55:11 +0000 (21:55 +0200)]
drm/radeon: Change the default to PCI on PowerPC

AGP mode is unstable on PowerPC. Symptoms are generally of the form:

[ 1228.795711] radeon 0000:00:10.0: ring 0 stalled for more than 10240msec

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add OVERDRIVE support on Vega10 (v2)
Rex Zhu [Wed, 18 Apr 2018 10:46:07 +0000 (18:46 +0800)]
drm/amd/pp: Add OVERDRIVE support on Vega10 (v2)

when bit14 in module parameter ppfeaturemask was set.
od feature will be enabled on Vega10 except vbios not support.

user can read od range by reading sysfs pp_od_clk_voltage,
cat pp_od_clk_voltage
OD_SCLK:
0:        852Mhz        800mV
1:        991Mhz        900mV
2:       1138Mhz        950mV
3:       1269Mhz       1000mV
4:       1348Mhz       1050mV
5:       1399Mhz       1100mV
6:       1440Mhz       1150mV
7:       1500Mhz       1200mV
OD_MCLK:
0:        167Mhz        800mV
1:        500Mhz        800mV
2:        800Mhz        950mV
3:        945Mhz       1000mV
OD_RANGE:
SCLK:     852MHz       2200MHz
MCLK:     167MHz       1500MHz
VDDC:     800mV        1200mV

and can configure the clock/voltage by writing pp_od_clk_voltage
for example:

echo "s 0 900 820">pp_od_clk_voltage to change the sclk/vddc
to 900MHz and 820 mV in dpm level0.

echo "r" to change the clk/voltage to  default value.

echo "c">pp_od_clk_voltage
to commit the change

v2: squash in warning fix (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/admgpu: fix mode_valid's return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:14:18 +0000 (15:14 +0200)]
drm/admgpu: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: fix mode_valid's return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:13 +0000 (15:15 +0200)]
drm/radeon: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: fix radeon_atpx_get_client_id()'s return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:41 +0000 (15:15 +0200)]
drm/radeon: fix radeon_atpx_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, radeon_atpx_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix amdgpu_atpx_get_client_id()'s return type
Luc Van Oostenryck [Tue, 24 Apr 2018 13:15:34 +0000 (15:15 +0200)]
drm/amdgpu: fix amdgpu_atpx_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, amdgpu_atpx_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: change pp_dpm clk/mclk/pcie input format.
welu [Tue, 24 Apr 2018 13:13:20 +0000 (09:13 -0400)]
drm/amdgpu: change pp_dpm clk/mclk/pcie input format.

1. support more than 8 values when setting get_pp_dpm_mclk/
sclk/pcie, the former design just parse command format like
"echo xxxx > pp_dpm_sclk" and current can parse "echo xx xxx
 xxxx > pp_dpm_sclk" whose operation is more user-friendly
and convinent and can offer more values;
2. be compatible with former design like "xx".
3. add DOC: pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie
Bug:KFD-385

Signed-off-by: welu <wei.lu2@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders
Nicolai Hähnle [Thu, 12 Apr 2018 14:34:19 +0000 (16:34 +0200)]
drm/amdgpu: set COMPUTE_PGM_RSRC1 for SGPR/VGPR clearing shaders

Otherwise, the SQ may skip some of the register writes, or shader waves may
be allocated where we don't expect them, so that as a result we don't actually
reset all of the register SRAMs. This can lead to spurious ECC errors later on
if a shader uses an uninitialized register.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
6 years agodrm/amdgpu: bo could be null when access in vm bo update
Junwei Zhang [Mon, 23 Apr 2018 09:21:21 +0000 (17:21 +0800)]
drm/amdgpu: bo could be null when access in vm bo update

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Enable scatter gather display support
Samuel Li [Wed, 18 Apr 2018 20:15:52 +0000 (16:15 -0400)]
drm/amdgpu: Enable scatter gather display support

Enables sg display if vram size <= THRESHOLD(256M); otherwise
still use vram as display buffer.
This patch fixed some potention issues introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
limitation.

v2: Change default setting to auto.
v3: Move some logic from amdgpu_display_framebuffer_domains()
    to pin function, suggested by Christian.
v4: Split into several patches.
v5: Drop module parameter for now.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay: actually return the power with the new query
Alex Deucher [Sat, 21 Apr 2018 19:09:59 +0000 (14:09 -0500)]
drm/amdgpu/powerplay: actually return the power with the new query

Set query to the power value so we actually return it.  Fixes
no power value returned on asics with the new query.

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Print out voltage/clock range in sysfs
Rex Zhu [Thu, 19 Apr 2018 02:39:17 +0000 (10:39 +0800)]
drm/amd/pp: Print out voltage/clock range in sysfs

when user cat pp_od_clk_voltage
add display info about the sclk/mclk/vddc range that user can overdrive
output as:
OD_SCLK:
0:        300MHz        900mV
1:        400MHz        912mV
2:        500MHz        925mV
3:        600MHz        937mV
4:        700MHz        950mV
5:        800MHz        975mV
6:        900MHz        987mV
7:       1000MHz       1000mV
OD_MCLK:
0:        300MHz        900mV
1:       1500MHz        912mV
OD_RANGE:
SCLK:     300MHz       1200MHz
MCLK:     300MHz       1500MHz
VDDC:     700mV        1200mV

also
1. remove unnecessary whitespace before a quoted newline
2. change unit of frequency Mhz to MHz

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Change voltage/clk range for OD feature on VI
Rex Zhu [Wed, 18 Apr 2018 13:09:35 +0000 (21:09 +0800)]
drm/amd/pp: Change voltage/clk range for OD feature on VI

read vddc range from vbios.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Refine the OD state checking code in smu7
Rex Zhu [Wed, 18 Apr 2018 10:43:19 +0000 (18:43 +0800)]
drm/amd/pp: Refine the OD state checking code in smu7

if vddc restore to default value, driver clear the
bit of DPMTABLE_OD_UPDATE_VDDC and need to repopulate sclk
and mclk table.

1. Remove variable i checking code.
2. move clear DPMTABLE_OD_UPDATE_VDDC bit to the end of the
   function to avoid sclk table will not be updated.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Use dynamic gfx_clk rather than hardcoded values
Rex Zhu [Fri, 20 Apr 2018 05:03:15 +0000 (13:03 +0800)]
drm/amd/pp: Use dynamic gfx_clk rather than hardcoded values

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Change pstate_clk frequency unit to 10KHz on Rv
Rex Zhu [Fri, 20 Apr 2018 04:57:10 +0000 (12:57 +0800)]
drm/amd/pp: Change pstate_clk frequency unit to 10KHz on Rv

to keep consistent with other asics

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_od_clk_voltage
Alex Deucher [Thu, 19 Apr 2018 19:59:55 +0000 (14:59 -0500)]
drm/amdgpu/pm: document pp_od_clk_voltage

sysfs interface for fine grained clock and voltage control.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_power_profile_mode
Alex Deucher [Thu, 19 Apr 2018 19:38:31 +0000 (14:38 -0500)]
drm/amdgpu/pm: document pp_power_profile_mode

sysfs file for adjusting power level heuristics.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie (v2)
Alex Deucher [Thu, 19 Apr 2018 19:22:24 +0000 (14:22 -0500)]
drm/amdgpu/pm: document pp_dpm_sclk pp_dpm_mclk pp_dpm_pcie (v2)

Used for manually masking dpm states.

v2: drop comment about current state (Rex)

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document pp_table
Alex Deucher [Thu, 19 Apr 2018 19:02:52 +0000 (14:02 -0500)]
drm/amdgpu/pm: document pp_table

This file is for uploading new powerplay tables.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document power_dpm_state
Alex Deucher [Thu, 19 Apr 2018 18:56:41 +0000 (13:56 -0500)]
drm/amdgpu/pm: document power_dpm_state

This is a legacy file and is only provided for
backwards compatibility.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pm: document power_dpm_force_performance_level
Alex Deucher [Thu, 19 Apr 2018 18:46:03 +0000 (13:46 -0500)]
drm/amdgpu/pm: document power_dpm_force_performance_level

Provide documentation for power_dpm_force_performance_level
which is used to adjust things related to GPU power states.

Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Remove VRAM from shared bo domains.
Samuel Li [Wed, 18 Apr 2018 20:26:18 +0000 (16:26 -0400)]
drm/amdgpu: Remove VRAM from shared bo domains.

This fixes an issue introduced by change "allow framebuffer in GART
memory as well" which could lead to a shared buffer ending up
pinned in vram.  Use GTT if it is included in the domain, otherwise
return an error.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Rename amdgpu_display_framebuffer_domains()
Samuel Li [Wed, 18 Apr 2018 19:06:02 +0000 (15:06 -0400)]
drm/amdgpu: Rename amdgpu_display_framebuffer_domains()

It returns supported domains for display, and domains actually used are to be
decided later when pinned.

Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: use the flag to decide whether send gfxoff smc message
Huang Rui [Thu, 14 Dec 2017 07:33:53 +0000 (15:33 +0800)]
drm/amd/powerplay: use the flag to decide whether send gfxoff smc message

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set CGPG if gfxoff is enabled for raven
Huang Rui [Fri, 15 Dec 2017 06:34:57 +0000 (14:34 +0800)]
drm/amdgpu: set CGPG if gfxoff is enabled for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix to disable powergating in hw_fini
Huang Rui [Tue, 27 Feb 2018 05:43:59 +0000 (13:43 +0800)]
drm/amdgpu: fix to disable powergating in hw_fini

We need enable CGPG and GFXOFF together. If only enable one of them, this system
will get hang after startx (do draw command). So when gfxoff is disabled, it
also need disable CGPG after that.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: it should disable gfxoff when system is going to suspend
Huang Rui [Tue, 13 Mar 2018 10:39:48 +0000 (18:39 +0800)]
drm/amdgpu: it should disable gfxoff when system is going to suspend

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add control gfxoff enabling in late init
Huang Rui [Tue, 13 Mar 2018 10:32:39 +0000 (18:32 +0800)]
drm/amd/powerplay: add control gfxoff enabling in late init

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: clear gfxoff feature mask if the asic is not raven
Huang Rui [Tue, 13 Mar 2018 09:59:12 +0000 (17:59 +0800)]
drm/amdgpu: clear gfxoff feature mask if the asic is not raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: use pp_feature member to store the mask
Huang Rui [Tue, 27 Feb 2018 13:53:00 +0000 (21:53 +0800)]
drm/amdgpu: use pp_feature member to store the mask

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: enable/disable gfxoff through smu
Huang Rui [Fri, 2 Mar 2018 07:18:54 +0000 (15:18 +0800)]
drm/amd/powerplay: enable/disable gfxoff through smu

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add gfx off control function
Huang Rui [Fri, 2 Mar 2018 07:10:52 +0000 (15:10 +0800)]
drm/amd/powerplay: add gfx off control function

gfx_off_control is used to be called for sending enabling/disabling gfxoff
message.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: set gfxoff disabled by default
Huang Rui [Fri, 2 Mar 2018 06:40:53 +0000 (14:40 +0800)]
drm/amdgpu: set gfxoff disabled by default

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add gfxoff feature mask
Huang Rui [Fri, 2 Mar 2018 06:16:06 +0000 (14:16 +0800)]
drm/amdgpu: add gfxoff feature mask

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move PP_FEATURE_MASK to amd_shared header
Huang Rui [Tue, 13 Mar 2018 07:13:46 +0000 (15:13 +0800)]
drm/amdgpu: move PP_FEATURE_MASK to amd_shared header

It will be used not only for powerplay but also on amdgpu part in future
patches. So move it into amd_shared header file.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: send CGPG smc message if PG is enabled for raven
Huang Rui [Thu, 14 Dec 2017 05:38:13 +0000 (13:38 +0800)]
drm/amd/powerplay: send CGPG smc message if PG is enabled for raven

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add setting powergating method for gfx9
Huang Rui [Wed, 6 Dec 2017 01:23:50 +0000 (09:23 +0800)]
drm/amdgpu: add setting powergating method for gfx9

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: revise init_rlc_save_restore_list behavior to support latest register_lis...
Huang Rui [Thu, 21 Dec 2017 08:13:02 +0000 (16:13 +0800)]
drm/amdgpu: revise init_rlc_save_restore_list behavior to support latest register_list_format/register_restore table

RLC save/restore list will be used on CGPG and GFXOFF function, it loads two bin
table of register_list_format/register_restore in RLC firmware.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: cleanup init power gating function
Huang Rui [Thu, 21 Dec 2017 07:48:27 +0000 (15:48 +0800)]
drm/amdgpu: cleanup init power gating function

Remove gfx_v9_0_enable_sck_slow_down_on_power_up/down and CP power gating
enabling functions because they only need to be called on setting power gating
behavior. We keep it in set_powergating callback to enable/disable PG in
late_init.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: enter rlc safe mode before set cgpg
Huang Rui [Thu, 21 Dec 2017 07:03:31 +0000 (15:03 +0800)]
drm/amdgpu: enter rlc safe mode before set cgpg

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add save restore list cntl gpm and srm firmware support
Huang Rui [Mon, 22 Jan 2018 12:48:14 +0000 (20:48 +0800)]
drm/amdgpu: add save restore list cntl gpm and srm firmware support

RLC save/restore list cntl/gpm_mem/srm_mem ucodes are used for CGPG and gfxoff
function.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add new rlc firmware header format v2.1
Huang Rui [Mon, 22 Jan 2018 09:51:35 +0000 (17:51 +0800)]
drm/amdgpu: add new rlc firmware header format v2.1

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update psp gfx if header
Huang Rui [Tue, 5 Dec 2017 10:48:48 +0000 (18:48 +0800)]
drm/amdgpu: update psp gfx if header

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add registry key to disable ACG
Kenneth Feng [Fri, 20 Apr 2018 05:55:39 +0000 (13:55 +0800)]
drm/amd/powerplay: add registry key to disable ACG

For the dummy ACG fuses,need to disable ACG, otherwise
corruption will be caused.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: print DMA-buf status in debugfs
Christian König [Sun, 25 Mar 2018 08:10:25 +0000 (10:10 +0200)]
drm/amdgpu: print DMA-buf status in debugfs

Just note if a BO was imported/exported.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: header file interface to SMU update
Kenneth Feng [Tue, 17 Apr 2018 13:49:51 +0000 (21:49 +0800)]
drm/amd/powerplay: header file interface to SMU update

update vega12 smu interface.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: simplify bo_va list when vm bo update (v2)
Junwei Zhang [Thu, 19 Apr 2018 05:17:26 +0000 (13:17 +0800)]
drm/amdgpu: simplify bo_va list when vm bo update (v2)

v2: fix compiling warning

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: init gfx9 aperture settings
Flora Cui [Wed, 18 Apr 2018 09:12:19 +0000 (17:12 +0800)]
drm/amdgpu: init gfx9 aperture settings

fix settings.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Fix NULL point check error in smu_set_watermarks_for_clocks_ranges
Rex Zhu [Thu, 19 Apr 2018 04:40:15 +0000 (12:40 +0800)]
drm/amd/pp: Fix NULL point check error in smu_set_watermarks_for_clocks_ranges

It is caused by
'commit d6c9a7dc86cd ("drm/amd/pp: Move common code to smu_helper.c")'

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>