intel: Unify naming of CONCAT/PASTE macros

In isl/isl_priv.h:
 - __PASTE2 => PASTE2
 - __PASTE => CONCAT2

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Lionel Landwerlin <lionel.g.landwerlin@intel.com>

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16945>

glx: Unify naming of CONCAT/PASTE macros

In glxextensions.c:
 - CONCAT => PASTE2

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16945>

gallium: Unify naming of CONCAT/PASTE macros

In auxiliary/draw/draw_pt_vsplit_tmp.h:
 - CONCAT2 => PASTE2
 - CONCAT => CONCAT2

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16945>

amd: Unify naming of CONCAT/PASTE macros

In compiler/tests/framework.h:
 - _PASTE => PASTE2
 - PASTE => CONCAT2

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16945>

docs: move generic gallium envvars to root doc

It makes little sense to document the gallium envvars in multiple
places. Let's merge them all into the root envvar document.

This also moves GALLIUM_OVERRIDE_CPU_CAPS to toe root envvars doc, as
it's more generic than just LLVMpipe.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: remove duplicate envvars

These envvars are also documented in the "envvars" document, which is
more prominent. Let's just drop these duplicate definitions to avoid
confusion.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: fix badly encoded envvar-roles

Sphinx thinks the equals sign and the stuff that follows are parts of
the role, leading to warnings in nit-picky mode, as well as missing
links in the rendered result. Let's fix that by inserting some
whitespace.

While we're at it, fixup an incorrectly quoted literal.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: use envvar directive

When declaring an envvar, we should use the envvar directive, not the
envvar role. The latter is meant to reference the declaration, not the
other way around.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: remove stale envvar-reference

This reference was left over when the envvar was removed.

Fixes: 231ccb6100e ("docs: Remove no-longer-accurate text about the xlib driver")

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: drop custom envvar directive

The custom envvar directive is strange. It overloads the global
namespace, where there's already a well-known envvar directive, but the
envvar role won't resolve to envvars defined using the custom directive.

It's not really critical to declare the type and default value here, and
many descriptions already include this. Let's just use the plain one,
and let the description take care of the details where needed.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: properly nest envvar descriptions

These were not nested properly, making the definitions not part of the
definition lists.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19593>

docs: remove rogue "the"

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: add missing extension-link

Not sure why I missed this one during the last round, but it seems I
did. Let's add the link!

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: do not mention EGL_MESA_drm_display

This extension was removed back in 2016, but it seems we left a mention
of it in the docs.

The entire section with this extension seems kinda pointless now, so
let's drop it entirely.

Fixes: f3e23ead536 ("egl: remove remnants of MESA_drm_display")
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs/tgsi: xDArray -> xD_ARRAY

This matches what we have in tgsi_strings.c, as well as the non-constant
part of the corresponding enum tgsi_texture_type values.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs/gallium: move period out of quotes

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: lifecycle -> life cycle

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: dll -> DLL

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: un-committed -> uncommitted

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs: IPE -> PIPE

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs/asahi: use console blocks for console commands

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs/asahi: use literal-block for build-options

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

docs/asahi: fix indent

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19719>

etnaviv: don't always emit PE_DEPTH_CONFIG on shader changes

Since b29fe26d4387 ("etnaviv: rework ZSA into a derived state") the PE
depth config is adjusted by etna_update_zsa() when the shader is changed.
When the PE depth config is actually changing as a result of this
adjustment the ZSA state is dirtied, so there is no need to emit the
state unconditionally when the shader is changed.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19686>

etnaviv: switch to late Z when linear PE is used

In linear PE mode the early and late depth stage do not only disagree
about the cache layout, but they seem to fundamentally disagree about
the buffer layout. When Z was written via the late stage, early tests
always show spurious zfails, even if they are not in the same draw
call. Cache flushing and pipe stalls don't help in that case.

The only option to get reliable Z tests with linear render targets is
to move all Z handling into the PE stage. Even when early Z writes
are possible, we don't know if any other draw to the same surface
needs late Z handling, so we must never use the early stage.

Fixes: 53445284a427 ("etnaviv: add linear PE support")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19686>

etnaviv: fix shader register control with MSAA

Apparently MSAA doesn't only add another input, but it also increases
required temporaries by one. Simple programs where the register demand
is given by the number of inputs did work fine, while more complex ones,
where register demand is given by the number of temporaries exhibit
rendering issues without this fix.

Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19582>

gallium: Avoid nullptr-with-nonzero-offset

reserve() in rtasm_x86sse compares a pointer difference with some
integers to check if reallocation is needed.
It unfortunately groups the first pointer with an int, which makes it
possible to hit nullptr-with-nonzero-offset under Undefined Behavior
Sanitizer.
This patch suggests a reordering of the arithmetic expression so that
first the pointer difference is computed, and from that on it's just a
usual integer arithmetic, avoiding nullptr-with-nonzero-offset.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18522>

ci/update_traces_checksum.py: make output more clean and implement colors

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19510>

ci/update_traces_checksum.py: check if checksum is in the array, not it's value

Fixes: 45eda069531a ("ci: introduce update_traces_checksum.py")

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19510>

ac/llvm: fix gfx11 fs input load for 16bit varying

Otherwise we get empty output.

Fixes: b07204d7804 ("radeonsi/gfx11: interp changes for 16bit")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19637>

ac/nir/ngg: remove nuw for negative value add

Add negative value is possible to wrap around. I haven't seen this
"nuw" causes any problem yet, but let's remove it for safe.

Fixes: 60ac5dda82e ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>

ac/nir/ngg: fix nogs culling with nuw add

We should not use "nuw" here as negative add positive may wrap
around (negative is 0xffffff??).

This problem can be observed with LLVM15 (I can't see when LLVM14):
  %.neg = mul nsw i32 %31, -4
  %163 = add nuw nsw i32 %.neg, 16
  %164 = lshr i32 257, %.neg
  %165 = lshr i32 %164, %163

LLVM just assume %.neg is possitive, so pre-shift 0x01010101 by 16.
This get wrong value because we can't get back the shifted bits with
a negative shift right.

Fixes: 75dbb404393 ("ac/nir: Remove byte permute from prefix sum of the repack sequence.")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19718>

anv: Don't use REQUIRE_8 for Bindless Shaders

In 23c7142cd67 ("anv: disable SIMD16 for RT shaders") we were forcing the SIMD8
using the mechanism for subgroup size control, which is problematic since it has
other effects on the shader behavior.

The code was changed to select the SIMD in a different way in the previous patches,
so we can revert the behavior to the original semantics.

Fixes dEQP-VK.subgroups.builtin_var.ray_tracing.subgroupsize.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Use SIMD selection helpers in compile_single_bs()

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Prepare SIMD selection helpers to handle different prog_datas

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Keep track of compiled/spilled in brw_simd_selection_state

We still update the cs_prog_data, but don't rely on it for this state anymore.
This will allow use the SIMD selector with shaders that don't use cs_prog_data.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Add a SIMD_COUNT constant

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Create a struct to hold SIMD selection state

This is a preparation to decouple the storage of what SIMDs
compiled/spilled from the cs_prog_data.  This will allow reuse
of SIMD selection code by Bindless Shaders.

And since we have a struct now, move the error array there so
reduce the boilerplate of the users.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Simplify usage of brw_simd_select_for_workgroup_size()

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

intel/compiler: Make brw_private.h and simd selector helpers C++

We don't intend to expose neither to drivers, so it is fine to be C++.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19601>

gallivm: add coro malloc hooks earlier and always.

This fixes GALLIVM_DEBUG=asm for compute shaders, changing
the hooks after dumping causes a segfault because the
memory has already been finalised. Just add the hooks always,
and before dumping anything.

Fixes: f511d2a55337 ("gallivm: rework coroutine malloc/free callouts.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19714>

glsl: remove unused intrinsics

Since everything now uses nir we can now drop these.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19713>

nir_scale_fdiv: Respect vector swizzles

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19709>

radeonsi: print the number of shader outputs for shader-db

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19567>

lavapipe: Prevent integer overflow adding index buffer offset and start index.

Direct3D and Vulkan's robustBufferAccess2 feature mandate that index
buffer out-of-bounds reads should return a zero index (ie, vertex at
index zero, not to be confused with a vertex with zero attributes, as
the kind resulting in vertex buffer out-of-bounds read.)

lavapipe was adding index_offset and start index together without
overflow checks, and if start index was sufficient large (as is the case
with WHCK wgf11draw which sets start index to (UINT)-5) it would cause
to wrap around causing fetches that should be out of bounds wrap around
and fetch inside bounds.

This change fixes this by doing a clamped add.  This ensures start index
is set to UINT32_MAX on overflow, which is sufficient in practice to
trigger draw index OOB code-paths, yield zero index to be returned.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19683>

draw,util: Refactor draw_overflow_uadd into util.

So it can be used outside draw.  Also drop  the overflow_value parameter,
as it wasn't meaningfully useful.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19683>

util/disk_cache: Prevent ‘sha1’ may be used uninitialized warnings.

These happen when shader cache is disabled (ENABLE_SHADER_CACHE
undefined) due to a prototype mismatch.

Also remove redundant return statements.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19683>

radeonsi/vcn: adding av1 decoding film grain block

add the logic for calculating film grain related
coefficients for VCN to generate film grain output.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19660>

frontends/va: fixed av1 decoding 10bit ffmpeg output YUV issue

av1 decoding supports NV12 and P010 output.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19660>

ci/llvmpipe: Switch rusticl and clover testing over to deqp-runner.

The usual reasons: Flake handling, familiar skips/xfails handling, faster
parallelization.  This also sets us up for running a subset of the CL CTS
once we decide to build it in our containers.

Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19608>

ci: Update to deqp-runner v0.16.0 for SKQP and CL support.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19608>

radv/rt: Clone specialization infos

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19700>

radv/rt: Clone entrypoint names

Fixes a vtn crash with
dEQP-VK.ray_tracing_pipeline.pipeline_library.configurations.singlethreaded_compilation.s0_l1
and validation enabled.

Closes: #7642
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19700>

radv: Use ralloc for allocating pipeline library resources

This fixes leaking shader modules on failure and simplifies freeing.

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19700>

vulkan,radv: Remove vk_shader_module_clone

The helper used ralloc which is unusual for vulkan objects, did not
handle allocation failures properly and was only useful for RADV.

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19700>

replace sys/poll.h with poll.h

Fixes multiple warnings as this one:
```
/usr/include/sys/poll.h:1:2: warning: #warning redirecting incorrect #include <sys/poll.h> to <poll.h> [-Wcpp]
    1 | #warning redirecting incorrect #include <sys/poll.h> to <poll.h>
      |  ^~~~~~~
```

Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19587>

intel/crocus: do not redefine PAGE_SIZE

See https://www.openwall.com/lists/musl/2015/09/11/5
```
../src/gallium/drivers/crocus/crocus_bufmgr.c:102: error: "PAGE_SIZE" redefined [-Werror]
```

Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19587>

kopper: guard unused variable behind ifdef

Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19587>

docs/releasing: add convenient command to rebase everything since last release

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>

docs/releasing: checkout the staging branch at the end of its creation process

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>

docs/releasing: update branchpoint instructions to be friendlier to our Marge-bot-based workflow

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>

docs/releasing: fix instructions to create a branch from a tag

Not sure if it used to work, but it doesn't anymore.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>

docs/releasing: add VERSION variable to avoid typos when copy/pasting

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>

intel/compiler: Fix missing tie-breaker in brw_nir_analyze_ubo_ranges() ordering code

Per Ken suggestion, use ascending order for the start offset.

Fixes: 6d28c6e52cf ("i965: Select ranges of UBO data to be uploaded as push constants.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19731>

intel/compiler: Fix dynarray usage in intel_clc

The code builds up the dynamic array of objects (spirv_objs) and
collect pointers to each of them into another dynamic
array (spirv_ptr_objs).

If the growth of the first array cause a reallocation, it is
possible that the previous pointers end up invalid.

Fixes: 77e929a5273 ("intel/clc: allow multiple CL files to be compiled together")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19730>

radv/rt: Get rid of null index AABB intersection handling

If the intersection shader is VK_SHADER_UNUSED_KHR (which is only allowed for a zero shader group) then no further processing of the intersection candidate occurs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19705>

r600/sfn: Call lower_flrp from driver code

gallium-nine seems to ignore the shader options and emits the
instruction despite "options::lower_flrp32 = true"

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>

r600/sfn: use only one undef in tex lowering

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>

r600/sfn: Use a bitfield for some register properties

Also simplify some use of these flags.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>

r600/sfn: handle possible inline const as array base for scratch loads

Replace some asserts with unreachable too.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>

r600/sfn: Simlify check for zero and one

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>

r600/sfn: implement finalize_nir

Move shader key independent lowering and some optimizations
to finalize_nir.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19708>

v3dv/bo: reset bo and then call gem close

After 'v3dv: fix debug dump on BO free' we changed the order, and this
lead to the following test
dEQP-VK.api.object_management.multithreaded_per_thread_resources.device_memory_small

v2: Expanded comment just before the reset, explaining that we need to
do the reset before we free the BO from the kernel (Iago)

Raising this assertion:
deqp-vk: ../src/broadcom/vulkan/v3dv_bo.c:281: v3dv_bo_alloc: Assertion `bo && bo->handle == 0' failed.

Fixes: 2c44597181e2 ('v3dv: fix debug dump on BO free')

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19693>

Revert "ci/broadcom: v3dv-rpi4-vk:arm64 flakes too often"

This reverts commit cb02cf464c16961a8922e0180eeba38fea16ac85.

There are 3 reported flakes over a period of a month, and we have been
unable to reproduce it even once. It clearly doesn't happen often enough
to warrant disabling our vulkan CI, so let's restore it while we
continue to try to reproduce the issue on our side.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19720>

zink: remove descriptor-mode selection infrastructure

We only support lazy descriptors these days, so having the
infrastructure around to support automatic selection of that one mode is
kinda silly.

And it's not like setting an environment variable that is never read is
going to cause any issues, so we don't even need this to avoid breaking
existing setups.

Let's just rip it out. We can reintroduce it again on the off-chance
that someone has a new clever descriptor mode they want to experiment
with.

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19670>

radv: enable lowering of subgroup shuffle in NIR on GFX11+

VGPR allocation changed on GFX11 and this might have changed how
shared VGPRs work, so it's probably more secure to lower in NIR.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19679>

r300: enable channel merging on r300/r400 VS

(VS doesn't have limitations like FS)

total instructions in shared programs: 27439 -> 26928 (-1.86%)
instructions in affected programs: 6219 -> 5708 (-8.22%)
helped: 157
HURT: 0
helped stats (abs) min: 1 max: 13 x̄: 3.25 x̃: 3
helped stats (rel) min: 1.03% max: 66.67% x̄: 17.66% x̃: 11.11%
95% mean confidence interval for instructions value: -3.58 -2.93
95% mean confidence interval for instructions %-change: -20.12% -15.20%
Instructions are helped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19711>

r300: better register allocator for vertex shaders

This is a port of the fp pair regalloc. It is however much simpler as
contrary to the fp, we don't have to care about texturing, we can use
any swizzle we want and we don't have to track the inputs. Using the
register class machinery might actually be a slight overkill right now,
however the infrastructure will hopefully come in handy if someone
decides to implement the vp pair scheduling eventually.

Shader-db stats:

RV530:
total temps in shared programs: 18594 -> 17000 (-8.57%)
temps in affected programs: 5753 -> 4159 (-27.71%)
helped: 665
HURT: 0

RV370:
total temps in shared programs: 13555 -> 12181 (-10.14%)
temps in affected programs: 5116 -> 3742 (-26.86%)
helped: 633
HURT: 0

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5972

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: another fix for reader detection in the presence of loops

This helps in some cases where we fail to detect that the write mask
is still alive after the loop and thus fail to detect some readers.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: properly account for per-channel negates when reswizzling

Vertex shaders can have a per-channel negate so we need to properly
update the negate mask when rewriting swizzles.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: don't skip source rewrite if RC_FILE_NONE in rc_for_all_reads_src

This function is used by rc_variable_change_dst when rewriting variables
and even though we don't need to rewrite the index for RC_FILE_NONE, we
still need to properly reswizzle.

All other users of the function are properly checking for RC_FILE_NONE
later.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: generalize rc_init_regalloc_state

It can now be used to init rc_regalloc_state for both vertex and
fragment shaders.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: add array with conflict values for the vp register classes

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: add new register class list for vertex shaders

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: add FP suffix to the current class list

We will add a new one for vp in a next commit

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: increase maximum number of writemask combinations

We can have up to 6 in vertex shaders.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: move building of the interference graph to a separate function

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: generalize rc_find_class

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: move some functions out of radeon_pair_regalloc

To prepare for a future sharing in vertex shader register allocator.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

r300: save pointer to register class list in the regalloc state

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>

nir: add another common ffract -> ffloor pattern

shader-db results (BDW):

total instructions in shared programs: 17527053 -> 17526931 (<.01%)
instructions in affected programs: 5116 -> 4994 (-2.38%)
helped: 25
HURT: 0
helped stats (abs) min: 2 max: 15 x̄: 4.88 x̃: 3
helped stats (rel) min: 0.25% max: 5.34% x̄: 3.39% x̃: 3.90%
95% mean confidence interval for instructions value: -6.19 -3.57
95% mean confidence interval for instructions %-change: -3.98% -2.81%
Instructions are helped.

total cycles in shared programs: 856680230 -> 856682009 (<.01%)
cycles in affected programs: 6583780 -> 6585559 (0.03%)
helped: 117
HURT: 77
helped stats (abs) min: 1 max: 854 x̄: 68.56 x̃: 16
helped stats (rel) min: <.01% max: 35.34% x̄: 2.12% x̃: 0.76%
HURT stats (abs)   min: 1 max: 2188 x̄: 127.27 x̃: 18
HURT stats (rel)   min: 0.01% max: 22.66% x̄: 1.86% x̃: 0.67%
95% mean confidence interval for cycles value: -30.07 48.41
95% mean confidence interval for cycles %-change: -1.28% 0.19%
Inconclusive result (value mean confidence interval includes 0).

LOST:   3
GAINED: 1

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19666>

vulkan: Unconditionally add barriers for missing external subpass deps

This is a very scorched-earth approach which doesn't take into account
whether or not there are any explicitly provided dependencies.  We could
take a finer-grained approach in theory but it's unlikely to matter in
practice since you usually stall in Begin/EndRenderPass anyway.

Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6203
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7650
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>

vulkan: Handle VK_SUBPASS_EXTERNAL at the end of a subpass

Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>

r600/sfn: Fix f2u32 and remove backend lowring of f2u64 and f2i64

The two conversion ops are now handled in nir_lower_int64,
but the fixup for the input to f2u32 has to be handled there
and not in f2u64.

Fixes: 29da9856826fa6a4b5117c43c78b4301a49bc6dd
   nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>

r600/sfn: Fix source modifiers for ffract64

Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
    r600/sfn: rewrite NIR backend

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>

spirv: Make vtn_fail and friends trap in debug mode

The SPIR-V parser catches its failures and failed assertions, clean up
and return a failure to the caller.  This is a good default behavior, but
when debugging sometimes is useful to hook the debugger right in the
failed assertion.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19663>

anv: bump pool bucket max allocation size

Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above
the limit we currently have.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19669>

vulkan/wsi/wayland: fix unaligned load of dev_t

Fixes the following UBSan error:

    ../src/vulkan/wsi/wsi_common_wayland.c:654:27: runtime error: load of misaligned address 0x6110000666b4 for type 'dev_t' (aka 'unsigned long'), which requires 8 byte alignment

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19595>

llvmpipe: drop cache stats code

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19644>

disk_cache: add env var to show stats

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19644>