spirv2dxil: Support descriptor indexing capabilities

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

spirv2dxil: Only lower readonly images to SRVs when the option is set

This handles the case where readonly is explicitly marked in the shader,
rather than just inferred based on opt_access.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

spirv2dxil: Add a pass to lower deref tex/image and vulkan ubo/ssbo to bindless

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Update header docs for binding modes supported by compiler

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Use store_dest instead of store_dest_value more

The 16bit SSBO load support missed setting the 16bit shader flag.
Make it harder to miss that by only using store_dest_value for things
that don't have a type.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Support descriptor heap indexing for UBO/SSBO

Treat load_vulkan_descriptor on an input that didn't come from
vulkan_resource_index as a descriptor heap index instead of a
binding index.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Handle "bindless" image/tex sources as heap indices

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Split handle annotation into two parts

The first part gets the resource props struct, and the second
actually emits the annotate instruction. Later changes will
get the resource props struct from different sources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Add helpers for getting res_props structs

Currently we can get one by looking up already-emitted resource
metadata, but in the future we'll want to be able to get this
info from a call site alone. Depending on the type of call site,
we'll have different sets of info, so add helpers for the
various different kinds of call sites we can support.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Refactor type -> resource kind helper

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Only set typed UAV load feature bit for multi-comp loads

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

microsoft/compiler: Fix setting bit 31 in feature flags

Fixes: a84208ee ("microsoft/compiler: Fill out and sort the shader/module flags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21913>

intel/fs: use generated helpers for Wa_14013363432 / Wa_14012688258

Wa_14013363432 is a clone of Wa_14012688258.  It does not apply to all
gfx 12.5 platforms.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21745>

freedreno/decode: fix possible overflow

```
../src/freedreno/decode/rddecompiler.c:242:65: error: 'sscanf' may overflow; destination buffer in argument 3 has size 32, but the corresponding specifier may require size 33 [-Werror,-Wfortify-source]
         if (sscanf(info->name, "%32[A-Z0-6_][%32[x0-9]].%32s", reg_name,
                                                                ^
../src/freedreno/decode/rddecompiler.c:243:21: error: 'sscanf' may overflow; destination buffer in argument 4 has size 32, but the corresponding specifier may require size 33 [-Werror,-Wfortify-source]
                    reg_idx, field_name) != 3) {
                    ^
../src/freedreno/decode/rddecompiler.c:243:30: error: 'sscanf' may overflow; destination buffer in argument 5 has size 32, but the corresponding specifier may require size 33 [-Werror,-Wfortify-source]
                    reg_idx, field_name) != 3) {
                             ^
```

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22015>

ci/freedreno: do not build tools executables without explicitly enabling them

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22015>

d3d12: Remove now-unused UAV format from shader info

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22093>

d3d12: Fix buffer SRV/UAV creation

Get the format right for UAVs (using the image view instead of
relying on the shader having a format specified) and limit the size
to the API-reported size.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22093>

d3d12: Report correct texel buffer max size

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22093>

microsoft/compiler: Handle writable buffer UAV size queries

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22093>

d3d12: Encode - Only upload headers when written headers size is > 0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22091>

d3d12: Encode H264/HEVC - Do not write PPS unless different from active

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22091>

d3d12: H264/HEVC Encode - Set both VBV InitialCapacity/Size in CBR Rate Control to same value when requested

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22091>

freedreno/rnn: Fix reg names for regs with variants

Fixes reg names with headergen2, so that if we have separate a6xx and
a7xx variants for a register we get REG_A6XX_foo and REG_A7XX_foo
instead of both being REG_A6XX_foo.  Otherwise generated headers for the
kernel wouldn't compile.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22035>

freedreno, nir, ir3: implement GL_EXT_shader_framebuffer_fetch

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21260>

nir: Add memory coherency information to shaders.

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21260>

nir: allow nir_lower_fb_read to support multiple render targets

Signed-off-by: Amber Amber <amber@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21260>

tu: Fix tile_align_h on a650

This matches what the blob on a650 does and fixes errors when
calculating the tile size due to tile_align_h not being a power of two.

Fixes: 60bc7c0e ("freedreno: Specify GMEM tile alignment per GPU")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22088>

v3d: add link to issue investigating failure

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22089>

frontends/va: check decoder in va surface call

Add a check to see if decoder is valid before using it. Currently we
only support decode and encode operations, return unsupported error
for all other entrypoints.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21905>

anv: Implement Xe version of execute_simple_batch()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22058>

anv: Handle Xe queue/engine priority

As Xe requires engine info, it is not possible to fetch max priority
from anv_physical_device_get_parameters() call chain, so here
anv_xe_physical_device_max_priority_update() was added.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22058>

anv: Implement Xe version of check_status()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22058>

anv: Create Xe engines

Xe engine is not equal to hardware engine, it is just a submission
queue that will be scheduled in the hardware engine during process
time slice of the GPU.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22058>

anv: Replace I915_ENGINE_CLASS_VIDEO by INTEL_ENGINE_CLASS_VIDEO

Using the value that is not dependent on the KMD uapi.

Not marking as a fixes because both have the same value, so we
don't need a backport.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22058>

radv: Enable mesh shading on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac/nir/ngg: Store special MS outputs in attribute ring for PS to read.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac/nir/ngg: Fix mesh shader layer on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac/nir/ngg: Split legacy workgroup index function.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac/nir/ngg: Use attribute ring for mesh shader params.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac/nir/ngg: Clarify mesh shader scratch ring.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Adjust mesh draw packets for GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Include per-prim params in NUM_INTERP on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Use PRIM_ATTR for PS inputs on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Add extra offset to per-prim params.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Use per-prim params in has_param_exports.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Add per-prim attributes to ring_attr stride.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

radv: Use new mesh shading packet defines.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ac: Add more defines for mesh shading packets.

Add some set macro defines for mesh shading packets.
The naming convention is:
S_(packet opcode)(dword index)_FIELD_NAME

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21409>

ci: bump Alpine to 3.17 (again)

Now with fixed ccache 4.7.5.

`ccache` changelog:
Disabled the inode cache by default again since there have reports of ccache
processes hanging on futex calls related to the inode cache.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22037>

v3d: fix condition for EZ disabling when stencil on

When stencil is enabled and it isn't non-op, Early-Z must be disabled.

The condition that checks this for stencil[0] is correct, but the one
for stencil[1] is wrong: it uses an "and" instead of "or" condition.

This affects dEQP-GLES3.functional.fragment_ops.interaction.basic_shader.14

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22081>

intel/dev: fold Gfx12 URB entries in Gfx12 HW info

Also add a non-zero URB size for intel_stub_gpu

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

intel/devinfo: initialize pci_device_id with from_pci_id()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Suggested-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

intel/devinfo: dedicated entries for XeHP

Also fixing the max URB entries for VS stage.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Chuansheng Liu <chuansheng.liu@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

intel/dev: use generated WA helpers for Wa_22012575642

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

intel/devinfo: printout URB entries

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

intel/devinfo: add an option to pick platform to print

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21949>

ci/windows: Update warp to 1.0.5

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22034>

ac/llvm: add missing type convert for nir_load_buffer_amd

Fixes: afcbccb0781 ("ac/llvm: implement ACCESS_USE_FORMAT_AMD as buffer_load/store_format")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22043>

ac/llvm: respect channel_type when ac_build_buffer_load

Mainly for nir_load_smem_buffer_amd which pass i32 for this parameter.

Fixes: 8030fbcf16a ("nir,ac/llvm: add nir_load_smem_buffer_amd")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22043>

glsl: Write a new test for GLSL and NIR mediump lowering.

The mediump lowering tests are important for poking at the lowering pass
behavior, since you can't really assert the behavior in any given driver,
given that the GLSL spec allows any mediump op to be done in highp.

But, in hacking on mediump lowering, I wanted several things that the old
test couldn't do:

- Be able to assert about the actual NIR code we expect to generate for a
  hypothetical driver (important if other compiler stages might do invalid
  transformations like eliminating highp temps, or if we were to move the
  lowering after GLSL IR)
- Run faster (gtest unit tests rather than python forking off the standalone
  glsl compiler per testcase).
- Express expectations with a lot less escaping of typical syntax.
- High-quality logs for displaying failures.

This new test does all of that, I think, though I haven't converted all of
the unit tests over yet.  In converting, I dropped some of the
combinatorial explosion for float/int variations, instead only doing so
when it gets at some different code path (default precision flags).  I've
also included some new tests I wrote in the process of writing my proposed
gl_nir mediump lowering.

Even if the conversion isn't complete, getting these tests to run faster
is probably a good idea on its own, for anyone iterating running Mesa's
unit tests (80 tests in 25ms, compared to 109 tests in 1.5s!).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21886>

glsl/standalone: Make all standalone contexts have NewProgram set.

It was in the standalone compiler but not unit tests.  Only the standalone
compiler had done linking and needed it, so far.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21886>

glsl/standalone: Pull out a helper function for adding GLSL source shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21886>

glsl/standalone: Pull program create/destroy out to a public function.

For reuse with unit tests.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21886>

freedreno/a6xx: Restore mode

We set the "mode" to 1 for CS because we want CP_SET_DRAW_STATE to
immediately execute the state groups.  But in the 3d path, we don't
restore the value in the sysmem path.  This was causing GPU faults
on 7c3 and presumably other a6xx gen4 things.  But somehow not on
a6xx gen1.

Let's just set it as part of initial state restore where we are
ensuring that the GPU is in a sane state.

Fixes: dec49ec50a2 ("freedreno/a6xx: Move CS state to PROG state group")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22080>

ci/docs: start documenting ci_run_n_monitor.py

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22079>

intel/fs: restore message layout changes for cube array

This reverts commit bc04e2dacac that handled the change as a WA while
this is about a new feature, change done in message layout. Patch also
changes the original comment to not refer to Wa but bspec page.

Fixes: bc04e2dacac ("intel/fs: use generated helpers for Wa_1209978020 / Wa_18012201914")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22068>

Move combining clip and cull optimization before linking

As far gl_nir_link_glsl fills xfb data we should do it after lowering clip and cull in order to get correct locations.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7152
Signed-off-by: Oleksii Bozhenko <oleksii.bozhenko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21625>

egl: don't expose swrast device if swrast is not built

This fixes piglit/egl_ext_device_base without swrast.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20951>

egl: reorder code in _eglQueryDevicesEXT, add *swrast variable

This is a preparation for the next commit. No change in behavior.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20951>

ci: deduplicate compiler wrappers

Signed-off-by: Eric Engestrom <eric@igalia.com>
Suggested-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21997>

ci: always use the -Werror wrapper

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21997>

ci: add linker wrapper for clang

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21997>

ci: centralize detection of ccache in link-werror wrapper

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21997>

zink/ci: add a test to the fails list

KHR-GL46.multi_bind.dispatch_bind_image_texture has been failing on
both Navi10 and VanGogh, so let's document that.

Zmike says he could not reproduce the fails on a newer version of
glcts, so the next release should address this issue.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22055>

radv/ci: update the navi10 expectations

As part of https://gitlab.freedesktop.org/tanty/mesa-valve-ci/-/jobs/38416444,
we saw the following flakes:

 - dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.2_cmdbuffers_resuming
 - dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.contents_secondary_2_primary_cmdbuffers_resuming
 - dEQP-VK.pipeline.fast_linked_library.extended_dynamic_state.two_draws_static.topology_line

And the following failure (seen 4/4 times in the run):

 - dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.linear_interpolation.offset_min_2_samples,Fail

Samuel told me that these are usual flakes, so let's document all of them.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22055>

anv,hasvk: cleanup unused enum

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22070>

zink: track whether zsbuf is unused

zink_is_zsbuf_used updates dynamically, so its return may not reflect
the actual state of the current renderpass

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22054>

panfrost: fix strict-aliasing violations when packing fb ptrs

Compilers are free to make the assumption that pointers don't violate
strict aliasing. If that assumption is incorrect, as it is with the
framebuffer pointer packing code here, the job can fail.

This depends heavily on the compiler and optimization levels, so it's
hard to reproduce, but it did happen for at least two users running with
-O2 on gcc.

Fixes: 67cbbf941751 ("panfrost: Use framebuffer pointer XML")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8627
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21991>

lima/ci: restore swap buffers egl tests

With the weston idle-time issue fixed, these no longer timeout and
can be enabled again.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22012>

nir/range_analysis: use perform_analysis() in nir_analyze_range()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21381>

nir/range_analysis: use perform_analysis() in nir_unsigned_upper_bound()

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21381>

nir/range_analysis: add helpers for limiting stack usage

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21381>

nir/range_analysis: add missing masking of shift amounts

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Fixes: 72ac3f60261 ("nir: add nir_unsigned_upper_bound and nir_addition_might_overflow")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21381>

util/dynarray: allow an initial stack allocation to be used

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21381>

intel/isl: Support Yf/Ys/Tile-64 in isl_surf_get_image_offset_sa

All that's really needed here is to handle the array offsetting by using
an Z or array offset instead of the Y offset.

This patch originally changed get_image_offset_sa_gfx9_1d(), but since
we only use linear with the 1d case, it was dropped.

Rework:
 * Jordan: Include ISL_TILING_64 as well
 * Jordan: Drop change to get_image_offset_sa_gfx9_1d as
   recommended by Nanley

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21113>

radv: use common GetBufferMemoryRequirements2()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22047>

v3d/ci: group dEQP-GLES3.functional.texture.specification.teximage2d_pbo.* flakes and add another one

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22063>

ir3: Use umod_imm

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>

radv: Use umod_imm

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>

v3d,v3dv: Use udiv_imm/umod_imm

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>

blorp,anv,hasvk: Use umod_imm

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>

nir/builder: Add nir_umod_imm helper

Like nir_udiv_imm, we can do a similar power-of-two trick. It's also really
convenient.

v2: Assert reasonable bounds on the modulus (Faith).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v1]
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22010>

nir: optimize i2f(f2i(fsign))

Foz-DB Navi10:
Totals from 3013 (2.23% of 134906) affected shaders:
VGPRs: 138068 -> 136964 (-0.80%); split: -0.80%, +0.00%
CodeSize: 10476416 -> 10391800 (-0.81%)
MaxWaves: 79118 -> 80088 (+1.23%)
Instrs: 1963227 -> 1945003 (-0.93%)
Latency: 24734883 -> 24649279 (-0.35%); split: -0.39%, +0.05%
InvThroughput: 6366777 -> 6334735 (-0.50%); split: -0.50%, +0.00%
VClause: 36845 -> 36882 (+0.10%); split: -0.26%, +0.36%
SClause: 59249 -> 59273 (+0.04%); split: -0.25%, +0.29%
Copies: 108570 -> 108501 (-0.06%); split: -0.19%, +0.13%
PreSGPRs: 105371 -> 105862 (+0.47%)
PreVGPRs: 117675 -> 116625 (-0.89%); split: -0.89%, +0.00%

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22003>

pvr: Don't allocate/upload 0 size coeff programs

Fixes assert seen in dEQP-Vk.api.smoke.triangle

Signed-off-by: Jarred Davies <jarred.davies@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22051>

pvr: fix clang-format issue

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22056>

aco: drop leftover variable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8652
Fixes: 44fdd2ebcb27 ("aco: end reduce tmp after control flow, when used within control flow")

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22011>

ci/etnaviv: Get the gc2000_piglit manual job mostly working.

It was timing out, and the xfails were rather stale.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22039>

ci/hasvk: Update some xfails from the 8-sample fast clear disable.

Fixes: e509afacf3fb ("hasvk: Disable non-zero fast clears for 8xMSAA images")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22039>

ci/crocus: Update expectations from VK CTS 1.3.5.0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22039>

ci/iris: Update more manual job xfails from the Wayland build change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22039>