Tom Rini [Sun, 27 Dec 2015 14:15:57 +0000 (09:15 -0500)]
Merge branch 'master' of git.denx.de/u-boot-sunxi
Hans de Goede [Wed, 23 Dec 2015 10:48:40 +0000 (11:48 +0100)]
sunxi: Reduce Orangepi PC RAM speed to 624 MHz
There are some reports of stability issues at 672 MHz, see:
http://linux-sunxi.org/Orange_Pi_PC#DRAM_clock_speed_limit
So reduce the DRAM speed to 624MHz which seems to be reliable everywhere.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Tom Rini [Thu, 24 Dec 2015 14:31:35 +0000 (09:31 -0500)]
Merge git://git.denx.de/u-boot-socfpga
Conflicts:
include/configs/axs101.h
Signed-off-by: Tom Rini <trini@konsulko.com>
Chin Liang See [Wed, 23 Dec 2015 14:07:49 +0000 (22:07 +0800)]
arm: socfpga: Fix i2c mux on cyclone5-socdk board
Updated pinmux group GENERALIO[15-16] for i2c.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: shengjiangwu <shengjiangwu@icloud.com>
shengjiangwu [Wed, 23 Dec 2015 02:37:31 +0000 (10:37 +0800)]
arm: socfpga: Fix USB doesn't work on socdk board
Updated pinmux group EMACIO[1-8] and EMACIO[10-13] for USB.
Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Marek Vasut [Sun, 20 Dec 2015 03:00:46 +0000 (04:00 +0100)]
arm: socfpga: Add support for Denali NAND controller
Add common configuration bits for the Denali NAND controller and also
support for using it as a boot device in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:45 +0000 (04:00 +0100)]
arm: socfpga: Enable DFU MMC support only if DM_MMC is enabled
It is not possible to compile DFU MMC support if the MMC support is not
compiled into U-Boot. Secure the code with an ifdef to prevent compiler
splat.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:44 +0000 (04:00 +0100)]
arm: socfpga: Enable SPL MMC/SPI support only if DM_MMC/SPI is enabled
It is not possible to compile MMC/SPI SPL if the respective DM_MMC/DM_SPI
bits are not enabled. Secure the code with an ifdef to prevent compiler
splat.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:43 +0000 (04:00 +0100)]
arm: socfpga: Unreset NAND in U-Boot
Make sure the NAND reset is not asserted in full U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:42 +0000 (04:00 +0100)]
arm: socfpga: Unreset NAND in SPL
If the system boots from NAND, make sure to de-assert the NAND IP
reset, otherwise the system will get stuck.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:41 +0000 (04:00 +0100)]
arm: socfpga: Define NAND reset bit
Define the NAND reset bit and fix the ordering of the macros.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
shengjiangwu [Tue, 22 Dec 2015 09:18:09 +0000 (17:18 +0800)]
arm: socfpga: Fix QSPI doesn't work on socdk board
Updated pinmux group MIXED1IO[15-20] for QSPI.
Updated QSPI clock.
Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
shengjiangwu [Tue, 22 Dec 2015 07:22:02 +0000 (15:22 +0800)]
arm: socfpga: Fix emac1 doesn't work on socdk board
Updated pinmux group MIXED1IO[0-13] for RGMII1.
Updated EMAC1 clock.
Signed-off-by: shengjiangwu <shengjiangwu@icloud.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:42 +0000 (15:32 +0800)]
arm: socfpga: sr1500: Update qspiboot to use UBIFS
Update the qspiboot console command to use UBIFS instead
of old jffs2 file system.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:41 +0000 (15:32 +0800)]
arm: socfpga: sockit: Update qspiboot to use UBIFS
Update the qspiboot console command to use UBIFS instead
of old jffs2 file system.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:40 +0000 (15:32 +0800)]
arm: socfpga: arria5_socdk: Update qspiboot to use UBIFS
Update the qspiboot console command to use UBIFS instead
of old jffs2 file system.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:39 +0000 (15:32 +0800)]
arm: socfpga: cyclone5_socdk: Update qspiboot to use UBIFS
Update the qspiboot console command to use UBIFS instead
of old jffs2 file system.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:38 +0000 (15:32 +0800)]
arm: socfpga: sr1500: Enable qspiload console command
Enabling qspiload command which will load the kernel
image and dtb from UBIFS within MTD partition labeled
UBI.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:37 +0000 (15:32 +0800)]
arm: socfpga: sockit: Enable qspiload console command
Enabling qspiload command which will load the kernel
image and dtb from UBIFS within MTD partition labeled
UBI.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:36 +0000 (15:32 +0800)]
arm: socfpga: arria5_socdk: Enable qspiload console command
Enabling qspiload command which will load the kernel
image and dtb from UBIFS within MTD partition labeled
UBI.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:35 +0000 (15:32 +0800)]
arm: socfpga: cyclone5_socdk: Enable qspiload console command
Enabling qspiload command which will load the kernel
image and dtb from UBIFS within MTD partition labeled
UBI.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:34 +0000 (15:32 +0800)]
arm: socfpga: sr1500: Enable ubiload console command
Enabling ubiload command to load kernel image and
device tree from mtd part labeled "UBI". ubiload
command will search the file from directory /boot.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:33 +0000 (15:32 +0800)]
arm: socfpga: sockit: Enable ubiload console command
Enabling ubiload command to load kernel image and
device tree from mtd part labeled "UBI". ubiload
command will search the file from directory /boot.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:32 +0000 (15:32 +0800)]
arm: socfpga: arria5_socdk: Enable ubiload console command
Enabling ubiload command to load kernel image and
device tree from mtd part labeled "UBI". ubiload
command will search the file from directory /boot.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:31 +0000 (15:32 +0800)]
arm: socfpga: cyclone5_socdk: Enable ubiload console command
Enabling ubiload command to load kernel image and
device tree from mtd part labeled "UBI". ubiload
command will search the file from directory /boot.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:30 +0000 (15:32 +0800)]
arm: socfpga: sr1500: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:28 +0000 (15:32 +0800)]
arm: socfpga: arria5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:27 +0000 (15:32 +0800)]
arm: socfpga: cyclone5: Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS
Undefine CONFIG_SPI_FLASH_USE_4K_SECTORS for UBI
and UBIFS support on serial NOR flash
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Tue, 22 Dec 2015 07:32:26 +0000 (15:32 +0800)]
arm: socfpga: Enable ubi and ubifs support
When QSPI and NAND is enabled, the ubi and ubifs support
will be enabled too.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Masahiro Yamada [Mon, 21 Dec 2015 02:14:22 +0000 (11:14 +0900)]
ARM: dts: uniphier: add SD/MMC pinmux nodes
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 18 Dec 2015 05:52:32 +0000 (14:52 +0900)]
ARM: uniphier: allow to run zImage rather than uImage
UniPhier SoC family adopt ARM Multi-platform in Linux since the first
upstreaming. Because CONFIG_ARM_PATCH_PHYS_VIRT is defined, the
kernel image is completely position-independent. There is no reason
to decide the load address on compile time, but it is up to the boot
loader. Now, zImage is handier than uImage, also it allows to skip
the relocation of the kernel image.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 09:00:41 +0000 (18:00 +0900)]
ARM: uniphier: rename rest of defconfig files
Rename rest of defconfig files of UniPhier SoC family to have the
prefix uniphier_.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 09:00:40 +0000 (18:00 +0900)]
ARM: uniphier: support ProXstream2, PH1-LD6b boards in single defconfig
These boards are similar enough to be supported in a single defconfig
file. Distinguish one from another by "DEVICE_TREE" from the command
line. The how-to-build in doc/README.uniphier should be also updated.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 09:00:39 +0000 (18:00 +0900)]
ARM: uniphier: merge ph1_ld4_defconfig and ph1_sld8_defconfig
These two are similar enough to be merged into a single
defconfig file. Distinguish one from another by "DEVICE_TREE"
from the command line. The how-to-build in doc/README.uniphier
should be also updated.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 09:00:38 +0000 (18:00 +0900)]
ARM: uniphier: drop fdt_file from CONFIG_EXTRA_ENV_SETTINGS
Now this environment is run-time set to the DTB name U-Boot is really
running with. Drop the static define.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 09:00:37 +0000 (18:00 +0900)]
ARM: uniphier: set DTB file name to fdt_file environment
When we want to boot Linux with a DTB file downloaded from a TFTP
server or somewhere, we need to know the file name to be downloaded.
Assume the U-Boot configuration is shared among some similar boards.
If they are similar enough, the difference only appears in device
trees. The build procedure would be like this:
- Board A: make foo_common_defconfig && make DEVICE_TREE=foo_board_a
- Board B: make foo_common_defconfig && make DEVICE_TREE=foo_board_b
- Board C: make foo_common_defconfig && make DEVICE_TREE=foo_board_c
In this case, the U-Boot image contains nothing about the DTB file name
it is running with. (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this
purpose because it is painful to change it from "make menuconfig" for
each board.)
This commit allows to lookup the DTB file name based on the compatible
string and set it to "fdt_file" environment. Then "tftpboot $fdt_file"
will download the file we want.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:47 +0000 (17:47 +0900)]
ARM: uniphier: merge umc/ and ddrphy/ into a single directory
The UMC (Universal Memory Controller) and the DDR PHY block are
highly related to each other. It is better to have both code in the
same directory.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:46 +0000 (17:47 +0900)]
ARM: uniphier: display model number all the time on boot up
Both "Model 1" and "Model 2" are supported for ProXstream2 and
PH1-LD6b boards. It is useful to show the model number in the
boot banner.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:45 +0000 (17:47 +0900)]
ARM: uniphier: add macros and revision IDs for sLD11 and LD10
These are new SoCs from Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:44 +0000 (17:47 +0900)]
ARM: uniphier: compile uniphier_get_board_param() for U-Boot proper
Compile this file for U-Boot proper as well as SPL, so that the
U-Boot proper can call uniphier_get_board_param().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:43 +0000 (17:47 +0900)]
ARM: uniphier: split ProXstream2 board data and change DDR frequency
The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz,
while only up to 1866MHz on PH1-LD6b boards.
Split the board data structure and change the DDR frequency of
ProXstream2 boards to 2133 MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:42 +0000 (17:47 +0900)]
ARM: uniphier: call uniphier_get_board_param() without FDT blob
Move "gd->fdt_blob" from the caller to the callee so that this
function can be used more easily.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 08:47:41 +0000 (17:47 +0900)]
ARM: uniphier: add functions to get SoC model/revision
We sometimes have to implement different code depending on the SoC
revision. This commit adds functions to get the model/revision
number.
Note:
Model number: incremented on major changes of the SoC
Revision number: incremented on minor changes of the SoC
The "Model 2" exists for PH1-sLD3, ProXstream2/PH1-LD6b.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Thu, 17 Dec 2015 06:05:01 +0000 (15:05 +0900)]
ARM: dts: uniphier: use stdout-path instead of console
Sync device trees with Linux.
Linux commit:
06ff6b2d63210922a1b1d0f4997e29ce75b5e0c0
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:54:08 +0000 (10:54 +0900)]
ARM: dts: uniphier: add outer cache nodes
These nodes are not parsed by U-Boot for now, but syncing device trees
with Linux is helpful for easier diffing.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:54:07 +0000 (10:54 +0900)]
ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsi
UniPhier SoCs (except PH1-sLD3) have several nodes in common.
Factor out them into uniphier-common32.dtsi. This improves the code
maintainability.
PH1-sLD3 is so old that it has more or less different register maps
than the others. So, it cannot be included in this refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:50:26 +0000 (10:50 +0900)]
ARM: uniphier: allow DDR function to return more precise error code
Return different error code depending on the reason so that the
caller can know the cause of the failure.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:44:28 +0000 (10:44 +0900)]
ARM: uniphier: use BIT() macro for DDR PHY header
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:42:29 +0000 (10:42 +0900)]
ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_*
The bit 27-24 of the DTCR register is described as RANKEN in the
DDR PHY databook. Follow this abbreviation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 16 Dec 2015 01:36:13 +0000 (10:36 +0900)]
ARM: uniphier: add const qualifier to constant array
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 11 Dec 2015 08:17:53 +0000 (17:17 +0900)]
ARM: uniphier: add static qualifiers to locally used functions
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 22 Dec 2015 03:16:01 +0000 (04:16 +0100)]
arm: socfpga: Enable simple bus in SPL on all boards
The simple bus support must be enabled in SPL, otherwise the boards
will not be able to parse the DT and will fail to boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Tue, 22 Dec 2015 03:15:21 +0000 (04:15 +0100)]
arm: socfpga: Make /soc available in pre-reloc
This node must be available before relocation, otherwise the board
will not find mmc and will thus not boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Chin Liang See [Mon, 21 Dec 2015 15:01:51 +0000 (23:01 +0800)]
arm: socfpga: Enabling MTD default partitions
Enabling MTD default partitions if its not defined in board
configuration file. The layout as below
device nor0 <
ff705000.spi.0>, # parts = 6
#: name size offset mask_flags
0: u-boot 0x00100000 0x00000000 0
1: env1 0x00040000 0x00100000 0
2: env2 0x00040000 0x00140000 0
3: UBI 0x03e80000 0x00180000 0
4: boot 0x00e80000 0x00180000 0
5: rootfs 0x01000000 0x01000000 0
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:51 +0000 (21:02 +0800)]
arm: socfpga: socrates: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:50 +0000 (21:02 +0800)]
arm: socfpga: sockit: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:49 +0000 (21:02 +0800)]
arm: socfpga: mcvevk: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:48 +0000 (21:02 +0800)]
arm: socfpga: de0_nano_soc: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:47 +0000 (21:02 +0800)]
arm: socfpga: arria5_socdk: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:46 +0000 (21:02 +0800)]
arm: socfpga: cyclone5_socdk: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Chin Liang See [Mon, 21 Dec 2015 13:02:45 +0000 (21:02 +0800)]
arm: socfpga: Consolidate SDMMC environment
Remove the duplication of SDMMC environment configuration
from each boards' configuration header file into
socfpga_common.h
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Marek Vasut [Sun, 20 Dec 2015 02:59:23 +0000 (03:59 +0100)]
net: designware: Zap trailing backslash
Trailing backslashes are necessary only in macros, not in the actual
code, so remove them.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sun, 20 Dec 2015 02:59:41 +0000 (03:59 +0100)]
net: designware: Zap CONFIG_DW_AUTONEG
This symbol is not used anywhere, so remove it. For spear600, remove
it from the board file, since the symbol is not defined for spear600
either.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Mon, 7 Dec 2015 12:53:29 +0000 (20:53 +0800)]
net: eth_designware: select PHYLIB in Kconfig
Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB
from legacy board header files.
This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE
are selected.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reported-by: Pavel Machek <pavel@denx.de>
Acked-by: Chin Liang See <clsee@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Tested-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Sun, 20 Dec 2015 03:00:09 +0000 (04:00 +0100)]
arm: socfpga: Actually enable L2 cache
The L2 cache was never enabled in the v7_outer_cache_enable(), fix
this and enable the L2 cache.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Tom Rini [Tue, 22 Dec 2015 02:07:04 +0000 (21:07 -0500)]
Prepare v2016.01-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 21 Dec 2015 23:25:10 +0000 (18:25 -0500)]
Merge git://git.denx.de/u-boot-arc
Alexey Brodkin [Thu, 10 Dec 2015 13:56:42 +0000 (16:56 +0300)]
axs103: add support of generic OHCI USB 1.1 controller
This commit adds support of USB 1.1 storage media on AXS103 board.
For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing
messages like this:
------------------------>8-------------------
AXS# usb start
starting USB...
USB0: USB EHCI 1.00
scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80
unable to get device descriptor (error=-1)
1 USB Device(s) found
------------------------>8-------------------
As a work-around we're falling back to USB 1.1.
Indeed it is much slower but at least USB storage devices are usable on
AXS103.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Aleksei Mamlin [Sun, 20 Dec 2015 21:45:13 +0000 (00:45 +0300)]
sunxi: Add CONFIG_SUNXI_NO_PMIC to Marsboard A10 config
Marsboard A10 haven't any PMIC at all, so add CONFIG_SUNXI_NO_PMIC=y to
Marsboard_A10_defconfig
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 21 Dec 2015 19:22:00 +0000 (20:22 +0100)]
sunxi: Select DM_KEYBOARD
We need to select DM_KEYBOARD now that the usb-kbd code has been converted
to this, otherwise usb keyboards do not work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Karsten Merker [Wed, 16 Dec 2015 19:59:40 +0000 (20:59 +0100)]
sunxi: Enable a second mmc socket as boot target in the environment
Some sunxi-based boards (such as the Olimex A20-SOM-EVB) have a
second MMC socket. This socket is not bootable hardware-wise,
i.e. u-boot itself cannot be loaded from it, but once u-boot has
started, the second socket can be used in the boot process
provided by config_distro_bootcmd.h.
If a second MMC socket is present, place it in the boot order
after the first MMC socket.
Signed-off-by: Karsten Merker <merker@debian.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Karsten Merker [Wed, 16 Dec 2015 19:59:39 +0000 (20:59 +0100)]
sunxi: A20-Olimex-SOM-EVB defconfig: enable mmc3
The Olimex A20-SOM-EVB is an evaluation board for the Olimex
A20-SOM system-on-module. The baseboard provides a full-size SD
socket (connected to mmc3) in addition to the micro-SD socket on
the SOM itself (which is connected to mmc0).
Enable the mmc3 controller in the board defconfig.
Signed-off-by: Karsten Merker <merker@debian.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Sun, 20 Dec 2015 11:30:18 +0000 (12:30 +0100)]
sun5i: Add defconfig and dts file for the Empire Electronix D709 tablet
The Empire Electronix D709 tablet is a fairly standard 7" A13 tablet,
featuring usb-wifi, a micro-sd slot, micro-usb otg and headphone jack.
Empire Electronix is written on the back of the tablet, the D709 model
info can be found in the about tablet menu in android.
The PCB has no markings to speak of.
This dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Simon Glass [Sat, 19 Dec 2015 22:44:04 +0000 (15:44 -0700)]
x86: Remove Graeme Russ from the git alias file
As requested, remove Graeme's email address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Sun, 20 Dec 2015 03:05:31 +0000 (22:05 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-socfpga
Dinh Nguyen [Thu, 3 Dec 2015 22:05:59 +0000 (16:05 -0600)]
arm: socfpga: fix trivial header preprocessor for socfpga_common.h
Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with
__CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Dinh Nguyen [Wed, 2 Dec 2015 19:31:33 +0000 (13:31 -0600)]
arm: socfpga: fix up a questionable macro for SDMMC
Move the macro into the socfpga_dwmci_clksel().
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Marek Vasut <marex@denx.de>
[fix parenthesis in the sdmmc_mask]
Dinh Nguyen [Wed, 2 Dec 2015 19:31:32 +0000 (13:31 -0600)]
arm: socfpga: remove building scan manager
The scan manager is not needed for the Arria10. Edit the makefile to
build the scan manager for arria5 and cyclone5 only.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
Dinh Nguyen [Wed, 2 Dec 2015 19:31:25 +0000 (13:31 -0600)]
arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config property
In order to re-use as much Cyclone5 and Arria5 code as possible to support
the Arria10 platform, we need to wrap some of the code with #ifdef's. By
adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check
for both AV || AV.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Dinh Nguyen [Mon, 7 Dec 2015 22:48:04 +0000 (16:48 -0600)]
arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDR
Now that the USB DWC2 probing is done from OF, remove this note to add
CONFIG_USB_DWC2_REG_ADDR.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 20:10:44 +0000 (21:10 +0100)]
arm: socfpga: Drop the board boilerplate
Drop all the common board code, since it is not completely useless.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 20:07:23 +0000 (21:07 +0100)]
arm: socfpga: Introduce common board code
The SoCFPGA has reached a point where every single board code become
the same, since each and every single board is probed equally from OF.
Move the common board code into arch/arm/mach-socfpga/ .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 19:08:21 +0000 (20:08 +0100)]
arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARD
We already have the CONFIG_SYS_BOARD variable, which defines the name
of the board. The value in CONFIG_HOSTNAME is exactly the same and is
thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 19:05:46 +0000 (20:05 +0100)]
arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDOR
We already have the CONFIG_SYS_VENDOR variable, which defines the
manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER
is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 19:01:40 +0000 (20:01 +0100)]
arm: socfpga: sockit: Zap VIRTUAL_TARGET
There is no VT for this board, so remove this incorrect macro.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 19:00:52 +0000 (20:00 +0100)]
arm: socfpga: de0_nano: Zap VIRTUAL_TARGET
There is no VT for this board, so remove this incorrect macro.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:24:22 +0000 (19:24 +0100)]
arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 18:28:44 +0000 (19:28 +0100)]
arm: socfpga: Allow DWC2 UDC probing from OF
The USB gadget framework does not support DM yet, so add this bit
to let DWC2 UDC probe from OF on platforms which support it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Lukasz Majewski <l.majewski@majess.pl>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Marek Vasut [Sat, 5 Dec 2015 16:55:36 +0000 (17:55 +0100)]
arm: socfpga: socrates: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 16:55:54 +0000 (17:55 +0100)]
arm: socfpga: sockit: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 18:00:00 +0000 (19:00 +0100)]
arm: socfpga: de0_nano: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 16:55:19 +0000 (17:55 +0100)]
arm: socfpga: cyclone5-socdk: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 16:54:35 +0000 (17:54 +0100)]
arm: socfpga: arria5-socdk: Remove Micrel PHY configuration
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 16:53:40 +0000 (17:53 +0100)]
arm: socfpga: socrates: Add missing PHY skew config
Add missing KSZ9021 PHY skew configuration for the EBV socrates board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Marek Vasut [Sat, 5 Dec 2015 16:41:58 +0000 (17:41 +0100)]
net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF
Add code to process the KSZ9021/KSZ9031 OF props if they are present
and configure skew registers based on the information from the OF.
This code is only enabled if the DM support for ethernet is also
enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
V2: - Implement struct ksz90x1_reg_field to describe the skew register
fields more accurately.
- Fix RXDV/TXEN skew register default value and offset.
projects / platform / kernel / u-boot.git / log